JP3112253B2 - High frequency semiconductor device - Google Patents

High frequency semiconductor device

Info

Publication number
JP3112253B2
JP3112253B2 JP08318072A JP31807296A JP3112253B2 JP 3112253 B2 JP3112253 B2 JP 3112253B2 JP 08318072 A JP08318072 A JP 08318072A JP 31807296 A JP31807296 A JP 31807296A JP 3112253 B2 JP3112253 B2 JP 3112253B2
Authority
JP
Japan
Prior art keywords
transmission line
frequency
dielectric substrate
frequency transmission
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP08318072A
Other languages
Japanese (ja)
Other versions
JPH10163375A (en
Inventor
幹男 藤井
謙治 北澤
慎一 郡山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP08318072A priority Critical patent/JP3112253B2/en
Publication of JPH10163375A publication Critical patent/JPH10163375A/en
Application granted granted Critical
Publication of JP3112253B2 publication Critical patent/JP3112253B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、マイクロ波帯から
ミリ波帯領域の高周波回路素子を搭載した高周波用半導
体装置に関し、特に、高周波信号の特性を劣化させるこ
となく半導体素子や回路部品に信号を伝送することがで
きる半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency semiconductor device equipped with a high-frequency circuit element in a microwave band to a millimeter wave band, and more particularly to a semiconductor device and a circuit component without deteriorating the characteristics of a high-frequency signal. The present invention relates to a semiconductor device capable of transmitting data.

【0002】[0002]

【従来技術】従来、マイクロ波やミリ波を取り扱う高周
波回路素子を搭載した半導体装置においては、高周波用
半導体素子を誘電体基板と高周波用伝送線路が形成され
た半導体パッケージ内に収納されてなり、この半導体装
置は、所定の外部電気回路基板の表面に実装され、半導
体装置の高周波用伝送線路と外部電気回路基板に形成さ
れた高周波用伝送線路とを電気的に接続して高周波信号
の入出力が行われる。
2. Description of the Related Art Conventionally, in a semiconductor device equipped with a high-frequency circuit element for handling microwaves or millimeter waves, a high-frequency semiconductor element is housed in a semiconductor package having a dielectric substrate and a high-frequency transmission line formed therein. This semiconductor device is mounted on a surface of a predetermined external electric circuit board, and electrically connects a high-frequency transmission line of the semiconductor device to a high-frequency transmission line formed on the external electric circuit board to input and output a high-frequency signal. Is performed.

【0003】このような高周波用半導体装置の実装構造
においては、高周波信号を劣化させることなく信号を入
出力することが可能なパッケージ構造および伝送線路の
設計及び製造と、外部電気回路基板に精度よく半導体装
置を実装する実装技術が要求される。
In such a mounting structure of a high-frequency semiconductor device, a package structure and a transmission line capable of inputting and outputting a signal without deteriorating a high-frequency signal are designed and manufactured, and an external electric circuit board is accurately mounted. A mounting technology for mounting a semiconductor device is required.

【0004】そこで、従来から、この種の半導体装置で
は、図4(a)(b)に示すように、誘電体からなる誘
電体基板40と蓋41により形成されたキャビティ42
内に高周波用半導体素子43を搭載して気密に封止され
ている。そして高周波信号の入出力および外部電機回路
基板への実装は、図4(a)に示されるように、高周波
用半導体素子43と接続された、ストリップ線路等の高
周波伝送線路44を壁体45を通過してキャビティ42
外に引き出し、これをさらに基板の側面を経由して底面
に配設し、底面に形成された線路を外部電気回路基板4
6の表面に形成された導体層47にロウ付け実装された
半導体装置が昭61−168939号等にて提案されて
いる。
Conventionally, in this type of semiconductor device, as shown in FIGS. 4A and 4B, a cavity 42 formed by a dielectric substrate 40 and a lid 41 made of a dielectric material.
A high-frequency semiconductor element 43 is mounted therein and hermetically sealed. As shown in FIG. 4A, the input / output of the high-frequency signal and the mounting on the external electric circuit board are performed by connecting the high-frequency transmission line 44 such as a strip line connected to the high-frequency semiconductor element 43 to the wall 45. Through the cavity 42
It is pulled out to the outside, further disposed on the bottom surface via the side surface of the board, and the line formed on the bottom surface is connected to the external electric circuit board 4.
A semiconductor device soldered and mounted on a conductor layer 47 formed on the surface of No. 6 is proposed in, for example, Japanese Patent Application Laid-Open No. 61-168939.

【0005】また、図4(b)に示すように、誘電体基
板40の底面に信号伝送線路48を形成し、この伝送線
路48と半導体素子43とをスル−ホ−ル導体49を通
じて接続した半導体装置が提案されている。この半導体
装置は、通常、伝送線路48を外部電気回路基板46の
導体層47と半田等によって接続し、実装される。
[0005] As shown in FIG. 4 (b), a signal transmission line 48 is formed on the bottom surface of the dielectric substrate 40, and the transmission line 48 and the semiconductor element 43 are connected through a through-hole conductor 49. Semiconductor devices have been proposed. This semiconductor device is usually mounted by connecting a transmission line 48 to a conductor layer 47 of an external electric circuit board 46 by soldering or the like.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、図4
(a)において、伝送線路44が壁体45を通過する場
合、壁体通過部で信号線路がマイクロストリップ線路か
らストリップ線路へと変換されるため、信号線路幅を狭
くする必要がある。その結果、この通過部で反射損、放
射損が発生しやすいため高周波信号の特性劣化が起こり
やすくなるという問題がある。また、伝送線路44が基
板の側面で曲折することから、ミリ波帯で用いた場合、
伝送線路が曲折することにより反射が大きくなり信号を
送受することが困難となる。また、素子搭載面の側面に
伝送線路を形成する関係上、半導体装置自体も必然的に
大きくなるため回路基板の小型化が困難であった。しか
も、伝送線路44をキャビティ42の外側に引出すため
に、壁体の少なくとも線路通過部は誘電体によって形成
する必要があるため、構造が複雑になり、半導体装置全
体のコストを高める要因にもなっていた。
However, FIG.
In (a), when the transmission line 44 passes through the wall 45, the signal line is converted from the microstrip line to the strip line at the wall passing portion, so that the signal line width needs to be reduced. As a result, there is a problem that reflection loss and radiation loss are apt to occur in the passing portion, so that the characteristics of the high-frequency signal are likely to deteriorate. Further, since the transmission line 44 is bent on the side surface of the substrate, when the transmission line 44 is used in a millimeter wave band,
The bending of the transmission line increases the reflection and makes it difficult to transmit and receive signals. Further, since the transmission line is formed on the side surface of the element mounting surface, the semiconductor device itself is inevitably large, and thus it is difficult to reduce the size of the circuit board. Moreover, in order to draw the transmission line 44 out of the cavity 42, at least the line passing portion of the wall needs to be formed of a dielectric material, which complicates the structure and increases the cost of the entire semiconductor device. I was

【0007】これに対して、図4(b)は、スルーホー
ル導体49によって壁体を通過しないために、信号の特
性劣化は小さいが、伝送する信号の使用周波数が10G
Hz以上になるとスルーホール導体49での透過損失が
急激に大きくなるために、マイクロ波帯からミリ波帯領
域の信号を特性劣化なく伝送することが困難であった。
On the other hand, in FIG. 4 (b), since the signal does not pass through the wall by the through-hole conductor 49, the characteristic deterioration of the signal is small, but the operating frequency of the signal to be transmitted is 10G.
When the frequency is higher than Hz, the transmission loss in the through-hole conductor 49 sharply increases, so that it is difficult to transmit a signal in a microwave band to a millimeter wave band without characteristic deterioration.

【0008】従って、本発明は、高周波伝送線路におけ
る伝送損失が小さく、且つ簡略した構造からなる小型化
が可能な高信頼性の高周波用半導体装置を提供すること
を目的とするものである。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a high-reliability high-frequency semiconductor device that has a small transmission loss in a high-frequency transmission line and has a simple structure and can be miniaturized.

【0009】[0009]

【課題を解決するための手段】本発明者等は、高周波用
としての配線基板において、低損失化、小型化をもたら
す構造について検討を重ねた結果、誘電体基板と配線に
より形成される配線基板の表面に半導体素子が搭載され
た半導体装置において、誘電体基板の表面側に半導体素
子と電気的に接続された第1の高周波用伝送線路と、前
記誘電体基板の底面側に第2の高周波用伝送線路とを形
成し、第1の高周波用伝送線路と第2の高周波用伝送線
路を電磁的に結合させることにより、伝送特性を劣化さ
せることなく、高周波信号を基板の表面から底面に伝送
することができることを見いだした。さらに、誘電体基
板表面側に、半導体素子および第1の高周波伝送線路を
取り囲むように、接地層を形成し、その接地層に、金属
などの導電性材料からなる蓋体を取り付けて気密に封止
することにより、簡単な構造によって小型のパッケージ
化が可能であるとともに、回路全体の保護、ならびに外
部からの電磁波の影響や、半導体装置からの電磁波のも
れを防止することができるものである。
Means for Solving the Problems The inventors of the present invention have repeatedly studied a structure for reducing the loss and miniaturizing a wiring board for high frequency use, and as a result, have found that a wiring board formed of a dielectric substrate and wiring is provided. A first high-frequency transmission line electrically connected to the semiconductor element on the front side of the dielectric substrate, and a second high-frequency transmission line on the bottom side of the dielectric substrate. A transmission line is formed, and the first high-frequency transmission line and the second high-frequency transmission line are electromagnetically coupled to each other to transmit a high-frequency signal from the top surface to the bottom surface of the substrate without deteriorating transmission characteristics. I found what I could do. Further, a ground layer is formed on the surface of the dielectric substrate so as to surround the semiconductor element and the first high-frequency transmission line, and a lid made of a conductive material such as metal is attached to the ground layer to hermetically seal. By stopping, it is possible to form a small package with a simple structure, and at the same time, it is possible to protect the entire circuit, prevent the influence of external electromagnetic waves, and prevent the leakage of electromagnetic waves from the semiconductor device. .

【0010】即ち、本発明の高周波用半導体装置は、誘
電体基板と、該誘電体基板の表面に搭載された高周波用
半導体素子と、該誘電体基板の表面に被着形成され前記
高周波用半導体素子と電気的に接続された第1の高周波
用伝送線路と、該誘電体基板の表面に被着形成された電
源供給層と、前記誘電体基板の底面に被着形成された第
2の高周波用伝送線路と、前記高周波用半導体素子およ
び前記第1の高周波用伝送線路を取り囲むように前記誘
電体基板表面に被着形成された第1の接地層と、前記誘
電体基板内に形成され、スロット孔を有する第2の接地
層と、前記第1の接地層に前記高周波用半導体素子およ
び前記第1の高周波用伝送線路を気密に封止するように
取り付けられた導電性蓋体と、を具備するとともに、前
記第1の高周波用伝送線路の終端部と前記第2の高周波
用伝送線路の終端部とを前記スロット孔を介して対峙さ
せて、前記第1の高周波用伝送線路と第2の高周波用伝
送線路とを電磁的に結合し、前記第1の接地層と第2の
接地層とを誘電体基板内に形成したスルーホール導体に
よって電気的に接続し、かつ前記電源供給層を誘電体基
板内に形成されたスルーホール導体を介して誘電体基板
の底面に引き出してなることを特徴とするものである。
That is, a high-frequency semiconductor device according to the present invention comprises a dielectric substrate, a high-frequency semiconductor element mounted on the surface of the dielectric substrate, and the high-frequency semiconductor device formed on the surface of the dielectric substrate. A first high-frequency transmission line electrically connected to the element, and an electric line formed on the surface of the dielectric substrate.
A source supply layer, a second high-frequency transmission line adhered to the bottom surface of the dielectric substrate, and a surface of the dielectric substrate surrounding the high-frequency semiconductor element and the first high-frequency transmission line. A first ground layer formed and adhered to the first ground layer;
A second ground formed in the electrical substrate and having a slot hole
A semiconductor layer for high frequency and a first ground layer.
And the first high-frequency transmission line is hermetically sealed.
A conductive lid attached, and the terminal end of the first high-frequency transmission line and the terminal end of the second high-frequency transmission line face each other via the slot hole. The first high-frequency transmission line and the second high-frequency transmission line are electromagnetically coupled, and the first ground layer and the second ground layer are electrically connected by a through-hole conductor formed in a dielectric substrate. And the power supply layer is drawn out to the bottom surface of the dielectric substrate via a through-hole conductor formed in the dielectric substrate.

【0011】本発明によれば、誘電体基板の表面側に
て、半導体素子を搭載し、この素子と電気的に接続され
た第1の高周波用伝送線路を形成し、誘電体基板の底面
に第2の高周波用伝送線路を形成し、これらを誘電体基
板内で電磁結合させることにより、伝送線路が誘電体か
らなる壁体内を通過したり、スルーホール導体等を経由
することがないために、高周波信号が線路内を通過する
際に生じる反射損や放射損の発生を極力抑制することが
でき、低伝送損失で且つ小型化が可能な半導体装置を提
供することができる。
According to the present invention, a semiconductor element is mounted on the front side of the dielectric substrate, and a first high-frequency transmission line electrically connected to the semiconductor element is formed. By forming the second high-frequency transmission line and electromagnetically coupling them in the dielectric substrate, the transmission line does not pass through the wall made of a dielectric or pass through a through-hole conductor or the like. Further, it is possible to provide a semiconductor device capable of minimizing reflection loss and radiation loss generated when a high-frequency signal passes through a line, and having a low transmission loss and a small size.

【0012】また、誘電体基板表面の半導体素子や第1
の高周波伝送線路は、その周囲に形成された第1の接地
層、その接地層と電気的に接続された導電性蓋体によっ
て囲まれた構造となるために、外部電磁波の影響や電磁
波のもれを防止することができる。
Further, the semiconductor element on the surface of the dielectric substrate or the first
Has a structure surrounded by a first ground layer formed therearound and a conductive lid electrically connected to the ground layer, so that the influence of external electromagnetic waves and This can be prevented.

【0013】さらに、高周波用伝送線路間の電磁結合構
造としては、前記誘電体基板内に第2の接地層を形成す
るとともに、該第2の接地層にスロット孔を形成し、前
記第1の高周波用伝送線路と、前記第2の高周波用伝送
線路とを前記スロット孔を介して対峙する位置に形成し
て電磁結合させることにより、伝送線路間での信号の損
失なく信号の伝達が可能となる。
Further, as an electromagnetic coupling structure between the high-frequency transmission lines, a second ground layer is formed in the dielectric substrate, and a slot hole is formed in the second ground layer. By forming the high-frequency transmission line and the second high-frequency transmission line at positions facing each other via the slot hole and electromagnetically coupling, it is possible to transmit a signal without loss of a signal between the transmission lines. Become.

【0014】さらに、第1の高周波伝送線路および第2
の高周波伝送線路をマイクロストリップ線路により構成
する場合、誘電体基板内に第2の接地層を形成し、その
第2の接地層と第1の接地層とを電気的に接続すること
により、半導体素子は、3次元的にその周囲を完全に接
地層により取り囲まれた構造となるために、外部電磁波
の影響や電磁波のもれをさらに防止することが可能とな
る。
Further, the first high-frequency transmission line and the second high-frequency transmission line
When the high-frequency transmission line is constituted by a microstrip line, a second ground layer is formed in a dielectric substrate, and the second ground layer and the first ground layer are electrically connected to each other, whereby the semiconductor Since the element has a structure in which the element is three-dimensionally completely surrounded by the ground layer, it is possible to further prevent the influence of external electromagnetic waves and leakage of electromagnetic waves.

【0015】[0015]

【発明の実施の形態】本発明における高周波用半導体装
置の一例を図1に示した。図1によれば、高周波用半導
体装置1は、誘電体材料からなる誘電体基板2と導電性
蓋体3によりキャビティ4が形成されており、そのキャ
ビティ4内には、MMIC、MIC等の半導体素子5が
搭載されている。誘電体基板2を構成する誘電体材料と
しては誘電率が20以下のセラミックス、ガラスセラミ
ックス、セラミック金属複合材料、ガラス有機樹脂系複
合材料等などが望ましい。
FIG. 1 shows an example of a high-frequency semiconductor device according to the present invention. According to FIG. 1, a high-frequency semiconductor device 1 has a cavity 4 formed by a dielectric substrate 2 made of a dielectric material and a conductive lid 3, and in the cavity 4, a semiconductor such as MMIC or MIC is formed. The element 5 is mounted. As the dielectric material constituting the dielectric substrate 2, ceramics having a dielectric constant of 20 or less, glass ceramics, ceramic metal composite materials, glass organic resin composite materials, and the like are desirable.

【0016】本発明によれば、上記の半導体装置のキャ
ビティ4内には、半導体素子5に信号を伝送するための
線路として、マイクロストリップ線路、ストリップ線
路、グランド付コプレーナ線路のうちから選ばれる1種
からなる第1の高周波伝送線路6が誘電体基板2の表面
に形成されている。また、誘電体基板2の表面には、図
2の誘電体基板2の平面図に示すように、半導体素子5
および第1の高周波伝送線路6を取り囲むように、第1
の接地層7が被着形成されており、この第1の接地層7
は、導電性蓋体3がロウ付け、半田付け等の手法により
電気的に接地層7と接続されている。一方、誘電体基板
2の底面には、マイクロストリップ線路、ストリップ線
路、グランド付コプレーナ線路のうちから選ばれる1種
からなる第2の高周波伝送線路8が被着形成されてい
る。
According to the present invention, in the cavity 4 of the semiconductor device, a line for transmitting a signal to the semiconductor element 5 is selected from a microstrip line, a strip line, and a coplanar line with ground. A first high-frequency transmission line 6 made of a seed is formed on the surface of the dielectric substrate 2. As shown in the plan view of the dielectric substrate 2 in FIG.
And the first high-frequency transmission line 6
Is formed on the first ground layer 7.
The conductive lid 3 is electrically connected to the ground layer 7 by a technique such as brazing or soldering. On the other hand, a second high-frequency transmission line 8 composed of one selected from a microstrip line, a strip line, and a coplanar line with ground is formed on the bottom surface of the dielectric substrate 2.

【0017】導電性蓋体3は、キャビティ4からの電磁
波が外部に漏洩したり、電磁波が外部にもれるのを防止
できる導電性材料から構成され、金属、導電性セラミッ
クス、セラミック金属複合材料等が使用できるが、絶縁
基体の表面に導電性物質を塗布したものであってもよい
が、コストの点から考慮すれば金属であるのがよい。
The conductive lid 3 is made of a conductive material capable of preventing the electromagnetic wave from the cavity 4 from leaking to the outside or leaking the electromagnetic wave to the outside, and is made of metal, conductive ceramics, ceramic metal composite material, or the like. Can be used. A conductive material may be applied to the surface of the insulating substrate. However, from the viewpoint of cost, metal is preferred.

【0018】図1は、第1の高周波伝送線路6および第
2の高周波伝送線路8がマイクロストリップ線路の場合
の構造を示すものである。図1によれば、誘電体基板2
内には導体層からなる第2の接地層9がほぼ全面にわた
り形成され、キャビティ4内の誘電体基板2表面に形成
されたストリップ導体路10により第1の信号伝送線路
6が形成されている。また、半導体装置1の底面にも、
ストリップ導体路11が形成され、接地層9間において
第2の高周波伝送線路8が形成されている。
FIG. 1 shows a structure in which the first high-frequency transmission line 6 and the second high-frequency transmission line 8 are microstrip lines. According to FIG. 1, the dielectric substrate 2
A second ground layer 9 made of a conductor layer is formed over substantially the entire surface, and a first signal transmission line 6 is formed by a strip conductor path 10 formed on the surface of the dielectric substrate 2 in the cavity 4. . Also, on the bottom surface of the semiconductor device 1,
A strip conductor path 11 is formed, and a second high-frequency transmission line 8 is formed between the ground layers 9.

【0019】そして、接地層9内には、スロット孔12
が形成されており、第1の信号伝送線路6と第2の信号
伝送線路8とは、このスロット孔12を介して、各伝送
線路6、8の終端部が図1に示すような配置で対峙する
ように形成することにより、第1の高周波伝送線路6と
第2の高周波伝送線路8とは電磁結合され、損失のない
信号の伝達が行われる。より具体的には、このスロット
孔12を介したストリップ導体路10、11は、スロッ
ト孔12を挟んで必要な周波数伝送信号の1/2波長で
平面的にみて重なる対峙位置に形成されることが望まし
く、スロット孔12の形状は、長辺と短辺とからなる長
方形の孔であり、そのサイズは、使用周波数や周波数の
帯域幅により適宜設定される。特に、スロット孔の長辺
は信号周波数の1/2波長相当長さにするのが望まし
く、スロット孔の短辺は1/5波長相当長さから1/5
0波長相当長さに設定することが望ましい。
In the ground layer 9, the slot holes 12 are formed.
The first signal transmission line 6 and the second signal transmission line 8 are connected via the slot hole 12 such that the end portions of the transmission lines 6 and 8 are arranged as shown in FIG. By forming them so as to face each other, the first high-frequency transmission line 6 and the second high-frequency transmission line 8 are electromagnetically coupled, and signal transmission without loss is performed. More specifically, the strip conductor paths 10 and 11 through the slot holes 12 are formed at opposing positions where the strip conductor paths 10 and 11 overlap with each other at a half wavelength of a required frequency transmission signal when viewed in plan. Preferably, the shape of the slot hole 12 is a rectangular hole having a long side and a short side, and the size thereof is appropriately set according to a used frequency and a frequency bandwidth. In particular, it is desirable that the long side of the slot hole has a length corresponding to 1 / wavelength of the signal frequency, and the short side of the slot hole has a length corresponding to 1 / wavelength corresponding to 1 / wavelength.
It is desirable to set it to a length corresponding to 0 wavelength.

【0020】また、第2の高周波伝送線路8のストリッ
プ線路11は、外部電気回路基板(図示せず)に実装す
る際の接続端子としての機能も兼ね備え、外部電気回路
基板に形成された導体層と半田等によるロウ付けによっ
て電気的接続される。
The strip line 11 of the second high-frequency transmission line 8 also has a function as a connection terminal when mounted on an external electric circuit board (not shown), and has a conductor layer formed on the external electric circuit board. And are electrically connected by brazing with solder or the like.

【0021】また、誘電体基板2の表面に形成された第
1の接地層7は、スルーホール導体13を介して、第2
の接地層9と電気的に接続することにより、誘電体基板
2の表面に搭載および形成された半導体素子5および第
1の高周波伝送線路6は、導電性蓋体3、第1の接地層
7および第2の接地層9によって3次元的に囲まれるこ
とになり、外部からの電磁波による半導体素子の誤動作
等を防止し、また電磁波のもれを防止して半導体装置の
信頼性を高めることができる。
The first ground layer 7 formed on the surface of the dielectric substrate 2 is connected to the second ground layer 7 through the through-hole conductor 13.
Electrically connected to the ground layer 9, the semiconductor element 5 and the first high-frequency transmission line 6 mounted and formed on the surface of the dielectric substrate 2 are electrically connected to the conductive lid 3 and the first ground layer 7. In addition, the semiconductor device is three-dimensionally surrounded by the second ground layer 9 to prevent a malfunction of the semiconductor element due to an external electromagnetic wave, and to prevent leakage of the electromagnetic wave to enhance the reliability of the semiconductor device. it can.

【0022】なお、図1の半導体装置におけるキャビテ
ィ4内には、半導体素子5と、第1の信号伝送線路6を
形成するストリップ導体路10の他に、半導体素子5に
電力を供給するための電源供給層14が形成されてい
る。この電源供給層14は、低周波であるために、格別
な高周波線路により形成する必要がないため、電源供給
層14は、誘電体基板2内に形成されたスルーホール導
体15を介して誘電体基板2の底面に引き出され、外部
電気回路基板(図示せず)の導体層と電気的に接続され
る。
The cavity 4 in the semiconductor device shown in FIG. 1 has a semiconductor element 5 and a strip conductor path 10 forming the first signal transmission line 6 and a power supply for supplying power to the semiconductor element 5. A power supply layer 14 is formed. Since the power supply layer 14 has a low frequency, it is not necessary to form the power supply layer 14 with a special high-frequency line. Therefore, the power supply layer 14 is made of a dielectric material via a through-hole conductor 15 formed in the dielectric substrate 2. It is pulled out to the bottom surface of the board 2 and is electrically connected to a conductor layer of an external electric circuit board (not shown).

【0023】また、ストリップ導体路10および電源供
給層13の端部は、半導体素子5とリボン、ワイヤ、T
AB(Tape Automated Bonding) 等によってそれぞれ電
気的に接続され、特に、半導体素子5は、ストリップ導
体路10の上に半田や金バンプ等により直接載置される
ことにより、伝送損失なく接続することができる。導体
路10と半導体素子5との接続方法としては、これに限
られるものではなく、例えば、金リボンや数本のワイヤ
ボンディングにより接続したり、ポリイミド等の基板に
Cu等の導体を形成した導体板等により接続することも
できる。
The ends of the strip conductor 10 and the power supply layer 13 are connected to the semiconductor element 5 and a ribbon, wire, T
AB (Tape Automated Bonding) or the like, each of which is electrically connected. In particular, the semiconductor element 5 can be connected directly without any transmission loss by being directly mounted on the strip conductor path 10 by solder, gold bump, or the like. it can. The connection method between the conductor path 10 and the semiconductor element 5 is not limited to this. For example, a connection method may be used in which a connection is made by gold ribbon or several wire bondings, or a conductor in which a conductor such as Cu is formed on a substrate such as polyimide. It can also be connected by a plate or the like.

【0024】次に、図1、図2に示された高周波用半導
体装置の伝送特性を求めた。誘電体としては、誘電率
5.6、誘電損失31.0×10-4(測定周波数60G
Hz)の誘電体材料と、導体に銅を用いて配線基板を作
製し、配線基板の入力部における伝送特性をネットワ−
クアナライザ−により測定した。図3にその結果を示
す。この図3から、電磁結合部分を2ヶ所と全長8mm
のマイクロストリップ線路を含んで、60GHzにおい
て、S11:−25dB、S21:−1.7dB以上の
伝送特性が得られ、きわめて低損失であることが示され
た。
Next, the transmission characteristics of the high-frequency semiconductor device shown in FIGS. 1 and 2 were determined. As the dielectric, a dielectric constant of 5.6, a dielectric loss of 31.0 × 10 −4 (measurement frequency of 60 G
(Hz) using a dielectric material and copper as a conductor to fabricate a wiring board, and use a network to measure the transmission characteristics at the input part of the wiring board.
It was measured by a analyzer. FIG. 3 shows the result. From FIG. 3, two electromagnetic coupling portions and a total length of 8 mm
At 60 GHz, transmission characteristics of S11: -25 dB and S21: -1.7 dB or more were obtained, and it was shown that the loss was extremely low.

【0025】[0025]

【発明の効果】以上詳述した通り、本発明の高周波用半
導体装置は、誘電体基板表面の高周波伝送線路と誘電体
基板の底面に形成された高周波伝送線路とを電磁的に結
合させたことをにより、伝送線路がキャビティ形成のた
めの壁体等を通過することがないために、伝送線路間を
低伝送損失で信号を伝達することが可能となる。しか
も、半導体素子が収納されるキャビティが、誘電体基板
表面の接地層に導電性蓋体を取り付けることにより形成
されるために、非常に簡単な構造で、且つ外部からの電
磁波による影響を防止することができ、特に、誘電体基
板内に形成した接地層と電気的に接続することによりさ
らにその効果を高められ、高信頼性の小型化が可能な高
周波用半導体装置を提供することができる。
As described above in detail, the high-frequency semiconductor device of the present invention is characterized in that the high-frequency transmission line on the surface of the dielectric substrate and the high-frequency transmission line formed on the bottom surface of the dielectric substrate are electromagnetically coupled. Accordingly, since the transmission line does not pass through a wall or the like for forming a cavity, it is possible to transmit a signal between the transmission lines with low transmission loss. Moreover, since the cavity for accommodating the semiconductor element is formed by attaching the conductive lid to the ground layer on the surface of the dielectric substrate, the cavity has a very simple structure and is prevented from being affected by external electromagnetic waves. In particular, by electrically connecting to a ground layer formed in a dielectric substrate, the effect can be further enhanced, and a high-reliability semiconductor device that can be miniaturized with high reliability can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の高周波用半導体装置の一例を示す概略
図である。
FIG. 1 is a schematic view showing an example of a high-frequency semiconductor device according to the present invention.

【図2】図1の半導体装置の誘電体基板表面の平面図で
ある。
FIG. 2 is a plan view of a surface of a dielectric substrate of the semiconductor device of FIG. 1;

【図3】図1の半導体装置の伝送特性を示す図である。FIG. 3 is a diagram illustrating transmission characteristics of the semiconductor device of FIG. 1;

【図4】従来の高周波用半導体装置の概略図である。FIG. 4 is a schematic view of a conventional high frequency semiconductor device.

【符号の説明】[Explanation of symbols]

1 高周波用半導体装置 2 誘電体基板 3 導電性蓋体 4 キャビティ 5 半導体素子 6 第1の高周波伝送線路 7 第1の接地層 8 第2の高周波伝送線路 9 第2の接地層 10ストリップ導体路 11ストリップ導体路 12スロット孔 13スルーホール導体 14電源供給層 15スルーホール導体 REFERENCE SIGNS LIST 1 high-frequency semiconductor device 2 dielectric substrate 3 conductive lid 4 cavity 5 semiconductor element 6 first high-frequency transmission line 7 first ground layer 8 second high-frequency transmission line 9 second ground layer 10 strip conductor path 11 Strip conductor path 12 Slot hole 13 Through hole conductor 14 Power supply layer 15 Through hole conductor

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平8−250913(JP,A) 特開 平8−250911(JP,A) 特開 平9−186268(JP,A) 特開 平10−313078(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 23/12 - 23/12 301 H01L 23/02 H01P 5/02 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-8-250913 (JP, A) JP-A-8-250911 (JP, A) JP-A-9-186268 (JP, A) JP-A-10-108 313078 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/12-23/12 301 H01L 23/02 H01P 5/02

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】誘電体基板と、該誘電体基板の表面に搭載
された高周波用半導体素子と、該誘電体基板の表面に被
着形成され前記高周波用半導体素子と電気的に接続され
た第1の高周波用伝送線路と、該誘電体基板の表面に被
着形成された電源供給層と、前記誘電体基板の底面に被
着形成された第2の高周波用伝送線路と、前記高周波用
半導体素子および前記第1の高周波用伝送線路を取り囲
むように前記誘電体基板表面に被着形成された第1の接
地層と、前記誘電体基板内に形成され、スロット孔を有
する第2の接地層と、前記第1の接地層に前記高周波用
半導体素子および前記第1の高周波用伝送線路を気密に
封止するように取り付けられた導電性蓋体と、を具備す
るとともに、前記第1の高周波用伝送線路の終端部と前記第2の高周
波用伝送線路の終端部とを前記スロット孔を介して対峙
させて、 前記第1の高周波用伝送線路と第2の高周波用
伝送線路とを電磁的に結合し、前記第1の接地層と第2
の接地層とを誘電体基板内に形成したスルーホール導体
によって電気的に接続し、かつ前記電源供給層を誘電体
基板内に形成されたスルーホール導体を介して誘電体基
板の底面に引き出してなることを特徴とする高周波用半
導体装置。
1. A dielectric substrate, a high-frequency semiconductor element mounted on the surface of the dielectric substrate, and a second semiconductor element formed on the surface of the dielectric substrate and electrically connected to the high-frequency semiconductor element. A high-frequency transmission line and a surface covered with the dielectric substrate.
A power supply layer formed thereon, a second high-frequency transmission line formed on the bottom surface of the dielectric substrate, and the dielectric layer surrounding the high-frequency semiconductor element and the first high-frequency transmission line. A first ground layer formed on the surface of the dielectric substrate, and a slot hole formed in the dielectric substrate.
A second ground layer, and the first ground layer
The semiconductor element and the first high-frequency transmission line are hermetically sealed.
A conductive lid attached so as to be sealed, and an end portion of the first high-frequency transmission line and the second high-frequency transmission line.
Facing the end of the wave transmission line via the slot hole
Then, the first high-frequency transmission line and the second high-frequency transmission line are electromagnetically coupled to each other, and the first ground layer and the second high-frequency transmission line are connected to each other.
And the ground layer is electrically connected by a through-hole conductor formed in the dielectric substrate, and the power supply layer is drawn out to the bottom surface of the dielectric substrate through the through-hole conductor formed in the dielectric substrate. A high-frequency semiconductor device, comprising:
JP08318072A 1996-11-28 1996-11-28 High frequency semiconductor device Expired - Lifetime JP3112253B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP08318072A JP3112253B2 (en) 1996-11-28 1996-11-28 High frequency semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP08318072A JP3112253B2 (en) 1996-11-28 1996-11-28 High frequency semiconductor device

Publications (2)

Publication Number Publication Date
JPH10163375A JPH10163375A (en) 1998-06-19
JP3112253B2 true JP3112253B2 (en) 2000-11-27

Family

ID=18095172

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
JP (1) JP3112253B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1058307A1 (en) * 1999-06-03 2000-12-06 Alps Electric Co., Ltd. Electronic unit effectively utilizing circuit board surface
JP3850275B2 (en) * 2001-11-29 2006-11-29 京セラ株式会社 Electronic component equipment

Also Published As

Publication number Publication date
JPH10163375A (en) 1998-06-19

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