JP3460584B2 - Si diaphragm and method of manufacturing the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Si diaphragm formed by etching a Si wafer having a crystal orientation of (110) and a method for manufacturing the same.

[0002]

2. Description of the Related Art As an example of a diaphragm of a semiconductor pressure sensor, there is a structure described in Japanese Patent Laid-Open No. 4-119672. In the configuration of this publication, the crystal orientation is (110)
The octagonal Si diaphragm is formed by etching the Si wafer.
This configuration will be specifically described with reference to FIGS. 25 to 32.

First, as shown in FIGS. 25 and 26, the upper surface (FIG. 26) of a Si wafer 1 having a crystal orientation of (110).
On the middle left surface), an etching mask 2 made of SiN, SiO ₂ or the like is formed and patterned. In addition, a gauge, an electrode, and the like having a predetermined shape are previously formed on the lower surface (the right surface in FIG. 26) of the Si wafer 1. Then, the Si wafer 1 is immersed in an alkaline etching solution made of KOH or the like for anisotropic etching. As a result, an octagonal Si diaphragm 3 as shown in FIGS. 27 and 28 is formed.

Then, the Si wafer 1 after the etching is completed
The Si wafer 1 from which the etching mask 2 has been removed is shown in FIGS. 29 to 32. In this case, as shown in FIG. 29, the octagonal Si diaphragm 3 has two upper and lower (10
It is surrounded by a (0) plane, two (111) planes on the left and right, and four (111) planes at diagonal positions. Here, as shown in FIG. 30, the two upper and lower (100) planes are inclined planes inclined with respect to the diaphragm surface 3a of the Si diaphragm 3, and the inclination angle (that is, the (100) plane and the diaphragm). The angle at which the plane 4 intersects is 45 degrees.

The two left and right (111) planes are shown in FIG.
As shown in FIG. 5, the inclined surface is inclined with respect to the diaphragm surface 4, and the inclination angle (that is, left and right (11
The angle 1) at which the surface and the diaphragm surface 4 intersect is 35 degrees. On the other hand, four (11
As shown in FIG. 32, the 1) surface is a surface orthogonal to the diaphragm surface 4, and its inclination angle (that is, the four (111) surfaces at the oblique position and the diaphragm surface 4).
The angle at which and intersect) is 90 degrees.

[0006]

In the case of the above conventional configuration,
Two upper and lower (100) planes and two left and right (111) planes intersect the diaphragm plane 4 at a small angle (45 degrees, 35 degrees), while four (11) planes at diagonal positions
The 1) plane is orthogonal to the diaphragm plane 4. For this reason,
When an excessive pressure is applied to the diaphragm 3, stress concentrates on the portions where the four (111) planes at the diagonal positions are orthogonal to the diaphragm plane 4. As a result, the above-mentioned portion may be damaged.

SUMMARY OF THE INVENTION An object of the present invention is to provide a Si diaphragm and a method for manufacturing the same which can reduce the concentration of stress on a part of the peripheral edge of the diaphragm to increase the strength.

[0008]

According to the first aspect of the present invention, since the inclined surface portion is formed between the diaphragm surface of the Si diaphragm and the four (111) surfaces orthogonal to the diaphragm surface, It is possible to alleviate the concentration of stress on a part of the portion surrounding the diaphragm. Therefore, the strength can be increased. In the case of this configuration, it is preferable that the angle at which the inclined surface portion and the diaphragm surface intersect is set within a range of 26.5 to 36.5 degrees, as in the invention of claim 2. If the angle is too large, the stress relaxation effect is lost, and if it is too small, the sensing sensitivity decreases.
With this structure, it is possible to sufficiently cope with a structure in which the diaphragm surface is slightly inclined with respect to the (110) surface.

According to the third aspect of the present invention, when the Si wafer is immersed in an alkaline etching solution for etching, a voltage is applied to the Si wafer so that S
A step of forming an inclined surface portion was provided between the diaphragm surface of the i diaphragm and the four (111) surfaces orthogonal to the diaphragm surface. As a result, the slope portion can be formed reliably and easily.

By the way, when a voltage is applied to the Si wafer, micropyramids are easily generated on the diaphragm surface. On the other hand, in the invention of claim 4, the voltage applied to the Si wafer is adjusted in at least two stages. This makes it possible to apply a voltage to the Si wafer to form a sufficiently large inclined surface portion, and then to apply a voltage to the microwafer to the Si wafer, thereby improving the quality.

According to the fifth aspect of the invention, when the voltage is applied to the Si wafer, the voltage applied to the Si wafer is adjusted so that the current flowing through the Si wafer has a predetermined value. With this configuration, it is possible to reliably apply a voltage to the Si wafer so that the inclined surface portion can be formed sufficiently large. According to the invention of claim 6, S
Since the voltage applied to the i-wafer is adjusted so that the diaphragm surface is not roughened, the smoothness of the diaphragm surface can be improved.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION A first embodiment of the present invention will be described below with reference to FIGS. First,
The Si wafer used in this embodiment will be briefly described with reference to FIG. The Si wafer 11 is made of, for example, a P-type silicon wafer (having a specific resistance of 10 to 20 Ω · cm, for example), and the lower surface in FIG. N epi layer) 12 is formed. The N-type Si layer 12 has a gauge 13 made of P ⁺ and having a predetermined shape.
The P ⁺ isolation layer 14 is formed. On the lower surface of the P ⁺ isolation layer 14, for example, an Al-made power feeding electrode 15 which is substantially in a lattice shape as a whole is formed.

An etching mask 16 made of, for example, a SiO ₂ film or a SiN film is formed on the other surface of the Si wafer 11 in FIG. As shown in FIGS. 5 and 6, the etching mask 16 is provided with an octagonal opening 16a necessary for forming an octagonal Si diaphragm, for example. As the Si wafer 11, it is possible to use an N-type silicon wafer or a P-type silicon wafer (without an N layer) in addition to the P-type silicon wafer (with an N layer).

In etching the Si wafer 11, the etching apparatus 21 having the structure shown in FIG. 10 is used in this embodiment. As shown in FIG. 10, the etching device 21 includes a base 22, a cylindrical frame 23, and a lid 24, and these members are highly insulating and have a heat insulating property such as tetrafluoroethylene resin. And formed of a material having excellent corrosion resistance. Base 22 and frame 2
O-ring 2 between the frame 3 and the lid 24.
Liquid-tightly sealed by 5 and 25, and thus the base 2
2, the frame body 23, and the lid body 24 form a closed container (so-called processing tank). An anisotropic etching liquid (alkali etching liquid) 26 can be stored in the closed container.

The Si wafer 11 is arranged on the upper surface 22a of the base 22.
The upper surface (that is, the etching surface) of No. 1 is configured to come into contact with the anisotropic etching liquid 26. An annular negative pressure chamber forming recess 27 is formed on the outer peripheral portion of the upper surface 22 a of the base 22.
Is provided. The recess 27 for forming the negative pressure chamber is closed by a ring-shaped packing 28. The packing 28 is fixed by sandwiching the outer peripheral edge of the Si wafer 11. The inside of the negative pressure chamber forming recess 27 is evacuated by a vacuum pump to suck the packing 28,
The Si wafer 11 is fixed.

In the negative pressure chamber forming recess 27, for example, two anode electrodes 29, 29 are provided. The tip portions of these anode electrodes 29, 29 are in contact with and connected to (the power feeding electrode 15 of) the Si wafer 11. The anode electrode 2
The base end portions of 9 and 29 are the positive side terminals 30 of the variable power supply circuit 30.
connected to a. The variable power supply circuit 30 has a minute DC voltage V1 of about 0 to 0.3 V and, for example, 0.6 V.
It is configured to be able to output a DC voltage V2 of V or more.

Further, a supply passage 31 is formed in the lid 24, and the anisotropic etching liquid 26 is passed through the valve 32 and the supply passage 31 to form the frame 23 (that is, a closed container).
Is configured to be fed into. Further, pure water is supplied into the frame body 23 through the valve 33 and the supply passage 31, and nitrogen gas is supplied into the frame body 23 through the valve 34 and the supply passage 31.
The etching liquid 26 and the like in the frame 23 (closed container) are
It is configured to be discharged to the outside through a discharge passage 36 formed in the pipe 35 and the lid 24 by a pump or the like.

On the other hand, the rod-shaped cathode electrode 37 is arranged so as to penetrate the lid body 24 and extend to the vicinity of the bottom portion in the closed container. The cathode electrode 37 is composed of, for example, a Pt electrode, and its base end portion is connected to the negative side terminal 30b of the variable power supply circuit 30 via the current detector 38. Further, a heater 39 for heating the etching liquid and the like and a temperature sensor 40 for detecting the temperature of the etching liquid and the like are arranged in the closed container. The heater 39 is configured to be energized by a temperature controller 41, and the temperature controller 41 is configured to receive a temperature detection signal output from the temperature sensor 40. Accordingly, the temperature controller 41 sets the temperature of the etching liquid or the like in the closed container to a desired temperature (for example, 1
The temperature can be set to 10 ° C).

A stirring blade 42 for stirring the etching solution and the like is arranged in the closed container, and the stirring blade 42 is rotationally driven by a motor 43 arranged above the lid 24. Is configured. Further, the control device 4
4 is configured to drive and control the variable power supply circuit 30, the valves 32, 33, 34, the temperature controller 41, and the motor 43.

Furthermore, both terminals 30 of the variable power supply circuit 30.
A voltage polarity switching circuit 45 is provided between a and 30b and the anode electrode 29 and the cathode electrode 37. The voltage polarity switching circuit 45 includes four switching elements 46, 47, 48, 49 including transistors and relays,
It is configured by connecting as shown in FIG. In the case of this configuration, when the switching elements 46 and 49 are turned on and the switching elements 47 and 48 are turned off, Si
A positive voltage is applied to the wafer 11. Further, when the switching elements 46 and 49 are turned off and the switching elements 47 and 48 are turned on, a negative voltage is applied to the Si wafer 11.

Next, the etching apparatus 21 having the above structure
The operation of etching the Si wafer 11 by using will be described. In this case, the Si wafer 11 is set in the etching device 21 as shown in FIG. Then, the alkaline etching solution 26 is supplied into the closed container,
The upper surface of the Si wafer 11 is brought into contact with (immersed in) the alkaline etching solution 26, and the variable power supply circuit 30 is provided.
Then, a voltage is applied to the Si wafer 11 to perform etching.

At this time, as shown in FIG. 11A, when the applied voltage is below a predetermined value, anisotropic etching proceeds, and when the applied voltage is above a predetermined value, the Si wafer 1
1 is anodized. Here, when the Si wafer 11 is anodized, an oxide film is formed on the Si wafer 11, and this oxide film is gradually etched by the alkaline etching solution 26, so that a very gentle isotropic etching is performed. Progresses.

On the other hand, when the applied voltage is a very small voltage, anisotropic etching basically proceeds, but the etching rate of each surface of the Si wafer 11 changes as compared with the case where no voltage is applied. To do. Specifically, for example, 32 wt% KOH is used as the alkaline etching liquid 26, and the applied voltage is changed while the liquid temperature is set to 110 ° C.
Particularly, it is the etching surface of the Si wafer 11 (11
The initial current density of the (0) plane is changed, and the relationship between this initial current density and the etch rate ratio of the surface ((311) plane) of the slope portion 50 (see FIGS. 1 and 4) described later to the (110) plane. I asked. The obtained relationship (etching characteristic) is shown in the graph of FIG.

The etching characteristics vary depending on the etching conditions, the type of wafer (impurity species and its concentration), and the resistance in the power supply circuit system including various contact resistances. However, as will be described later, it has been confirmed that the etching characteristics in the voltage region where the voltage and the current change substantially linearly depend on the initial current (density) of the etching surface. Therefore, in controlling the etching, it is necessary to control the initial current density of the etching surface, specifically, a value obtained by dividing the current value by the etched area as a parameter. Therefore, in the etching operation (etching characteristic) described below, the initial current density will be used as a parameter.

Now, for example, a positive voltage of 0.2 to 0.3 v is applied to the Si wafer 11 so that the initial current density is 0.17 to
It is set to 0.21 mA / mm ² , and anisotropic etching proceeds. Then, as shown in FIGS. 7 and 8, a recess 51 is formed on the upper surface of the Si wafer 11. This recess 51
The bottom wall portion of Si becomes the Si diaphragm 52. At this time, the Si wafer 11 with the etching mask 16 removed
Are shown in FIGS. Of these, Figs. 1 to 3
As described above, among the inner surfaces of the concave portion 51 of the Si wafer 11, the shapes of the upper and lower (100) surfaces in FIG. 1 and the left and right (111) surfaces in FIG. 1, that is, the above surfaces and the diaphragm surface 52a intersect. The angle is the same as in the conventional configuration (FIGS. 29 to 31).

On the other hand, in the case of the present embodiment, as shown in FIGS. 1 and 4, 4 which is orthogonal to the diaphragm surface 52a.
Between the individual (111) planes and the diaphragm surface 52a,
A tapered slope portion 50 is formed. This slope 50
Is approximately 3 with the (110) surface that is the diaphragm surface 52a.
Since it is a plane that intersects at 1.5 degrees (see also FIG. 13B), it is estimated to be a (311) plane. With the formation of the slope 50, the corners (that is, the corners) existing in the Si diaphragm of the conventional configuration shown in FIGS.
It is possible to eliminate the corner portion where the (110) plane and the (111) plane are orthogonal to each other. As a result, in the Si diaphragm 52 of the present embodiment, it is possible to eliminate a portion where stress concentrates on the peripheral portion.

Then, the tapered surface ((311) surface) of the slope 50 is etched (ie, (110)).
As shown in FIG. 12, the etch rate ratio to the
It changes corresponding to the initial current density of the etched surface. Therefore, the etch rate ratio can be controlled by adjusting the initial current density (that is, the applied voltage). The above-mentioned phenomenon is characteristic in the region before anisotropic etching transitions to anodic oxidation by the application of voltage (the initial current density in FIG. 12 is in the range of 0.1 to 0.25 mA / mm ² ). It is a phenomenon.

Here, regarding the generation conditions of the slope portion 50,
Let us consider with reference to FIG. The conditions for generating the slope 50 are (110) plane, (111) plane, and slope 5
It is determined by each etch rate of the tapered surface ((311) surface) which is the surface of 0. Here, the etch rate of the (111) plane is 0.15 to 0.25 μ, regardless of the applied voltage.
m / min, which is much smaller than the etch rates of the other two surfaces. Therefore, whether or not the slope portion 50 appears (is formed) is determined by the ratio of the etching rate of the tapered surface of the slope portion 50 to the etching rate of the etching surface ((110) surface) (that is, between the two surfaces). Etch rate ratio).

In this case, in order to form the slope portion 50, the etching rate ratio between the two surfaces is set to at least 0.85 or less (the region where the initial current density in FIG. 12 is 0.1 mA / mm ² or less). There is a need. The slope starts to appear from this value. Then, the smaller the etch rate ratio, the larger the protrusion amount of the slope portion 50. This protrusion amount is the amount by which the slope portion 50 protrudes from the (111) plane,
This is the amount indicated by the dimension d in FIG. Slope 5
In order to increase the protrusion amount of 0, it is preferable from FIG. 12 that the initial current density is 0.15 mA / mm ² or more.

Next, a method of controlling the initial current density will be described. When a minute voltage is applied to the Si wafer 11 for etching, the current (density) flowing at the time of etching gradually changes as the shape of the recess 51 (diaphragm 52) changes as the etching progresses. However, at the beginning of etching, the target of etching is (11
Since it is only the (0) plane, the current becomes almost constant depending on the applied voltage. The current slightly varies due to the contact resistance and the resistance variation inside the wafer. Therefore, the current flowing through the Si wafer 11 may be detected and the applied voltage may be adjusted so that the current has a predetermined value. For example, when the etching device 21 of FIG. 10 is used, the current is detected by the current detector 38 (monitor).
However, it may be configured to adjust the applied voltage.
That is, etching can be stabilized by controlling the current density.

By the way, when the etching apparatus 21 of FIG. 10 is used, the temperature of the etching liquid 26 is set to the target temperature after the etching liquid 26 which has been heated and warmed in advance is supplied into the closed container to start the etching. It takes several minutes to reach (110 ° C.). During this time, it is preferable to prevent etching from progressing.
For example, a voltage of about 1 V is applied. And after this,
When the temperature of the etching solution reaches the target temperature and becomes stable, the current detector 38 monitors the current flowing through the Si wafer 11 and adjusts the applied voltage so that the current density becomes a predetermined value (a value described later). It is preferable to control as follows.

When the slope portion 50 is formed as described above, the diaphragm surface 5 of the Si diaphragm 52 is
In 2a, a micropyramid having a substantially rhombic cross section was sometimes generated. Therefore, the relationship between the initial current density and the frequency of occurrence of micropyramids was experimentally obtained, and the graph obtained is shown in FIG. The frequency of occurrence of micropyramids indicates the number of micropyramids having a size (long rhombus diagonal length) of 20 μm or more per unit area. In FIG. 14, black dots represent measured points of the occurrence frequency of micropyramids, and a curve connecting these black dots is a graph showing the relationship between the initial current density and the occurrence frequency of micropyramids.

FIG. 14 also shows a graph in which the relationship between the initial current density and Rz representing the smoothness (surface roughness) of the etched surface (diaphragm surface) is measured. This FIG.
In the graph, the white circles represent the actual measurement points of the surface roughness Rz, and the curve connecting the white circles is a graph showing the relationship between the initial current density and the surface roughness Rz. FIG. 15 shows the state of the etching surface at point A in FIG. 14, that is, when the initial current density is 0 (when no voltage is applied or when a voltage of −0.3 V or less is applied). Further, B in FIG.
FIG. 16 shows the state of the points, that is, the etched surface when the initial current density is 0.10 mA / mm ² . Furthermore, FIG.
Point C in 4, that is, the initial current density is approximately 0.15 m
The state of the etched surface in the case of A / mm ² is shown in FIG. FIG. 18 shows the state of the etched surface at point D in FIG. 14, that is, when the initial current density is approximately 0.24 mA / mm ² . Incidentally, these FIG. 15, FIG. 16 and FIG.
FIG. 7 and FIG. 18 are views copying a photograph of the etched surface.

It can be seen from FIG. 14 that the frequency of micropyramids increases with increasing current density. Since some of the generated micropyramids have a height dimension exceeding 10 μm, the characteristics as a diaphragm may deteriorate, and it is preferable to eliminate the micropyramids.

As a method of extinguishing the micropyramid, an initial current density of 0.18 mA /
There is a method of applying a voltage that is less than or equal to mm ² such as a voltage of 0 to 0.15 V and performing etching for about 50 μm. Therefore, in the present embodiment, when micropyramids are generated, a voltage of 0 to 0.15V is applied thereafter and etching is performed for about 50 μm to eliminate the micropyramids. In this case, etching may be performed without applying a voltage. Further, the voltage polarity switching circuit 4 of the etching device 21
Even if 5 is switched and the reverse voltage is applied,
The micropyramid can be extinguished.

Here, an example of etching control in which the slope 50 is formed and the micropyramid is eliminated will be described. In this example, for example, the original thickness is 300 μm
A Si diaphragm 52 of 30 μm is formed using the Si wafer 11 of FIG. In this case, first, for example, 1 V is applied as the first voltage, and the Si wafer 11 is anodized for 10 minutes, for example, until the temperature of the etching solution becomes stable. Subsequently, a voltage of 0.3 V is applied, the current value is monitored, and the applied voltage is adjusted so that the current density is 0.21 mA / mm ² . Then, in this voltage applied state, for example, etching is performed for 24 minutes. Next, the voltage is set to 0 V and etching is performed for 5.5 minutes, for example. After that, water is injected into the closed container (processing tank) of the etching apparatus 21 to complete the etching. At this time, the Si wafer may be anodized again if necessary.

Then, by the above etching control,
It was possible to form an octagonal Si diaphragm having the inclined surface portion 50 having a protrusion amount of about 100 μm with respect to the (111) plane. Here, the size of the protruding amount of the slope portion 50 is freely controlled within the range of about 0 to 100 μm by adjusting and controlling the initial current density (applied voltage) during etching after the temperature of the etching solution is stabilized. be able to.

When forming the slope portion 50 having a small protrusion amount, a voltage (for example, 0.1 V) is applied so that the initial current density during the etching is 0.1 to 0.15 mA / mm ^2. It should be controlled so that When applying this voltage, no micropyramid is generated. Therefore, the voltage control for extinguishing the micropyramid is not necessary, and the control becomes simpler. The amount of protrusion of the slope 50 required to prevent stress concentration is about 5 μm, which is sufficient.

By the way, the octagonal Si diaphragm 52
When forming the film, an etching mask having a shape as shown in FIG. Further, in the conventional configuration in which no voltage is applied during etching, when a Si diaphragm having an original thickness of 300 μm and a Si diaphragm having a thickness of 30 μm or less is formed, it is not possible to form a Si diaphragm having a dimension of 600 μm or less. This results in a quadrangle or a horizontally and vertically long octagon, as shown in FIG. 19B, no matter how the dimensions of d1, d2 and d3 of the etching mask shown in FIG. 19A are adjusted. This is because.

On the other hand, according to this embodiment, since the corners of the quadrangle can be formed by the slope portion 50, the original thickness is 30.
Diaphragm thickness is 30μ using 0μm Si wafer.
A small octagonal Si diaphragm (see FIG. 19 (c)) having a size of 600 μm (0.6 mm) or less can be formed with a size of m or less. In this case, it has been confirmed that a small octagonal Si diaphragm having a size of 500 μm can be formed by applying this embodiment. Therefore, according to this embodiment, Si
The degree of freedom in designing the diaphragm is increased.

20 to 24 show the second embodiment of the present invention.
FIG. 3 is a diagram showing an embodiment of the present invention, and the difference from the first embodiment will be described. The same parts as those in the first embodiment are designated by the same reference numerals. In the second embodiment, the Si wafer 1
When etching No. 1 was used an etching device 21 having a configuration as shown in FIG. This etching device 21 has substantially the same basic configuration as the etching device 21 shown in FIG. 10, except for the following points.

That is, the resistance connection switching circuit 53 is provided between the base ends of the anode electrodes 29, 29 and the common connection point of the switching elements 46, 47 of the voltage polarity switching circuit 45. The resistance connection switching circuit 53 is configured by connecting a series circuit in which a switching element 54 including a transistor and a relay and a resistor 55 are connected in series and a switching element 56 including a transistor and a relay and the like in parallel. The two switching elements 54 and 56 are configured to be on / off controlled by the control device 44. The resistor 55 has a resistance of 20Ω, for example.

In this structure, when the switching element 54 is turned on and the switching element 56 is turned off,
The resistor 55 is connected in series to the Si wafer 11. Further, when the switching element 54 is turned off and the switching element 56 is turned on, the resistor 55 is not connected to the Si wafer 11.

In the second embodiment, the N type Si wafer 11 is etched. here,
The N type Si wafer 11 will be briefly described with reference to FIG. The N-type Si wafer 11 is made of, for example, one having a specific resistance of 0.6 to 1.2 Ω · cm. As shown in FIG. 21, a gauge 57 of a predetermined shape is formed on the lower surface of the N-type Si wafer 11, and for example, the Al-made power supply electrode 5 which is substantially in a lattice shape as a whole.
8 is formed. An etching mask 16 made of, for example, SiO ₂ or a SiN film is formed on the upper surface, which is the other surface of the N-type Si wafer 11.

Next, the N-type Si wafer 11 is shown in FIG.
The etching operation when etching is performed using the etching apparatus 21 shown in FIG. In this case, for example, 32 wt% KOH was used as the alkaline etching liquid 26 and the liquid temperature was set to 110 ° C. Then, in this state, by changing the applied voltage, S
The initial current density of the (110) plane, which is the etching surface of the i-wafer 11, is changed.
The relationship with the etch rate of the surface was sought. In addition, we also examined how the above etching characteristics change by changing the resistance value in the power supply circuit. The results of these examinations (etching characteristics) are shown in the graph of FIG.

FIG. 22A is a graph showing the relationship between the applied voltage and the current density, and FIG. 22B is a graph showing the relationship between the applied voltage and the etch rate. And FIG.
In (a) and (b), the white circles and the curve connecting the white circles are the etching characteristics when the resistor 55 is not connected (when the switching element 54 is turned off and the switching element 56 is turned on). Indicates. In addition, FIG.
In (a) and (b), black dots and curves connecting these black dots indicate etching characteristics when the resistor 55 is connected (when the switching element 54 is turned on and the switching element 56 is turned off). .

From FIGS. 22A and 22B, it can be seen that the etching characteristics change depending on the resistance in the power feeding circuit. Then, it is understood that the etching characteristic in the voltage region where the voltage and the current change substantially linearly depends on the current (density). Further, the relationship between the initial current density and the micropyramid generation frequency when the N-type Si wafer 11 was used was obtained, and the obtained relationship is shown in FIG. Further, when the N-type Si wafer 11 is used, the initial current density and the etching rate of the taper surface of the slope portion 50 (11
The relationship between the ratio of the (0) surface to the etch rate (that is, the etch rate ratio) was obtained, and the relationship thus obtained is shown in FIG.

From these FIGS. 22, 23, and 24, when etching the N-type Si wafer 11, the etching is performed in a state where the resistance in the power supply circuit is small, that is, in the state where the resistor 55 is not connected. It is understood that in order to form the slope portion 50 similar to that of the first embodiment, a minute positive voltage close to 0V must be applied. Further, it is understood that a minute negative voltage close to 0V must be applied to eliminate the micropyramid. It is quite difficult to perform such minute voltage control with high accuracy. Therefore, in the second embodiment, the etching is performed with the resistor 55 being connected in series to the Si wafer 11, so that the etching process can be realized only by applying a positive voltage.

Here, the etching conditions for forming the Si diaphragm 52 having a thickness of 30 μm using the N-type Si wafer 11 having an original thickness of 300 μm will be described. In this case, first, the resistor 55 is not connected, that is, the switching element 54 is turned off and the switching element 56 is turned on, and, for example, 1 V is applied as the first voltage to change the temperature of the etching solution. Is stabilized, the Si wafer 11 is anodized for 10 minutes, for example.
Subsequently, after switching the state in which the resistor 55 is connected, that is, the state in which the switching element 54 is turned on and the switching element 56 is turned off, a voltage of, for example, 1.2 V is applied to monitor the current value and Density is 0.21m
The applied voltage is finely adjusted so as to be A / mm ² . Then, in this voltage applied state, for example, etching is performed for 24 minutes. Next, the voltage is set to 0.2 V and etching is performed for 5.5 minutes, for example. After that, water is injected into the closed container (processing tank) of the etching apparatus 21 to complete the etching. At this time, the Si wafer 11 may be anodized again if necessary.

By the above etching control, (11
1) It was possible to form an octagonal Si diaphragm having a slope portion 50 having a protrusion amount of about 100 μm with respect to the surface and having no micropyramid on the diaphragm surface. In addition, in the second embodiment, by connecting the resistor 55, the voltage control is performed only by applying the positive voltage, and the variable range of the voltage is increased, so that the voltage control is simplified accordingly. The configuration of the second embodiment other than the above is the same as the configuration of the first embodiment.

Further, in the above embodiment, the resistance connection switching circuit 53 is configured to switch whether or not the resistor 55 is connected, but the invention is not limited to this.
A plurality of resistors may be switchably connectable. It is also a preferable configuration to change the resistance value of the resistor connected in series to the Si wafer 11 to a desired value.

Further, in each of the above embodiments, the crystal orientation is (1
Although the present invention is applied to the configuration for etching the Si wafer 11 which is 10), the present invention is not limited to this and may be applied to the configuration for etching a Si wafer having a crystal orientation slightly tilted with respect to the (110) plane. . The inclination may be about 5 degrees at maximum. By this inclination,
The angle at which the taper surface of the slope formed on the Si diaphragm and the diaphragm surface intersect is 31.5 degrees ± 5 degrees,
That is, the angle is in the range of 26.5 degrees to 36.5 degrees. Then, the inclination angle of the tapered surface of the inclined surface portion changes to the above-described angle, but even in the case of this configuration, it is possible to prevent stress from being concentrated on the peripheral portion (that is, the end portion) of the diaphragm as much as possible.

[Brief description of drawings]

FIG. 1 is a top view of a Si diaphragm showing a first embodiment of the present invention.

FIG. 2 is a sectional view taken along line aa in FIG.

FIG. 3 is a sectional view taken along line bb in FIG.

FIG. 4 is a sectional view taken along line cc in FIG.

FIG. 5 is a top view of a Si wafer before etching.

6 is a sectional view taken along line aa in FIG.

FIG. 7 is a top view of the Si wafer after etching.

8 is a sectional view taken along line aa in FIG.

FIG. 9 is a vertical sectional view of a Si wafer.

FIG. 10 is a vertical side view of the etching apparatus.

11A and 11B are characteristic diagrams showing etching characteristics of a P-type Si wafer, where FIG. 11A is a characteristic diagram showing a relationship between an applied voltage and current density, and FIG. 11B is a characteristic showing a relationship between an applied voltage and an etch rate. Figure

FIG. 12 is a characteristic diagram showing the relationship between the initial current density and the etch rate ratio.

FIG. 13 is a diagram illustrating an etching operation when a slope portion is formed.

FIG. 14 is a graph showing the relationship between the roughness of the etched surface and the initial current density, and the relationship between the micropyramid generation frequency and the initial current density.

FIG. 15 is a diagram showing a state of an etching surface.

FIG. 16 is a diagram showing a state of an etching surface.

FIG. 17 is a diagram showing a state of an etched surface.

FIG. 18 is a diagram showing a state of an etching surface.

FIG. 19A is a top view of an etching mask, FIG.
Is a top view of the Si diaphragm when etched by the conventional technique, and (c) is a top view of the Si diaphragm when etched by the first embodiment.

FIG. 20 is a view corresponding to FIG. 10 showing a second embodiment of the present invention.

FIG. 21 is a view equivalent to FIG. 9.

FIG. 22 is a view corresponding to FIG. 11.

FIG. 23 is a view corresponding to FIG.

24 is a view equivalent to FIG.

FIG. 25 is a view corresponding to FIG. 5 showing a conventional configuration.

26 is a sectional view taken along the line aa in FIG. 25.

FIG. 27 is a view corresponding to FIG. 7.

28 is a sectional view taken along the line aa in FIG. 27.

FIG. 29 is a view equivalent to FIG.

30 is a sectional view taken along the line aa in FIG.

FIG. 31 is a sectional view taken along line bb in FIG. 29.

32 is a sectional view taken along the line cc in FIG. 29.

[Explanation of symbols]

11 is a Si wafer, 12 is an N-type Si layer, 13 is a gauge,
16 is an etching mask, 16a is an opening, 21 is an etching device, 23 is a frame, 26 is an anisotropic etching liquid,
29 is an anode electrode, 30 is a variable power supply circuit, 38 is a current detector, 39 is a heater, 40 is a temperature sensor, 41 is a temperature controller, 44 is a control device, 45 is a voltage polarity switching circuit,
50 is a slope portion, 51 is a concave portion, 52 is a Si diaphragm,
52a is a diaphragm surface, 53 is a resistance connection switching circuit, 5
Reference numeral 5 is a resistor, 57 is a gauge, and 58 is a power feeding electrode.

─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Takeshi Fukada, 1-1, Showa-cho, Kariya city, Aichi prefecture, Denso Co., Ltd. (72) Inventor, Kenichi Yokoyama, 1-1, Showa-machi, Kariya city, Aichi prefecture, Denso company ( 72) Inventor Motoki Ito 1-1, Showa-cho, Kariya city, Aichi Prefecture DENSO CORPORATION (56) Reference JP-A-9-116172 (JP, A) JP-A-4-119672 (JP, A) JP-A 4-320379 (JP, A) JP-A-5-87661 (JP, A) JP-A-9-153479 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/306 , 21/3063 H01L 21 / 308,29 / 84 G01L 9/04

Claims (6)

(57) [Claims] 1. An octagonal Si diaphragm formed by immersing an Si wafer having a crystal orientation of (110) in an alkaline etching solution and etching the Si wafer, the diaphragm surface of the Si diaphragm, and the diaphragm surface. And a four (111) planes that are orthogonal to each other, and an inclined surface portion is formed between them. 2. The Si diaphragm according to claim 1, wherein an angle at which the inclined surface portion and the diaphragm surface intersect is set within a range of 26.5 to 36.5 degrees. 3. An octagonal Si diaphragm is manufactured by immersing a Si wafer having a crystal orientation of (110) in an alkaline etching solution and etching it.
In the method for manufacturing an i diaphragm, a voltage is applied to the Si wafer while the Si wafer is being immersed in the alkaline etching solution for etching, and the diaphragm surface of the Si diaphragm and the diaphragm surface Four orthogonal (1
11) A method for manufacturing a Si diaphragm, comprising a step of forming an inclined surface portion between the surface and the surface. 4. The method of manufacturing a Si diaphragm according to claim 3, wherein the voltage applied to the Si wafer is adjusted in at least two steps. 5. When a voltage is applied to the Si wafer,
5. The method of manufacturing a Si diaphragm according to claim 3, wherein the voltage applied to the Si wafer is adjusted so that the current flowing through the Si wafer has a predetermined value. 6. The method for manufacturing a Si diaphragm according to claim 3, wherein the voltage applied to the Si wafer is adjusted to a voltage that does not roughen the diaphragm surface.