JPH11168084A - Etching of silicon substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for etching a silicon substrate by which a desired etch depth can be obtained through successive processes. SOLUTION: When forming a recess 4 in a part of a silicon substrate 3 by etching the substrate from one face using an anisotropic etchant, positive voltage is applied to the etching face of the silicon substrate 3 in the middle of etching and current allowed to flow accompanying the anodic oxidation of silicon is detected. Based on the detected result, the etching time which remains until a desired etching quantity is obtained is calculated. Then, etching is conducted only for the etching time calculated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for etching a silicon substrate, and more particularly to a method for etching a silicon substrate, which is suitable for forming a thin portion in a semiconductor pressure sensor or a semiconductor acceleration sensor.

[0002]

2. Description of the Related Art When forming a silicon diaphragm for a semiconductor pressure sensor or a semiconductor acceleration sensor, as shown in FIG. 24, a silicon wafer 100 is immersed in an alkaline etching solution 101 such as KOH and a silicon A method of applying a voltage to the wafer 100 and performing chemical etching for a predetermined time is used. More specifically, as shown in FIG. 25, after the gauge layer 103 is formed on the silicon wafer 100, the mask material 105 is formed, and then etching is performed to form the concave portion 106.

In this case, the etch rate fluctuates depending on the concentration and temperature of the etching solution, and it was difficult to obtain a desired diaphragm thickness by one etching. Then, the step of immersing in pure water for washing is divided into two steps, the wafer is taken out after the first etching, and the thickness of the diaphragm is measured.
In the second etching, a necessary amount is additionally etched. However, this increases the number of man-hours.

[0004]

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for etching a silicon substrate which can obtain a desired etching depth in a continuous process.

[0005]

According to the first aspect of the present invention, a positive voltage is applied to the surface to be etched of the silicon substrate during etching, and a current flowing along with the anodic oxidation of silicon is detected. Then, based on the detection result of the current, the remaining etching time until the desired etching amount is calculated, and the etching is performed for the calculated etching time.

That is, when a positive voltage is applied to the silicon wafer 100 in an alkaline etching solution as shown in FIG. 24, dissolution of silicon occurs on the low voltage side, and anodic oxidation occurs on the high voltage side. The current I flowing at this time varies depending on the exposed area A of the silicon (the sum of the bottom surface and the side wall of the concave portion 106) A,
The area A changes with time due to etching. Therefore, the current I during anodic oxidation is equal to the etching amount d of silicon.
(See FIG. 25). Thus, for example, as shown in FIG. 2, the remaining required etching amount can be indirectly grasped from the relationship between the etching amount and the current and initial anodic oxidation current ratios.

In this way, even if the etch rate fluctuates due to the concentration and temperature of the etching solution, the current value, which is an alternative parameter representing the amount of etching during etching, is monitored, so that the desired etching can be performed in a continuous process. A depth (for example, a thin portion having a desired thickness) can be obtained.

Here, the remaining etching time can be calculated from the initial current value flowing during the anodic oxidation of silicon and the current value during the etching, as described in claim 2.

More specifically, the initial current value flowing with the anodic oxidation of silicon is I
And _O, when the current value in the middle of the etching was _{I 1, I 1 / I O} = -c (d 1 -a) 2 + b However, a, b, c at a constant, the amount of etching in the course etching calculating a d _1, and the etching time until it is T, when the etching amount of the target and _{d 2, T e = {(} d 2 -d 1) / d 1} · remaining etch time at T T Calculate _e .

According to a fourth aspect of the present invention, a change in the current flowing with the dissolution of silicon when a voltage lower than the anodic oxidation voltage of silicon is applied to the surface to be etched of the silicon substrate during the etching is monitored. , The etching end point is detected.

That is, when etching is performed while applying a small positive voltage to the surface to be etched of the silicon substrate during the etching, the current flowing between the silicon substrate and the counter electrode changes with time due to the change in the shape of the etched portion. . This is because, as shown in FIG. 12, the current flowing when a small positive voltage is applied to silicon is large in the crystal orientation (100) and (110) planes where etching proceeds easily, and the crystal orientation (111) where etching does not easily proceed. ) In terms of being very small. For example, as shown in FIG. 8, when a square diaphragm is formed on a silicon substrate having a crystal orientation of (100), only the (100) plane is exposed at first, but as the etching proceeds, the (100) plane is exposed. The exposed area of the (111) plane increases as the exposed area of the plane decreases. Therefore, the current when a small positive voltage is applied decreases as the etching proceeds, as shown in FIG.
By monitoring the degree of reduction, the amount of etching can be grasped.

In this way, even if the etch rate fluctuates due to the concentration and temperature of the etching solution, the current value, which is an alternative parameter representing the amount of etching during etching, is monitored, so that the desired etching can be performed in a continuous process. A depth (for example, a thin portion having a desired thickness) can be obtained.

When silicon is anodized as in claims 1 to 3, there is no difference in current depending on the crystal plane orientation, and the current is the total etching area (the exposed area exposed to the etching solution). Depends on.

According to the fifth aspect of the present invention, the value of the current flowing with the application of the voltage lower than the silicon anodic oxidation voltage at the initial stage of the etching is determined from the value of the current lower than the silicon anodic oxidation voltage at the end point of the etching. The value of the current flowing with the application can be calculated.

[0015] More specifically, as described in claim 6, the current value I ₁₁ flowing due to application of a voltage lower than the anode oxidation voltage of the silicon in the etching initial _{I 12 / I 11 = p (} d- q) ² + r Here, d is a target etching amount, p, q, and r are constants, and a current value ₁₂ flowing with application of a voltage lower than the anodic oxidation voltage of silicon at the etching end point is calculated.

That is, when the silicon surface forming the bottom surface of the concave portion and the silicon surface forming the side wall have different voltage / current characteristics as shown in FIG. The above-described current monitoring can be effectively used by utilizing the difference between the voltage and current characteristics of each plane orientation of silicon.

Further, as described in claim 8, claim 4
In the method of etching a silicon substrate described in the above, the point at which the change in current flowing with the dissolution of silicon becomes smaller than a predetermined value can be regarded as the etching end point.

In particular, when the concave portion has a bottom surface made of an insulating film (for example, FIG. 16), or when the concave portion has a pyramid as described in claim 10, (Eg, FIG. 20).

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment of the present invention will be described below with reference to the drawings.

This embodiment is embodied in a semiconductor pressure sensor using a piezoresistive layer. FIG. 1 shows a cross section of a semiconductor pressure sensor.

On a P-type silicon substrate 1 having a (100) plane orientation, an N-type epitaxial layer 2 having a thickness of 10 μm is formed on one surface thereof, and a semiconductor substrate (silicon substrate) 3 is constituted by this laminated body. The P-type silicon substrate 1 is formed with a concave portion 4 that is open on one surface, and a thin portion 5 is formed on the bottom surface 4 a of the concave portion 4. The thin portion 5 is a sensor diaphragm. The recess 4 is formed by wet etching.

In FIG. 1, a P ⁺ -type impurity diffusion layer 6 is formed in the N-type epitaxial layer 2, and this P ⁺ -type impurity diffusion layer 6 becomes a piezo resistor for sensing a strain. A silicon oxide film 7 is formed on the surface of N-type epitaxial layer 2. P ⁺ -type impurity diffusion layer 6 is electrically led out to the surface side of silicon oxide film 7 by aluminum wiring 8.

Next, a method of manufacturing the semiconductor pressure sensor thus configured will be described. First, (100) in FIG.
An N-type epitaxial layer 2 is grown on one surface of a P-type silicon substrate 1, and a metal film 8 is formed on the surface of the N-type epitaxial layer 2. Place. As the mask material 10, a silicon nitride film (SiN) is used. Thus, the semiconductor substrate 3 in a silicon wafer state before etching is prepared.

FIG. 3 is a schematic view of an etching apparatus for forming a thin portion (diaphragm) 5 on the semiconductor substrate 3. The etching apparatus has a base 14, a cylindrical frame 15, and a lid 16, and these members are made of tetrafluoroethylene resin or the like, and have high insulation properties and excellent heat insulation and corrosion resistance. . On the base 14, the lower opening end of the frame 15 is disposed in a state that it can be held in a liquid-tight state by an O-ring 17. Installed in a dense state. This base 1
4, a frame 15 and a lid 16 constitute a closed container,
38 wt% K as an anisotropic etching solution in this container
An OH aqueous solution 19 can be arranged.

The upper surface 14a of the base 14 is a smooth substrate mounting surface, and the semiconductor substrate (wafer) 3 to be etched is disposed on the upper surface 14a. At this time, the back surface (etched surface) of the semiconductor substrate 3 faces upward and is in contact with the 38 wt% KOH aqueous solution 19. The metal film 9 (see FIG. 25) on the surface (circuit surface) of the semiconductor substrate 3 is in close contact with the upper surface 14a of the base 14.

Upper surface (substrate mounting surface) 14 of base 14
A concave portion 20 for forming a negative pressure chamber is provided in an annular shape on the outer peripheral portion of a. A ring-shaped packing 21 is fixed to the lower surface of the frame 15, and the packing 21 covers the opening of the negative pressure chamber forming recess 20 with the outer peripheral edge of the semiconductor substrate 3 interposed therebetween. Then, the inside of the negative pressure chamber forming recess 20 is evacuated by a vacuum pump or the like (not shown), so that the packing 21 is removed.
Is sucked, and the semiconductor substrate 3 is immovably fixed. As described above, masking of the etched surface at the outer peripheral edge of the semiconductor substrate 3 is performed by the packing 21. Also, the base 14 and the frame 15
Are fixed by suction.

As shown in FIG. 4, a passage 23 is formed in the base 14 so as to communicate an upper surface (substrate mounting surface) 14a thereof with the concave portion 20 for forming a negative pressure chamber.
4 are arranged. One end of the anode electrode 24 is connected to a pin 26 by a nut 25 in the negative pressure chamber forming recess 20. The pin 26 is exposed to the outside of the base 14 by the communication hole 27, and hermetically sealed by an O-ring 28. The tip of the anode electrode 24 protrudes from the upper surface 14a of the base 14 by a distance L when there is no semiconductor substrate 3, and when the semiconductor substrate 3 is arranged on the upper surface 14a of the base 14, the anode electrode 24 is shown in FIG. It bends as shown by the two-dot chain line. As described above, the anode electrode 24 comes into contact with the metal film 9 (shown in FIG. 25) of the semiconductor substrate 3 with a constant contact pressure, so that a voltage can be applied to the semiconductor substrate 3.

Referring to FIG. 3, the lid 16 is provided with a supply passage 29 extending into the frame 15, and a 38 wt% KOH aqueous solution is passed through the valve 30 through the supply passage 29.
Pure water can be supplied through 1 and nitrogen gas can be supplied through a valve 32. The lid 16 is provided with a discharge passage 33 communicating between the inside and the outside. One end of the discharge passage 33 is opened by a pipe 34 at the bottom in the frame 15. The KOH aqueous solution 19, pure water and the like in the frame 15 can be discharged through the pipe 34 and the discharge passage 33.

A bar-shaped cathode electrode 35 is disposed so as to penetrate the lid 16, and the O-ring 36 maintains airtightness. This cathode electrode 35 is 38 wt% in the frame 15.
The KOH aqueous solution 19 extends to a predetermined depth. Between the cathode electrode 35 and the anode electrode 24, a DC power supply 37, an ammeter 38, and a contact 39 are connected in series. Then, a voltage is applied to the cathode electrode 35 and the anode electrode 24 by the DC power supply 37 by closing the contact 39. At this time, the ammeter 38
As a result, a current flowing from the semiconductor substrate 3 to the cathode electrode 35 is detected.

The heater 40 is disposed so as to penetrate the lid 16, and the O-ring 41 keeps airtight. When the heater 40 is energized, the heater 40 generates heat and the temperature of the 38 wt% KOH aqueous solution 19 can be raised. The temperature sensor 42 is arranged so as to penetrate the lid 16, and the O-ring 43 keeps airtight. The temperature of the KOH aqueous solution 19 is detected by the temperature sensor 42. The temperature controller 44 is a temperature sensor 42
Monitoring the temperature of the KOH aqueous solution 19 by the heater 40
Is controlled to keep the temperature of the KOH aqueous solution 19 at 110 ° C.

A stirring blade 45 is arranged in the frame 15, and the stirring blade 45 rotates via a coupling 47 by a motor 46 attached to the lid 16 to stir the KOH aqueous solution 19. The stirring blade 45 is kept airtight by an O-ring 48.

The main controller 49 has a start switch 5
The start of etching is detected by a signal from 0, and the energizing current is detected by a signal from the ammeter 38.
Further, the main controller 49 includes a contact 39, a motor 4
6. The drive of the temperature controller 44 and the valves 30, 31, and 32 is controlled. Main controller 4
Reference numeral 9 mainly includes a microcomputer.

At the time of etching, the original thickness of the silicon wafer is measured before etching, and a required etching amount d ₂ corresponding to a difference from a desired diaphragm thickness is calculated.
Then, as shown in FIG. 3, the semiconductor substrate 3 (silicon wafer) is disposed on the upper surface 14 a of the base 14, the inside of the negative pressure chamber forming recess 20 is evacuated, and the semiconductor substrate 3 is fixed by the packing 21. .

Then, the main controller 49 executes the processing shown in FIGS. This processing will be described with reference to the time chart of FIG. The vertical axis in FIG. 7 indicates the applied voltage value and the current value.

First, when the main controller 49 inputs an etching start signal from the start switch 50, the main controller 49 shown in FIG.
Start processing. The main controller 49 opens the valve 30 and inputs a predetermined amount of the 38 wt% KOH aqueous solution 19. Further, while the KOH aqueous solution 19 is stirred by the stirring blade 45, the heater 40 is energized and controlled by the temperature controller 44 to maintain the temperature of the KOH aqueous solution 19 at 110 ° C.

From this state, the main controller 49
In step 101, the power supply contact 39 is closed in step 101, and the voltage from the power supply is applied to the P-type silicon substrate 1 of the wafer (semiconductor substrate 3).
Is applied. Then, when the predetermined time T _O has passed and the current has stabilized in step 102, the main controller 49
In step 103, the initial current value I _O by the ammeter 38 is read. That is, the current I _O flowing while the liquid temperature is stable and a positive voltage such that silicon is anodically oxidized on the etched surface is applied is measured.

[0037] Thereafter, the main controller 49, the predetermined time T ₁ is determined whether elapsed in step 104, the predetermined time T ₁ is elapsed (timing t ₁ in FIG. 7),
In step 105, the contact 39 is opened. When the contact 39 is opened, the voltage application ends, and the etching with the KOH aqueous solution 19 is performed.

In this case, instead of stopping the voltage application, a minute voltage may be applied so that silicon is dissolved and etched. Then, the main controller 49
A predetermined time T ₂ is determined whether or not elapsed in step 106, the predetermined time T ₂ has elapsed (timing t ₂ in FIG. 7), a voltage is applied to close the contacts 39 at step 107. Then, the main controller 49 executes step 1
When the predetermined time T _OO elapses at 08 and the current stabilizes, the current value (anodizing current) I ₁ by the ammeter 38 is read at step 109 in FIG. 6, and at step 110, this anodizing current value I ₁ and the initial anode current are read. By solving the following equation from the oxidation current value I _O , the current etching amount (thickness) d _{1 is obtained.}
Is calculated. Then, in step 111, the main controller 49 calculates the remaining etching time T ₂ from the etching time T ₂ thus far and the target etching amount d ₂ by the following equation.
Calculate _e .

[0039]

(Equation 1) In other words, the etching amount d ₁ of the etching, anodization current I ₁ at that time, as a relational expression showing a relation of the initial anodization current I _O, as shown in FIG. 2, the etching time and current ratio I / I _O of to previously obtain the relationship, and calculates the remaining etch time T _e from the current anodization current I ₁ and the etching time T _2. In the subsequent processing, this time T _e
Only the etching is performed.

Subsequently, the main controller 49 determines whether or not the predetermined time T ₃ has elapsed in step 112 of FIG. 6, and when the predetermined time T ₃ has elapsed (timing of t ₃ in FIG. 7), in step 113, the contact 39 is opened to terminate the voltage application.

[0041] Further, the main controller 49, the predetermined time T ₄ (= T _e) is determined whether or not elapsed in step 114, the predetermined time T ₄ (= T _e) has elapsed (in t ₄ in FIG. 7 Timing), at step 115, the contact 39 is closed. Thus, to stop the remaining time T ₄ by the voltage applying an etching time T _e calculated in step 111,
Etch the remaining required amount of silicon.

In this case, instead of stopping the voltage application, a minute voltage may be applied so that the silicon is dissolved and etched. Further, the main controller 49
A predetermined time T ₅ is determined whether elapsed in step 116, the predetermined time T ₅ has elapsed (timing t ₅ in FIG. 7), starts the washing in step 117, the current is reduced by water injection opening the current I = 0 and becomes the (timing t ₆ in FIG. 7) contact 39 Te. That is, in order to end the etching stably, a positive voltage is applied again, and in this state, the main controller 49 performs water washing.

As a result, a diaphragm (thin portion) having a desired thickness is formed. Thereafter, the silicon substrate 3 (wafer) is taken out of the etching apparatus. The processing up to this point will be summarized as follows.

Immediately before and immediately after the etching, a positive voltage is applied to the etched surface to perform anodic oxidation, and the amount of etching (diaphragm thickness) is calculated from the change in the current.
The application of the voltage is stopped (or a low voltage of about 0 to 0.3 volt is applied), and the required amount of etching (diaphragm thickness) is obtained by etching the required amount.

That is, when a silicon substrate is immersed in an etching solution while a positive voltage is applied to the etching surface of the silicon substrate, silicon is anodized and etching does not proceed. At this stage, the initial anodic oxidation current Io is measured, and then
The application of a positive voltage stop or silicon by applying a low voltage that does not anodized (about 0 to 0.3 volts), after a predetermined time etched, to measure the anodic oxidation current I ₁ by applying a positive voltage again. Then, the etching amount (thickness) d ₁ at the present time is obtained from the relational expression between the ratio of I _O measured in advance (calibration) to the above-mentioned I ₁ and the etching amount (thickness). It calculates the amount of etching de and etch time T _e, stop or low voltage a voltage applied for a predetermined time T _e (0
(Approximately 0.3 volts) to etch the shortage.

When silicon is anodically oxidized, the etching rate becomes 1/50 or less of that at the time of melting, so that the etching hardly progresses during this period, and the current does not substantially fluctuate. Hereinafter, numerical values will be described as more specific descriptions.

A case in which 515 diaphragms having a thickness of 30 μm are formed in a wafer using a rectangular diaphragm mask having a length and width of 1000 μm will be described. Here, 38 wt% KOH was used as an etching solution, and the solution temperature was 110 ° C.

By setting T ₂ = 3300 sec in FIG. 7 and using the apparatus shown in FIG.
When the original thickness of the silicon wafer is 300 μm and the initial anodic oxidation current Io is 131.350 mA, the above-mentioned equation (1) is expressed as follows: I ₁ / I _O = −0.93082 × 10 −6 (d ₁ −160)
8.1) ² +3.4072.

Here, I ₁ at the time of T ₂ = 3300 sec in FIG. 7 was 215.675 mA. Therefore, I _O = 131.350 mA and I ₁ = 215.675 m in the above equation.
Substituting A, the etching amount (thickness) d ₁ at this point
Is calculated, d ₁ = 231.0 μm.

The remaining required etching amount (thickness) de is
300 μm−231.0 μm−30 μm = 39.0 μm
Therefore, the required etching time is determined by the above-mentioned equation (2).
Therefore, T _e = {(d ₂ −d ₁ ) / d ₁ } · T ₂ = (39.0 / 231.0) · 3300 = 557, and T _e = 557 sec.

When etching was performed for the time T _e calculated in this manner (when the diaphragm thickness after the etching was actually measured) was 30.5 μm. That is, the thickness was 30.5 μm with respect to the target thickness of 30 μm.

In equation (1), constants a, b, and c are different depending on the shape and size of the diaphragm. Basically, in the case of a diaphragm formed by anisotropic etching, all equations are expressed by this equation. Is done.

Also, in the case of this method, especially when the diaphragm is small, the area ratio of the etched surface to the initial one becomes large, and the sensitivity of detecting the thickness becomes high. As described above, this embodiment has the following features. (A) During etching, a positive voltage is applied to the surface to be etched of the silicon substrate 3 to detect a current I ₁ flowing along with the anodic oxidation of silicon, and a desired etching amount is obtained based on the detection result of the current I _1. It calculates the remaining etching time T _e of up, only the calculated etching time T _e has to perform the etching. That is, assuming that the initial current value flowing along with the anodic oxidation of silicon is I _O and the current value during etching is I ₁ , I ₁ / I _O = −c (d ₁ −a) ² + b where a , b, c at a constant, when calculating the amount of etching d ₁ in the middle etching, the etching time until it was a T _2, the etching amount of target and _{d 2, T e = {(} d 2 - The remaining etching time _Te is calculated by d ₁ ) / d ₁ ｝ · T ₂ .

Therefore, in the anisotropic etching, even if the etch rate fluctuates due to the concentration and temperature of the etching solution, the substitute parameter (current value) representing the diaphragm thickness during the etching can be set without being affected by this. By monitoring, a desired diaphragm thickness can be obtained by one etching.

As a result, if the etching rate fluctuates due to the concentration and temperature of the etching solution and it is difficult to obtain a desired diaphragm thickness by one etching, conventionally, a predetermined amount of etching is performed, followed by washing and drying. After measuring the diaphragm thickness and then again performing a predetermined amount of additional etching,
Work man-hours increase. On the other hand, in the present embodiment, a thin portion having a desired thickness can be obtained in a continuous process.

It should be noted that the times T ₁ and T ₃ in FIG. 7 only need to secure at least the minimum time for measuring the anodic oxidation current. In the above description, the case where the diaphragm of the semiconductor pressure sensor is formed has been described. However, the present invention can be used for forming the thin portion (beam portion) of the semiconductor acceleration sensor.

In the above description, the P layer is etched on a silicon wafer having a PN junction.
The present invention may be applied to a case where an electrode is provided to a surface to be etched on a silicon type (N-type Si or N-type Si) and etching is performed by applying a positive voltage to the etching surface of the silicon wafer through the electrode. (Second Embodiment) Next, a second embodiment will be described with reference to the first embodiment.
The following description focuses on the differences from this embodiment.

In this example, as shown in FIG. 8, it is assumed that a recess 61 is formed in a silicon substrate 60 having a surface orientation of (100). The target wafer may be a P-type silicon substrate or an N-type silicon substrate in addition to a silicon wafer having a PN junction as described above. The bottom surface of the recess 61 is a (100) plane, and the four side walls are (1).
11) Consists of planes. The angle formed between the bottom surface and the side wall of the concave portion 61 is 54.7 °. The bottom of the concave portion 61 constitutes a thin portion that becomes a diaphragm. The recess 61 is formed by wet etching with an etching mask provided on the surface of the silicon substrate 60.

In this wet etching, the end point is determined by applying a very small positive voltage during the etching. That is, in the above-described first embodiment, the end point is determined by monitoring the change in the etching current while performing anodic oxidation. In the second embodiment, the change in the etching current is performed while applying a very small positive voltage. Is monitored to determine the end point.

More specifically, when a square diaphragm as shown in FIG. 8 is formed, the target etching surface is only the (100) surface at the start of etching, but as the etching proceeds, the area of the (100) surface decreases. The area of the four side walls, that is, the area of the (111) plane increases. At this time, as shown in FIG. 12, when a voltage of, for example, 0 to 0.3 volt is applied for etching, the current flowing per unit area is much larger in the (100) plane than in the (111) plane. Therefore, the total current gradually decreases due to the shape change due to the etching.

The current I at this time is determined by the areas S ₁₀₀ and S ₁₁₁ of each surface as follows. I = (m · S ₁₀₀ + n · S ₁₁₁ ) k where S ₁₀₀ is a current flowing in the (100) plane during etching, S ₁₁₁ is a current flowing in the (111) plane, and m, n, k are Is a constant.

The current I during etching and (10
0) etching of surfaces (thickness) and d, the relationship of etching the initial current I ₁₁ is represented by _{I / I 11 = p (d} -q) 2 + r. Here, p, q, and r are constants.

Here, m≫n, specifically, m / n =
It is about 20 to 30, and the influence of the area of the (100) plane is large. Leave previously determined as shown in FIG. 11 the ratio of the current I during a predetermined etching amount for the initial etching current I _11,
If the etching amount at that time is known and the required etching amount is determined in relation to the original thickness, the etching end point can be determined.

Hereinafter, a detailed etching method will be described. The original thickness of the silicon wafer is measured prior to performing etching, to calculate the required etching amount d ₁ corresponding to the difference between the desired diaphragm thickness Prefecture. Then, as shown in FIG. 3, the semiconductor substrate 60 (silicon wafer) is arranged on the upper surface 14 a of the base 14, the inside of the negative pressure chamber forming recess 20 is evacuated, and the semiconductor substrate 60 is fixed by the packing 21. .

The main controller 49 operates as shown in FIG.
Execute the processing of This processing will be described with reference to the time chart of FIG. The vertical axis in FIG. 10 indicates the applied voltage value and the energized current value.

First, the main controller 49 receives an etching start signal from the start switch 50, and
Start processing. The main controller 49 opens the valve 30 and inputs a predetermined amount of the 38 wt% KOH aqueous solution 19. Further, while the KOH aqueous solution 19 is stirred by the stirring blade 45, the heater 40 is energized and controlled by the temperature controller 44 to maintain the temperature of the KOH aqueous solution 19 at 110 ° C.

From this state, the main controller 49
Closes the power supply contact 39 in step 201 and applies an anodic oxidation voltage V _O by the power supply to the wafer (semiconductor substrate 60). Then, the main controller 49 executes step 2
After the predetermined time T ₀ has elapsed at 02 and the liquid temperature has stabilized (FIG. 10
Timing t ₁₁₎ of a predetermined minute voltages V ₁ is applied at step 203, determines whether a predetermined time T _OO has elapsed in step 204. That is, it is determined whether or not the current has stabilized after switching the voltage from V _O to V ₁ . In this example, two types of power supplies are prepared so that two types of voltages V _O and V ₁ can be applied.

Then, the main controller 49
Time T_OOElapses (t in FIG. 10). ₁₂Timing),
In step 205, the current I measured by the ammeter 38₁₁Measure
End current I₁₂Is calculated by the following equation. I₁₂/ I₁₁= P (dq)^Two+ R where p, q, and r are constants, and the d value is determined in advance.
Reserved value d₁And is known.

Then, the main controller 49 determines whether or not the predetermined time T ₁ has elapsed in step 206, and when the predetermined time T ₁ has elapsed (timing of t ₁₃ in FIG. 10), the main controller 49 uses the ammeter 38 in step 207. the current I is measured to determine the measured current value I is whether termination current I ₁₂ following step 208. If the measured current value I is not ended current I ₁₂ below, the flow returns to step 206. That, T ₁ is the measurement interval of the current I (sampling interval).

The main controller 49 determines in step 20
It determines whether not the measured current value I perform current sampling every _first predetermined time T has ended current I ₁₂ less by repeating 6-208. Then, the main controller 49
When the measured current value I becomes equal to or smaller than the end current I ₁₂ in step 208 (timing at t ₂₀ in FIG. 10), step 2
At 09, a predetermined anodic oxidation voltage V ₀ is applied.

After confirming that the predetermined time T ₃ has elapsed at step 210 (timing at t ₂₁ in FIG. 10), the main controller 49 starts washing with water at step 211, and the current I decreases due to water injection. When the I ≒ 0 and (timing t ₂₂ in FIG. 10), open the contacts 39.
As a result, a diaphragm having a desired thickness (thin portion)
Is formed. Thereafter, the silicon substrate 60 (wafer) is taken out of the etching apparatus.

Hereinafter, a more specific description will be given with numerical values. A case in which 1408 30 μm-thick diaphragms are formed in a wafer using a quadrangular diaphragm mask having a length and width of 600 μm will be described.

The etching solution was 38 wt% KOH.
, The liquid temperature was 110 ° C., and the etching voltage was 0.0
1 volt, the original thickness of silicon was 220 μm. Relational expression of etching amount d, current I and initial current I ₁₁ I / I ₁₁ = 4.2679 × 10 ^-6 (d-458.83)
² +0.10137 is satisfied.

When I ₁₁ = 55.800 mA,
The required etching amount (thickness) d = 190 μm, and from the above equation, the current at this time is I = 22.867 mA. The decrease in the current value was monitored from the start of the etching. When I = 22.867 mA or less, a voltage was applied to terminate the etching.

The thickness of the thus obtained diaphragm was measured and found to be 29.8 μm. That is, the thickness was 29.8 μm with respect to the target thickness of 30 μm.

Here, selection of whether to use the method of the first embodiment (anodizing current monitoring method) or the method of the second embodiment (dissolution current monitoring method) will be described.

In principle, the anodizing current monitoring method is effective when the rate of change of the total area is large, and the dissolving current monitoring method is effective when the area of the (111) plane after etching is large. Considering the surface orientation and surface area, the one with higher detection sensitivity may be selected. FIG.
Let's select 14, 15 as an example. 13 to 15, (a) of each figure shows a state before etching,
(B) shows the state after etching.

The ratio of the anodizing current at the end and at the initial stage I ₂
/ I _O and the ratio of the dissolution currents I ₁₂ / I ₁₁ . In other words, (i) if I ₁₂ / I ₁₁ is larger than I ₂ / I _O , it is suitable for the dissolution current monitoring method. For example, as shown in FIG. Suitable for making a diaphragm. That is, since all the side walls are (111) silicon surfaces having a small melting current, (1
The rate of change in the area of the (00) plane is large, and the rate of change in the dissolution current is large. (Ii) If I ₂ / I _O and I ₁₂ / I ₁₁ are approximately equal, either anodizing current monitoring method or dissolution current monitoring method may be used. For example, as shown in FIG. This corresponds to the case where a large square diaphragm is manufactured by the above method. (Iii) If I ₂ / I _O is larger than I ₁₂ / I ₁₁ ,
It is suitable for the anodizing current monitoring method.
As shown in the figure, it is suitable for manufacturing an octagonal diaphragm with (110) silicon. That is, since a (100) silicon surface having a large dissolution current appears on a part of the side wall, the rate of change of the dissolution current is small, and the anodic oxidation current monitoring method is suitable.

As described above, when the selection is made based on the anodic oxidation current ratio I ₂ / I _O and the dissolution current ratio I ₁₂ / I ₁₁ at the end and in the initial stage, the detection sensitivity can be advantageously improved.

As described above, this embodiment has the following features. (A) As shown in FIG. 8, the silicon surface forming the bottom surface of the recess 61 and the silicon surface forming the side wall have different voltage / current characteristics as shown in FIG. The end point of the etching is detected by monitoring the change in the current flowing with the dissolution of silicon when a voltage lower than the anodic oxidation voltage of silicon is applied to the surface to be etched 60. _{That, I 12 / I 11 = p} (d-q) 2 + r However the current value I ₁₁ flowing due to application of a voltage lower than the anode oxidation voltage of the silicon in the etching initial, d is the amount of etching of the target, p, q , R are constants, and calculate the current value ₁₂ flowing with the application of a voltage lower than the anodic oxidation voltage of silicon at the end point of etching. Then, when the end current ₁₂ is reached, the etching is ended.

As described above, the current is monitored by utilizing the difference between the voltage and current characteristics of each plane orientation of silicon shown in FIG. 12, and a desired diaphragm thickness can be obtained by one etching. As a result, the concentration of the etchant
Even if the etch rate fluctuates due to the liquid temperature or the like, a thin portion having a desired thickness can be obtained in a continuous process by monitoring a current value which is an alternative parameter indicating an etching amount during etching. (Third Embodiment) Next, a third embodiment will be described with reference to a second embodiment.
The following description focuses on the differences from this embodiment.

In this example, as shown in FIG. 16, when a silicon substrate 72 having a surface orientation of (100) is formed on a silicon substrate 70 via a silicon oxide film 71, It is assumed that a concave portion 73 is formed in 72. The bottom surface of the concave portion 73 is a silicon oxide film 71, and the four side walls are made of a (111) silicon surface. The bottom of the concave portion 73 constitutes a thin portion that becomes a diaphragm. The recess 73 is formed by wet etching with an etching mask disposed on the surface of the silicon substrate 72.

As described above, when the square diaphragm shown in FIG. 16 is formed on the silicon substrate having the crystal orientation (100) and the etching is completed by the oxide film 71, the progress of the etching is monitored and the end point is detected. be able to. As the etching proceeds to the vicinity of the oxide film 71, the current flowing through the diaphragm surface decreases rapidly as shown in FIG. 19, and is stabilized when all the diaphragms reach the oxide film 71. Therefore, the progress of the etching can be grasped by monitoring the current. At this time, the current is stabilized at a predetermined value of 1/10 or less of the initial value. The point at which the current is stabilized is the end point of the etching. FIG.
In FIG. 8, there is a region where the liquid temperature and the current become unstable in the initial stage of the etching, but the effect is omitted in FIG.

Hereinafter, a detailed etching method will be described. As shown in FIG. 3, the semiconductor substrate 72 (silicon wafer) is placed on the upper surface 14 a of the base 14, the inside of the negative pressure chamber forming recess 20 is evacuated, and the semiconductor substrate 72 is fixed by the packing 21.

The main controller 49 operates as shown in FIG.
7 is executed. This processing will be described with reference to the time chart of FIG. The vertical axis in FIG. 18 indicates the applied voltage value and the current value.

First, when the main controller 49 inputs an etching start signal from the start switch 50, the main controller 49 shown in FIG.
7 is started. The main controller 49 opens the valve 30 and inputs a predetermined amount of the 38 wt% KOH aqueous solution 19. Further, while the KOH aqueous solution 19 is stirred by the stirring blade 45, the heater 40 is energized and controlled by the temperature controller 44 to maintain the temperature of the KOH aqueous solution 19 at 110 ° C.

In this state, the main controller 49
In step 301, the power supply contact 39 is closed, and a predetermined minute voltage from the power supply is applied to the wafer (semiconductor substrate 72). In this example, a power supply for applying a minute voltage is connected to the contact 39. Then, the main controller 49, after a predetermined time T ₀ has confirmed that has elapsed in step 302 (timing t ₃₀ in FIG. 18), to measure the current I by the current meter 38 at step 303. While performing the current sampling process at predetermined time intervals, in step 304, the current value I _i−1
When the difference ΔI between the current value I _i at the current sampling (or becomes almost "0") is either entered three consecutive times in a predetermined small range not determined whether.

Then, the main controller 49 sets ΔI
Are within a predetermined minute range three consecutive times (FIG. 18).
T timing ₃₁₎ of opening the contact 39 performs washing in step 305.

As a result, a diaphragm (thin portion) having a desired thickness is formed. Thereafter, the silicon substrate 72 (wafer) is taken out of the etching apparatus. As described above, when the etching is completed by using the oxide film, 0 to 0.
When a voltage of 3 volts is applied, the etching point along the progress of the etching is A → B → C → D in FIG.
→ The current ratio I / I ₁₁ changes as shown in FIG. As shown by the etching progress points A → B → C → D in FIGS. 16 and 19, when the etched surface approaches oxide film 71, the dissolution current ratio I / I ₁₁ rapidly decreases.
Then, as indicated by etching progress point E in FIG. 16 and 19, when all of the diaphragm reaches the oxide film 71, no longer little change current ratio I / I _11, stabilized at a predetermined value. The end point of the formation of the concave portion 73 is when the current change becomes substantially “0”. By monitoring this change point, accurate etching can be performed without over-etching. This change point is a point at which the current value ΔI between two consecutive points becomes substantially “0” three consecutive times in step 304 of FIG.

As described above, this embodiment has the following features. (A) As shown in FIG. 16, when the concave portion 73 has a bottom surface made of a silicon oxide film (insulating film) 71, the etching end point is defined as the time when the change in current flowing with the dissolution of silicon becomes smaller than a predetermined value. Thus, the concave portion 73 can be manufactured with high accuracy without over-etching by terminating the oxide film stop etching at the optimal time. (Fourth Embodiment) Next, the fourth embodiment will be described in the third embodiment.
The following description focuses on the differences from this embodiment.

In this example, as shown in FIG. 20, a silicon substrate 80 having a surface orientation of (100) is
It is assumed that a U-shaped concave portion 81 is formed. Recess 8
The four side walls 1 are (111) planes. This recess 81
Are formed by wet etching with an etching mask disposed on the surface of the silicon substrate 80.

The recess 8 surrounded by the four (111) planes
Also in the case of forming 1, the end point can be detected by monitoring the progress of the etching. As the etching progresses, the exposed area of the (111) plane increases, and finally the (100) plane disappears, leaving a structure in which only the (111) plane is exposed. At this time, the current is stabilized at a predetermined value of about 1/10 of the initial value, as shown in FIG. The point at which the current is stabilized is the end point of the etching.

Hereinafter, a detailed etching method will be described. As shown in FIG. 3, the semiconductor substrate 80 (silicon wafer) is arranged on the upper surface 14 a of the base 14, the inside of the negative pressure chamber forming recess 20 is evacuated, and the semiconductor substrate 80 is fixed by the packing 21.

The main controller 49 is connected to the main controller 49 shown in FIG.
1 is performed. This processing will be described with reference to the time chart of FIG. The vertical axis in FIG. 22 indicates the applied voltage value and the energized current value.

First, when the main controller 49 inputs an etching start signal from the start switch 50, the main controller 49 shown in FIG.
1 is started. The main controller 49 opens the valve 30 and inputs a predetermined amount of the 38 wt% KOH aqueous solution 19. Further, while the KOH aqueous solution 19 is stirred by the stirring blade 45, the heater 40 is energized and controlled by the temperature controller 44 to maintain the temperature of the KOH aqueous solution 19 at 110 ° C.

From this state, the main controller 49
Closes the power supply contact 39 in step 401 and applies a predetermined minute voltage from the power supply to the wafer (semiconductor substrate 80). In this example, a power supply for applying a minute voltage is also connected to the contact 39. Then, the main controller 49, after a predetermined time T ₀ has confirmed that has elapsed in step 402 (timing t ₄₀ in FIG. 22), to measure the current I by the current meter 38 at step 403. While performing the current sampling process at a predetermined time interval, in step 404, the current value I _i-1 in the previous sampling is obtained.
When the difference ΔI between the current value I _i at the current sampling (or becomes almost "0") is either entered three consecutive times in a predetermined small range not determined whether.

Then, the main controller 49 sets ΔI
Are within a predetermined minute range three times in a row (FIG. 22).
T timing ₄₁₎ of opening the contact 39 performs washing in step 405.

As a result, a V-shaped concave portion having a desired dimension is formed. Thereafter, the silicon substrate 80 (wafer) is taken out of the etching apparatus. Thus, a V-shaped concave portion (V-shaped groove) 81 surrounded by four (111) planes
When a voltage of 0 to 0.3 volts is applied in advance, the etching point changes from A to B to C to D to E in FIG. 20, but the current ratio I / I ₁₁ changes as shown in FIG. 23. This figure 2
As indicated by the 0, 23 etching progress points A → B → C → D, the current ratio I / I ₁₁ decreases as the area of the (100) plane decreases. Then, as shown by the etching progress point E in FIGS.
When the surface disappears and the V-shaped concave portion 81 is formed, the current difference ΔI between the two points becomes substantially “0” in step 404 in FIG. 21 and then slightly increases. This current difference Δ
The point at which I becomes "0" is defined as the etching end point. In addition,
In FIG. 22, there are regions where the liquid temperature and the current are unstable in the initial stage of the etching, but the effects thereof are omitted in FIG.

As described above, this embodiment has the following features. (A) As shown in FIG. 20, the concave portion 81 has four (111)
In the case of forming a quadrangular pyramid surrounded by a silicon surface, when the change in the current flowing with the dissolution of silicon became smaller than a predetermined value, the etching end point,
The V-groove (V-shaped recess) 81 can be manufactured with high accuracy without over-etching by terminating the etching at an optimum time.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor pressure sensor according to a first embodiment.

FIG. 2 is a diagram showing a relationship between an etching time and a current ratio.

FIG. 3 is a schematic view of an etching apparatus according to the embodiment.

FIG. 4 is a partially enlarged view of an etching apparatus.

FIG. 5 is a flowchart for explaining an etching operation.

FIG. 6 is a flowchart for explaining an etching operation.

FIG. 7 is a time chart for explaining an etching operation.

FIG. 8 is a diagram showing a diaphragm etching process of the semiconductor pressure sensor according to the second embodiment.

FIG. 9 is a flowchart for explaining an etching operation.

FIG. 10 is a time chart for explaining an etching operation.

FIG. 11 is a diagram showing a change in etching current when a minute positive voltage is applied.

FIG. 12 shows an etching voltage according to a crystal orientation of silicon.
The figure which shows a current characteristic change.

FIG. 13 is an explanatory diagram for explaining an etching operation.

FIG. 14 is an explanatory diagram for explaining an etching operation.

FIG. 15 is an explanatory diagram for explaining an etching operation.

FIG. 16 is a diagram for explaining a diaphragm etching process of the semiconductor pressure sensor according to the third embodiment.

FIG. 17 is a flowchart illustrating an etching operation.

FIG. 18 is a time chart illustrating an etching operation.

FIG. 19 is a diagram showing a current change when etching is stopped by an oxide film.

FIG. 20 is a diagram illustrating a semiconductor device according to a fourth embodiment.

FIG. 21 is a flowchart illustrating an etching operation.

FIG. 22 is a time chart illustrating an etching operation.

FIG. 23 is a diagram showing a change in current when a concave portion surrounded by four (111) planes is formed.

FIG. 24 is a cross-sectional view for explaining a general etching operation.

FIG. 25 is a cross-sectional view for explaining a general etching operation.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... P type silicon substrate, 2 ... N type epitaxial layer, 3
... Semiconductor substrate, 4 ... Recess, 19 ... KOH aqueous solution, 60 ...
Silicon substrate, 61 ... recess, 71 ... silicon oxide film, 7
2 ... silicon substrate, 73 ... recess, 80 ... silicon substrate,
81: recess.

Claims (10)

[Claims] 1. An etching method in which a concave portion is formed in a partial region of a silicon substrate by performing etching from one surface of the silicon substrate using an anisotropic etching solution, and the surface of the silicon substrate to be etched during the etching. Detecting a current flowing along with the anodic oxidation of silicon by applying a positive voltage to the silicon; calculating a remaining etching time until a desired etching amount is obtained based on a result of the detection of the current; Etching a silicon substrate for a time. 2. The method for etching a silicon substrate according to claim 1, wherein the remaining etching time is calculated from an initial current value flowing during the anodic oxidation of silicon and a current value during the etching. 3. An initial current value flowing along with the anodic oxidation of silicon is defined as I _O, and a current value during etching is defined as I ₁ , where I ₁ / I _O = −c (d ₁ −a) ² + b Here, a, b, and c are constants, and the etching amount d ₁ during the etching is calculated. When the etching time up to that time is T and the target etching amount is d ₂ , T _e = ｛(d _{2 -d 1) / d 1}} · silicon substrate etching method according to claim 1, characterized in that to calculate the remaining etch time T _e at T. 4. An etching method in which a concave portion is formed in a partial region of a silicon substrate by performing etching from one surface of the silicon substrate using an anisotropic etching solution, wherein the surface to be etched of the silicon substrate is in the middle of etching. A method of etching a silicon substrate, wherein an end point of etching is detected by monitoring a change in a current flowing with the dissolution of silicon when a voltage lower than the anodic oxidation voltage of silicon is applied. 5. The method according to claim 1, wherein a current value flowing with application of a voltage lower than the silicon anodic oxidation voltage at the end point of etching is calculated from a current value flowing with application of a voltage lower than the silicon anodic oxidation voltage at the beginning of etching. The method for etching a silicon substrate according to claim 4, wherein 6. A current value I ₁₁ flowing with application of a voltage lower than the anodic oxidation voltage of silicon at the beginning of etching.
From I ₁₂ / I ₁₁ = p (d−q) ² + r, where d is a target etching amount, p, q, and r are constants, and are applied to a voltage lower than the anodic oxidation voltage of silicon at the end point of etching. 5. The method for etching a silicon substrate according to claim 4, wherein a current value of ₁₂ is calculated. 7. The method for etching a silicon wafer according to claim 4, wherein the silicon surface forming the bottom surface of the concave portion and the silicon surface forming the side wall have different voltage / current characteristics. 8. The method for etching a silicon substrate according to claim 4, wherein the time when the change in the current flowing with the dissolution of the silicon becomes smaller than a predetermined value is set as the etching end point. 9. The method for etching a silicon substrate according to claim 8, wherein the bottom surface of the recess is formed of an insulating film. 10. The concave portion forms a pyramid.
3. The method for etching a silicon substrate according to item 2.