JP3443266B2 - Constant voltage circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage circuit for generating a constant voltage in a utilization circuit.

[0002]

2. Description of the Related Art Generally, a constant voltage circuit includes, for example, a circuit in which a resistor and a diode are connected in series, and the forward voltage of the diode is used to extract an output voltage from the cathode of the diode. Generate a fixed output voltage and also generate an output voltage that is not affected by fluctuations in the power supply voltage. The output constant voltage is applied to each utilization circuit as a bias, for example, and is used to determine the operating point of the utilization circuit. Since the output constant voltage is not affected by the power supply voltage, the operating point of the utilization circuit due to the constant voltage does not change according to the fluctuation of the power supply voltage, and the utilization circuit operates stably.

[0003]

By the way, in a constant voltage circuit for a low power supply voltage, the base-emitter voltage and the collector-emitter saturation voltage of the transistors constituting the utilization circuit are set so that the utilization circuit operates normally. Considering this, the output constant voltage was set to a low value according to the low power supply voltage. When a constant voltage circuit for such a low power supply voltage is used with a high power supply voltage, the output voltage naturally becomes a low value, so the operating point of the utilization circuit is less than half of the high power supply voltage, and the dynamic range of the utilization circuit is Getting worse. In particular,
Since the output circuit of the utilization circuit has to generate an output signal of an optimum level to the external circuit of the subsequent stage, the output circuit needs an optimum dynamic range. Therefore, in a circuit driven by a high power supply voltage, in order to ensure an optimum dynamic range, it is desired that the constant voltage circuit generate an output voltage that is half the power supply voltage. That is, by making the bias half the power supply voltage, both positive and negative signals can be maximally swung at the same level.

Therefore, an object of the present invention is to achieve both normal operation of a circuit used at a low power supply voltage and securing of an optimum dynamic range of the circuit used at a high power supply voltage.

[0005]

According to the present invention, a reference voltage generating circuit for generating a reference voltage, a voltage dividing circuit for dividing a power supply voltage, and an output voltage of the voltage dividing circuit are applied to a base. A first transistor and a second transistor that is differentially connected to the first transistor and has the base to which the reference voltage is applied. When the first transistor is on, the power supply voltage is divided to generate an output voltage. And an output stage circuit that generates an output voltage of the reference voltage or the output voltage generation circuit in response to turning on of the first or second transistor.

Further, the output voltage generating circuit is characterized in that the power supply voltage is divided into 1: 1. According to the present invention, when the output voltage of the voltage dividing circuit is higher than the reference voltage, the first transistor is turned on, the output voltage is generated from the output voltage generating circuit, and the output of the output voltage generating circuit is further output from the output stage circuit. Voltage is generated. When the output voltage of the voltage dividing circuit is lower than the reference voltage, the second transistor is turned on and the reference voltage is generated from the output stage circuit.

[0007]

1 is a diagram showing an embodiment of the present invention, in which 1 and 2 are resistors forming a voltage dividing circuit for dividing a power supply voltage Vcc, and 3 is a connection of resistors 1 and 2 to a base. Transistor to which the midpoint voltage of point A is applied, 4 is a transistor that is differentially connected to transistor 3, 5 is a resistor that serves as a load of transistor 3, and 7 is a reference voltage generation circuit that applies a reference voltage to the base of transistor 4. , 8 is a utilization circuit to which a reference voltage is applied, 9 is a transistor whose base is connected to one end of the resistor 5 and whose emitter is connected to a power source. 10 is a transistor 10a and transistors 10b and 10c which are mirror-connected to this transistor. , A current mirror circuit for inverting the collector current of the transistor 9, 11 is a transistor for inverting the output current of the current mirror circuit 10 including transistors 11a and 11b. Mirror circuits, 12 and 13 are connected in series between the transistors 10b and 11b, a resistor for dividing the power supply voltage Vcc into 1: 1, and 14 is a reference voltage or the midpoint voltage of the connection point B of the resistors 15 and 16 is derived. Is an output terminal, 15 is a resistor connected between the output terminal of the reference voltage generating circuit 7 and the output terminal 14, and 16 is an output circuit to which the output voltage of the output terminal 14 is applied. Incidentally, the transistor 9, the current mirror circuits 10 and 11, and the resistors 12 and 1
Reference numeral 3 constitutes an output voltage generating circuit, and resistors 12, 13 and 15 constitute an output stage circuit. The resistors 12 and 13 serve as both the output voltage generating circuit and the output stage circuit.

In FIG. 1, the power is turned on and the power supply terminal 1
When the power supply voltage Vcc is applied to 7, a voltage divided by the resistors 1 and 2 is generated at the connection point A, and
The reference voltage Vref is generated from the reference voltage generation circuit 7.
First, when the power supply voltage Vcc is high and the voltage at the connection point A is higher than the reference voltage Vref, the transistor 3 is turned on and the transistor 4 is turned off. When the transistor 3 turns on, the voltage drop across the resistor 5 increases, and the transistor 9 turns on. When the transistor 9 is turned on, a collector current is generated from the transistor 9, the collector current is inverted by the current mirror circuit 10, and an inverted current is generated in the transistors 10b and 10c of the current mirror circuit 10.
The collector current of the transistor 10c is the current mirror circuit 1
Inverted by 1. As a result, the collector current of the transistor 11b flows through the resistors 12 and 13 and the transistor 10b.
Is supplied to. Since the collector-emitter voltage of the transistors 10b and 11b is so small that it can be ignored, the voltage at the connection point B is the power supply voltage Vcc of the resistors 12 and 13 of 1: 1.
The voltage is divided into. Here, the output impedance of the reference voltage generation circuit 7 is set to be larger than the output impedance of the connection point B by connecting the resistor 15 having a resistance value larger than that of the resistors 12 and 13. Therefore, the output voltage of the output terminal 14 is dominated by the voltage of the connection point B, and a voltage obtained by dividing the power supply voltage Vcc by the resistors 12 and 13 is generated from the output terminal 14. Therefore, the reference voltage Vref is applied as a bias to the utilization circuit 8, and the output circuit 16
The output voltage of the connection point B is applied as a bias to.

Therefore, since the operating point of the output circuit is half the power supply voltage, an optimum dynamic range can be secured, and an output signal that swings to a large amplitude corresponding to the high power supply voltage is output from the output circuit 8. Can be generated from. When the power supply voltage Vcc is low and the voltage at the connection point A is lower than the reference voltage Vref, the transistor 3 turns off and the transistor 4 turns on. When the transistor 3 is turned off, the transistor 9 is also turned off, so that the transistors 10b and 11b are turned off and the connection point B is opened. Therefore, the output voltage of the output terminal 14 is the reference voltage Vr.
becomes ef. Therefore, the reference voltage Vref is applied as a bias to the utilization circuit 8 and the output circuit 16, and the operating point of the utilization circuit 8 and the output circuit 16 becomes the reference voltage Vref.

Therefore, when the power supply voltage is high, the operating point of the output circuit 16 becomes half of the power supply voltage, and the optimum dynamic range can be secured in the output circuit 16, and when the power supply voltage is low, the utilization circuit 8 and It becomes an operating point in consideration of the base-emitter voltage and the collector-emitter saturation voltage of the transistors that form the transistor 16. For example, even if the power supply capacity deteriorates and the power supply voltage drops, the utilization circuit 8 and the output circuit 16 are It can be operated normally.

For example, when the resistance ratio of the resistors 1 and 2 is 2: 1, the resistance ratio of the resistors 12 and 13 is 1: 1, and the reference voltage Vref is 1.2V, the output terminal corresponding to the power supply voltage Vcc. The output voltage of 14 changes as shown in FIG. That is, when the power supply voltage Vcc is lower than 3.6V, the output voltage of the output terminal 14 becomes a fixed voltage of 1.2V, and when the power supply voltage Vcc is higher than 3.6V, the output voltage of the output terminal 14 becomes 1 of the power supply voltage Vcc. / 2. Therefore, the power supply voltage Vc
When c is a high voltage, the bias of the output circuit 16 is Vcc /
When the dynamic range of the output circuit 16 becomes large and the power supply voltage Vcc is low, the bias of the output circuit 16 becomes 1.2 V, and the output circuit 16 can be operated normally.

[0012]

According to the present invention, when the power supply voltage is high, the voltage obtained by dividing the power supply voltage is used as the output voltage, and when the power supply voltage is low, the fixed voltage is used as the output voltage. The output constant voltage can be changed according to the power supply voltage, and a versatile constant voltage circuit corresponding to the power supply voltage can be provided. In particular, the utilization circuit can be normally operated when the power supply voltage is low, and the dynamic range of the utilization circuit can be secured when the power supply voltage is high.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a characteristic diagram showing a relationship between a power supply voltage and an output voltage of an output terminal 14.

[Explanation of symbols]

1, 2, 5, 12, 13, 15 Resistors 3, 4, 10a to 10c, 11a, 11b Transistor 7 Reference voltage generation circuit 8 Utilization circuit 14 Output terminal 16 Output circuit 17 Power supply terminal

Front page continued (58) Fields surveyed (Int.Cl. ⁷ , DB name) G05F 1 / 445,1 / 56,1 / 613 G05F 1 / 618,3 / 00-3/30 H03F 3/45

Claims (2)

(57) [Claims] 1. A reference voltage generating circuit for generating a reference voltage, a voltage dividing circuit for dividing a power supply voltage, a first transistor to which an output voltage of the voltage dividing circuit is applied to a base, and a difference between the first transistor and the first transistor. A second transistor that is operatively connected and to which the reference voltage is applied; a output voltage generation circuit that divides the power supply voltage to generate an output voltage when the first transistor is on; A constant voltage circuit, comprising: an output stage circuit that generates the reference voltage or the output voltage of the output voltage generation circuit in response to turning on of the second transistor. 2. The constant voltage circuit according to claim 1, wherein the output voltage generation circuit divides the power supply voltage into 1: 1.