JP3421862B2 - Transistor manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a transistor. More specifically, the present invention relates to a method for annealing a thin film transistor formed on an insulating substrate.

[0002]

2. Description of the Related Art Apart from transistors formed on bulk silicon wafers, thin film transistors formed on insulating substrates have recently been actively developed. Substrates on which thin film transistors are formed in an integrated manner can be used for, for example, active matrix type liquid crystal display devices and CCD arrays, and their applications are expanding. The thin film transistor is generally an insulated gate field effect type, and has a structure in which a silicon thin film, a gate insulating film, and a gate electrode forming an active region are stacked.

[0003]

A thin film transistor is manufactured by a process substantially similar to a normal transistor formed on a silicon wafer. However, due to the heat resistance of the substrate and the like, it is not always possible to apply a sufficient high-temperature process, and it is difficult to obtain desired characteristics by simply manufacturing. Therefore, annealing has conventionally been performed for the purpose of modifying a silicon thin film or a gate insulating film. In the conventional annealing method, for example, the substrate is left in a hydrogen gas atmosphere. However, this annealing method was effective for modifying a silicon thin film, but was insufficient for modifying other parts such as a gate insulating film. Therefore, when a transistor characteristic failure such as so-called depression occurs due to a defect of the interface between the silicon thin film and the gate insulating film or the defect of the gate insulating film itself, there is a problem that a large improvement effect cannot be obtained by the conventional annealing method. is there.

[0004]

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, an object of the present invention is to provide an annealing method effective for improving transistor characteristics. The following measures were taken to achieve this purpose. That is, the transistor manufacturing method according to the present invention, the silicon thin film, the gate insulating film, the gate electrode in order, or the gate electrode, the gate insulating film
Forming a silicon thin film on the substrate, forming a source region and a drain region in the silicon thin film, connecting a source electrode to the source region through a contact hole, And a step of connecting a drain electrode to the drain region through to complete a thin film transistor, and exposing the completed thin film transistor to an atmosphere containing oxygen ions and oxygen active species generated by plasma discharge of a gas containing oxygen. Annealing to form the thin film transistor.
It is characterized in that the shortage of oxygen atoms in any of the portions is compensated to improve the characteristics of the thin film transistor. The annealing is sufficient
It is good to repeat the annealing while checking whether
There.

[0005]

According to the present invention, by annealing in an atmosphere containing oxygen ions and oxygen active species, it is possible to repair a composition defect or the like of the gate insulating film, and to improve the characteristics and uniform the characteristics of the transistor. In particular, it is possible to greatly improve the depression, which has been a problem in the past.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a schematic view showing a vacuum chamber device for performing an annealing process applied to a transistor manufacturing method according to the present invention. This apparatus has a vacuum chamber 1. The vacuum chamber 1 can be evacuated by a vacuum pump 2. Further, a desired gas can be introduced into the vacuum chamber 1 through the gas inlet 3. In the vacuum chamber 1, a pair of electrode plates 4 and 5 arranged opposite to each other are housed. An RF power source 6 is connected to the upper electrode plate 4, and the lower electrode plate 5 is grounded. A heater 7 is mounted below the electrode plate 5. Oxygen is introduced from the gas inlet 3 and a plasma 8 is generated between the pair of electrode plates 4 and 5 by the RF power supply 6. If necessary, the heater 7 is heated, and the substrate 9 placed on the lower electrode plate 5 is annealed. The transistor is formed on the substrate 9.

Next, the annealing method will be described in detail with reference to FIG. First, the substrate 9 on which the insulated gate field effect transistor is formed is put into the vacuum chamber 1. The transistor formed on the substrate 9 is in a state where at least the formation of the gate insulating film has been completed. Next, the vacuum chamber 1 is evacuated by the pump 2 to, for example, 4 × 10 ⁻⁵ Torr.
Vacuum to about pressure. Further, the heater 7 is energized to heat the inside of the chamber 1 and the substrate 9 to a temperature of, for example, about 300 ° C. Next, oxygen gas is introduced into the chamber 1 through the gas inlet 3 to set the internal pressure to about 500 mTorr. In this state, a high frequency of 13.5 MHz is applied between the pair of electrode plates 4 and 5 by the RF power source 6 at a power of about 20 W to generate a discharge plasma 8 of a gas containing oxygen in the chamber 1. The transistor formed on the substrate 9 is annealed by oxygen ions contained in the plasma 8 and oxygen atoms activated by the plasma. Normally, annealing for about several tens of minutes is sufficient. The transistor characteristics are measured, and if the characteristics are not sufficiently improved, annealing is repeatedly performed. Annealing is completed by a series of these operations.

The above annealing conditions are merely examples, and specific numerical settings of actual conditions, frequency settings of an RF power supply, and the like are optimally adjusted according to individual characteristics of a transistor to be annealed. Good. Generally, the oxygen concentration of a gas containing oxygen is set between 1 and 100%. The output of the plasma discharge is set in the range of 0.5 mW / cm ^{2 to 5} W / cm ² with respect to the area of the discharge electrode. Further, the gas pressure of the atmosphere containing oxygen ions and / or oxygen active species is set in the range of 0.01 Torr to 760 Torr. Various conditions such as oxygen concentration, plasma discharge output, and gas pressure in these annealing processes are determined mainly for the purpose of maintaining stable discharge of plasma. These conditions vary depending on the shape of the chamber for generating the plasma and the like. If the conditions are out of the above-mentioned range, generally stable plasma discharge cannot be obtained. Next, the annealing temperature is set in a temperature range from room temperature to 600 ° C. The higher the temperature, the more oxygen is activated and the higher the effect of annealing.
However, the substrate has heat resistance and has certain limitations.
Further, when polycrystalline silicon or amorphous silicon is used as the semiconductor constituting the active region of the thin film transistor,
When the temperature is increased to a temperature higher than 00 ° C., there is a restriction that hydrogen is released, leading to deterioration of characteristics. From the above viewpoint, the annealing temperature is preferably in a range from room temperature to 600 ° C. In particular, when a glass plate or the like is used as the substrate, an annealing temperature of, for example, about 300 ° C. is set in consideration of the heat resistance. The annealing time can be appropriately selected in the range of 1 minute to 1000 minutes. In the annealing according to the present invention, the annealing is performed while measuring the characteristics of the transistor. Therefore, if no characteristic improvement is observed in the first annealing, the annealing is performed again. The annealing is completed when the desired characteristic improvement is obtained. As described above, one of the features of the present invention is that repeated annealing can be performed.
There is also one.

FIG. 2 is a schematic sectional view showing an example of a transistor to be annealed. In the example shown in the figure, the insulated gate field effect type thin-film transistor is
Is formed on. The active region of the transistor comprises a silicon thin film 10. The silicon thin film 10 is patterned into a predetermined shape. Both ends are heavily doped with impurities to form a source region 11 and a drain region 12. On the silicon thin film 10, a gate insulating film 13 made of silicon dioxide or the like is formed. A gate electrode 14 is formed on the gate insulating film 13 by patterning. A source electrode 15 made of metal aluminum or the like is provided on the source region 11 through the contact hole.
Is connected. Similarly, a drain electrode 16 made of metal aluminum or the like is connected to the drain region 12 via a contact hole.

FIG. 3 is a graph showing Vg-Ids characteristics of the transistor shown in FIG. 2 before annealing. The vertical axis represents the drain current Ids, and the horizontal axis represents the gate voltage Vg. As is clear from the graph,
The g-Ids characteristic is largely biased toward the depletion side, and cannot be put to practical use as it is. Also, the degree (swing) of the drain current Ids rising with the rise of the gate voltage Vg is gentle, and sufficient characteristics are not necessarily obtained. On the other hand, the graph of FIG. 4 is a graph obtained by measuring the Vg-Ids characteristics when the transistor shown in FIG. 2 is annealed for 30 minutes using the apparatus described in FIG. As is clear from the comparison with FIG. 3, the depletion of the transistor is greatly improved and the swing is significantly improved by the annealing treatment according to the present invention.

FIG. 5 is a schematic view showing an improved example of the vacuum chamber apparatus for annealing shown in FIG. Basically, it is the same as the apparatus of FIG. 1, and corresponding parts are denoted by corresponding reference numerals to facilitate understanding. The difference is that the electrode plate 5
Instead of using the electrode grid 25 arranged in a hollow. This electrode grid 25 is grounded and RF
Plasma 8 between the upper electrode plate 4 connected to the power source 6
Generate. On the other hand, the substrate 9 is directly mounted on the heater 7 spaced from the electrode grid 25. In this example, oxygen is excited by a remote plasma method in which a plasma 8 is generated between an electrode grid 25 and an electrode plate 4 located at a position separated from a substrate 9 on which transistors are formed. The transistor is annealed in the atmosphere of the oxygen activated species 17 derived from the discharge plasma via the electrode grid 25 by the remote plasma method. According to this remote plasma method, the substrate 9 does not need to be directly exposed to the plasma 8, so that damage to transistors and the like due to the plasma can be reduced.

FIG. 6 is a schematic diagram showing a modification of the chamber structure shown in FIG. Basically, they have the same structure, and corresponding parts are denoted by corresponding reference numerals to facilitate understanding. The difference is that the plasma chamber 1A and the annealing chamber 1B which are separated from each other are connected to each other via a communication portion 1C. A pair of electrode plates 4 and 5 are housed in the plasma chamber 1A. One electrode plate 4 is connected to an RF power source 6,
The other electrode plate 5 is grounded. Discharge plasma 8 is obtained by introducing oxygen from gas inlet 3 and applying a predetermined high frequency between both electrode plates 4 and 5. The active species 17 of oxygen obtained by this plasma are led to the annealing chamber 1B via the communication part 1C. A heater 7 is incorporated in the annealing chamber 1B, and a substrate 9 on which a transistor to be subjected to an annealing process is formed.
Is placed.

The annealing process according to the present invention may be basically performed at any time after the formation of the gate insulating film of the transistor. For example, in the example shown in FIG. 2, the gate electrode 14 and the source electrode 1
5. Annealing is performed after the drain electrode 16 is formed. However, the present invention is not limited to this. For example, as shown in FIG. 7, an annealing process may be performed immediately after the gate insulating film 13 is formed on the surface of the substrate 9. In this case, below the gate insulating film 13,
The silicon thin film 10 including the source region 11 and the drain region 12 has already been patterned. Alternatively, it is effective to perform the annealing treatment according to the present invention in the step after forming the passivation film 18 so as to cover the gate electrode 14, the source electrode 15, and the drain electrode 16 as shown in FIG. Alternatively, the annealing according to the present invention can be applied not only to the top gate type where the gate electrode is located on the gate insulating film as shown in FIGS. 6 to 8, but also to the bottom gate type as shown in FIG. The method is effective. In the bottom gate type shown in FIG. 9, a gate electrode 14 is formed on the surface of a substrate 9 by patterning, and a silicon thin film 10 serving as an active region of a transistor is formed by patterning via a gate insulating film 13. At both ends of the silicon thin film 10, a source region 11 and a drain region 12, which are heavily doped with impurities, are formed. The bottom gate transistor having such a configuration is covered with the passivation film 18. A source electrode 15 is connected to the source region 11 through a contact hole provided in the passivation film 18, and a drain electrode 16 is connected to the drain region 12. In addition,
Although silicon is used as the semiconductor material in the above-described transistor, the annealing method according to the present invention is also effective for transistors using other types of semiconductor materials. Further, a predetermined modifying effect can be obtained regardless of whether the semiconductor material is single crystal, polycrystal, or amorphous. In addition, a desired effect can be obtained by using either an oxide or a nitride for the gate insulating film.

As described above, the present invention is characterized in that annealing is performed in an atmosphere containing oxygen ions and / or oxygen active species generated by plasma discharge of a gas containing oxygen. Although an oxygen gas is introduced in the above-described embodiment to generate a gas containing oxygen in the chamber, the present invention is not limited to this. Generally, a plasma excitation gas containing oxygen atoms can be used. Not only pure oxygen gas but also laughing gas ( nitrous oxide ), for example, can be used as the excitation gas for this plasma annealing. FIGS. 10 and 11 show the annealing effect when laughing gas is used. FIG.
0 is a graph showing measured gate voltage / drain current characteristics of the transistor before annealing. As shown, the characteristic curve is largely biased toward the depletion side, and the rise is relatively gentle. On the other hand, FIG. 11 is a graph in which the gate voltage / drain current characteristics of the transistor after the annealing process using the laughing gas plasma are measured. As shown in the figure, the depression of the characteristic curve is greatly improved, and the swing is also greatly improved. As described above, it is sufficient that oxygen is contained in the plasma atmosphere as the excitation gas, and the type of the excitation gas does not matter as long as oxygen atoms are present in the composition.

Finally, some theoretical considerations will be given on the point that the depletion of the transistor can be improved by annealing in an atmosphere containing oxygen ions and / or oxygen active species. The fact that the depletion can be corrected by introducing oxygen by annealing means that oxygen atoms are deficient in any part of the transistor. For example, SiO ₂ constituting a gate insulating film
Oxygen vacancies may be present in the membrane. When oxygen vacancy occurs, a state of SiO ⁺ is generated and the positive charge becomes superior. As a result, depletion of transistor characteristics may occur. As a cause of the oxygen vacancy, there is a possibility that the oxygen vacancy is generated from the beginning in the SiO ₂ film itself. Or,
Although it does not occur in the film-formed state, when metal aluminum is deposited as a gate electrode, it is conceivable that aluminum adsorbs oxygen and thereby causes oxygen vacancy. Another cause may be an OH group. S
When the OH group is contained in the iO ₂ film, it is considered that the OH group is separated from the Si atom by bonding with hydrogen in the atmosphere, and therefore, the positive charge may prevail. Regardless of the cause, it is considered that there is probably a cause of depletion in the process and composition of the gate insulating film. Therefore, the annealing according to the present invention is extremely effective in stabilizing and improving the performance of the thin film transistor.

[0016]

As described above, according to the present invention, the depletion of a transistor can be greatly reduced by annealing in an atmosphere containing oxygen ions and / or oxygen active species generated by plasma discharge of a gas containing oxygen. There is an effect that can be improved. Further, the swing indicating the degree of the drain current rising in response to the rise of the gate voltage can be improved. Further, the annealing has the effect of making the characteristics of the individual transistors integrated on the same substrate uniform. In addition, the annealing of the present invention has the effect of improving characteristics not only during the transistor manufacturing process but also at the stage after the transistor is completed. Therefore, the annealing can be repeatedly performed while checking whether the annealing is sufficient, and the yield can be increased. Becomes possible. Furthermore, the annealing according to the present invention does not require a particularly high temperature condition, and thus has an effect that the temperature of the transistor manufacturing process can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a vacuum chamber apparatus used for performing an annealing method applied to a transistor manufacturing method according to the present invention.

FIG. 2 is a schematic cross-sectional view illustrating a transistor to which the present invention is applied.

FIG. 3 is a graph showing gate voltage / drain current characteristics of a transistor before annealing.

FIG. 4 is a graph showing gate voltage / drain current characteristics of the transistor after the annealing process.

FIG. 5 is a schematic view showing a modified example of the vacuum chamber device shown in FIG.

FIG. 6 is a schematic diagram showing another modified example of the vacuum chamber device.

FIG. 7 is a schematic diagram showing a structure of a transistor to be annealed according to the present invention.

FIG. 8 is a schematic diagram showing another structure of the transistor.

FIG. 9 is a schematic view showing another example of the structure of the transistor.

FIG. 10 is a graph showing gate voltage / drain current characteristics of a transistor before plasma annealing using nitrous oxide .

FIG. 11 is a graph showing gate voltage / drain current characteristics of a transistor after plasma annealing using nitrous oxide .

[Explanation of symbols]

1 vacuum chamber 2 vacuum pump 3 Gas inlet 4 Electrode plate 5 Electrode plate 6 RF power supply 7 heater 8 Plasma 9 Substrate

──────────────────────────────────────────────────続 き Continuing on the front page (72) Naoki Sano, Inventor Naoki 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Jun Atsushi 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Toshiyuki Samejima 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Michihisa Yano 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo (56) References JP-A-1-95575 (JP, A) JP-A-1-120070 (JP, A) JP-A-2-91937 (JP, A) JP-A-3-41731 ( JP, A) JP-A-4-144129 (JP, A) JP-A-4-282841 (JP, A) JP-A-4-299566 (JP, A) JP-A-6-196702 (JP, A) JP-A-59-46748 (JP, A) JP-A-60-136259 (JP, A) (58) ) Surveyed field (Int.Cl. ⁷ , DB name) H01L 21/324

Claims (2)

(57) [Claims] A step of forming these on a substrate in the order of a silicon thin film, a gate insulating film, and a gate electrode, or a gate electrode, a gate insulating film, and a silicon thin film; and forming a source region and a drain region on the silicon thin film. Forming a;
A step of connecting a source electrode to the source region through a contact hole and a step of connecting a drain electrode to the drain region through a contact hole are performed to complete a thin film transistor, which is generated by plasma discharge of a gas containing oxygen. The completed thin film transistor is exposed to an atmosphere containing the oxygen ions and oxygen active species thus annealed to anneal the thin film transistor.
A method for manufacturing a transistor, characterized in that the characteristics of the thin film transistor are improved by compensating for the shortage of elements. 2. Checking whether said annealing is sufficient.
Wherein the annealing is repeated.
The transistor manufacturing method according to the above .