JP3397804B2 - Manufacturing method of nonvolatile memory - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a nonvolatile memory, and more particularly to a method of manufacturing a nonvolatile memory having improved and stabilized memory characteristics and high reliability. . 2. Description of the Related Art A conventional method for manufacturing a nonvolatile memory is described as follows.
This will be described with reference to FIG. FIG. 3 is a cross-sectional view of the memory transistor in the channel width direction. First, a first impurity layer 11 of the same conductivity type as that of the semiconductor substrate 33 is formed in an element isolation region 13 on a semiconductor substrate 33 of a first conductivity type. Further, selective oxidation is performed to form an element isolation insulating film 15 made of a silicon dioxide film in the element isolation region 13. At the time of forming the element isolation insulating film 15, a bird's beak having a shape like a bird's beak is formed at the boundary between the element region 17 and the element isolation region 13. Thereafter, in the element region 17, a memory gate insulating film 19 made of a silicon dioxide film, a memory nitride film 21 made of a nitride film, a top insulating film 23 made of a silicon dioxide film, and a polycrystalline silicon film are formed. The memory gate electrodes 25 are formed sequentially. After that, a mask oxide film 27 is formed by thermally oxidizing the memory gate electrode 25. afterwards,
Using this memory gate electrode 25 as a mask, a source and a drain of the second conductivity type are formed to form a nonvolatile memory element. In a nonvolatile memory, when a sufficiently high positive voltage is applied to the memory gate electrode 25, electrons in the conduction band of silicon single crystal of the semiconductor substrate 33 cause the memory gate insulating film 19 to pass through. It is trapped in the memory nitride film 21 by the tunnel phenomenon. As a result, the threshold voltage of the memory transistor changes, and memory characteristics are obtained. In the nonvolatile memory according to the conventional manufacturing method, a sufficiently high positive voltage is applied to the memory gate electrode 25 to accumulate negative charges in the memory nitride film 21 as described above. At this time, the threshold voltage of the memory transistor performs an enhancement operation. In this state, when a voltage is gradually applied to the memory gate electrode 25, no current flows because the threshold value is high in the element region 17, but the boundary between the element region 17 and the element isolation region 13 does not flow. Parasitic MOS in bird's beak area
In the transistor, a current flows at a low voltage applied to the memory gate electrode, resulting in a leak current. An example is shown by a broken line 31 in a graph showing the relationship between the gate voltage and the drain current in the conventional example shown in FIG. At a low gate voltage of the memory transistor, a drain current serving as a leak current flows. As shown in the graph of FIG. 2, when a leak current occurs at a low gate voltage, there arises a problem that a write width becomes narrow in memory characteristics. An object of the present invention is to solve the above-mentioned problems, and to provide a method of manufacturing a nonvolatile memory having stable characteristics by reducing a leak current caused by a parasitic MOS transistor in a bird's beak region. That is. [0012] In order to achieve this object, a method for manufacturing a nonvolatile memory according to the present invention employs the following manufacturing method. The method of manufacturing a nonvolatile memory of the present invention, the
A first conductivity type semiconductor substrate is formed in an element isolation region of a first conductivity type semiconductor substrate.
Forming a first impurity layer and performing selective oxidation.
Element isolation consisting of silicon dioxide film in element isolation region
A process of forming an insulating film and a silicon dioxide film in an element region
Forming a memory gate insulating film made of
Forming a memory nitride film on a gate insulating film
And a silicon dioxide film on the memory nitride film.
Forming a top insulating film made of
Forming an electrode and ion-implanting an impurity of the first conductivity type;
And then oxidizing the memory gate electrode
A bird's beak adjacent to the memory gate electrode
Forming a second impurity layer of the first conductivity type on a semiconductor substrate immediately below;
And before the aligned region of the memory gate electrode.
A source region and a drain of a second conductivity type in the semiconductor substrate;
Region forming process and a process mainly comprising silicon dioxide.
Step of forming insulating film for layer wiring and photolithography
Contact window with the insulating film for multilayer wiring by etching
And a step of forming a wiring metal . In the method of manufacturing a nonvolatile memory according to the present invention, the impurity concentration of the bird's beak is increased by forming the impurity layer of the first conductivity type again after forming the memory gate electrode. Therefore, by increasing the impurity concentration of the bird's beak region, the operation of the parasitic MOS transistor on the low gate voltage side is suppressed, and the leak current is reduced. Embodiments of the present invention will be described below with reference to the drawings. 1A and 1B are cross-sectional views of a memory gate electrode of a memory transistor in a channel direction in respective steps of a method for manufacturing a nonvolatile memory according to the present invention.
(C) shows a plan view of the memory transistor. First, as shown in FIG. 1A, a P-type semiconductor substrate 33 is deposited on a semiconductor substrate 33 by chemical vapor deposition (CV).
D method), a nitride film having a thickness of about 75 nm (not shown)
Is formed, and an oxidation-resistant film made of a nitride film is formed only in the element region 17 by photolithography and etching. After that, using this nitride film as an ion implantation blocking film, boron impurity ions of, for example, 4 × 10 ¹³ atoms / cm are implanted into the element isolation region 13 by ion implantation.
^- isolation region 1 of the semiconductor substrate 33 by ion implantation of ²
3 to form a first impurity layer 11. After that, the nitride film formed on the element region 17 is used as an oxidation resistant
By performing selective oxidation at 0 ° C. for 160 minutes, an element isolation insulating film 15 made of a silicon dioxide film is formed in the element isolation region 13 to a thickness of 750 nm. After that, the nitride film used as the oxidation-resistant film is removed. Next, an oxidation treatment is performed in an oxidizing atmosphere to form a memory gate insulating film 19 made of a silicon dioxide film having a thickness of about 3 nm on the surface of the element region 17. Thereafter, a memory nitride film 21 made of a nitride film is formed to a thickness of 12 n by a chemical vapor deposition method (CVD method).
m. Thereafter, the memory nitride film 21 is oxidized in a steam atmosphere to form a top insulating film 23 made of silicon dioxide with a thickness of about 4 nm. Thereafter, the memory gate electrode 2 is formed by the CVD method.
5, a polycrystalline silicon film is formed with a thickness of about 450 nm. Thereafter, the memory gate electrode 25 is patterned by photolithography and etching. Next, as shown in FIGS. 1B and 1C, the memory gate electrode 25 is used as a blocking film for ion implantation.
Impurity ions consisting of boron by the ion implantation method, the injection amount 1 × 10 ¹³ atoms / cm ^- introducing the ¹² semiconductor substrate 33 under the conditions of. Then, at a temperature of 1000 ° C. in an oxidizing atmosphere.
By oxidizing the memory gate electrode 25 in 20 minutes, a mask oxide film 27 is formed with a thickness of about 20 nm. By utilizing the heat treatment for forming the mask oxide film 27, boron, which is the first conductivity type impurity introduced into the bird's beak region by the above-described ion implantation method, is diffused into the semiconductor substrate 33. As a result, a second impurity layer 29 having the same conductivity type as that of the first impurity layer 11 and having a higher impurity concentration than the first impurity layer 11 is formed in a region immediately below the bird's beak. [0028] Next, the memory gate electrode 25 as a blocking film for ion implantation, an impurity of the semiconductor substrate 33 and the opposite conductivity type, for example phosphorus, impurity ions such as arsenic ion implantation amount ^{3 × 10 15 atoms / cm -} 12 A source region and a drain region (not shown) are formed in the semiconductor substrate 33 by performing ion implantation under approximately the same conditions. In the subsequent steps, a multi-layer wiring insulating film mainly composed of silicon dioxide is formed by a general method, contact windows are formed in the multi-layer wiring insulating film by photolithography and etching, and then the wiring metal is formed. A non-volatile memory is formed by forming aluminum (Al). As is apparent from the above description, in the method of manufacturing a nonvolatile memory according to the present invention, the parasitic impurity is further increased by increasing the impurity concentration of the bird's beak region where the parasitic MOS transistor is formed. The threshold voltage of the MOS transistor increases. FIG. 2 is a graph showing the relationship between the gate voltage and the drain current of the memory transistor according to the present invention. FIG.
As shown by a solid line 35 showing the characteristics of the present invention,
No drain current, which is a leakage current at a low gate voltage, occurs. As a result, in the memory characteristics, when a positive voltage is applied to the memory gate electrode, the operation becomes more enhanced, and the write width increases. For this reason, the storage time can be increased and the programming time can be shortened, and the memory characteristics and reliability are improved as compared with the related art, so that a nonvolatile memory element having more stable characteristics can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a drawing showing a method for manufacturing a nonvolatile memory according to an embodiment of the present invention. FIG. 2 is a graph showing a relationship between a gate voltage and a drain current of a memory transistor according to the present invention and a conventional example. FIG. 3 is a cross-sectional view illustrating a method for manufacturing a nonvolatile memory in a conventional example. DESCRIPTION OF SYMBOLS 11 First impurity layer 13 Element isolation region 17 Element region 19 Memory gate insulating film 21 Memory nitride film 23 Top insulating film 25 Memory gate electrode 29 Second impurity layer

Claims (1)

(57) [Claim 1] A step of forming a first impurity layer of a first conductivity type in an element isolation region of a semiconductor substrate of a first conductivity type, and element isolation by performing selective oxidation. Forming an element isolation insulating film made of a silicon dioxide film in a region, forming a memory gate insulating film made of a silicon dioxide film in an element region, and forming a memory nitride film on the memory gate insulating film Forming a top insulating film made of a silicon dioxide film on the memory nitride film; forming a memory gate electrode; ion-implanting a first conductivity type impurity; Is oxidized to form a first substrate on a semiconductor substrate immediately below a bird 's beak adjacent to the memory gate electrode.
Forming a second impurity layer of a conductivity type; forming a source region and a drain region of a second conductivity type in the semiconductor substrate in a region where the memory gate electrode is aligned; A method of manufacturing a nonvolatile memory, comprising: a step of forming a wiring insulating film; a step of forming a contact window in the multilayer wiring insulating film by photolithography and etching; and a step of forming a wiring metal. .