JP3186041B2 - Method for manufacturing MOSFET semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a MOSFET semiconductor device having a gate side wall made of a nitride film with an oxide film interposed between the gate electrode and the gate electrode.

[0002]

2. Description of the Related Art MOSFET semiconductor devices having a gate sidewall made of a nitride film having an oxide film interposed between the gate electrode and the gate electrode are widely used as various semiconductor devices in various circuits.

In such a MOSFET semiconductor device, it is important to prevent water from entering from outside the chip in order to ensure high reliability.

That is, when water taken in during the formation of the interlayer film diffuses into the gate oxide film, it reacts with the oxide film itself to generate defects. Since the defect thus generated serves as a charge trapping center, the probability that hot carriers generated during the operation of the MOSFET are trapped is increased, and characteristic fluctuations such as threshold voltage and drain current are increased.

From such a viewpoint, for example, Japanese Patent Application Laid-Open
Japanese Patent No. 45705 discloses a first conductivity type source region and a drain region provided in a second conductivity type wafer on a surface portion of a first conductivity type semiconductor substrate, and a gate oxide film on the wafer. A semiconductor device provided with a lateral MOSFET having a gate electrode provided by
It has been proposed to directly cover the gate electrode of the FET with a silicon nitride film to prevent water from entering from an interlayer film.

[0006]

However, covering the gate electrode directly with a nitride film as in the MOSFET described in Japanese Patent Application Laid-Open No. 9-45705 is effective for preventing the above-described water intrusion. However, when the nitride film sidewall is formed directly on the side surface of the gate electrode and on the silicon substrate, the hot carrier resistance deteriorates due to the influence of stress, and the gate fringe capacitance increases due to the difference in dielectric constant from the oxide film. Another problem arises.

An object of the present invention is to provide a semiconductor device capable of effectively preventing water from entering from an interlayer film without causing a problem caused by directly covering the gate electrode with a nitride film.
An object of the present invention is to provide a method for manufacturing an OSFET semiconductor device.

[0008]

[0009]

According to the present invention, there is provided the above-mentioned MOS transistor.
A method of manufacturing an FET semiconductor device, comprising: forming a gate sidewall made of a nitride film on a side surface of a gate electrode on a silicon substrate with an oxide film interposed therebetween; and forming the gate electrode and the silicon substrate with the nitride film. A step of removing a part of the oxide film interposed between the gate side wall made of a film and a step of uniformly depositing a nitride film, and then performing anisotropic etching to remove the oxide film. Closing the portion with a nitride film.

That is, according to the present invention, in a MOSFET semiconductor device having a nitride film side wall formed with an oxide film interposed therebetween, a gate electrode and a part of the oxide film between the silicon substrate and the nitride film side wall are removed and replaced. by closing a nitride film, it is possible to prevent diffusion of water from the interlayer film to the gate oxide film.

[0011]

Embodiments of the present invention will be described with reference to the drawings.

FIGS. 1 and 2 illustrate the use of M according to the present invention.
3 shows a series of steps for manufacturing an OSFET semiconductor device. First, as shown in FIG. 1A, a polycrystalline silicon gate electrode 3 having a height of 150 nm and a width of 150 nm is formed on a p-type silicon substrate 1 via a gate oxide film 2 having a thickness of 4 nm. . Next, an oxide film 4 having a thickness of 8 nm is formed by CVD.
Arsenic at 30 keV and 5 × 10 ¹³ / c
By implanting m ² , an n-type low concentration diffusion layer 5 is formed. next,
A nitride film having a thickness of 100 nm is deposited by the CVD method and anisotropically etched to form a nitride film sidewall 6 on the side surface of the gate electrode 3 as shown in FIG.

Next, as shown in FIG. 1C, the gate electrode 3 and the oxide film 4 between the silicon substrate 1 and the nitride film side wall 6 are partially removed by buffered hydrofluoric acid.
Next, as shown in FIG. 1D, a nitride film 11 having a thickness of 80 nm is deposited by a CVD method.

Next, by performing anisotropic etching, FIG.
As shown in FIG. 3E, the portion of the gate electrode 3 and the portion of the oxide film 4 between the silicon substrate 1 and the nitride film side wall 6 where removed is covered with the nitride film. As a result, the nitride film side wall 6 becomes as shown in FIG.
In this state, not only the upper end face of the side wall of the oxide film 4 exposed but also the end face of the portion extending along the surface of the silicon substrate 1 is covered.

Next, as shown in FIG.
Inject 3 × 10 ¹⁵ / cm ^{2 at 0} keV and 1 at 1000 ° C.
Activation annealing is performed for 0 seconds to form an n-type high concentration diffusion layer 7. Thereafter, a 30 nm-thick cobalt silicide 8 is formed in a self-aligning manner on the top of the gate electrode 3 and on the surface of the high concentration diffusion layer 7.

Finally, as shown in FIG.
00 nm oxide film 9 and 1000 nm thick BPSG film 1
0 is continuously deposited by a CVD method, and planarization is performed by CMP. Thereafter, a metal wiring (not shown) is formed, and a MOS
The FET semiconductor device is completed.

Here, the protection effect against the influence of water entering from the outside will be described with reference to FIG. 3 and FIG.
An OSFET semiconductor device and a conventional MOSF shown in FIG.
A description will be given in comparison with an ET semiconductor device. FIG. 3 corresponds to the MOSFET semiconductor device obtained in the first embodiment, and FIG. 4 corresponds to the MOSFET semiconductor device obtained in the second embodiment.

First, in the conventional semiconductor device shown in FIG. 5 , an oxide film 4 is formed between a gate electrode 3 and a nitride film side wall 6.
Gate oxide films 2 are present between silicon substrate 1 and nitride film side walls 6, respectively, and their end faces are in contact with oxide film 9. For this reason, water (H ₂ O) easily diffuses from the BPSG film 10 through the portion of the oxide film 9 to the gate oxide film 2 from the position indicated by the arrow, and as a result, defects are generated in the gate oxide film 2. As a result, the hot carrier resistance deteriorates.

On the other hand, in the semiconductor device of the present invention shown in FIG. 3 , the gate electrode 3, the silicon substrate 1, and the nitride film side wall 6 are formed.
A portion of the oxide film 4 between them is removed and replaced with a nitride film, and the end face of the oxide film 4 is not in contact with the oxide film 9.
Therefore, the diffusion path of water is cut off (indicated by a cross in the figure), and the hot carrier resistance is remarkably improved.

Similarly, also in the semiconductor device of the present invention shown in FIG. 4 , the gate electrode 3 and a part of the oxide film 4 between the silicon substrate 1 and the nitride film side wall 6 are removed, and instead of silicon (to be described later). (Silicide 8). For this reason, the diffusion path of water is cut off (marked by x), and the hot carrier resistance is improved.

[0021]

As described above, according to the present invention, the oxide film provided around the gate electrode is covered with the nitride film so that the end face does not contact the interlayer film. Therefore, the diffusion path of water is cut off, and the water taken in during the formation of the interlayer film does not diffuse into the gate oxide film, so that the hot carrier resistance is improved and the reliability of the MOSFET semiconductor device is improved. In addition, the influence of stress due to the direct formation of the nitride film sidewall on the side surface of the gate electrode and the silicon substrate deteriorates hot carrier resistance, and increases the gate fringe capacitance due to the difference in dielectric constant from the oxide film. No problem occurs.

[Brief description of the drawings]

FIG. 1 is a MOSFET according to an embodiment of the present invention;
Process explanatory drawing which shows the first half part of the manufacturing process of a semiconductor device.

FIG. 2 is a MOSFET according to an embodiment of the present invention;
FIG. 4 is a process explanatory view showing the latter half of the manufacturing process of the semiconductor device.

FIG. 3 is a MOSFET according to an embodiment of the present invention;
FIG. 4 is a longitudinal sectional view illustrating a semiconductor device.

FIG. 4 shows a MOSFE according to another embodiment of the present invention.
FIG. 3 is a longitudinal sectional view showing a T semiconductor device.

FIG. 5 is a longitudinal sectional view showing a conventional MOSFET semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate 2 gate oxide film 3 gate electrode 4 oxide film 5 low concentration diffusion layer 6 nitride film side wall 7 high concentration diffusion layer 8 cobalt silicide 9 oxide film 10 BPSG film 11 nitride film

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int. Cl. ⁷ , DB name) H01L 29/78 H01L 21/336

Claims (1)

(57) [Claims] A step of forming a gate sidewall made of a nitride film on a side surface of a gate electrode on a silicon substrate with an oxide film interposed therebetween; and forming a gate sidewall made of the silicon substrate and the nitride film with the gate electrode. A step of removing a part of the oxide film interposed therebetween, and, after uniformly depositing a nitride film, performing anisotropic etching to close the removed portion of the oxide film with the nitride film. And a method for manufacturing a MOSFET semiconductor device.