JP3391334B2 - Driving method, driving circuit, and display device for liquid crystal device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and a circuit for driving a liquid crystal element such as a liquid crystal display panel, and a display device.

2. Description of the Related Art Hitherto, as one of the driving methods of the liquid crystal element as described above, a multiplex driving by a voltage averaging method is known. (Conventional Example 1) FIG. 45 is an applied voltage waveform diagram showing an example of a conventional driving method when a simple matrix type liquid crystal element or the like as shown in FIG. 46 is multiplex-driven by a voltage averaging method. of (a) · (b) is the voltage waveform applied to the scan electrodes X ₁ · X ₂ respectively, FIG. (c) is the voltage waveform applied to the signal electrodes Y _1, FIG. (d) of the scanning electrode X ₁ shows the voltage waveform where the signal electrodes Y ₁ is applied to the pixel crossing.

In this example, scanning electrodes X ₁ , X ₂ ‥‥ X _n are sequentially selected line by line to apply a scanning voltage, and depending on whether each pixel on the selected scanning electrode is on or off.
Driving is performed by applying a corresponding signal voltage to each signal electrode Y ₁ , Y ₂ ‥‥ Y _m .

[0005] However, the above-described method in which the scanning electrodes are selected and driven one line at a time has disadvantages such that good display cannot be obtained unless the driving voltage is relatively high. (Conventional Example 2) In order to reduce the driving voltage,
A method of sequentially selecting and driving a plurality of scan electrodes simultaneously (for example, A ₁ GENERALIZD ADDRESSING) has been proposed.
TECHNIQUE FORRMS RESPONDING MATRIX LCDS, 198
8 INTERNALDISPLAY RESEARCH CONFER
ENCE pages 80 to 85).

[0004] Figure 47 is the applied voltage waveform diagram showing an example of a conventional driving method for driving simultaneously select sequential plurality of scanning electrodes as described above, FIG. (A) scanning electrodes X ₁ ·
The scanning voltage waveform applied to X ₂ · X ₃ , FIG. 6B shows the scanning voltage waveform applied to scanning electrodes X ₄ , X ₅ , X _6, and FIG. 7C shows the signal voltage applied to signal electrode Y ₁ FIG. 4D shows a waveform of a voltage applied to a pixel where the scanning electrode X ₁ and the signal electrode Y ₁ intersect. In the present example, the scanning electrodes are sequentially selected three lines at a time and the display as shown in FIG. 46 is performed. That is, first, three scan electrodes X ₁ and X ₂
· X ₃ Select, by applying a scanning voltage as shown in the scanning electrodes X ₁ · X ₂ · X ₃ it such as (a) in FIG. 47, described later to each of the signal electrodes Y ₁ to Y _m simultaneously Apply a predetermined signal voltage. Then selects the scanning electrodes X ₄ · X ₅ · X ₆ in FIG. 46, the signal electrodes Y ₁ simultaneously applying a scan voltage, such as electrodes in the same manner as described above in Figure 47 it (b) to Y _m
Is applied with a signal voltage. The process until all the scanning electrodes X _{1 to} X _n in FIG. 46 are selected is defined as one frame, and this is sequentially repeated.

The above-described scanning voltage waveforms are simultaneously selected.
Where h is the number of scanning electrodes^hPulse putter
In this example, h = 3 and 2
^h= 2 ^Three= 8 pulse patterns are used.
You.

For example, three scanning electrodes X selected at the same time
On-off pattern of the voltage applied to _{1-X 2} - X ₃ is
As shown in the following table, on is set to 1 and off is set to 0.

[0007]

[Table 1] When a voltage waveform applied to each scanning electrode is formed based on this, the waveform becomes as shown in FIG. However, the waveform shown in FIG. 3A has a variation in frequency, and when it is actually used, display unevenness may occur.

The arrangement shown in FIG. 47 (b) is such that the arrangement is appropriately changed so as to eliminate the bias of the frequency components. In the conventional example shown in FIG. 47, this waveform is used. is there. On the other hand, the signal voltages applied to the signal electrodes Y ₁ to Y _m, the voltage level at the same pulse pattern number and the scanning voltage, and each pulse magnitude corresponding to the on-off on the scanning electrode selected A voltage is applied. For example, in this example, the scanning electrodes X ₁ , X ₂ ,
Scanning voltage waveform applied to the X ₃ is on when a positive pulse, and off when the negative pulse, on the display data
Off is compared for each pulse, and the signal voltage waveform is set according to the number of mismatches. That is, in FIG. 47, when the number of mismatches is 0, -V _{Y2 ;}
In the case of V _Y1 , 2, V _Y1 is applied, and in the case of 3, V _Y2 pulse voltage is applied. The voltage ratio between V _Y1 and V _Y2 is set so that V _Y1 : V _Y2 = 1: 3. Specifically, the scanning electrodes X ₁ , X ₂ ,.
At an applied voltage waveform to the X _3, and turned off when applying on, a voltage of -V _X1 when applying a voltage of V _X1,
Pixels of the display is on a black circle in FIG. 46, when turning off the white circles, the scanning and signal electrodes Y ₁ in FIG. 46 electrodes X ₁ · X ₂
- display of the pixel at the intersection of the X ₃ is sequentially turned ON and OFF, voltage of the first Parusupata applied to the scanning electrodes X ₁ - X ₂ - X ₃ contrast - down, respectively off・
Off and off. Since the two are compared in order and the number of mismatches is 2, the voltage V _Y1 is applied to the first pulse pattern of the signal electrode Y ₁ as shown in FIG. 47 (c).

The second pulse pattern of the voltage applied to each of the scan electrodes X ₁ , X ₂ , X ₃ is off, off, and on, respectively. since all the number of mismatches is disagreement is 3, and the second pulse of the signal electrodes Y ₁ voltage VY ₂ is applied. In the same way, the third pulse has V
−VY ₁ is applied to Y ₁ and the fourth pulse.
VY ₂ , VY ₁ , −VY ₁ , and −VY ₁ are applied in this order.

When the next three scanning electrodes X _{4 to} X ₆ are selected and the voltages shown in FIG. 47B are applied to the respective scanning electrodes X _{4 to} X ₆ , each of the scanning electrodes X _{4 to} X ₆ is scanned. On / off display of pixels where the electrodes X _{4 to} X ₆ intersect with the signal electrodes, and a voltage level corresponding to a mismatch between the on / off of each pulse pattern of the voltage applied to each of the scan electrodes X _{4 to} X ₆ . Is applied as shown in FIG. 47 (c).

In the above example, the positive selection pulse of the scanning voltage waveform is 1, -1 is the negative selection pulse, -1 is when the display of each pixel is on, and 1 when the display of each pixel is off. Although the signal voltage waveform is set based on the difference in the number of mismatches, any one may be set to 1 or −1, and the signal voltage waveform is set only by the number of matches or the number of mismatches without calculating the difference between the number of matches and the number of mismatches. You can also.

As described above, the method of simultaneously selecting and driving a plurality of scanning electrodes simultaneously achieves the same on / off ratio as the method of selecting and driving one line at a time as shown in FIG. In addition, there is an advantage that the driving voltage can be suppressed low.

Next, general requirements, procedures and procedures of a method for simultaneously selecting and driving a plurality of scanning electrodes sequentially as described above will be described step by step.

A. Requirement a) Divide N scan electrodes into N / h subgroups. b) Each subgroup has h address lines. c) At some point in time, the signal electrode will have an h-bit word (h
-Bitword). _{d k * h + 1, d} k * h + 2 ‥‥ d k * h + h; d k * h + j = 0 or 1, where, 0 ≦ k ≦ (N / h) -1 (k: sub Group) That is, the display data of one column is d ₁ , d ₂ , ‥‥ d _h ... The 0th subgroup d _{h +1} , d _{h +2} ‥‥ d _{h + h} . _{d N- h +1, d N- h} +2 ‥‥ d N- h + h ····· first N / h-1
Become a subgroup. d) The selection pattern of the scanning electrodes is a bit word pattern having a period of ^2h shown in the following equation.

A _{k * h + 1} , a _{k * h + 2} ‥‥ a _{k * h + h} ; a _{k * h + J} = 0 or 1 Outline (1) One subgroup is selected at the same time. (2) One h-bit word is selected as a scanning electrode selection pattern. (3) The scanning voltage is -Vr for logic 0, 10 Vr for logic 1, and 0 volt when not selected. (4) The scan electrodes and the signal electrodes of the selected subgroup are compared bit by bit. (5) The number i of pattern mismatches between the scanning electrodes and the signal electrodes is determined.

[0016]

(Equation 1) (6) The voltage applied to the signal electrode is V ( _i ). i is the number of discrepancies (choose one of the predetermined voltages according to the number of discrepancies) (7) Based on the above method, determine the signal voltage (simultaneously or in parallel) ( 8) The scanning voltage and the signal voltage obtained as described above are applied to the display only during the time interval Δt ₀ . However, Δt ₀ is the minimum pulse order. (9) A new scan electrode selection pattern is selected, and the above (4) to (6) are calculated again to determine the next signal voltage.
This is also applied for the time interval Δt ₀ . (10) 1 cycle (period) of 2 ^h or every scanning electrode selection pattern appears all the subgroups, subgroups of N / h is completed is selected.

1 cycle = △ t · 2 ^h · (N / h) Consider a scan electrode selection pattern when there are i mismatches in the analysis.

The number of cases where the scan electrode selection pattern of the h-bit word length does not match the data pattern of the same h-bit word length by i bits is _h C ₁ = {h! } / {I! (Hi)! } = Ci exists.

For example, h = 3, scanning electrode selection pattern =
Considering the case of (0,0,0), the following table is obtained.

[0020]

[Table 2] These are determined not by the scan electrode selection pattern but by the number of bits of the word.

The amplitude V of the instantaneous voltage applied to the pixel
_piXeL is a scanning voltage V _row, when the signal voltage is _{V column, V pixeL = (V} c olumn -V row) or _(V = _row -V _c olumn) _{Here, V row = ± Vr V c} olumn = If V _(i) , _VpixeL = ten Vr-V _(i) or -Vr-V _(i) .

[0022] V _row = if _{± Vr V c olumn = ± V} (i), V pixeL = Vr-V (i), Vr tens of _{V (i), -Vr-V} (i) or -Vr ten V _(i) That is, _VpiXeL = | Vr-V _(i) | or | _{Vr10V (i)} |

[0023] Thus, specific amplitudes applied to pixels in the selected row - a (Vr tens V _(i)) or _{(Vr-V (i))} V (i) in the non-selected rows. (If V _(i) is considered to be bipolar, the description is as in the above document.) In general, the voltage applied to a pixel should be as large as possible for an ON pixel and as small as possible for an OFF pixel. It is desirable to realize a high selectivity. Therefore, when on, | Vr10V _(i) | favors on-pixels, and | Vr-V _(i) | favors on-pixels.

[0024] When _{off, | Vr-V (i)} | acts in favor of off-pixel, | Vr tens of V _(i) | may work against the off-pixel.

Here, the advantage with respect to the ON state increases the effective voltage, and the disadvantage with respect to the ON state acts in a direction of decreasing the effective voltage.

The number of combinations to select i from h bits is Ci = _h Ci = {h! } / {I! (Hi)! }, And if it does not match i, this is
This is the number of bits that do not match. Since the number of mismatches is i at each level, the number of mismatches (total mismatch) in the 仝 field is i · Ci.

Since these are distributed over h bits, the average number of mismatches Bi per pixel (per bit) is Bi = i · Ci / h (number / pixel).

Further, the signal voltage V
When increasing the levels of _{(i), V pixeL = V} row -V c olumn decreases as the number of mismatches increases.

Given that mismatches act disadvantageously for the on-pixel of interest, the number of mismatches gives the number of disadvantageous voltages (signal voltages). Thus, the number of disadvantageous voltages per pixel (on average) is Bi = i · Ci / h.

Incidentally, since i / h of Ci is disadvantageous, the remaining, ie, Ai = {(hi) / h} · Ci works advantageously. Also, {(hi) / h} · Ci ten (i / h) · Ci = (h / h)
Ci = Ci, and Ai = Ci−Bi = {(h−1)! } = / {I · (hi-
1)! } However, h ≧ i11.

[0031] In _{summary, V on (r, m,} s) = {(S 1 Ten S ₂ tens ^{_{S 3) / S 4} 1/2}} V OFF (r, m, s) = {(S 5 10S ₆ 10S ₇ ) / S ₄ } ^1/2 . In addition,

[0032]

(Equation 2) It is. Also, Vr / V ₀ = N ^1/2 / h... Row selection voltage R = (V _0N / V _OFF ) _maX = {(N ^1/2 eleven) / (N ^1/2 −
1)} ^1/2 .

However, when a plurality of scan electrodes are simultaneously selected and driven sequentially as in the second conventional example, the pulse width applied to the scan electrodes and the signal electrodes increases the number of the simultaneously selected scan electrodes. There is a problem that the width becomes narrower as a result, the crosstalk due to the summary of the waveform increases, and the image quality deteriorates. In particular, the gradation becomes serious in the case of performing the gradation display by the modulation of the pulse width.

The present invention provides a driving method, a driving circuit, and a display device for a liquid crystal element or the like which can perform satisfactory gradation display even when a plurality of scanning electrodes are simultaneously selected and driven sequentially as described above. The purpose is to do.

[0035]

According to the present invention, there is provided a method of driving a liquid crystal device, comprising: a plurality of scanning electrodes; a plurality of signal electrodes intersecting the plurality of scanning electrodes; In a method of driving a liquid crystal device including a liquid crystal sandwiched between, the plurality of scan electrodes are divided into subgroups, and the scan electrodes in the subgroup are simultaneously selected,
The selection period is divided into a plurality of periods, and in each of the divided periods, the waveform of the scanning voltage is applied to the simultaneously selected scanning electrodes, and data to be displayed is represented by a plurality of bits. The selected selection period is subdivided into unequal intervals, the subdivided selection period is allocated according to the bit position, and the signal voltage set based on the display data for each bit and the waveform of the scanning voltage is used as the signal. It is characterized in that it is applied to an electrode. Further, in the driving method of the liquid crystal device according to the present invention, in the driving method of the liquid crystal device described above, including a virtual scanning electrode as the scanning electrode in the sub-group,
It is characterized in that the number of voltage levels applied to the signal electrode is reduced as compared with the case where the virtual scanning electrode is not included. Further, in the driving method of the liquid crystal device according to the present invention, in the driving method of the liquid crystal device described above, the waveform of the scanning voltage applied in the sub-group unit is periodically replaced between the scanning electrodes in the sub-group. And

Further, a driving method of a liquid crystal device according to the present invention is characterized in that, in the driving method of the liquid crystal device described above, the waveform of the scanning voltage is replaced every frame. Also,
In the method for driving a liquid crystal device according to the present invention, in the method for driving a liquid crystal device described above, the selection period is continuously provided within one frame. Further, in the method for driving a liquid crystal device according to the present invention, in the above-described method for driving a liquid crystal device, the selection period is provided a plurality of times at intervals within one frame. Further, a driving method of a liquid crystal device according to the present invention is characterized in that in the above driving method of a liquid crystal device, gradation display is performed by frame modulation. Also,
In the method for driving a liquid crystal device according to the present invention, in the method for driving a liquid crystal device described above, a waveform of the scan voltage applied to the scan electrode is selected from an orthogonal function system.

Further, the display device of the present invention comprises a plurality of scan electrodes, a plurality of signal electrodes intersecting the plurality of scan electrodes, and a liquid crystal sandwiched between each of the scan electrodes and each of the signal electrodes. In the display device, the plurality of scan electrodes are divided into sub-groups, the scan electrodes in the sub-group are simultaneously selected, a selection period is divided into a plurality of periods, and the scan voltage is applied to each of the divided periods. Is applied to the simultaneously selected scanning electrodes, the data to be displayed is represented by a plurality of bits, the divided selection periods are subdivided at irregular intervals, and subdivided according to the bit positions. And a signal voltage set based on the display data for each bit and the waveform of the scanning voltage is applied to the signal electrode.
Further, the display device of the present invention is the display device described above,
A virtual scan electrode is included as the scan electrode in the subgroup, compared to a case where the virtual scan electrode is not included,
The number of voltage levels applied to the signal electrodes is reduced. Further, in the display device according to the present invention, in the display device described above, a waveform of the scan voltage applied in a unit of the subgroup is periodically switched between scan electrodes in the subgroup.

Further, the display device of the present invention is characterized in that, in the above display device, the waveform of the scanning voltage is switched every frame. Further, the display device of the present invention,
In the above display device, the selection period is continuously provided in one frame. Further, the display device of the present invention is characterized in that, in the above display device, the selection period is provided a plurality of times at intervals within one frame. Further, a display device of the present invention is characterized in that in the above display device, gradation display is performed by frame modulation. In the display device according to the present invention, in the display device described above, a waveform of the scan voltage applied to the scan electrode is selected from an orthogonal function system.

Further, the driving circuit of the liquid crystal device of the present invention has a plurality of scanning electrodes and a plurality of signal electrodes intersecting the plurality of scanning electrodes, and is sandwiched between each of the scanning electrodes and each of the signal electrodes. In a driving circuit of a liquid crystal device including a liquid crystal, the plurality of scan electrodes are divided into subgroups, the scan electrodes in the subgroup are simultaneously selected, a selection period is divided into a plurality of periods, and each of the divided periods is divided into a plurality of periods. During the period, the waveform of the scanning voltage is applied to the simultaneously selected scanning electrodes, data to be displayed is represented by a plurality of bits, and the divided selection periods are subdivided at irregular intervals, and Assign a selection period subdivided according to,
A signal voltage set based on display data for each bit and a waveform of the scanning voltage is applied to the signal electrode. Further, the driving circuit of the liquid crystal device of the present invention,
In the drive circuit of the liquid crystal device, a virtual scan electrode is included as the scan electrode in the subgroup, and the number of voltage levels applied to the signal electrode is reduced as compared with a case where the virtual scan electrode is not included. It is characterized by doing. Further, the driving circuit of the liquid crystal device according to the present invention is characterized in that, in the driving circuit of the liquid crystal device described above, the waveform of the scanning voltage applied in a unit of the subgroup is periodically exchanged between the scanning electrodes in the subgroup. And

Further, a driving circuit for a liquid crystal device according to the present invention is characterized in that, in the driving circuit for a liquid crystal device described above, the waveform of the scanning voltage is replaced every frame. Also,
A driving circuit for a liquid crystal device according to the present invention is characterized in that, in the driving circuit for a liquid crystal device described above, the selection period is provided continuously in one frame. Further, a driving circuit for a liquid crystal device according to the present invention is characterized in that, in the driving circuit for a liquid crystal device described above, the selection period is provided a plurality of times at intervals within one frame. Further, a driving circuit of a liquid crystal device according to the present invention is characterized in that, in the driving circuit of the above liquid crystal device, gradation display is performed by frame modulation. Also,
A driving circuit for a liquid crystal device according to the present invention is characterized in that in the driving circuit for a liquid crystal device described above, a waveform of the scanning voltage applied to the scanning electrode is selected from an orthogonal function system.

[0041]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a driving method, a driving circuit, and a display device for a liquid crystal element and the like according to the present invention will be specifically described based on the embodiments shown in the drawings. (Embodiment 1) FIG. 1 is an applied voltage waveform diagram showing an embodiment of a method of driving a liquid crystal display element or the like according to the present invention.
5A shows a voltage waveform applied to the scanning electrodes X ₁ , X ₂ and X ₃ , FIG. 6B shows a voltage waveform applied to the scanning electrodes X ₄ , X ₅ and X _6, and FIG. voltage waveform applied to Y _1,
(D) are shown voltage waveforms applied to a pixel and scan electrodes X ₁ and the signal electrodes Y ₁ intersect.

In the present embodiment, three scanning electrodes are simultaneously selected in sequence and a display as shown in FIG. 2 is performed.

As the voltage waveform applied to the scanning electrode selected at the same time, the waveform shown in FIG. 48A or FIG. 48B can be used, but in the present embodiment, the waveform shown in FIG. ) Is used.

When a voltage waveform corresponding to a bit word pattern as shown in FIG. 48A or 48B is used, there is a disadvantage that each pulse width is narrowed, and in particular, the number of scanning electrodes to be simultaneously selected. Increases, the number of the bit word patterns increases exponentially, and consequently each pulse width necessarily becomes narrower, and when actually applied to the pixel, crosstalk due to so-called summary occurs. There is a risk. Moreover, in the case of performing gradation display by modulating the pulse width as in the present embodiment as well as in the embodiment described later, the pulse width is further narrowed, which causes crosstalk.

Therefore, in the present embodiment, the pulse width is widened by setting the voltage waveform applied to the scanning electrodes in the following manner.

The voltage waveform applied to the scanning electrodes is: Each scanning electrode must be distinguishable. Frequency components applied to each scanning electrode do not differ greatly. The decision is made in consideration of, for example, that the interchangeability within one frame or several frames is guaranteed.

That is, natural binary, Walsh,
That is, the pattern of the applied voltage is appropriately selected from the orthogonal function system such as Hadamard in consideration of the above conditions.

The above items are absolute conditions.
In particular, in order to satisfy the items, the voltage waveforms applied to the scanning electrodes are determined so as to be orthogonal to each other.

FIG. 3 shows the decision made in consideration of the above requirements.
3A and 3B show the applied voltage waveforms shown in FIG.
The (a) applied voltage waveform includes different frequency components of X ₁ : 4 * △ t ₀ X ₂ : 4 * △ t ₀ , 2 * △ t ₀ X ₃ : 2 * △ t ₀ .

The applied voltage waveform shown in FIG. 3B is as follows: X ₁ : 4 * Δt ₀ , 2 * Δt ₀ X ₂ : 4 * Δt ₀ , 2 * Δt ₀ X ₃ : 6 * It includes different frequency components Δt ₀ and 2 * Δt ₀ .

The shortest pulse width of the waveforms shown in FIGS. 48A and 48B is Δt ₀ ,
The narrowest pulse width {t of the waveforms (a) and (b) of FIG.
t ₀ , which can be doubled. By increasing the pulse width in this manner, the influence of the waveform summary can be reduced, crosstalk can be reduced, and the number of scanning electrodes selected at the same time can be increased. The waveforms shown in FIGS. 3A and 3B are examples and can be changed as appropriate. The order of selection of the scan electrodes and the arrangement order of the pulse patterns applied to each scan electrode use the property of the orthogonal function. Can be changed as appropriate.

This embodiment shown in FIGS. 1A and 1B
The scanning voltage waveform in the form of is based on the waveform of FIG.
Voltage waveforms applied to three scanning electrodes selected at the same time
It is what constituted. In the present embodiment,
The selection period is t within one frame F. ₁, T_Two, T_Three, T_FourFour times
An example in which driving is performed separately will be described.

On the other hand, as shown in FIG. 1C, the signal electrodes Y _{1 to} Y _m have the above-mentioned divided selection periods t ₁ , t ₂ ,
t ₃ and t ₄ are further divided into a plurality of periods, and a voltage weighted according to desired display data is applied to each of the divided periods.

That is, in the present embodiment, the period of t ₁ is divided into two equal periods, divided into two periods of a and b, as shown in FIG. A signal voltage weighted for each bit based on the display data is applied to the period a for the upper bits and the period b for the lower bits.

Specifically, the voltage V is applied to the scanning electrode._X1Apply
ON when the voltage is -V_X1Off when applying
Display data is selected at the same time by turning off 0 and 1 on.
Scanning electrode on / off and display data on / off
The number of mismatches is calculated by comparing the
When the number of mismatches is 3, V_Y4In the case of 2,
V_Y2-1 for -V_Y2, 0 when -V_Y4Each mark
In addition, for the lower bits, when the number of mismatches is 3, V
_Y3V for 2_Y1-1 for -V_Y1, 0-
V_Y3Are respectively applied. Note that each voltage level
Bell relation is 2 * V_Y1= V_Y2, 2 * V_Y3= V_Y4, 2 *
V_Y1= V_Y3-V_Y1, 2 * V_Y2= V_Y4-V _Y2And

For example, in the period t ₁ in FIG. 1C, the selection pulse applied to the scan electrodes X ₁ , X ₂ , and X ₃ is in the order of ON, ON, and OFF, and the signal electrode Y ₁
The display data of the pixel at each intersection of the scan electrodes X ₁ , X ₂ , and X ₃ are (00), (01), and (10). The upper bits are turned off, off, and on. 3 and the voltage V _Y4 is applied to the signal electrode Y ₁ during the period a.
Is applied. The lower bits are turned off, turned on, and turned off. The number of mismatches is 1 when compared with the scan electrodes, and the voltage −V _Y1 is applied in the period b.

Thus, the scanning electrode X₁, X_Two, X_Three
The above display data is applied to each signal electrode Y₁~ Y _mEvery scan electrode
Compared with the applied selection pulse, the signal corresponding to the number of mismatches
A voltage is applied.

Next, the scanning electrode X_Four, X_Five, X₆At the same time
And apply the corresponding signal electrode waveform to the signal electrodes.
You. In this way, select three scanning electrodes at a time
While applying a signal voltage waveform corresponding to the display data to the signal electrodes.
Applying all scan electrodes X₁~ X_nFinish scanning
And again the first scan electrode X₁, X_Two, X_ThreeReturn to t_Two, T
_Three, T_FourDuring the period of the above, a predetermined voltage is sequentially applied in the same manner as above.
Apply. And t ₁~ T_FourAll four runs
Test electrode X₁~ X_nAfter scanning about, one frame
It ends and the next frame is repeated.

In this embodiment, so-called AC driving is performed by alternately changing the polarity of the applied voltage for each frame.

By driving as described above, it is possible to perform good gradation display with little crosstalk or the like.

The order of the scan voltage waveforms applied to the scan electrodes during the above-mentioned periods t _{1 to} t ₄ may be changed as appropriate for all frames or for each frame. The waveform shown in FIG. 3A or another waveform that satisfies the requirements described above can be used. Further, for example, the waveforms shown in FIG. 3A are used for the scan electrodes X _{1 to} X ₃ , and the waveforms shown in FIG. 3B are used for the next scan electrodes X _{4 to} X ₆ at the same time. Alternately swap two types of waveforms for each scan electrode,
Alternatively, the order can be changed to three or more types of waveforms. Further, it is also possible to combine the above-described replacement of the waveforms in the periods t _{1 to} t ₄ and the replacement of the waveform for each scanning electrode selected at the same time.

In the above-described periods t _{1 to} t ₄ , the driving may be performed separately for each period as in the present embodiment, or the driving may be continuously provided in one frame. If the driving is performed by dividing the selection period into a plurality of times in one frame F as in the embodiment, the non-selection period can be shortened and the contrast can be increased. In this case, in the above-described embodiment, the driving is performed by dividing the selection period into four times of t ₁ to t _4. However, the number of divisions is arbitrary. For example, the period of t _{1 to} t ₄ is set to 2 times. It is also possible to drive the motor separately or more times.

Further, in the above-described embodiment, three scanning electrodes are simultaneously selected according to the arrangement order. However, the number of the selected scanning electrodes is appropriate, and the scanning electrodes can be selected without necessarily following the arrangement order.

The changes described above can be similarly applied to the embodiments described later.

Next, an example of the configuration of a driving circuit for executing the above driving method will be described with reference to FIGS.

FIG. 4 is a block diagram showing an example of a driving circuit. In the drawing, 1 is a scanning electrode driver, 2 is a signal electrode driver, 3 is a frame memory, 4 is an arithmetic circuit, 5 is a scanning data generating circuit, and 6 is a scanning data generating circuit. Latch.

FIG. 5 is a block diagram of a scanning electrode driver, and FIG. 6 is a block diagram of a signal electrode driver. In FIGS. 5 and 6, reference numerals 11 and 21 denote shift registers and 12 and 22.
Is a latch, 13 and 23 are decoders, and 14 and 24 are level shifters.

In the above configuration, each scanning voltage waveform is
The scan data generation circuit 5 shown in FIG. 4 generates data indicating positive selection, negative selection, or non-selection, and transfers the data to the scan electrode driver 1.

The scan electrode driver 1 transfers the scan data signal S3 from the scan data generation circuit 5 to the shift register 11 with the scan shift clock signal S5 as shown in FIG. After the transfer, each data is latched by the latch signal S6, the data representing the state of each scan electrode is decoded, and the analog switch 15 for each output is used to output one of three switches.
One of turns on, positive selection V _X1 when the, -V _X1 when the negative selection, when the non-selected output to the scanning electrode selected voltage of 0.

On the other hand, as for each signal voltage waveform, a display data signal S1 for each of three simultaneously selected scanning electrodes is read out from the frame memory 3 and selected pulse data is obtained from the display data signal S1 and the scanning data signal S3. The data is latched and the arithmetic circuit 4 converts the display data signal S1 and the selected pulse data signal S4. The data conversion is performed as described above, and is transferred to the signal electrode driver 2.

The signal electrode driver 2 transfers the data signal S2 from the arithmetic circuit 4 to the shift register 21 with the shift clock signal S7 as shown in FIG. 6, and transfers the data of each signal electrode during one scanning period. Latch signal S
8, each data is latched, the data indicating the state of each signal electrode is decoded, and one of the eight switches is turned on by the analog switch 25 for each output, and V
_{Y4, V Y3, V Y2,} V Y1, -V Y1, -V Y2, V Y3, -V Y4
Is output to each signal electrode.

By using the driving circuit as described above, the driving method as described above can be executed simply and reliably.

If a display device having the above-described display element or the like is provided with the above-described driving circuit and the above-described driving method is executed, a good gray scale with less occurrence of crosstalk and the like can be obtained. A display device capable of performing display is obtained. (Embodiment 2) In Embodiment 1 described above, one of four types of voltages is selected and applied to the signal electrode according to the display data for each bit of the display data. By providing the virtual electrode, the number of voltage levels applied to the signal electrode can be reduced.

FIG. 7 is a voltage waveform diagram according to the present embodiment driven by reducing the number of voltage levels applied to signal electrodes by providing virtual electrodes in the first embodiment.
FIG. 8 is an explanatory view showing a point of reducing the number of voltage levels applied to the signal electrodes by providing the virtual electrodes.

In this embodiment, for example, as shown in FIG.
X next to the simultaneously selected scan electrodes _{n + 1}, X_{n + 2}‥‥
Such as a scanning electrode X₁, X_Two, X_ThreeBut
When selected, at the same time X_{n + 1}Is also selected
It is assumed that the voltage V is applied to the scan electrode as in the first embodiment._X1Mark
ON when voltage is applied, voltage -V_X1Is off when applying
In the display data, 0 is turned off, 1 is turned on, and the number of mismatches is calculated.
Calculate. In this case, change the state of the virtual electrode appropriately
The number of mismatches is always set to 1 or 3.

[0076] Then -V _Y2 when the number of mismatches in the upper bits of the display data is 1, selects the V _Y2 when the number of mismatches is 3, the lower bits of the display data is not - when致数is 1 -
V _Y1, number of mismatches indicates selection of a V _Y1 when 3.
The opening of each voltage level is 2 * V _Y1 = V _Y2 .

[0077] FIG. 7 having been subjected to display shown in FIG. 2 in the above manner, looking at the period of t _1, applied to the scan electrodes X _1, X _2, X ₃ and virtual electrode X _{n + 1} The selection pulse is turned on, on, off, and on in that order, and the signal electrode Y
The display data of the pixel at each intersection of ₁ with the scanning electrodes X ₁ , X ₂ , X ₃ and X _{n + 1} is (00) (01) (10) (11)
In off looking for upper bit, off, on, turned on and the number of mismatches when compared to the order of 3, make conversion data S2 in accordance with the number of mismatches, the voltage V in the period a to the signal electrodes Y _{1 Y2} is applied.

The lower bits are turned off, on, off, and on. The number of mismatches is 1 when compared with the scan electrodes, and the conversion data S2 is determined according to the number of mismatches.
The make, voltage -V _Y1 in the period b to the signal electrodes Y ₁
Is applied.

Thus, the scanning electrodes X ₁ , X ₂ , X ₃
And the display data on X _{n + 1} are compared with selection pulses applied to the scanning electrodes for each of the signal electrodes Y _{1 to} Y _m , and voltages corresponding to the number of mismatches are applied.

Next, the scanning electrodes X ₄ , X ₅ , X ₆ and X _{n + 2}
Are simultaneously selected, and the corresponding signal electrode waveform is applied to the signal electrodes.

When three scanning electrodes and one virtual electrode are simultaneously selected in this way and the corresponding signal electrode waveforms are applied to the signal electrodes and scanning is completed up to the scanning electrode _Xn , the first scanning is performed again. Returning to the electrodes X ₁ , X ₂ , X ₃ , the scanning is performed in order with the pulse pattern indicated by t ₂ . In this way, one frame period is completed by scanning four times with each pulse pattern shown at t ₁ , t ₂ , t ₃ , and t _4, and the same operation is repeated in the next frame.

By providing virtual electrodes as described above, the number of voltage levels applied to signal electrodes can be determined in the first embodiment.
Can be less than in the case of.

The reduction of the number of voltage levels applied to the signal electrodes by providing the virtual electrodes as described above can be applied to each embodiment described later.

In this embodiment and each of the embodiments described later, the same drive circuit as in the first embodiment can be used. In that case, the arithmetic circuit 4 in FIG. 4 is configured to perform data processing according to each embodiment, and the voltage levels of the scan electrode driver of FIG. 5 and the signal electrode driver of FIG. 6 are changed according to each embodiment. It is sufficient to provide the analog switches 15 and 25 to select any one of the voltage levels.

For example, in this embodiment, FIG.
5 and the scan electrode driver of FIG.
As in the first embodiment, the signal electrode driver of FIG.
In Embodiment 1, V_Y4, V_Y3, V_Y2, V_Y1, -V_Y1,
-V_Y2, -V_Y3, -V_Y48 voltage levels are provided
However, in the present embodiment, V_Y2, V_Y1, -V_Y1, -V
_Y2Only four voltage levels need to be provided. (Embodiment 3) Each of the above embodiments is based on display data.
Changed the voltage value to perform gradation display, but changed the pulse width.
By doing so, gradation display can be performed.

FIG. 9 is an applied voltage waveform diagram of an embodiment in which gradation display is performed by pulse width modulation.

First, a general procedure for performing gradation display by pulse width modulation will be described.

Generally, in performing gradation display by pulse width modulation, the time width Δt of the pulse is divided into f unequally spaced time widths.

Δt _q = 2 ^q−1 / (2 ^f −1) (f is the number of gradation bits) For example, when f = 2, 2 ² = 4 gradations, and the time width is as shown in FIG. △ t ₁ = ( _１ ／) △ t ₀ , △ t ₂
= (2/3) △ t ₀ .

Next, each data is divided into f bits (expressed by f bits).

D ₁ = (d _{1, f} , d _{1, f-1} ... D _1,1 ) d ₂ = (d _{2, f} , d _{2, f-1} ... D _2,1 ): d _h = (d _{h, f} , d _{h, f−1} ... d _{h, 1} ): Then, the selection pattern of the scanning electrode and each bit of the data pattern are compared at intervals of Δtg.

[0092] For example, when _{f = 2 d 1 = (d} 1,2, d 1,1) d 2 = (d 2,2, d 2,1): next, first of d _1, d _1, Compare ₁ (lower bit) with the scan electrode selection pattern and apply to the display for Δt ₁ .

Next, d _1,2 is compared with the scanning electrode selection pattern and applied to the display for Δt ₂ .

This may be sequentially performed for each d in the same manner as described above.

FIG. 9 according to the present embodiment shows a display of four gradations as shown in FIG. 2 by pulse width modulation in the manner described above.

In this embodiment, the same scanning voltage as that of the conventional example shown in FIG. 47 is applied to each of the scanning electrodes X _{1 to} X _n , and the corresponding pulse width of the signal electrodes Y _{1 to} Y _m is displayed in the above gradation display. Is modulated in accordance with.

That is, each pulse width .DELTA.t is equally divided into three, and gradation display in four stages from 0 to 3 is represented by 2-bit display data (00), (01), and (10) in a binary system. ,
The voltage level of two divisions out of the three divisions is determined by the on / off of the scanning electrode, which is represented by (11) and is simultaneously selected, and the number of mismatches with the upper bits of the display data. The voltage level is determined for the remaining one division. Also, by making the three divisions non-uniform, it is possible to correct a change in luminance of gradation display.

Specifically, in FIG. 9, when the voltage V _X1 is applied to the scan electrode and the voltage V _X1 is turned on and the voltage −V _X1 is applied and the voltage is turned off, the voltage is applied to the scan electrodes X ₁ , X ₂ and X ₃ . The first pulse is all off. On the other hand, the lower bits of the display data of the scan electrodes X ₁ , X _2, and X ₃ in FIG. 2 turn off 0, 1 on, and turn off / on / off. Therefore, the number of mismatches is 1, the voltage pulse during Δt ₁ is −V _Y1 , and since the upper bits are off / off / on, the number of mismatches is 1 and the voltage pulse during Δt ₂ is −V _Y1 . V
It becomes _Y1 . In this manner, the voltage pulse to be applied to the signal electrode may be obtained by comparing each selection period Δt.

In this embodiment, the voltage for the upper bit is applied during the last two periods of the three divisions, and the voltage for the lower bit is applied during the one period before the three divisions. is there. Note that the voltage for the upper bit may be applied to two periods before the three divisions, and the voltage for the lower bit may be applied to one period after the three divisions. (Embodiment 4) Even in the case of performing the above-described gradation display, the selection period can be divided into a plurality of times and driven in one frame, as in the case of Embodiment 1.

FIG. 11 shows an example of this, and FIG.
In this embodiment, a voltage waveform composed of eight pulse patterns (blocks) applied to the scanning electrodes and the signal electrodes is divided into eight at equal intervals for each pulse pattern and output.

As described above, when the selection period is divided and driven a plurality of times in one frame, the contrast can be increased as in the above embodiment. (Embodiment 5) Embodiments 3 and 4 above
, The voltage level of the signal electrode is V _Y2 · V _Y1
Although four levels of -V _Y1 and -V _Y2 are used, the number of voltage levels can be reduced by providing virtual electrodes as in the second embodiment.

FIG. 12 shows an example in which virtual electrodes are provided in the third embodiment to reduce the voltage level applied to the signal electrodes, and the selection period is divided into a plurality of times in one frame as in the fourth embodiment. Is shown.

The method of reducing the number of voltage levels by providing the virtual electrodes as described above has already been described in the second embodiment, but a general method and the like will be described here.

First, out of the h subgroups described above, e are virtual scan electrodes (virtual lines), and the coincidence / mismatch of data of the virtual scan electrodes is controlled to limit the total number of coincidences / mismatches. Then, the number of levels of the driving voltage of the signal electrode is reduced.

[0105] The number of mismatches Mi, when the Vc with a suitable constant, the applied voltage _{V c} olumn to the signal electrode,

[0106]

(Equation 3) Or simply anyway _{V c olumn = V (i)} 0 ≦ i ≦ h, V c oLumn is h ten 1 level.

For example, consider the case where the subgroup h = 4 and the virtual scanning electrode e = 1.

As in the above embodiment, the number of levels when h = 3 is four levels of -V _Y2 , -V _Y1 , V _Y1 , and V _Y2 , and at this time, an even number of mismatches in the virtual scanning electrodes The following table is obtained by controlling so that

[0109]

[Table 3] As described above, the original voltage level can be changed from four levels to three levels. When the number of mismatches is set to be an odd number, the numbers of mismatches after correction in the above table are 1, 1, 3, and 3 in order from the top, and the voltage levels after correction are, for example, Va · Va · Vb · Vb can be set to two levels.

When the subgroup is h = 4 and the voltage level is not reduced, the voltage levels are, for example, -V _Y2 , -V
_When five levels of _Y1 , 0, _VY1 , and _VY2 are required, control is performed so that an even number of mismatches occur in the virtual scanning electrodes.
It is as shown in the table below.

[0111]

[Table 4] As described above, the original voltage level can be changed from five levels to three levels. Also in the above case, the voltage level can be set such that the number of mismatches is an odd number.

Note that the above-mentioned virtual scanning electrodes do not usually need to be actually displayed because they do not usually need to be displayed. However, when they are provided, they are preferably provided at a portion which does not affect the display. Are provided with virtual scanning electrodes X _{n + 1} ... Outside the display area R as shown in FIG.
Alternatively, if there is an extra scan electrode outside the display area R, it can be used as a virtual scan electrode.

Further, the number of levels can be further reduced by increasing the number e of the virtual scanning electrodes. In this case, as described above, when e = 1, control is performed so that the number of mismatches is divided by two. For example, when e = 2, the number of mismatches is all three.
What is necessary is just to control so that it may be broken.

However, it is also possible to divide all by three and leave one or two.

Further, the maximum reduction number that can be reduced by the above method is 1 / (e11), and when e = 1, it is 1/2 except for 0V.

FIG. 12 according to the present embodiment shows that
One scan electrode and one virtual scan electrode are selected to reduce the voltage level applied to the signal electrode, and the selection period is driven a plurality of times in one frame.

In the present embodiment, the selection period is divided into four times in one frame as shown in FIGS. 12 and 14, and four scanning electrodes including virtual scanning electrodes in each period are combined. Count the number of mismatches for each bit of the display data,
By setting the number of mismatches to be always an odd number, the number of mismatches becomes 1 or 3, and the voltage levels of the signal voltage waveform become two levels of V _Y1 and −V _{Y1 accordingly} .

Specifically, for example, when the display as shown in FIG. 13 is performed, as shown in FIG. 8, the virtual scanning electrodes are selected next to the scanning electrodes X ₁ , X ₂ and X ₃ which are selected first. X _{n + 1}
It is assumed that there is. However, it is not actually necessary to provide them as described above, and when they are provided, it is desirable to provide them outside the display region R as shown in FIG.

Further, when the voltage applied to the scan electrodes is positive, it is turned on, and when it is negative, it is turned off. Each selection period Δt is divided into three, and the scan electrodes X ₁ , X ₂ ,. like the display data X ₃ in FIG. 13 (0
In the case of (0), (01) and (10), the data of the virtual scanning electrode may be (11) as shown in FIG.

Then, the number of mismatches is counted for each bit and V
One of the voltage levels of the _Y1 or -V _Y1 determined, two period after one of the voltages is divided into three for the upper bit, the voltage for the lower bit when applied to a single period prior to one of three portions Good. As in the third embodiment, the voltage for the upper bit may be applied in two periods before the three divisions, and the voltage for the lower bit may be applied in one period after the three divisions. is there.

As described above, the pulse width of the voltage V _Y1 or −V _Y1 may be determined by comparing each bit with the display data, and the polarity of the selection pulse applied to the virtual scanning electrode and the display data are always constant. The number of mismatches is 1, 3, ...
By setting the number to be an odd number, for example, the voltage level applied to the signal electrode is reduced, and in the present embodiment, it can be set to two levels. However, the number of mismatches may be an even number as described above.

Further, with the above arrangement, the circuit configuration of the liquid crystal driver is simple, and almost the same driver as a conventional pulse width modulation driver can be used.

In the above-described embodiment, four-gradation display has been described.
For example, when the display data is 3 bits and each selection period is divided into three by weighting the pulse width of each bit of the display data, eight gradations can be displayed. Further, each selection period is formed by setting the display data to 4 bits. By dividing each bit of the display data into four with the pulse width weighted, 1
Display of six gradations can be performed. By changing the number of divisions of each selection period in this manner, multi-gradation display can be performed. (Embodiment 6) Performing gradation display by pulse width modulation after providing a virtual electrode and reducing the voltage level applied to a signal electrode as in Embodiment 5 described above can be applied to a scanning electrode selected at the same time. The present invention is also applicable to the case where a scanning voltage is applied as in the first embodiment, and FIG. 14 is an explanatory diagram showing an example.

The voltage waveforms applied to the scanning electrodes selected at the same time are the same as those in FIG. 1 in the first embodiment, and the selection periods t _{1 to} t ₄ and t _{5 to} t ₈ are divided into three, respectively. When the display data of the simultaneously selected scan electrodes X ₁ , X _2, and X ₃ are (00), (01), and (10) as shown in FIG. 13, the virtual scan electrodes of the virtual scan electrodes are displayed as shown in FIG. The data may be (11).

[0125] Then, a voltage level determined by counting the number of disagreements for each bit, two periods of the three divided in upper bits, 3 for one period or V _Y1 of the split -V at lower bit _Y1 May be applied. By doing as above, the same effect as in the fifth embodiment can be obtained.

The above selection periods t _{1 to} t ₄ may be provided continuously in one frame F, or may be provided separately in one frame F. Selection period t ₅ ~
The same is true for t _8. (Embodiment 7) It is also possible to perform grayscale display by frame modulation after dividing the selection period and reducing the applied voltage level as described above. FIG. The voltage level applied to the signal electrode is reduced by using three scanning electrodes and one virtual scanning electrode sequentially, and the selection period is driven a plurality of times within one frame, and gradation display is performed by frame modulation. An embodiment will be described in the case where is performed.

In this embodiment, the waveforms shown in FIG. 3B are used as the voltages applied to the scanning electrodes selected at the same time. However, FIG. Waveforms such as a) and (b) can also be used.

The gray scale display by the frame modulation is such that the gray scale display is performed depending on how many frames are turned on and how many frames are turned off in a certain frame period. For example, as shown in FIG. When an off voltage is applied between F2, a halftone between on and off is displayed.

In the present embodiment, four frames in one frame
Since the number of times is selected, the difference in lightness and darkness between the F1 period and the F2 period becomes small, and the flicker becomes less noticeable.

[0130] For example, in the case of gradation display a plurality of frame periods as one block, is also possible to swap the position of the selected pulse in a plurality of frames of the, in FIG. 15, for example, t ₃ between the t ₇ By swapping the intervals, the difference between the frames can be made smaller.

In the above-described embodiment, an example has been described in which gradation display is performed by turning on one frame and turning off one frame out of two frames. The display of 8 gradations can be performed by a combination of the number of the on-frame and the off-frame as a block, and the display of 16 gradations can be performed with 15 frames as one block. Thus, an arbitrary number of gradations can be displayed depending on how many frames are formed in one block. (Embodiment 8) Further, it is possible to perform gradation display by a combination of pulse width modulation and frame modulation after dividing the selection period and reducing the applied voltage level as described above. FIG. 9 is an explanatory diagram showing an example of a procedure for performing grayscale display by a combination of pulse width modulation and frame modulation.

By displaying several halftones in a certain number of frame periods, it is possible to display a grayscale intermediate between each grayscale data and the grayscale data.

For example, as shown in FIG. 18, in the period of the first frame F1, (00) is displayed, and the next frame F1 is displayed.
In the period of 2, by displaying (01), it is possible to actually display the middle between (00) and (01).

As described above, when the selection period is divided and the applied voltage level is reduced, and gradation display is performed by a combination of pulse width modulation and frame modulation, display flicker can be reduced. A gradation display is enabled. Further, the selection pulses can be interchanged as in the sixth embodiment.

Further, for example, in the case where the voltage is weighted by the display data as described in the second embodiment, the frame modulation as in the present embodiment is also applied to the other embodiments described later and the later-described embodiments. Can be performed in combination with the above.

Embodiment 5 to Embodiment 8
Has described the case where the virtual scanning electrode is provided. However, even when the virtual scanning electrode is not provided, the gradation display by the frame modulation or the gradation display by the combination of the frame modulation and the pulse width modulation can be performed. (Embodiment 9) In each of the above embodiments, display data is made up of 2 bits and a signal voltage weighted corresponding to each bit is applied to realize 4-gradation display. It is also possible to use, for example, FIG.
It is also possible to display eight gradations as the signal electrode waveform as shown in FIG.

That is, FIG. 19 assumes that the scan electrode waveforms applied to the respective scan electrodes in FIG. 2 are the same as those in the first embodiment, and that the intersection of the scan electrodes X ₁ , X ₂ , X ₃ and the signal electrode Y ₁ The display data of each pixel is (001) (010) in order from the top.
It is a signal electrode waveform when it is set to (100).

In this embodiment, the first embodiment is used.
, Each of the four selection periods t ₁ , t ₂ , t ₃ , and t ₄ is divided into three equal parts and divided into three periods a, b, and C, which correspond to the most significant bit of the 3-bit display data. The voltage waveform corresponding to the middle-order bit is represented by the voltage waveform during period a,
Then, the voltage waveform corresponding to the least significant bit is applied to the period c with weighting according to the display data of each bit in the same manner as in the first embodiment.

That is, in the period a, the most significant bit is displayed.
-V according to the data_Y6, -V_Y4, V _Y4, V_Y6Voltage level of
One in the period b, the middle bit of the display data
-V according to_Y5, -V_Y2, V_Y2, V_Y5From the voltage level of
Select one, and in period c, respond to the display data of the least significant bit.
Just -V_Y3, -V_Y1, V_Y1, V_Y3One from the voltage level of
Choose The opening of each voltage level is 4 * V_Y1= 2 * V
_Y2= V_Y4, 4 * V_Y3= 2 * V_Y5= V_Y6, 2 * V_Y1= V_Y3
-V_Y1, 2 * V_Y2= V_Y5-V_Y2, 2 * V_Y4= V _Y6-V_Y4
And

Under these conditions, in the same manner as in the first embodiment, eight gradation display is performed by creating signal electrode waveforms based on the number of mismatches for each bit of display data.

As described above, in the first embodiment, a voltage corresponding to each period obtained by dividing the selection period into two equal parts is selected and applied to the signal electrode to perform four gradation display. In the present embodiment, three gradations are displayed. Eight gradation display is performed by equally dividing. This is further divided into four equal parts, so that the selection period is divided into several parts, such as 16 gradations, and the voltage corresponding to each period is applied to the signal electrode to increase the number of gradations. In addition, changing the voltage ratio of each signal electrode,
It is also possible to adjust the luminance at each gradation by slightly changing the selection period instead of dividing it equally. Embodiment 10 In FIG. 19 of Embodiment 9 described above, in gradation display by changing the voltage applied to the signal electrode, each period a, b, c divided according to the number of bits of the display data includes Although the voltage corresponding to the bit is applied in order from the upper bit, the order may be appropriately changed for each signal electrode.

In the ninth embodiment, for example,
Pole X₁, X_Two, X_ThreeAnd signal electrode Y_Two~ Y _mEach picture that intersects
The display of the element is the scanning electrode X₁, X_Two, X_ThreeAnd signal electrode Y₁And
If the display is the same as the display of the intersecting pixels, the signal electrode Y
₁~ Y_mThe waveforms of the signal voltages applied to are all shown in FIG.
Is the same as However, in such a case,
The summary of the waveform to be displayed becomes large and the display quality becomes poor.
become worse.

Therefore, in the present embodiment, as shown in FIG. 20, the signal electrode waveforms applied to each of the signal electrodes Y _{1 to} Y _m are changed in order.

That is, in the ninth embodiment, 3
Applying a voltage corresponding to the most significant bit of the display data bit period a, the voltage corresponding to the intermediate bit period b, and the voltage corresponding to the least significant bit period c, the signal electrode Y ₁ in this order are doing. The same applies to the other signal electrodes Y _{1 to} Y _m .

On the other hand, in the present embodiment, FIG.
Apply a voltage to the most significant bit as shown at 0
The period is a and the period for applying the voltage to the middle bit is
b, the period for applying the voltage to the least significant bit is c.
Then, for example, the signal electrode Y₁Then, as in the second embodiment,
If the voltage is applied in the order of a.
In the signal electrode, the order is appropriately changed, and the signal electrode Y_Two
A, c, b, signal electrode Y _ThreeThen b ・ a ・ c, signal electrode
Y_FourThen, bc, signal electrode Y_FiveThen c, a, b, signal
Electrode Y₆Then, apply in the order of c, b, and a.
Signal electrode Y₇~ Y_mAlso the combination as above
Is repeated.

In the above-described embodiment, in the above-described embodiment, almost the same number of combinations of six different waveforms are applied to the signal electrodes, so that the effects of the rising and falling edges of each signal electrode waveform cancel each other. Accordingly, the summary of the waveform applied to each pixel can be reduced.

Any combination of waveforms may be applied to each signal electrode. For example, if there are six signal electrode drivers, each combination of waveforms may be applied to each signal electrode driver. . As described above, the display quality can be improved by making the number of combinations of waveforms applied to the respective signal electrodes substantially the same.

Further, as described above, the voltage corresponding to each bit of the display data is appropriately replaced and applied to each of the signal electrodes Y _{1 to} Y _m , and is applied to the above-described embodiments and the later-described embodiments. Applicable. (Embodiment 11) In the ninth embodiment, display of eight gradations is performed by using a waveform as shown in FIG. 1A, that is, FIG. 3B as a scanning voltage waveform applied to the scanning electrode. However, it is also possible to use the waveform of FIG. 3A or the waveform of FIG. 48A or FIG. 48B in the conventional example. This will be described in more detail by taking as an example the case where the display is performed.

FIG. 21 shows an embodiment in which eight gradations are displayed based on the display data shown in FIG. 22 by using the waveform shown in FIG. 3A as the scanning voltage waveform applied to the simultaneously selected scanning electrodes. FIG. 3A is a waveform diagram of a scanning voltage applied to scanning electrodes X ₁ , X _2, and X _3, and FIG. 3C is a waveform waveform of a signal voltage applied to signal electrode Y _1. FIG. 3D shows a voltage waveform applied to a pixel where the scanning electrode X ₁ and the signal electrode Y ₁ intersect.

Also in this example, three scanning electrodes are sequentially selected and driven three by one simultaneously. In FIG. 21, only three scanning electrodes X ₁ , X _2, and X ₃ are shown. After the scanning electrodes X ₁ , X ₂ , X ₃ are selected as shown in FIG. 7, the next three scanning electrodes X ₄ , X ₅ , X ₆ are selected and the scanning electrodes X ₁ , X ₂ , X ₃ are respectively selected. The same voltage is applied, and thereafter, three are sequentially selected in the same manner, and one frame ends when all the scanning electrodes are selected.

The scanning voltage waveform shown in FIG. 3A is applied to the three scanning electrodes selected at the same time as described above, and the minimum pulse width Δt is as shown in FIG. Is twice as large as the minimum pulse width Δt ₀ in the conventional example, and all the selection periods t in one frame of each scanning electrode are equal to the four periods t ₁ to t of the above-mentioned pulse width Δt. t ₄ .

The above four periods t _{1 to} t ₄ are divided into three periods a, b, and c in accordance with the number of bits of the display data, and each of the divided periods corresponds to the bits of the display data. A predetermined weighted signal voltage is applied to a signal electrode.

That is, in FIG. 22, the upper bits of the display data represented by a three-digit number in a binary system are assigned to the respective periods t _{1 to} t _4.
In the first divided period a, the central bit is set to the next divided period b.
The lower bits correspond to the last divided period c, and the upper bits are weighted with a predetermined weight ± V _Y4.
Or ± V _Y6 or ± V _Y2 or ± V
The V _Y5, are for the lower bits ± V _Y1 or ± V _Y3, applied according to the conditions described below, respectively.

The above-described voltage planting ratio is as follows: V _Y1 : V _Y2 : V _Y4 = 1: 2: 4 V _Y3 : V _Y5 : V _Y6 = 1: 2: 4 V _Y1 : V _Y3 = 1: 3 Is set.

The above conditions were selected such that the scanning voltage waveform applied to the scanning electrode was on when the positive side was on, off when the scanning voltage waveform was on the negative side, display data 1 was on, and display data 0 was off. The on / off of the scanning electrode and the on / off of the same bit of the display data at the intersection of the selected scanning electrode and the signal electrode to be applied are sequentially compared for each position, and the number of mismatches is determined. Thus, a predetermined voltage is applied to the signal electrode.

[0156] More specifically, when the V _Y4, 3 when the -V _Y4, 2 when the -V _Y6, 1 when the number mismatch between the scanning electrode and the upper bit is 0 in this example V _Y6 is applied, and -V _Y5 when the number of mismatches between the scan electrode and the center bit is 0, -V _Y2 when it is 1, V _Y2 when it is ₂ , and V _Y5 when it is 3, respectively. When the number of mismatches between the scan electrode and the lower bits is 0, -V _{Y3 is applied} , when 1 is -V _Y1 , 2 is applied, V _Y1 is applied, and when 3 is 3, V _Y3 is applied.

In the embodiment shown in FIG.
First three scanning electrodes X ₁ · X ₂ · X ₃ are simultaneously selected,
The selected scan electrodes X ₁ , X ₂ , X ₃ are sequentially turned off, off, and on, and the upper bits of the display data at the intersection with the signal electrode Y ₁ on the scan electrodes X ₁ , X ₂ , X ₃ are The numbers are sequentially turned off, on, and on, and when the two are compared in order, the number of mismatches becomes 1, and the first divided period a of the first period t ₁
Voltage -V _Y4 is applied to the signal electrodes Y ₁ to. Voltage weighted in the same manner for the other signal electrodes Y ₂ to Y _m is applied at the same time.

Next, the first period t₁Next split of
In the period b, the scan electrode X₁・ X _Two・ X_ThreeOn Oh
Is the same off-off-on as above,
The center bit corresponding to b is on / off / off in order
Therefore, the number of mismatches is 2 and V_Y2Voltage is applied and
The lower bits for the divided period c are off-on-off
Therefore, the number of mismatches is 2 and V_Y1Is applied.

In the next period t ₂ , scan electrode X ₁
On / off on X ₂ · X ₃ is off / on / off at an angle. On the other hand, the higher order of the display data of the intersection with the signal electrode Y ₁ on the scan electrodes X ₁ · X ₂ · X _3. Since the bits are turned on and off sequentially and the number of mismatches is 1 in the same manner as above,
The voltage of V _Y4 is V _Y2 because the center bit is on / off / off and the number of mismatches is 2 in order, and the voltage of the lower bit is off / on / off and the number of mismatches is 0, so the voltage of −V _Y3 is It is sequentially applied to the signal electrodes Y ₁ in each divided period a · b · c.

In the next period t_ThreeAnd t_FourAlso about
In the same manner as described above, the signal voltage corresponding to the
No. electrode Y₁~ Y_mTo the scanning electrode X₁・ X_Two
・ X _ThreeIs completed, and then the scanning electrode X_Four・ X_Five・ X₆But
The signal electrode Y is selected in the same manner as described above.₁~ Y_mPredetermined
Signal voltage is applied and all scan electrodes are selected.
At this point, one frame F ends. Then start again
Scan electrode X₁・ X_Two・ X_ThreeFrom the next frame
Is started at that time.
Voltage is inverted and applied to the signal electrode accordingly
The polarity of the applied voltage is also reversed, so-called AC drive is performed.
Is done.

Note that the above-mentioned voltage ratio does not always have to be strictly under the above-mentioned conditions, and the periods t _{1 to} t ₄ and the divided periods a, b, and c are not necessarily strictly divided. It may not be necessary, and may be appropriately adjusted according to, for example, the characteristics of the liquid crystal. Further, the order of the divided periods a, b, and c may be changed. It is also possible to perform display of various gray scales in the same manner as described above. For example, in 16 gray scales, a voltage weighted corresponding to each bit of the display data represented by 4 bits may be used. The above points are the same for the embodiment described later. (Embodiment 12) In Embodiment 11, the selection period t of each scanning electrode is provided at one time in one frame F. However, the selection period t may be provided a plurality of times in one frame F. .

For example, for each of the periods t _{1 to} t ₄ ,
One field may be used until all the scanning electrodes are selected for each period, and this may be repeated four fields in one frame F. Alternatively, all the scanning electrodes may be divided for each bit of the display data. May be repeated. FIG. 24, FIG. 26, and FIG. 27 show examples.

FIG. 24 is an applied voltage waveform diagram showing an embodiment in which driving is performed a plurality of times in each of the _four periods t _{1 to} t 4 in the eleventh embodiment, and FIG. 25 is a diagram showing scanning electrodes X _{1 to} X ₆ . FIG. 4 is a waveform diagram of a scanning voltage applied.

First, scan electrodes X ₁ , X ₂ , X ₃ are selected, and signal voltages corresponding to the number of mismatches with three bits are sequentially applied to signal electrodes Y _{1 to} Y _{m in} the same manner as in the eleventh embodiment. It is applied to, then the scan electrode X ₄ · X ₅ · X ₆ is selected and go signal voltage is applied in the same manner as described above, the field f ₁ to the time period t ₁ at which all the scanning electrodes are selected finish. Next, the _first scan electrode X ₁ .X
From ₂ · X ₃ is selected in order of field f ₂ for the next period t ₂ is performed, where four fields f ₁ ~f ₄ for four periods t ₁ ~t ₄ is completed, one frame F is completed Is what you do.

[0165] Figure 26 is for each bit of the display data, that is, those to collectively executed every divided period of the four Ki聞t ₁ ~t ₄ in the above embodiment.

First, the first divided periods a in the _four periods t _{1 to} t 4 of FIG. 1 are grouped in order, and one field f ₁ is set until all the scanning electrodes are selected. Until the field f ₂ for the divided period b and the field f ₃ for the divided period c end, 1
It is a frame.

The voltage applied to the scanning electrode is inverted positive and negative every field, and the voltage applied to the signal electrode is also inverted accordingly.

FIG. 27 is further subdivided so as to be executed for all the scanning electrodes for each of the divided periods a, b, and c in FIG. In this example, it can be seen that the embodiment of FIG. 21 is equivalent to the one in which frame gradation is performed for each bit of display data.

When the selection period of the scanning electrode is divided into a plurality of times in one frame F as described above, the period during which the selection voltage is not applied to each scanning electrode, that is, each pixel, can be shortened. The increase / decrease is reduced, so that it is possible to prevent a decrease in contrast. (Thirteenth Embodiment) In the eleventh embodiment, 1
The selection period is divided into the same number as the gradation bit number n, that is, divided into three.
Although the signal voltages of six levels V _{Y1 to} V _Y6 are selectively applied to the signal electrodes, the number of signal voltage levels can be reduced by increasing the number of divisions.

For example, an effective voltage for driving a liquid crystal element such as a liquid crystal display panel is generally determined by a voltage value and an application time (pulse width). Even if it is applied, it can be driven equally.

Accordingly, of the plurality of voltage levels,
Instead of using a high-level voltage, a lower-level voltage can be used to make the driving time the same even if the application time is increased. For example, V _Y6 and V _{Y4 in} the first embodiment can be used. Instead of using voltage levels, voltage levels of V _Y5 and V _Y2 are used, respectively, and driving can be performed in the same manner as in Embodiment 1 even if the application time is extended. This makes it possible to reduce the number of signal voltage levels.

FIG. 28 is an applied voltage waveform diagram showing an embodiment in which the number of signal voltage levels is reduced in the manner described above.

In the case of FIG. 21, each of the four selection periods t ₁ , t ₂ , t ₃ , and t ₄ is divided into n parts, that is, three parts a, b, and c according to the number of bits of the display data. On the other hand, in the present embodiment, each of the above selection periods is divided into n11, that is, four of a, a, b, and c, and the first two divided periods a and a are divided into the voltages of the upper bits of the display data. This is based on the application time.

That is, the upper bits in the eleventh embodiment
Voltage level V_Y6And V _Y4Instead of
The voltage level V of the intermediate bit having half the size_Y5and
V_Y2And the application time is twice as long as the intermediate bit.
That's what I did. As a result, it is applied to the liquid crystal element, etc.
The voltage value and time to be set are twice the middle bit,
And the weighting ratio for each bit is
As in the case of FIG. 1, the opening is 1: 2: 4.

As described above, according to the eleventh embodiment,
The driving can be performed in the same manner as in the first embodiment after reducing the voltage level applied to the signal electrode by one as compared with the case of the first embodiment.

In the present embodiment, the two highest voltage levels V _Y6 and V _Y in Embodiment 11 are described.
And to eliminate the _Y4 but with use of the voltage level V _Y3 · V _Y1 of the lower bit instead of the voltage level V _Y5 and V _Y2 to the intermediate bit, respectively, in the eleventh embodiment, the application time similar to the above In other words, the lower bits may be doubled. Further, it is also possible to reduce four or more voltage levels, and reducing the voltage levels as described above is effective in simplifying the configuration of the driving circuit and the like, particularly when the number of gradations is large. . Fourteenth Embodiment In the thirteenth embodiment as well, the divided selection periods t _{1 to} t ₄ can be executed a plurality of times in one frame F, similarly to the twelfth embodiment. 29, 30, and 31 show one example.

FIG. 29 shows a case where one selection period is divided into n11, specifically, four selection periods in the thirteenth embodiment, a plurality of times in one frame as in the twelfth embodiment. More specifically, it is executed by dividing it into four fields f. However, it can be divided into two or three times. FIG. 30 shows four periods t ₁ to t ₁ in the above embodiment.
which was be executed divided periods every collectively of t _4, in order to put together the beginning of the division period a of the divided period a · a four periods t ₁ ~t ₄ of FIG 21 field f _3, and divided period c of all the field f ₁ and one to the scanning electrode is selected, the field f ₂ of the next division period a similarly, the divided period b Te Until the field f ₄ for
It is obtained by a single frame F _1. The voltage applied to the scanning electrode is inverted for each field, and the voltage applied to the signal electrode is also inverted accordingly.

FIG. 31 is further subdivided so as to be executed for all the scanning electrodes for each of the divided periods a, a, b and c in FIG.

The embodiment shown in FIGS. 30 and 31
It can be regarded as equivalent to a frame gradation in which the voltage applied to the signal electrode is weighted for each field. (Embodiment 15) As described above, the effective voltage when driving a liquid crystal element or the like is generally determined by the voltage applied and the application time (pulse width). A desired gradation display can be performed by appropriately combining the application time and the application time.

FIG. 32 is an applied voltage waveform diagram of an embodiment in which 16 gradations are displayed based on the display data shown in FIG. 33 by appropriately combining the voltage value of the applied voltage to the signal electrode and the application time. It is.

In this embodiment, three scan electrodes are sequentially selected, and each scan electrode is provided with four scan electrodes as in the first embodiment.
A scanning voltage is applied during a selection period including two periods t _{1 to} t ₄ .

Each of the above four periods t _{1 to} t ₄ is set to 6
Divided into two periods a to f, and the first two divided periods a and b
To the most significant bit of the 4-digit binary display data shown in FIG. 33, the next divided period c to the second bit, the next two divided periods de to the third bit, and the last Are made to correspond to the least significant bits, respectively.

The upper two bits are ±
The signal voltage V _Y4 or ± V _Y6, for the lower two bits of the signal voltage of ± V _Y1 or ± V _Y3, selectively applied to the signal electrodes according to the conditions described below, respectively.

Note that the ratio of the above voltage values is set to V _Y1 : V _Y3 = 1: 3 V _Y4 : V _Y6 = 1: 3 V _Y1 : V _Y4 = 1: 4.

As described above, the same two sets of voltages are used for the upper two bits and the lower two bits, respectively, and the most significant bit for the second most significant bit and the second most significant bit for the least significant bit are used. Each bit is weighted by doubling the pulse width. The upper 2 bits represent 4 tones and the lower 2 bits represent 4 tones, and the two are multiplied to obtain 4 × 4 = 16 tones. Can express.

The above conditions are as follows: when the voltage waveform of the scanning electrode is on the positive side, it is turned on, when it is on the negative side, it is turned off, display data 1 is turned on, and 0 is turned off. Off and on / off of the same bit of the display data at the intersection of the selected scanning electrode and the signal electrode to be applied are sequentially compared for each digit, and a predetermined voltage is set according to the number of mismatches. Apply to signal electrode.

[0187] Specifically, when the number of mismatches between the scanning electrode and the most significant bit of the V _Y4, 3 when the -V _Y4, 2 when the -V _Y6, 1 If 0 in this example is V _Y6 is applied to the signal electrode in the divided periods a and b, and the same voltage is applied to the signal electrode in the divided period c for the number of mismatches between the scanning electrode and the second bit as described above. When the number of mismatches between the scan electrode and the third bit is 0, −V _Y3 , 1
In the case of -V _Y1 , in the case of 2, V _Y1 , in the case of 3, V _Y3 is applied to the signal electrode in the divided period d · e, and the same applies to the number of mismatches between the scanning electrode and the least significant bit. Under the condition, the same voltage is applied to the signal electrode in the divided period f.

Therefore, in FIG. 32, first, three scan electrodes X ₁ , X ₂ and X ₃ are simultaneously selected, and the scan voltage waveforms of the selected scan electrodes X ₁ , X ₂ and X ₃ are sequentially turned off. The most significant bit of the display data at the intersection of the scanning electrode X ₁ , X ₂ , X ₃ with the signal electrode Y ₁ is off, off, and on in the off / on state. Becomes 0, and a voltage of -V _Y6 is applied to the signal electrode Y ₁ during the first divided periods a and b of the first period t ₁ .

The second most significant bit is off-on-off, and the number of mismatches is 2 compared to the off-off-on of scan electrodes X ₁ , X ₂ , X ₃ , and the voltage of V _Y4 is divided during the divided period. c, and the second bit is on / off / off and the number of mismatches is 2 and V _Y1 is in the division period de. The lowest bit is off / on / off and the number of mismatches is 2 and V _Y1 is applied. Voltage weighted in the same manner for the other signal electrodes Y ₂ to Y _m is applied at the same time.

Thus, in the following periods t _{2 to} t ₄ , a signal voltage corresponding to the number of mismatches is simultaneously applied to all the signal electrodes Y _{1 to} Y _m in the same manner as described above, and the scanning electrode X ₁
・ Selection of X ₂・ X ₃ is completed, and then scan electrodes X ₄・ X ₅・
Signal X ₆ is selected in the same manner as the electrodes Y ₁ to Y _m
, A predetermined signal voltage is applied, and when all the scanning electrodes have been selected, one frame F ends. After that, the next scan frame is selected again from the first scan electrode X ₁ , X ₂ , X ₃ again and the next frame is started. At this time, the polarity of the voltage applied to the scan electrode is inverted, and accordingly, the signal electrode is Are also inverted, so-called AC driving is performed.

As described above, a desired gradation display can be performed by appropriately combining the voltage value of the voltage applied to the signal electrode and the time. In particular, even when the number of gradations is large, the gradation can be displayed with a small voltage level. Key display can be performed.

As already described in the eleventh embodiment, the voltage ratio does not necessarily have to be set strictly to the above-mentioned conditions, and the period t _{1 to} t ₄ and the divided period a
Also, it is not necessary to strictly divide f into equal parts. In addition, the order of the divided periods a to f may be appropriately changed. Sixteenth Embodiment In the fifteenth embodiment as well, the selection period can be executed a plurality of times within one frame F as in the twelfth embodiment.

FIG. 34 shows an example of this, and FIG.
The period t _{1 to} t ₄ in 2 is set to 1 as in the second embodiment.
Each field is divided into four parts in the frame F, and until all the scanning electrodes are selected for each period, one field f is repeated four times in one frame F.

Although not shown in the figure, the first embodiment
5 and FIG. 30 and FIG.
As in the case of 1, the display data can be driven bit by bit or further subdivided. (Embodiment 17) In Embodiments 11 to 16, the signal electrodes are weighted with respect to the bits of the display data, that is, gradation display is performed by changing the voltage level applied to the signal electrodes. That is, gradation display can be performed by changing the voltage level applied to the scanning electrodes.

FIG. 35 shows an embodiment in which eight gradations are displayed based on the display data of FIG. 22 in the same manner as in the eleventh embodiment by changing the voltage level applied to the scanning electrodes according to the bits of the display data. FIG. 6 is a waveform diagram of an applied voltage.

As in the case of the eleventh embodiment, three scan electrodes are sequentially selected. Each scan electrode is set to V _X4 or −V _X4 for the upper bit of the display data, and to the center bit. V _X2 or -V _X2 , V _X1
Or -V _X1 is applied respectively.
V _X1 : V _X2 : V _X4 is set to be 1: 2: 4.

[0197] On the other hand, the signal electrodes Y ₁ ..., the scanning electrodes X ₁ ·
The on / off of X ₂ · X _{3 and} the on / off of display data are compared for each bit, and when the number of mismatches is 0, −V _Y3 is given.
When it is 1, it is -V _Y1 , when it is 2, it is V _Y1 , and when it is 3, it is V
_Y3 is applied respectively, and V _Y1 : V _Y3
Is set to 1: 3 opening.

Instead of increasing the voltage level on the signal electrode side as in the eleventh embodiment, the voltage level on the scanning electrode side is increased as in the present embodiment. Can be greatly reduced,
There is an advantage that the circuit configuration of the driver on the signal electrode side can be simplified. (Embodiment 18) In the seventeenth embodiment, as in the twelfth embodiment, the selection period can be executed a plurality of times within one frame F. 36, 37, and 3
8 shows an example.

FIG. 36 shows periods t _{1 to} t ₄ in FIG.
In the same manner as in the twelfth embodiment, each is separately divided into four in one frame F, and a period until all the scanning electrodes are selected in each period is defined as one field f, and four in one frame F
It is intended to be repeated several times.

FIG. 37 shows an example in which the display data is executed collectively for each bit of the display data, that is, for each divided period among the _four periods t _{1 to} t 4 in the above embodiment.

That is, the four periods t in FIG.
₁ ~t until all the scanning electrodes are selected in one beginning divided period a in ₄ sequentially collectively field f ₁
And then, in the same manner until the end of the field f ₃ against field f ₂ and divided period c against the other divided period b, is obtained by one frame. The voltage applied to the scanning electrode is inverted for each field, and the voltage applied to the signal electrode is also inverted accordingly.

FIG. 38 is further divided into divided periods a, b,
All the scan electrodes are sequentially selected and driven for each c.

As described above, the same effect as that of the twelfth embodiment can be obtained by driving a plurality of times in one frame. (Nineteenth Embodiment) In the seventeenth embodiment, as in the thirteenth embodiment, the number of divisions of the selection period can be increased to reduce the number of applied voltage levels.

FIG. 39 shows an example of this, and FIG.
The two divided periods each period t ₁ ~t ₄ started in four in one frame F in the same manner as FIG 28 application time for the upper bit in the 5, other divided period intermediate bits and lower, respectively This is the application time for the bit. Note that in this embodiment, the relationship between the applied voltages is V
_X1 : _VX2 = 1: 2 and _VY1 : _VY3 = 1: 3. (Embodiment 20) In Embodiment 19 as well, the selection period can be executed a plurality of times within one frame F. FIGS. 40, 41, and 42 show one example.

FIG. 40 shows each of the periods t ₁ to t ₁ in FIG.
t ₄ with what was repeated 4 times within one frame F until all of the scanning electrodes are selected in each period four times within one frame F in the same manner as FIG 25 as one field f is there.

[0206] Figure 41 is obtained by such run are summarized for each divided period of the four periods t ₁ ~t ₄ in the above embodiment, the division of four periods t ₁ ~t ₄ in FIG. 39 The first divided period a of the periods a and a is grouped in order until all the scan electrodes are selected as one field f _1, and similarly, the field f ₂ for the next divided period a is , The field f ₃ for the divided period b and the field f ₄ for the divided period c end up as one frame. The voltage applied to the scanning electrode is inverted for each field, and the voltage applied to the signal electrode is also inverted accordingly.

FIG. 42 is a diagram in which the selection period of FIG. 41 is further subdivided to sequentially select and drive all the scanning electrodes for each division period.

As described above, the same effect as that of the twelfth embodiment can be expected by driving a plurality of times in one frame. (Embodiment 21) In the case where a desired gradation display is performed by appropriately combining the voltage value of the voltage applied to the electrode and the application time as in Embodiment 15, a signal similar to Embodiment 16 is obtained. The driving can be performed in the same manner as in the fifteenth embodiment by increasing the voltage level on the scanning electrode side instead of increasing the voltage level on the electrode side.

FIG. 43 shows an example. In this example, the upper two bits of the display data in FIG. 13 are V _X4 or −V
_X4 and V _X1 or -V for the lower two bits.
_X1 is used, and _VX1 : _VX4 is set to be 1: 4.

[0210] On the other hand, the signal electrodes Y ₁ ..., the scanning electrodes X ₁ ·
The on / off of X ₂ · X _{3 and} the on / off of display data are compared for each bit, and when the number of mismatches is 0, −V _Y3 is given.
When it is 1, it is -V _Y1 , when it is 2, it is V _Y1 , and when it is 3, it is V
_Y3 is applied respectively, and V _Y1 : V _Y3
Are set in a 1: 3 relationship. (Embodiment 22) In Embodiment 21 as well, the selection period can be executed a plurality of times within one frame F.

FIG. 44 shows an example of this, and FIG.
4 until all scan electrodes each period t ₁ ~t ₄ in 1 every time four times in one frame F in the same manner as FIG. 24 is selected in one frame F as one field f It is intended to be repeated several times. Also in this example,
Similar to the above-described embodiment, the driving can be further subdivided.

Although not shown in FIG.
1 and FIG. 41 and FIG.
As in the case of 2, the display data can be driven bit by bit or further subdivided.

In each of the above embodiments, the scanning electrodes are used simultaneously.
In the above description, the case of selecting three by three has been described as an example.
According to the concept, two scanning electrodes or four
More than one at the same time to display the desired number of gradations
Can be For example, six scanning electrodes are simultaneously selected.
In the example shown in FIG.₁~ T₈
The eight selection periods are provided, and the selection period is
Scanning electrodes X₁~ X ₆Each selection period t₁~ T₈In the table below
Such a voltage is applied.

[0214]

[Table 5] Note that 0 volt is applied during the non-selection period. As described above to each scan electrode X ₁ to X ₆ continue to apply a predetermined scanning voltage therewith by applying a predetermined signal voltage in the same manner as the embodiments of the in the signal electrodes simultaneously Good.

Further, the waveform of the voltage applied to the scanning electrode is not limited to the above embodiments, but may be, for example, as shown in FIG.
(B) or any of (a) and (b) in FIG. 3 or the pulse waveforms thereof may be appropriately selected, or the arrangement order may be appropriately changed and used. It suffices if the driving waveforms applied to the scanning electrodes can be distinguished without being confused.

As described above, simultaneously selecting a plurality of scan electrodes sequentially and driving the selection period a plurality of times in one frame is performed by a liquid crystal element using a non-linear element such as an MIM element. And the like can be applied.
As described above, the driving method and the display device of the liquid crystal element and the like according to the above-described embodiment sequentially select a plurality of scan electrodes simultaneously, and divide one selection period into a plurality of periods.
In each divided selection period, gradation display is performed by applying a voltage weighted according to desired display data, so that the time during which the selection voltage is not applied to the pixel becomes longer and the contrast is reduced. In addition, it is possible to prevent flickering due to a long repetition period or occurrence of crosstalk due to rounding of the applied voltage waveform, and to perform satisfactory gradation display. In addition, it is possible to reduce the number of applied voltage levels instead of the number of gradations, and it is possible to simplify the structure of driving means such as a driver, and to provide a method and a display device for driving a liquid crystal element and the like which are excellent in reliability and display performance. And the like.

[Brief description of the drawings]

FIG. 1 is an applied voltage waveform diagram showing one embodiment of a method for driving a liquid crystal element or the like according to the present invention.

FIG. 2 is an explanatory diagram showing a schematic configuration of a liquid crystal element and the like and display data.

FIG. 3 is an explanatory diagram of a scanning voltage waveform applied to a scanning electrode.

FIG. 4 is a block diagram illustrating one embodiment of a driving circuit.

FIG. 5 is a block diagram of a scanning electrode driver.

FIG. 6 is a block diagram of a signal electrode driver.

FIG. 7 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 8 is an explanatory diagram of a procedure for driving using virtual electrodes and display data.

FIG. 9 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 10 is an explanatory diagram of gradation display by pulse width modulation.

FIG. 11 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 12 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 13 is an explanatory diagram of an arrangement configuration of virtual electrodes and display data.

FIG. 14 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 15 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 16 is an explanatory diagram of an arrangement configuration of virtual electrodes and display data.

FIG. 17 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 18 is an explanatory diagram of an arrangement configuration of virtual electrodes and display data.

FIG. 19 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 20 is an explanatory diagram of a waveform of a voltage applied to a signal electrode according to another embodiment of the method of driving a liquid crystal element or the like according to the present invention.

FIG. 21 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 22 is an explanatory diagram of an arrangement configuration of electrodes and display data.

FIG. 23 is a waveform chart of a voltage applied to a signal electrode in the above embodiment.

FIG. 24 is an applied voltage waveform chart according to the embodiment in which the selection period is driven a plurality of times in one frame.

FIG. 25 is a waveform chart of a voltage applied to a signal electrode in the above embodiment.

FIG. 26 is a diagram showing an applied voltage waveform of another example in which the selection period is driven a plurality of times in one frame in the embodiment.

FIG. 27 is a diagram illustrating an applied voltage waveform of another example in which the selection period in the above embodiment is driven a plurality of times within one frame.

FIG. 28 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 29 is an applied voltage waveform chart of the embodiment in which the selection period is driven a plurality of times in one frame.

FIG. 30 is a diagram showing an applied voltage waveform of another example in which the selection period according to the embodiment is divided into a plurality of times and driven in one frame.

FIG. 31 is an applied voltage waveform chart of another example in which the selection period according to the embodiment is driven a plurality of times in one frame.

FIG. 32 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 33 is an explanatory diagram of an arrangement configuration of electrodes and display data.

FIG. 34 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 35 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 36 is an applied voltage waveform chart according to the embodiment in which the selection period is driven a plurality of times within one frame in the selection period.

FIG. 37 is a diagram illustrating an applied voltage waveform of another example in which the selection period according to the embodiment is driven a plurality of times in one frame.

FIG. 38 is a diagram showing an applied voltage waveform of another example in which the selection period in the above embodiment is driven a plurality of times in one frame.

FIG. 39 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 40 is an applied voltage waveform chart according to the embodiment in which the selection period is driven a plurality of times in one frame in a plurality of times.

FIG. 41 is a diagram showing an applied voltage waveform of another example in which the selection period in the above embodiment is driven a plurality of times in one frame.

FIG. 42 is an applied voltage waveform diagram of another example in which the selection period in the above embodiment is driven a plurality of times in one frame.

FIG. 43 is an applied voltage waveform diagram showing another embodiment of the method for driving a liquid crystal element or the like according to the present invention.

FIG. 44 is an applied voltage waveform chart according to the embodiment in which the selection period is driven a plurality of times in one frame.

FIG. 45 is an applied voltage waveform diagram showing an example of a conventional method for driving a liquid crystal element or the like.

FIG. 46 is an explanatory diagram of a display pattern.

FIG. 47 is an applied voltage waveform diagram showing another example of a conventional method of driving a liquid crystal element or the like.

FIG. 48 is an explanatory diagram of a voltage waveform applied to a scanning electrode.

────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI G09G 3/20 G09G 3/20 641C 641E 641K (56) References JP-A-5-100642 (JP, A) N. RUCKMONGATHAN, A GENERALIZED AD DRESSING TECHNIQUE FOR RMS RESPONDING G MATRIX LCDS, CONF ERENCE RECORD OF OF THE 1993, Nippon Flats, Inc. BP Company, December 10, 1992, 190-192 (58) Field surveyed (Int. Cl. ⁷ , DB name) G09G 3/36 G02F 1/133 575 G09G 3/20 621 G09G 3/20 641

Claims (24)

(57) [Claims] 1. A method for driving a liquid crystal device, comprising: a plurality of scanning electrodes; a plurality of signal electrodes intersecting the plurality of scanning electrodes; and a liquid crystal interposed between the scanning electrodes and the signal electrodes. Dividing the plurality of scan electrodes into sub-groups, selecting the scan electrodes in the sub-group at the same time, dividing a selection period into a plurality of periods, and, in each of the divided periods, the waveform of the scan voltage; The data to be displayed is represented by a plurality of bits when applied to the simultaneously selected scanning electrodes, and the divided selection periods are subdivided at unequal intervals, and the subdivided selection periods are divided according to the bit positions. A method of driving a liquid crystal device, comprising: applying a signal voltage set based on allocation, display data for each bit, and a waveform of the scanning voltage to the signal electrode. 2. The method according to claim 1, wherein a virtual scan electrode is included as the scan electrode in the subgroup, and the number of voltage levels applied to the signal electrode is reduced as compared with a case where the virtual scan electrode is not included. The method for driving a liquid crystal device according to claim 1. 3. The driving method of a liquid crystal device according to claim 1, wherein a waveform of the scanning voltage applied in a unit of the subgroup is periodically exchanged between scanning electrodes in the subgroup. 4. The driving method of a liquid crystal device according to claim 3, wherein the waveform of the scanning voltage is replaced every frame. 5. The driving method for a liquid crystal device according to claim 1, wherein the selection period is provided continuously in one frame. 6. The driving method of a liquid crystal device according to claim 1, wherein the selection period is provided a plurality of times at intervals in one frame. 7. The driving method for a liquid crystal device according to claim 1, wherein gradation display is performed by frame modulation. 8. The method according to claim 1, wherein a waveform of the scanning voltage applied to the scanning electrode is selected from an orthogonal function system. 9. A display device comprising: a plurality of scanning electrodes; a plurality of signal electrodes intersecting the plurality of scanning electrodes; and a liquid crystal sandwiched between each of the scanning electrodes and each of the signal electrodes. Are divided into sub-groups, the scan electrodes in the sub-group are simultaneously selected, the selection period is divided into a plurality of periods, and in each of the divided periods, the waveform of the scan voltage is simultaneously selected. The data to be displayed is represented by a plurality of bits, the divided selection periods are subdivided at unequal intervals, and the subdivided selection periods are assigned according to the bit positions. A display device, wherein a signal voltage set based on each display data and a waveform of the scanning voltage is applied to the signal electrode. 10. The method according to claim 1, wherein a virtual scan electrode is included as the scan electrode in the subgroup, and the number of voltage levels applied to the signal electrode is reduced as compared with a case where the virtual scan electrode is not included. The display device according to claim 9, wherein: 11. The scanning voltage waveform applied to each of the sub-groups is switched periodically between the scanning electrodes in the sub-group.
The display device according to the above. 12. The display device according to claim 11, wherein the waveform of the scanning voltage is switched every frame. 13. The display device according to claim 9, wherein the selection period is provided continuously in one frame. 14. The display device according to claim 9, wherein the selection period is provided a plurality of times at intervals in one frame. 15. The display device according to claim 9, wherein gradation display is performed by frame modulation. 16. The display device according to claim 9, wherein a waveform of the scanning voltage applied to the scanning electrode is selected from an orthogonal function system. 17. A drive circuit for a liquid crystal device, comprising: a plurality of scan electrodes; a plurality of signal electrodes intersecting the plurality of scan electrodes; and a liquid crystal sandwiched between each of the scan electrodes and each of the signal electrodes. Dividing the plurality of scan electrodes into sub-groups, selecting the scan electrodes in the sub-group at the same time, dividing a selection period into a plurality of periods, and, in each of the divided periods, the waveform of the scan voltage; The data to be displayed is represented by a plurality of bits when applied to the simultaneously selected scanning electrodes, and the divided selection periods are subdivided at unequal intervals, and the subdivided selection periods are divided according to the bit positions. A driving circuit for a liquid crystal device, wherein a signal voltage set based on allocation, display data for each bit, and a waveform of the scanning voltage is applied to the signal electrode. 18. The method according to claim 1, wherein a virtual scan electrode is included as the scan electrode in the subgroup, and the number of voltage levels applied to the signal electrode is reduced as compared with a case where the virtual scan electrode is not included. The driving circuit for a liquid crystal device according to claim 17, wherein 19. The method according to claim 17, wherein the waveform of the scan voltage applied in units of the subgroup is periodically switched between scan electrodes in the subgroup.
The driving circuit of the liquid crystal device according to the above. 20. The driving circuit for a liquid crystal device according to claim 19, wherein the waveform of the scanning voltage is replaced every frame. 21. The driving circuit of a liquid crystal device according to claim 17, wherein the selection period is provided continuously in one frame. 22. The apparatus according to claim 1, wherein the selection period is provided a plurality of times at intervals in one frame.
21. The driving circuit for a liquid crystal device according to any one of 7 to 20. 23. The driving circuit of a liquid crystal device according to claim 17, wherein gradation display is performed by frame modulation. 24. The driving circuit according to claim 17, wherein a waveform of the scanning voltage applied to the scanning electrode is selected from an orthogonal function system.