JP3390752B2 - Display device and driving method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for displaying an image by selectively discharging a plurality of discharge cells and a driving method thereof.

[0002]

2. Description of the Related Art PDP (plasma display panel)
The plasma display device using is advantageous in that it can be thin and have a large screen. In this plasma display device, an image is displayed by utilizing the light emission at the time of discharge of the discharge cells forming the pixels.

FIG. 47 is a circuit diagram showing a structure of a sustain driver of a conventional plasma display device.

As shown in FIG. 47, the sustain driver 600 includes a recovery capacitor C11, a recovery coil L11,
It includes switches SW11, SW12, SW21, SW22 and diodes D11, D12.

The switch SW11 is connected between the power supply terminal V11 and the node N11, and the switch SW12 is connected between the node N11 and the ground terminal. The sustain voltage Vsus is applied to the power supply terminal V11. The node N11 is connected to, for example, 480 sustain electrodes, and FIG. 47 shows the panel capacitance Cp corresponding to the total capacitance between the plurality of sustain electrodes and the ground terminal.

The recovery capacitor C11 is connected between the node N13 and the ground terminal. A switch SW21 and a diode D are provided between the node N13 and the node N12.
11 is connected in series, and the diode D12 and the switch SW22 are connected in series between the node N12 and the node N13. The recovery coil L11 is a node N12.
And the node N11.

FIG. 48 shows the sustain driver 6 of FIG.
It is a timing chart which shows operation | movement of the sustain period of 00. Figure 4
8 includes the voltage of the node N11 and the switch S of FIG.
The operation of W21, SW11, SW22, SW12 is shown.

First, in the period Ta, the switch SW2
1 is turned on and the switch SW12 is turned off. At this time,
The switches SW11 and SW22 are off. Thereby, LC by the recovery coil L11 and the panel capacitance Cp
Due to the resonance, the voltage of the node N11 rises to the peak voltage Vp, and the electric charge accumulated in the recovery capacitor C11 is supplied to the panel capacitance Cp. At this time, the node N11
When the voltage of 2 exceeds the discharge start voltage of the sustain period, the sustain discharge is started.

Next, in the period Tb, the switch SW2
1 is turned off and the switch SW11 is turned on. As a result, the node N11 is connected to the power supply terminal V11, the voltage of the node N11 rapidly rises, and the node N1 is increased in the period Tc.
The voltage of 1 is fixed to the sustain voltage Vsus.

Next, in the period Td, the switch SW1
1 is turned off and the switch SW22 is turned on. Thereby, LC by the recovery coil L11 and the panel capacitance Cp
Due to the resonance, the voltage of the node N11 gently drops, and the charge is recovered from the panel capacitance Cp to the recovery capacitor C11.

Finally, in the period Te, the switch SW
22 is turned off and the switch SW12 is turned on. As a result, the voltage of the node N11 drops rapidly and is fixed at the ground potential.

By repeating the above operation in the sustain period, the periodic sustain pulse Psu is applied to the plurality of sustain electrodes, and the discharge cells are discharged at the rising of the sustain pulse Psu to perform the sustain discharge. Further, in the period Td, the charge of the panel capacitance Cp is collected by the collection capacitor C11, and the collected charge is supplied to the panel capacitance Cp again in the period Ta, thereby reducing the power consumption.

[0013]

However, in the conventional sustain driver, the ON resistance of the field effect transistors used as the switches SW21 and SW22 and the loss due to the diodes D11 and D12 in the recovery time periods Ta and Td. Power is consumed by the DC resistance of the recovery coil L11, the resistance of the electrode forming the panel capacitance Cp, and the like, and reactive power is generated.

This reactive power LP has a sustain voltage of the sustain pulse Psu of Vsus and a peak voltage of the recovery time of Vp, 1
When the number of sustain pulses per second is F, it is expressed by the following equation.

LP = Cp × Vsus × (Vsus−Vp) × F Here, if the recovery time is increased, the peak voltage Vp due to LC resonance can be increased and the reactive power LP can be reduced, but the lighting When the collection rate is long when the rate is large, stable discharge cannot be performed, so the collection time is set short for all lighting rates.

Therefore, in the conventional plasma display device, the peak voltage Vp of the recovery time becomes low, the reactive power cannot be sufficiently reduced when the lighting rate is small, and the power consumption can be sufficiently reduced. Can not.

An object of the present invention is to provide a display device and a driving method thereof which can perform stable discharge even if the lighting rate changes and can reduce reactive power and power consumption. Is.

[0018]

(1) First Invention A display device according to a first invention is a display device which selectively discharges a plurality of discharge cells to display an image. A plurality of discharges are provided, which includes a collecting unit that collects the accumulated charges and drives a drive pulse using the collected charges, and a detecting unit that detects the lighting rate of the discharge cells that are simultaneously lit among the plurality of discharge cells. The cell includes a capacitive load, and the recovery means has an inductance means having at least one inductance element whose one end is connected to the capacitive load, and a resonance for driving a drive pulse by LC resonance between the capacitive load and the inductance element. And a recovery means for changing the recovery time for driving the drive pulse by the recovery means and the resonance time for LC resonance in accordance with the lighting rate detected by the detection means. In which further comprises control means for controlling the.

In the display device according to the present invention, the driving pulse is driven by the LC resonance of the capacitive load and the inductance element, and the lighting rate of the discharge cells to be lit at the same time among the plurality of discharge cells is detected to determine the lighting rate. The recovery time for driving the drive pulse and the resonance time for LC resonance are changed in accordance with the above. As a result, the drive pulse can be driven with the optimal recovery time and LC resonance resonance time according to the lighting rate. Therefore, when the lighting rate is large, it is possible to shorten the collection time to enable stable discharge, and also to shorten the resonance time and reduce the reactive power. Further, when the lighting rate is small, the recovery time can be lengthened to reduce the reactive power. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

(2) Second Invention In the display device according to the second invention, in the structure of the display device according to the first invention, one field is divided into a plurality of subfields and selected for each subfield. In order to perform gradation display by discharging the discharge cells, there is further provided conversion means for converting image data of one field into image data of each subfield, and the detection means is a subfield for detecting a lighting rate for each subfield. The control means includes a lighting rate detecting means, and the control means controls the collecting means so as to change the collecting time and the resonance time of the LC resonance according to the lighting rate of each subfield detected by the subfield lighting rate detecting means. is there.

In this case, since the collection time and the resonance time of the LC resonance can be changed according to the lighting rate detected for each subfield, even when gradation display is performed,
The recovery time and the resonance time of LC resonance can be optimized according to the lighting rate.

(3) Third Invention A display device according to a third invention is the display device according to any one of the first and second inventions, wherein the control means has a lighting rate detected by the detection means. The collection means is controlled so that the smaller the value, the longer the collection time.

In this case, the smaller the detected lighting rate is, the longer the collection time is. Therefore, when the lighting rate is small, the collection time is lengthened to reduce the reactive power and the lighting rate is large. In this case, the recovery time can be shortened and stable discharge can be performed.

(4) Fourth Invention A display device according to a fourth invention is the display device according to any one of the first to third inventions, wherein the control means has a lighting rate detected by the detection means. The collection means is controlled so that the smaller the value of, the longer the resonance time of the LC resonance.

In this case, the smaller the detected lighting rate is, the longer the resonance time of the LC resonance is. Therefore, when the lighting rate is small, the recovery time can be lengthened to reduce the reactive power and the lighting. When the ratio is large, the resonance time of LC resonance can be shortened to perform stable discharge, and the reactive power can be further reduced.

(5) Fifth Invention A display device according to a fifth invention is the display device according to any one of the first to fourth inventions, wherein the control means has a lighting rate detected by the detection means. The recovery means is controlled so as to change the discharge recovery time during which the discharge cell discharges in the recovery time and not change the non-discharge recovery time during which the discharge cell does not discharge during the recovery time.

In this case, the discharge recovery time in which the discharge cell discharges is changed in the recovery time according to the detected lighting rate, so the discharge recovery time can be optimized according to the detected lighting rate. As a result, reactive power can be reduced and stable discharge can be performed. Moreover, since the non-discharge recovery time during which the discharge cell does not discharge is not changed in the recovery time, the control of the drive waveform in this period is simplified and the circuit configuration can be simplified.

(6) Sixth Invention A display device according to a sixth invention is the display device according to any one of the first to fifth inventions, wherein the control means has a lighting rate detected by the detection means. Accordingly, the recovery means is controlled so that the non-discharge recovery time in which the discharge cells do not discharge is longer in the recovery time than the discharge recovery time in which the discharge cells discharge in the recovery time.

In this case, since the non-discharge recovery time is set longer than the discharge recovery time in accordance with the detected lighting rate, the non-discharge recovery time need not be taken into consideration, and the non-discharge recovery time is set longer and invalid. The power can be reduced further.

(7) Seventh Invention A display device according to a seventh invention is a display device which selectively discharges a plurality of discharge cells to display an image, and collects charges accumulated in the discharge cells. The plurality of discharge cells are provided with a capacitive load and a detection unit that detects the lighting rate of the discharge cells that are simultaneously lit among the plurality of discharge cells. Wherein the recovery means includes an inductance means having at least one inductance element whose one end is connected to a capacitive load, and a resonance drive means for driving a drive pulse by LC resonance between the capacitive load and the inductance element, It further comprises control means for controlling the recovery means so as to change the resonance time of the LC resonance according to the lighting rate detected by the detection means.

In the display device according to the present invention, the drive pulse is driven by the LC resonance of the capacitive load and the inductance element, and the LC is responsive to the detected lighting rate.
Since the resonance time of resonance is changed, the resonance time of LC resonance can be set to an optimum time according to the detected lighting rate. Therefore, when the lighting rate is small, the inductance value of the inductance element is increased to lengthen the resonance time, and when the lighting rate is large, the inductance value of the inductance element is decreased to shorten the resonance time, thereby stabilizing the stable discharge voltage. Can be constant. In particular, when the lighting rate is high, the resonance time can be shortened to enable stable discharge, and the recovery efficiency can be improved to reduce the reactive power. In addition, the stability of the discharge can be improved by keeping the collection time constant. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

(8) Eighth Invention A display device according to an eighth invention is the display device according to the first or seventh invention, wherein the inductance means is
The control means includes variable inductance means capable of changing the inductance value, and the control means changes the inductance value of the variable inductance means according to the lighting rate detected by the detection means.

In this case, since the inductance value can be changed according to the detected lighting rate, the inductance value can be set to an optimum value according to the lighting rate, and the recovery efficiency can be improved. .

(9) Ninth Invention A display device according to a ninth invention is the display device according to the eighth invention, wherein the variable inductance means is a plurality of inductance elements connected in parallel and a control means. And a selection means for selecting a predetermined inductance element from among the plurality of inductance elements.

In this case, since a predetermined inductance element can be selected from the plurality of inductance elements connected in parallel, various inductance values can be realized by combining the predetermined inductance element among the plurality of inductance elements. Therefore, the inductance value can be set to an optimum value according to the lighting rate.

(10) Tenth Invention A display device according to a tenth invention is the display device according to the eighth invention, wherein the variable inductance means is a plurality of inductance elements connected in series and a control means. And a selection means for selecting a predetermined inductance element from among the plurality of inductance elements.

In this case, a predetermined inductance element can be selected from the plurality of inductance elements connected in series, so that various inductance values can be realized by combining the predetermined inductance element among the plurality of inductance elements. Therefore, the inductance value can be set to an optimum value according to the lighting rate.

(11) Eleventh Invention In the display device according to the eleventh invention, in the configuration of the display device according to the eighth invention, the collecting means is a capacitive element for collecting charges from the capacitive load. Further included, the variable inductance means includes a first inductance element, and the resonant drive means includes a first switch means connected in series with the first inductance element between the capacitive load and the capacitive element. The variable inductance means further includes a second inductance element and a second switch means connected in series to both ends of the first inductance element, and the control means turns on / off the first and second switch means. It controls the state.

In this case, since the second inductance element can be connected in parallel to the first inductance element according to the lighting rate, the combined inductance value of the first and second inductance elements and the first inductance element. Using the inductance value of, the inductance value can be set to an optimum value according to the lighting rate.

(12) Twelfth Invention A display device according to a twelfth invention is the display device according to the eighth invention, wherein the collecting means includes a capacitive element for collecting charges from the capacitive load. Further included, the variable inductance means includes a first inductance element, and the resonant drive means includes a first switch means connected in series with the first inductance element between the capacitive load and the capacitive element. The variable inductance means further includes a second inductance element and a second switch means connected in series between the capacitive load and the capacitive element, and the control means includes the first and second switch means. It controls the on / off state.

In this case, depending on the lighting rate, the first and second
Since the ON / OFF state of the switch means is controlled, the inductance value is adjusted according to the lighting rate using the combined inductance value of the first and second inductance elements and the inductance value of the first and second inductance elements. It can be set to the optimum value. Further, since only one switch means is inserted between the capacitive load and the capacitive element, the loss due to the switch means can be suppressed to a necessary minimum and the reactive power can be further reduced.

(13) Thirteenth Invention A display device according to a thirteenth invention is the display device according to the twelfth invention, wherein the resonance drive means is arranged in series between the capacitive load and the capacitive element. The control means further includes a third inductance element and a third switch means to be connected, and the control means turns on at least one of the first and second switch means during a discharge recovery time during which the discharge cells discharge during the recovery time, The third switch means is turned on during the non-discharge recovery time during which the discharge cells do not discharge during the recovery time.

In this case, the first and second discharge recovery times are required.
The on / off states of the first and second switching means are controlled so that at least one of the inductance elements of the first and second inductance elements is connected between the capacitive load and the capacitance element. By using the combined inductance value and the inductance values of the first and second inductance elements, the inductance value in the discharge recovery time can be set to an optimum value according to the lighting rate.

Further, since the on / off state of the third switch means is controlled so that the third inductance element is connected between the capacitive load and the capacitive element during the non-discharge recovery time, no non-discharge occurs. The inductance value of the third inductance element can be set by considering only the reduction of the reactive power without considering the discharge stability of the discharge cell in the recovery time, and the reactive power can be further reduced.

(14) Fourteenth Invention A display device according to a fourteenth invention is the display device according to the twelfth invention, wherein the resonance drive means is connected in parallel to the first switch means. The switch means, and the variable inductance means further includes fourth switch means connected in parallel to the second switch means,
The control means controls the on / off states of the first to fourth switch means.

In this case, since the ON / OFF states of the first to fourth switch means can be controlled independently, the resonance time at the rising and falling of the drive pulse can be controlled independently. In addition, since the second inductance element is commonly used at the rising and falling edges of the sustain pulse, the circuit configuration can be simplified.

(15) Fifteenth Invention A display device according to a fifteenth invention is the display device according to any one of the eleventh to fourteenth inventions, wherein the control means has the first switch means turned on. The on / off state of the first and second switch means is controlled so that the second switch means is turned on later.

In this case, since the first inductance element and the second inductance element are connected in parallel after the capacitive element and the first inductance element are connected, only the inductance value of the first inductance element is connected. The inductance value can be changed to various values by changing the ratio between the period in which the LED is used and the period in which the combined inductance value of the first and second inductance elements is used, and the inductance value is optimized according to the lighting rate. It can be set to any value.

(16) Sixteenth Invention A display device according to a sixteenth invention is the display device according to any one of the eleventh to fifteenth invention, wherein one field is divided into a plurality of subfields. In order to perform gradation display by discharging the discharge cells selected for each field, there is further provided conversion means for converting image data of one field into image data of each subfield, and the detection means is lit for each subfield. The sub-field lighting rate detecting means for detecting the rate is included, and the control means controls the period during which the second switch means is turned on according to the lighting rate for each sub-field detected by the sub-field lighting rate detecting means. is there.

In this case, since the period during which the second switch means is turned on is controlled according to the lighting rate detected for each subfield, the inductance value can be changed according to the lighting rate for each subfield. Even when performing gradation display, the inductance value can be optimized according to the lighting rate.

(17) Seventeenth Invention A display device according to a seventeenth invention is the display device according to any one of the first to sixteenth inventions, wherein the first and second switch means are connected in series. It is one of a field effect transistor and a diode connected, two field effect transistors connected in series, and an insulated gate bipolar transistor.

In this case, any one of the field effect transistor and the diode in which the switching means is connected in series, the two field effect transistors in the series, and the insulated gate bipolar transistor are first and second. Since the switch means of 2 is configured,
A switching operation can be performed by each of these elements. Moreover, when using two field effect transistors connected in series, the loss in the switch means can be particularly reduced.

(18) Eighteenth Invention A display device according to an eighteenth invention is the display device according to any one of the eighth to seventeenth invention, wherein the control means is
The collection means is controlled so that the resonance time of the LC resonance becomes longer as the lighting rate detected by the detection means becomes smaller.

In this case, the smaller the detected lighting rate is, the longer the resonance time of LC resonance is. Therefore, when the lighting rate is small, the resonance time is lengthened, and when the lighting rate is large, the resonance time is shortened. Thereby, the stable discharge voltage can be made constant. In particular, when the lighting rate is high, the resonance time can be shortened to enable stable discharge, and the recovery efficiency can be improved to reduce the reactive power.

(19) Nineteenth Invention A display device according to a nineteenth invention is the display device according to any one of the first to eighteenth inventions, wherein the control means is
The cycle of the drive pulse is changed according to the lighting rate detected by the detection means.

In this case, since the cycle of the drive pulse can be changed according to the lighting rate, the cycle of the drive pulse can be lengthened to secure a sufficient recovery time when the lighting rate is small.

(20) 20th Invention A display device driving method according to a 20th invention is a method for driving a display device which selectively discharges a plurality of discharge cells to display an image. The cell includes a capacitive load, and the display device includes an inductance means having at least one inductance element whose one end is connected to the capacitive load, and collects the charge accumulated in the discharge cell and collects the collected charge. Using a LC pulse of a capacitive load and an inductance element to drive a drive pulse; a step of detecting the lighting rate of discharge cells to be simultaneously lit among a plurality of discharge cells; and a lighting rate detected by the detecting step. Correspondingly, the step of changing the recovery time of driving the drive pulse and the resonance time of the LC resonance in the recovery step is included.

In the driving method of the display device according to the present invention, the driving pulse is driven by LC resonance of the capacitive load and the inductance element, and the lighting rate of the discharge cells to be lit at the same time among the plurality of discharge cells is detected. The recovery time for driving the drive pulse and the resonance time for LC resonance are changed according to the lighting rate. As a result, the drive pulse can be driven with the optimal recovery time and LC resonance resonance time according to the lighting rate. Therefore, when the lighting rate is large, it is possible to shorten the collection time to enable stable discharge, and also to shorten the resonance time and reduce the reactive power. Further, when the lighting rate is small, the recovery time can be lengthened to reduce the reactive power. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

(21) Twenty-first Invention A display device driving method according to a twenty-first invention is a display device driving method for selectively discharging a plurality of discharge cells to display an image. The cell includes a capacitive load, and the display device includes an inductance means having at least one inductance element whose one end is connected to the capacitive load, and collects the charge accumulated in the discharge cell and collects the collected charge. Using a LC pulse of a capacitive load and an inductance element to drive a drive pulse; a step of detecting the lighting rate of discharge cells to be simultaneously lit among a plurality of discharge cells; and a lighting rate detected by the detecting step. The step of changing the resonance time of the LC resonance accordingly.

In the display device driving method according to the present invention, the driving pulse is driven by the LC resonance of the capacitive load and the inductance element, and the resonance time of the LC resonance is changed according to the detected lighting rate. Therefore, the resonance time of the LC resonance can be set to an optimum time according to the detected lighting rate. Therefore, when the lighting rate is small, the inductance value of the inductance element is increased to lengthen the resonance time, and when the lighting rate is large, the inductance value of the inductance element is decreased to shorten the resonance time, thereby stabilizing the stable discharge voltage. Can be constant. In particular, when the lighting rate is high, the resonance time can be shortened to enable stable discharge, and the recovery efficiency can be improved to reduce the reactive power. In addition, the stability of the discharge can be improved by keeping the collection time constant. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

[0061]

BEST MODE FOR CARRYING OUT THE INVENTION An AC type plasma display device will be described below as an example of a display device according to the present invention. FIG. 1 is a block diagram showing the configuration of the plasma display device according to the first embodiment of the present invention.

The plasma display device shown in FIG.
D converter (analog / digital converter) 1, video signal-subfield correlator 2, subfield processor 3, data driver 4, scan driver 5, sustain driver 6, PDP (plasma display panel) 7, and subfield lighting A rate measuring device 8 is provided.

The video signal VD is input to the A / D converter 1. The A / D converter 1 converts the analog video signal VD into digital image data and outputs the digital image data to the video signal-subfield correlator 2. The video signal-subfield correlator 2 divides one field into a plurality of subfields for display, and thus creates the image data SP of each subfield from the image data of one field. Output to the field lighting rate measuring device 8.

The subfield lighting rate measuring device 8 detects the lighting rate of the discharge cells 14 simultaneously driven on the PDP 7 from the image data SP for each subfield, and outputs the result as the subfield lighting rate signal SL. Output to the processor 3.

Here, the lighting rate is the minimum unit of the discharge space that can be independently controlled to be in a lighting / non-lighting state, and is called a discharge cell. Number) / (P
The total number of discharge cells of DP).

Specifically, the subfield lighting rate measuring device 8 is decomposed into 1-bit information which is generated by the video signal-subfield associating device 2 and which indicates lighting / non-lighting of discharge cells for each subfield. The lighting rates of all the subfields are calculated separately using the video signal information, and the result is output to the subfield processor 3 as the subfield lighting rate signal SL.

For example, the subfield lighting rate measuring device 8
Has a counter inside, and when the video signal information decomposed into 1-bit information indicating lighting / non-lighting indicates lighting, the total value of the discharge cells lit by incrementing the value of the counter by 1 Ask for each field, P
The lighting rate is obtained by dividing by the number of all discharge cells of DP7.

The subfield processor 3 creates a data driver drive control signal DS, a scan driver drive control signal CS, and a sustain driver drive control signal US from the image data SP for each subfield, the subfield lighting rate signal SL and the like, The data is output to the data driver 4, the scan driver 5, and the sustain driver 6, respectively.

The PDP 7 includes a plurality of address electrodes (data electrodes) 11, a plurality of scan electrodes (scan electrodes) 12 and a plurality of sustain electrodes (sustain electrodes) 13. The plurality of address electrodes 11 are arranged in the vertical direction of the screen, and the plurality of scan electrodes 12 and the plurality of sustain electrodes 13 are arranged.
Are arranged horizontally on the screen. In addition, the plurality of sustain electrodes 13 are commonly connected. Address electrode 11, scan electrode 12, and sustain electrode 13
Discharge cells 14 are formed at each intersection of
4 constitutes a pixel on the screen.

The data driver 4 is connected to the plurality of address electrodes 11 of the PDP 7. Scan driver 5
Is internally provided with a drive circuit provided for each scan electrode 12, and each drive circuit is connected to the corresponding scan electrode 12 of the PDP 7. The sustain driver 6 is P
It is connected to a plurality of sustain electrodes 13 of DP7.

The data driver 4 applies a write pulse to the corresponding address electrode 11 of the PDP 7 according to the image data SP in the write period according to the data driver drive control signal DS. According to the scan driver drive control signal CS, the scan driver 5 sequentially applies the write pulse to the plurality of scan electrodes 12 of the PDP 7 while shifting the shift pulse in the vertical scanning direction in the write period. As a result, address discharge is performed in the corresponding discharge cell 14.

The scan driver 5 also applies a periodic sustain pulse to the plurality of scan electrodes 12 of the PDP 7 in the sustain period according to the scan driver drive control signal CS.
Apply to. On the other hand, the sustain driver 6 simultaneously applies a sustain pulse having a phase difference of 180 ° with respect to the sustain pulse of the scan electrode 12 to the plurality of sustain electrodes 13 of the PDP 7 in the sustain period according to the sustain driver drive control signal US. As a result, the sustain discharge is performed in the corresponding discharge cell 14.

In the sustain period, the scan driver 5 and the sustain driver 6 maintain according to the subfield lighting rate signal SL in accordance with the scan driver drive control signal CS and the sustain driver drive control signal US, as described later. Change the pulse waveform and period.

In the plasma display device shown in FIG. 1, the ADS (Address Displa
y-Period Separation (address / display period separation) method is used. In the ADS method, 1 field (1
/ 60 seconds = 16.67 ms) is temporally divided into a plurality of subfields.

For example, when displaying 256 gradations with 8 bits, one field has eight subfields SF1.
To SF8. Each subfield SF1 to SF8
Then, 1, 2, 4, 8, 16, 32, 64,
The brightness of 128 is weighted, and by combining these subfields SF1 to SF8, the brightness level can be adjusted in 256 steps from 0 to 255, and gradation display can be performed. Note that the number of subfield divisions, weighting values, and the like are not particularly limited to the above example, and various changes are possible. For example, in order to reduce a moving image pseudo contour, the subfield SF8 is divided into two. The weighting value of the two subfields may be set to 64.

FIG. 2 is a timing chart showing an example of drive voltages for the scan electrode 12 and the sustain electrode 13 in the PDP 7 of FIG.

During the initialization and writing period, an initialization pulse (setup pulse) is applied to the plurality of scan electrodes 12.
Pset is applied simultaneously. After that, the write pulse Pw is sequentially applied to the plurality of scan electrodes 12. As a result, an address discharge occurs in the corresponding discharge cell of the PDP 7.

Next, in the sustain period, the sustain pulse Psc is periodically applied to the plurality of scan electrodes 12, and the sustain pulse Psu is periodically applied to the plurality of sustain electrodes 13. The phase of the sustain pulse Psu is the sustain pulse Ps.
180 ° out of phase with c. As a result, the sustain discharge occurs after the address discharge.

FIG. 3 shows the sustain driver 6 shown in FIG.
3 is a circuit diagram showing the configuration of FIG. The scan driver 5
Since it has the same configuration as the sustain driver 6 and operates in the same manner, detailed description of the scan driver 5 will be omitted, and only the sustain driver 6 will be described in detail below.

The sustain driver 6 shown in FIG.
T (field effect transistor, hereinafter referred to as transistor) Q1 to Q4, a recovery capacitor Cr, a recovery coil L, and diodes D1 and D2 are included.

One end of the transistor Q1 has a power supply terminal V1.
, The other end is connected to the node N1, and the control signal S1 is input to the gate. The sustain voltage Vsus is applied to the power supply terminal V1. The transistor Q2 has one end connected to the node N1, the other end connected to the ground terminal, and the gate to which the control signal S2 is input.

The node N1 is connected to, for example, 480 sustain electrodes 13, but FIG. 3 shows the panel capacitance Cp corresponding to the total capacitance between the plurality of sustain electrodes 13 and the ground terminal. . In this regard, the same applies to sustain drivers according to other embodiments described below.

The recovery capacitor Cr is connected between the node N3 and the ground terminal. Transistor Q3 and diode D1 are connected in series between nodes N3 and N2. Diode D2 and transistor Q4
Are connected in series between the node N2 and the node N3. The control signal S3 is input to the gate of the transistor Q3, and the control signal S4 is input to the gate of the transistor Q4. The recovery coil L includes nodes N2 and N1.
Connected between and.

FIG. 4 is a block diagram showing a configuration of subfield processor 3 shown in FIG. The subfield processor 3 shown in FIG. 4 includes a lighting rate / collection time LUT (look-up table) 31, a collection time determination unit 32, a lighting rate / sustain period LUT 33, a sustain period determination unit 34, and a discharge control signal generator 35. Including.

The lighting rate / collection time LUT 31 is connected to the collection time determining unit 32, and stores the relationship between the lighting rate and the collection time based on the experimental data in a table format. For example, when the lighting rate is 0 to 10%, the recovery time is 130
0 ns is stored, the lighting rate is 10 to 50%, and 1100 ns is stored as the collection time, and the lighting rate is 50 to 8%.
A recovery time of 900 ns is stored for 0%, and a recovery time of 700 ns for a lighting rate of 80 to 90%.
Is stored and the lighting rate is 90 to 100% and 600n
s is stored. Here, the recovery time means a time for driving the sustain pulse Psu by LC resonance caused by the recovery coil L and the panel capacitance Cp.

The recovery time determining unit 32 is connected to the discharge control signal generator 35 and determines the recovery time corresponding to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 as lighting rate / collection time. The read time is read from the LUT 31, and the read recovery time is output to the discharge control signal generator 35. The determination of the collection time is not particularly limited to the example in which the relationship between the lighting rate and the collection time based on the experimental data is stored in the table format as described above, and the approximate expression representing the relationship between the lighting rate and the collection time is used. You may make it obtain | require the collection time corresponding to a lighting rate.

The lighting rate / sustaining cycle LUT 33 is connected to the sustaining cycle determining unit 34 and stores the relationship between the lighting rate and the sustaining cycle based on experimental data in a table format. For example, the lighting rate is 0 to 50%, and the maintenance cycle is 8 μs.
Is stored, 7 μs is stored as a sustain cycle for a lighting rate of 50 to 80%, and 6 μs is stored as a sustain cycle for a lighting rate of 80 to 100%. Here, the sustain cycle refers to the cycle of the sustain pulse Psu.

The sustaining period determining unit 34 is connected to the discharge control signal generator 35, and sets the corresponding sustaining period according to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 to the lighting rate / maintenance cycle. It is read from the LUT 33, and the read sustain period is output to the discharge control signal generator 35. Note that the determination of the sustain period is not particularly limited to the example of storing the relationship between the lighting rate and the sustain cycle based on the experimental data in the table format as described above, and an approximate expression representing the relationship between the lighting rate and the sustain cycle, etc. May be used.

The discharge control signal generator 35 causes the sustain driver 6 to output the sustain pulse Psu at the recovery time determined by the recovery time determining unit 32 and the sustain period determined by the sustain period determining unit 34. The control signals S1 to S4 are output as the drive control signal US.

The scan driver 5 is also controlled by the subfield processor 3 in the same manner as described above, and the waveform and cycle of the sustain pulse applied to the scan electrode 12 are similarly controlled according to the lighting rate of the subfield. .

In the present embodiment, the transistors Q3 and Q are used.
4, the recovery capacitor Cr, the recovery coil L and the diodes D1 and D2 correspond to the recovery means, the subfield lighting rate measuring device 8 corresponds to the detection means and the subfield lighting rate detection means, and the subfield processor 3 is the control means. And the video signal-subfield correlator 2 corresponds to the conversion means. Further, the recovery coil L corresponds to the inductance means and the inductance element, and the transistor Q
3, Q4, recovery capacitor Cr and diode D1,
D2 corresponds to the resonance driving means.

FIG. 5 shows the sustain driver 6 shown in FIG.
FIG. 6 is a timing chart showing an example of the operation in the sustain period of FIG. FIG. 5 shows the voltage of the node N1 and the transistor Q of FIG.
Control signals S1 to S4 input to 1 to Q4 are shown.

First, in the period TA, the control signal S2 goes low and the transistor Q2 turns off, and the control signal S3 goes high and the transistor Q3 turns on.
At this time, the control signal S1 is at low level and the transistor Q1 is off, and the control signal S4 is at low level and the transistor Q4 is off. Therefore, the recovery capacitor Cr is connected to the recovery coil L via the transistor Q3 and the diode D1, and the voltage of the node N1 rises from the ground potential to the peak voltage Vp due to LC resonance caused by the recovery coil L and the panel capacitance Cp.

At this time, when the voltage of the node N1 exceeds the discharge start voltage in the sustain period, the discharge cells 14 start discharging and sustain discharge is performed. Also, the recovery capacitor C
The charge of r is discharged to the panel capacitance Cp via the transistor Q3, the diode D1 and the recovery coil L.

Next, in the period TB, the control signal S1 goes high and the transistor Q1 turns on, and the control signal S3 goes low and the transistor Q3 turns off.
Therefore, the node N1 is connected to the power supply terminal V1, the voltage of the node N1 rises, and is fixed to the sustain voltage Vsus.

Next, in the period TC, the control signal S1 goes low and the transistor Q1 turns off, and the control signal S4 goes high and the transistor Q4 turns on.
Therefore, the recovery capacitor Cr is connected to the recovery coil L via the diode D2 and the transistor Q4,
Due to the LC resonance caused by the recovery coil L and the panel capacitance Cp, the voltage of the node N1 gradually drops. At this time,
The charge stored in the panel capacitance Cp is stored in the recovery capacitor Cr via the recovery coil L, the diode D2 and the transistor Q4, and the charge is recovered.

Next, in the period TD, the control signal S2 goes high and the transistor Q2 turns on, and the control signal S4 goes low and the transistor Q4 turns off.
Therefore, node N1 is connected to the ground terminal, the voltage of node N1 drops, and is fixed at the ground potential.

Here, in the example shown in FIG. 5, the periods TA and T
C is the recovery time, of which period TA is the discharge recovery time when the discharge cell discharges, and period TC is the non-discharge recovery time when the discharge cell does not discharge.

Further, the recovery coil L and the panel capacity Cp
The time until the sustain pulse Psu reaches the peak due to the LC resonance due to is called the resonance time, and the recovery coil L
Resonance time Tr is expressed by the following equation, where L is the inductance value of C and Cp is the capacitance of panel capacitance Cp.

Tr = π (LCp) ^1/2 Therefore, in the example shown in FIG. 5, the sustain pulse Psu reaches the peak voltage Vp due to the LC resonance caused by the recovery coil L and the panel capacitance Cp at the end of the period TA. For,
The period TA is also a resonance time.

By repeating the above operation in the sustain period, it is possible to apply a periodic sustain pulse Psu for discharging the discharge cells 14 to the sustain electrodes 13 when the sustain voltage Vsus rises from the ground potential. Note that, in the same manner as above, the sustain pulse Psu is also applied to the scan electrode 12 by the scan driver 5.
A sustain pulse Psc having a waveform similar to that of 180 ° out of phase is periodically applied.

FIG. 6 is a waveform diagram for explaining the recovery time and the resonance time. 6, CL represents the timing of clamping the node N1 of FIG. 3 to the power supply voltage (sustain voltage Vsus). The collection time is Node N from the start of collection.
It is the time until 1 is clamped to the power supply voltage. on the other hand,
The resonance time is the time from the start of collection until the node N1 reaches the original peak voltage of the waveform due to LC resonance.

FIG. 7 is a waveform diagram for explaining the variable control of the collection time. When the resonance time is fixed and the recovery time is changed, the voltage of the node N1 from when the node N1 is connected to the power supply terminal V1 by turning on the transistor Q1 until the voltage of the node N1 reaches the power supply voltage. The amount of increase of is changed. As a result, the reactive power loss changes. In this case, the longer the recovery time, the smaller the reactive power loss.

FIG. 8 is a waveform diagram for explaining the variable control of the resonance time. When the recovery time is fixed and the resonance time is changed, the voltage of the node N1 from when the node N1 is connected to the power supply terminal V1 by turning on the transistor Q1 until the voltage of the node N1 reaches the power supply voltage. The amount of increase of is changed. As a result, the reactive power loss changes. In this case, the shorter the resonance time, the smaller the reactive power loss.

Next, the subfield processor 3 shown in FIG.
The control operation of the sustaining pulse recovery time and the sustaining period will be described.

FIG. 9 is a diagram showing an example of the relationship between the recovery time and the reactive power loss. The reactive power loss per pulse was measured when the resonance time was fixed to 1300 ns and the recovery time was changed. Shows the data. As shown in FIG. 9, it can be seen that the longer the recovery time, the smaller the reactive power loss per pulse.

FIG. 10 is a diagram showing an example of the relationship between the lighting rate at each recovery time and the stable discharge voltage that allows stable discharge. As shown in FIG. 10, it can be seen that as the collection time becomes longer, the stable discharge voltage becomes higher even if the lighting rate is the same. For example, the collection time is 1300n
In the case of s, when the lighting rate is in the range of 0 to 10%, stable discharge can be performed below the sustain voltage Vsus of the sustain pulse Psu, but the sustain voltage Vsus exceeds about 25%.
Then, it can be seen that stable discharge cannot be performed.

As described above, when the collection time is short, stable discharge can be performed regardless of whether the lighting rate is large or small, but when the collection time is long, stable light emission can be performed when the lighting rate is small. However, if the lighting rate increases, stable discharge cannot be performed.

Therefore, in the present embodiment, when the lighting rate is small, the collecting time is lengthened, and when the lighting rate is large, the collecting time is shortened, and the lighting rate is stable while discharging at any lighting rate. Reactive power is reduced when is small.

Specifically, using the solid line portion shown in FIG. 10, the collection time is 1300 when the lighting rate is in the range of 0 to 10%.
ns, the collection time is set to 1100 ns in the lighting rate range of 10 to 50%, the collection time is set to 900 ns in the lighting rate range of 50 to 80%, and the lighting rate is set to 80 to
The collection time is set to 700 ns in the 90% range, and the collection time is set to 600 ns in the lighting rate range of 90 to 100%.

That is, when the lighting rate is 0 to 10%, the subfield processor 3 generates the control signals S1 to S4 so that the period TA is 1300 ns, and the lighting rate is 1%.
In the case of 0 to 50%, the control signals S1 to S4 are generated so that the period TA becomes 1100 ns, and the lighting rate is 50 to 8
When it is 0%, the control signals S1 to S4 are generated so that the period TA becomes 900 ns, and when the lighting rate is 80 to 90%, the control signal S1 becomes so that the period TA becomes 700 ns.
~ S4 is generated and the lighting rate is 90 to 100%,
Control signals S1 to S4 so that the period TA becomes 600 ns
Is being generated.

As a result, stable discharge can be performed at a voltage sufficiently lower than the sustain voltage Vsus for all lighting rates, and the recovery time becomes longer as the lighting rate becomes smaller. Has been reduced.

Further, when the lighting rate is 0 to 10%, the subfield processor 3 generates the control signals S1 to S4 so that the sustain period is 8 μs, and the lighting rate is 10 to 50%.
In the case of, the control signal S1 is set so that the sustain period becomes 7 μs.
~ S4 is generated and the lighting rate is 80 to 100%,
The control signals S1 to S4 are generated so that the maintenance cycle is 6 μs. Therefore, when the lighting rate is small, the period of the drive pulse can be lengthened to ensure a sufficient collection time.

As described above, in the present embodiment, the lighting rate for each subfield is detected, and as the detected lighting rate for each subfield becomes smaller, the sustain pulse recovery time and the sustain period are made longer. . Therefore, when the lighting rate is high, the recovery time can be shortened to enable stable discharge, and when the lighting rate is low, the recovery time can be extended to reduce the reactive power. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

Further, the plasma display device of the present embodiment is realized with a simple circuit configuration.

In this embodiment, both the collection time and the maintenance cycle are changed according to the lighting rate, but only the collection time may be changed.

Next explained is a plasma display device according to the second embodiment of the invention. FIG. 11 shows
It is a block diagram which shows the structure of the plasma display apparatus by the 2nd Embodiment of this invention.

The difference between the plasma display device shown in FIG. 11 and the plasma display device shown in FIG.
An inductance control circuit 9 for changing the inductance values of the scan driver 5a and the sustain driver 6a according to the lighting rate for each subfield is added, and the other points are the same as the plasma display device shown in FIG. , The same parts are given the same symbols,
Hereinafter, only the control of the resonance time according to the lighting rate will be described in detail as a different part. Note that, also in this embodiment,
Similar to the first embodiment, the collection time and the maintenance cycle are controlled according to the lighting rate.

The inductance control circuit 9 shown in FIG.
Is an inductance control signal LC, LU for receiving the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 and controlling the inductance value contributing to LC resonance according to the lighting rate for each subfield. It outputs to the scan driver 5a and the sustain driver 6a, respectively.

FIG. 12 is a block diagram showing the structure of the inductance control circuit 9 shown in FIG. The inductance control circuit 9 shown in FIG. 12 includes a lighting rate / inductance LUT 91 and an inductance determining unit 92.

The lighting rate / inductance LUT 91 is connected to the inductance determining section 92 and stores the relationship between the lighting rate based on experimental data and the inductance value contributing to LC resonance in a table format. For example, the lighting rate is 0
1800nH as an inductance value for ~ 50%
Is stored, and the lighting rate is 50 to 80%, 1300 nH is stored as an inductance value, and the lighting rate is 80 to 80%.
An inductance value of 520 nH is stored for 90%, and an inductance value of 360 nH is stored for a lighting rate of 90 to 100%.

The inductance determining section 92 reads out an inductance value corresponding to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 from the lighting rate / inductance LUT 91, and scans the scan driver 5a and the sustain driver 6a. Inductance control signals LC and LU for setting the read inductance value to the inductance value that contributes to LC resonance
Scan driver 5a and sustain driver 6a
Output to each. The determination of the inductance value is not particularly limited to the example in which the relationship between the lighting rate and the inductance value based on the experimental data is stored in the table format as described above, and the approximate expression representing the relationship between the lighting rate and the inductance value is used. You may make it obtain | require the inductance value corresponding to a lighting rate.

With the above configuration, the inductance control circuit 9 controls the inductance value that contributes to the LC resonance of the scan driver 5a and the sustain driver 6a according to the lighting rate measured by the subfield lighting rate measuring device 8.

FIG. 13 is a circuit diagram showing a structure of sustain driver 6a shown in FIG. The scan driver 5a of the present embodiment is also configured and operates in the same manner as the sustain driver 6a, and therefore, detailed description of the scan driver 5a will be omitted, and only the sustain driver 6a will be described in detail below.

The difference between the sustain driver 6a shown in FIG. 13 and the sustain driver 6 shown in FIG. 3 is that the recovery coil L is changed to a variable inductance section VL that changes the inductance value according to the inductance control signal LU. Since the other points are similar to those of the sustain driver 6 shown in FIG. 3, the same parts are designated by the same reference numerals,
Only the different points will be described in detail below.

The variable inductance portion VL shown in FIG.
Is connected between the node N2 and the node N1 and changes the inductance value according to the inductance control signal LU output from the inductance control circuit 9.

FIG. 14 is a circuit diagram showing an example of the variable inductance portion VL shown in FIG. The variable inductance unit VL shown in FIG. 14 includes recovery coils LA to LD and transistors QA to QD.

Recovery coil LA and transistor QA
Is connected in series between the node N1 and the node N2,
Thereafter, similarly, the recovery coils LB to LD and the transistor Q are collected.
B to QD are connected in series between the node N1 and the node N2, respectively. Inductance control signals SA to SD are input to the gates of the transistors QA to QD, respectively. The inductance control signals SA to SD are signals output from the inductance determining unit 92 shown in FIG. 12 as the inductance control signal LU.

In this embodiment, the transistors Q3 and Q are used.
4, the recovery capacitor Cr, the variable inductance part VL and the diodes D1 and D2 correspond to the recovery means, the subfield processor 3 and the inductance control circuit 9 correspond to the control means, and the variable inductance part VL is the inductance means and the variable inductance means. , The recovery coils LA to LD correspond to inductance elements, the transistors QA to QD correspond to selection means, and the other points are the same as in the first embodiment.

FIG. 15 is a schematic diagram showing ON / OFF states of the transistors QA to QD of the variable inductance portion VL shown in FIG. 14 and drive waveforms at the rising of the sustain pulse Psu corresponding to each state.

As shown in FIG. 15, the lighting rate is 90 to 10
In the case of 0%, when the inductance control signals SA to SD are output at a high level from the inductance determining unit 92 and the transistors QA to QD are turned on, the recovery coils LA to LD are arranged in parallel between the node N2 and the node N1. Connected. Therefore, the combined inductance value of the variable inductance section VL becomes the smallest value, for example, 360 nH, and the resonance time becomes 600 ns. As a result, the drive waveform at the rising of the sustain pulse Psu has the peak voltage Vp.
Is low and the drive waveform has a short recovery time.

Next, when the lighting rate is 80 to 90%, the inductance determining unit 92 outputs the inductance control signal SA.
~ SC is output at a high level, the inductance control signal SD is output at a low level, the transistors QA to QC are turned on, and the transistor QD is turned off, the recovery coil LA is placed between the node N2 and the node N1.
~ LC are connected in parallel. Therefore, the combined inductance value of the variable inductance section VL becomes a larger value, for example, 680 nH, and the resonance time becomes 800 ns. As a result, the peak voltage Vp of the drive waveform at the rising of the sustain pulse Psu becomes higher and the recovery time becomes longer.

Next, when the lighting rate is 50 to 80%, the inductance determining section 92 outputs the inductance control signal S.
A and SB are output at a high level, the inductance control signals SC and SD are output at a low level, the transistors QA and QB are turned on, and the transistors QC and
When QD is turned off, recovery coils LA and LB are connected in parallel between node N2 and node N1. Therefore, the combined inductance value of the variable inductance section VL becomes a larger value, for example, 1300 nH, and the resonance time becomes 1100 ns. As a result, the sustain pulse Ps
The peak voltage Vp of the drive waveform of u becomes higher and the recovery time becomes longer.

Finally, when the lighting rate is 0 to 50%, the inductance determining unit 92 outputs the inductance control signal SA.
Is output at a high level, the inductance control signals SB to SD are output at a low level, the transistor QA is turned on, and the transistors QB to QD are turned off, the recovery coil LA is placed between the node N2 and the node N1.
Only connected. Therefore, the inductance value of the variable inductance unit VL becomes the inductance value of the recovery coil LA, and the maximum inductance value, for example, 18
It becomes 00 nH, and the resonance time becomes 1300 ns. As a result, the peak voltage Vp of the drive waveform of the sustain pulse Psu is maximized and the recovery time is also maximized.

FIG. 16 is a diagram showing an example of the relationship between the resonance time and the reactive power loss. As shown in FIG. 16, the longer the resonance time, the smaller the reactive power loss per pulse. Therefore, by increasing the inductance value that contributes to LC resonance, the reactive power loss per pulse can be reduced.

This is because the recovery efficiency η (= Vp / Vsus × 100 (%)) improves as the inductance value increases, and the sustain voltage Vsus of the sustain pulse is constant.
This is because the peak voltage Vp of the recovery time increases and the reactive power can be reduced.

As described above, in the present embodiment, the recovery time and the maintenance cycle are controlled according to the lighting rate for each subfield as in the first embodiment, and the lighting rate for each subfield is small. Indeed, the inductance value of the variable inductance portion VL is increased to lengthen the resonance time. Therefore, when the lighting rate is small, the inductance value can be increased and the resonance time can be lengthened, so that the recovery efficiency can be improved and the reactive power can be further reduced.

FIG. 17 is a circuit diagram showing the structure of another example of the variable inductance unit LU shown in FIG.

The variable inductance section shown in FIG. 17 includes recovery coils LA'-LD 'and transistors QA'-Q.
Including D '.

Recovery coil LA 'and transistor Q
A'is connected in parallel, and thereafter the recovery coils LB'-
LD 'is connected in parallel with the transistors QB'-QD', respectively, and the recovery coils LA'-LD 'are connected in parallel.
And the transistors QA 'to QD' are connected in series between the node N2 and the node N1. Transistor QA '
To the QD 'gates, the inductance control signal S
A'to SD 'are input. Inductance control signal S
A'to SD 'are the inductance control units 9 shown in FIG.
2 is a signal output as the inductance control signal LU.

FIG. 18 is a schematic diagram showing ON / OFF states of the transistors QA 'to QD' of the variable inductance section shown in FIG. 17 and driving waveforms at the rising of the sustain pulse Psu corresponding to each state.

As shown in FIG. 18, the lighting rate is 90 to 10
In the case of 0%, the inductance determining unit 92 outputs the inductance control signals SA ′ to SC ′ at a high level, the inductance control signal SD ′ at a low level, and the transistors QA ′ to QC ′ are turned on.
When the transistor QD 'is turned off, the recovery coil LD' is connected between the node N2 and the node N1. Therefore, the combined inductance value of the variable inductance section becomes the inductance value of the recovery coil LD ′, the smallest inductance value, for example, 360 nH, and the resonance time is 600 ns. As a result, the drive waveform at the rising of the sustain pulse Psu has the peak voltage Vp.
Is low and the drive waveform has a short recovery time.

Next, when the lighting rate is 80 to 90%, the inductance determining unit 92 sends the inductance control signal S
When A ′ and SB ′ are output at a high level, the inductance control signals SC ′ and SD ′ are output at a low level, the transistors QA ′ and QB ′ are turned on, and the transistors QC ′ and QD ′ are turned off. , The recovery coils LC ′ and LD ′ are connected in series between the node N2 and the node N1. Therefore, the combined inductance value of the variable inductance section becomes the total value of the inductance values of the recovery coils LC ′ and LD ′, the inductance value becomes a larger value, for example, 680 nH, and the resonance time is 800 n.
s. As a result, the peak voltage Vp of the drive waveform at the rising of the sustain pulse Psu becomes higher and
The recovery time will also be longer.

Next, when the lighting rate is 50 to 80%, the inductance determining unit 92 outputs the inductance control signal S
A'is output at a high level, the inductance control signals SB'-SD 'are output at a low level, the transistor QA' is turned on, and the transistors QB'-Q are output.
When D'is turned off, the recovery coils LB 'to LD' are connected in series between the node N2 and the node N1. Therefore, the combined inductance value of the variable inductance unit becomes the total value of the inductance values of the recovery coils LB ′ to LD ′, the inductance value becomes a larger value, for example, 1300 nH, and the resonance time becomes 1100 ns. As a result, the peak voltage Vp of the drive waveform of the sustain pulse Psu becomes higher and the recovery time becomes longer.

Finally, when the lighting rate is 0 to 50%, the inductance determining unit 92 outputs the inductance control signal S
A'-SD 'is output at low level, and the transistor Q
When A ′ to QD ′ are turned off, the nodes N2 and N1
And the recovery coils LA ′ to LD ′ are connected in series between the two. Therefore, the combined inductance value of the variable inductances is the sum of the inductance values of the recovery coils LA ′ to LD ′, the maximum inductance value is, for example, 1800 nH, and the resonance time is 1300 ns.
As a result, the peak voltage V of the drive waveform of the sustain pulse Psu
As p is maximized, the recovery time is also maximized.

As described above, the variable inductance section shown in FIG. 17 can also obtain the same effect as the variable inductance section VL shown in FIG.

Note that the number of connections of the recovery coil and the transistor is not particularly limited to the above four, but can be changed to various numbers of connections. The variable inductance section is not particularly limited to the above examples, and may have another configuration as long as the inductance value can be varied according to the inductance control signal.

Further, in the present embodiment, the collection time, the resonance time, and the sustain period are all changed according to the lighting rate, but only the resonance time may be changed.

Next explained is a plasma display device according to the third embodiment of the invention. FIG. 19 shows
It is a block diagram which shows the structure of the plasma display apparatus by the 3rd Embodiment of this invention.

The difference between the plasma display device shown in FIG. 19 and the plasma display device shown in FIG.
The subfield processor 3 is changed to a subfield processor 3a that controls the scan driver 5b and the sustain driver 6b so as to change the resonance time, the discharge recovery time, and the sustain cycle according to the lighting rate. Since the points are similar to those of the plasma display device shown in FIG. 1, the same parts are denoted by the same reference numerals, and only different parts will be described in detail below.

Subfield processor 3a shown in FIG.
In addition to the operation of the subfield processor 3 shown in FIG.
A scan driver drive control signal CS and a sustain driver drive control signal US for changing the resonance time, the discharge recovery time, and the sustain period are created according to the subfield lighting rate signal SL, and the scan driver 5b is generated.
And to the sustain driver 6b.

The scan driver 5b and the sustain driver 6b operate according to the scan driver drive control signal CS and the sustain driver drive control signal US, and change the resonance time of the sustain pulse, the discharge recovery time and the sustain cycle according to the lighting rate. Then, the light is output to the scan electrode 12 and the sustain electrode 13 of the PDP 7.

FIG. 20 is a block diagram showing a structure of subfield processor 3a shown in FIG. The difference between the subfield processor 3a shown in FIG. 20 and the subfield processor 3 shown in FIG. 4 is that the lighting rate / resonance time LUT36.
And a resonance time determining unit 37 is added, and the discharge control signal generator 35 is changed to a discharge control signal generator 35a. Other points are the subfield processor 3 shown in FIG.
The same parts are designated by the same reference numerals, and detailed description thereof will be omitted below.

Lighting ratio / resonance time LUT 36 shown in FIG.
Is connected to the resonance time determination unit 37 and stores the relationship between the lighting rate and the resonance time based on the experimental data in a table format. For example, as shown in Table 1, the lighting rate is 0 to 10%.
1300 ns is stored as the resonance time, and the resonance rate is 1200 ns for the lighting rate of 10 to 20%.
1100 ns is stored as a resonance time for a lighting rate of 20 to 30%, 1000 ns is stored as a resonance time for a lighting rate of 30 to 40%, and a lighting rate is set to 40 to 50%. 850 ns is stored as the resonance time, 800 ns is stored as the resonance time for the lighting rate of 50 to 60%, 750 ns is stored as the resonance time for the lighting rate of 60 to 70%, and the lighting rate is 70 to
700 ns is stored as the resonance time for 80%,
The lighting time is 80 to 100% and the resonance time is 600
ns is stored.

[0155]

[Table 1]

The resonance time determining section 37 is connected to the discharge control signal generator 35a and determines the resonance time corresponding to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 as lighting rate / resonance time. The resonance time read out from the LUT 36 is output to the discharge control signal generator 35. Note that the determination of the resonance time is not particularly limited to the example of storing the relationship between the lighting rate and the resonance time based on the experimental data in the table format as described above, and the approximate expression representing the relationship between the lighting rate and the resonance time is used. You may make it obtain | require the resonance time corresponding to a lighting rate.

Further, in the present embodiment, the lighting rate / collection time LUT 31 stores, for example, as shown in Table 1, 1100 ns as the discharge collection time for the lighting rate of 0 to 10%, and the lighting rate is 1000 ns is stored as the discharge recovery time for 10 to 20%, and the lighting rate is 20 to 30%.
900 ns is stored as the discharge collection time, and the discharge collection time is 800 ns for the lighting rate of 30 to 40%.
ns is stored, the lighting rate is 40 to 50%, and the discharge recovery time is 700 ns, and the lighting rate is 50 to 6%.
A discharge recovery time of 650 ns is stored for 0%, a discharge recovery time of 600 ns is stored for a lighting rate of 60 to 70%, and a discharge recovery time of 550 ns is stored for a lighting rate of 70 to 80%. And the lighting rate is 8
500 ns is stored for 0 to 100%.

Thus, the collection time and the resonance time are set so that the difference between the collection time and the resonance time increases as the lighting rate decreases.

The above-mentioned discharge recovery time is set shorter than the resonance time in order to enhance the stability of discharge.
Further, in the present embodiment, the non-discharge recovery time is fixed to 1300 ns in order to reduce the reactive power regardless of the lighting rate.

Further, the lighting rate / sustaining cycle LUT 33 is, for example, 8 μ as a sustaining cycle for a lighting rate of 0 to 20%.
s is stored, 7 μs is stored as a sustaining cycle for a lighting rate of 20 to 40%, 6 μs is stored as a sustaining cycle for a lighting rate of 40 to 80%, and a lighting rate is 80 to 1
5 μs is stored as the maintenance cycle for 00%.

In the discharge control signal generator 35a, the sustain driver 6b determines the resonance time determined by the resonance time determination section 37, the discharge recovery time determined by the recovery time determination section 32, and the sustain cycle determined by the sustain cycle determination section 34. The control signals S1 to S5 are output as the sustain driver drive control signal US so that the sustain pulse is output in a cycle.

The scan driver 5b is also controlled by the subfield processor 3a in the same manner as above.
Similarly, the waveform and cycle of the sustain pulse applied to scan electrode 12 are controlled according to the lighting rate for each subfield.

FIG. 21 is a circuit diagram showing a structure of sustain driver 6b shown in FIG. Note that the scan driver 5b of the present embodiment is also configured and operates in the same manner as the sustain driver 6b, and therefore a detailed description of the scan driver 5b will be omitted and only the sustain driver 6b will be described in detail below.

The sustain driver 6b shown in FIG. 21 differs from the sustain driver 6 shown in FIG. 3 in that the diode D3, the transistor Q5, and the recovery coil connected in series with the recovery coil L1 between the node N2 and the node N1. L2 is connected in parallel, and other points are the same as those of the sustain driver 6 shown in FIG. 3, and therefore, the same portions are denoted by the same reference numerals and detailed description thereof will be omitted below.

In sustain driver 6b shown in FIG. 21, recovery coil L1 is connected between nodes N2 and N1. The inductance value of the recovery coil L1 is, for example, 1800 nH. Further, the diode D3, the transistor Q5, and the recovery coil L2 are connected in series between the node N2 and the node N1. The inductance value of the recovery coil L2 is, for example, 450 nH.

Therefore, when the transistor Q3 is turned on and the transistor Q5 is turned off at the rising of the sustain pulse Psu, that is, at the discharge recovery time, only the recovery coil L1 contributes to the LC resonance, and the inductance value contributing to the LC resonance is equal to the recovery coil. 1 which is the inductance value of L1
It becomes 800 nH.

On the other hand, when the transistor Q5 is turned on with a predetermined delay time after turning on the transistor Q3 during the discharge recovery time, the recovery coil L1 and the recovery coil L2 contribute to LC resonance, and at this time, contribute to LC resonance. The inductance value is 360 nH, which is the combined inductance value of the recovery coils L1 and L2.

FIG. 22 is a diagram showing an example of the relationship between the resonance time and the delay time due to the recovery coils L1 and L2. Figure 2
As shown in 2, when the delay time is 0 ns, that is, when the transistors Q3 and Q5 are turned on at the same time, the inductance value that contributes to the LC resonance is 360 nH, which is the combined inductance value of the recovery coils L1 and L2, and the resonance time is 60.
It becomes 0 ns.

Here, as the delay time increases, the ratio of 1800 nH which is the inductance value of the recovery coil L1 increases, and the inductance value that contributes to the LC resonance increases. Therefore, the resonance time also increases, and finally the LC
The inductance value that contributes to resonance is 1800 nH, which is the inductance value of the recovery coil L1, and the resonance time is 1300 ns. Therefore, by adjusting the delay time, the inductance value that contributes to LC resonance is reduced to 3
It can be set to a predetermined value in the range of 60 to 1800 nH and the resonance time can be set to a desired time between 600 and 1300 ns.

At the fall of the sustain pulse Psu, that is, at the non-discharge recovery time, the current is limited by the diode D3, so that only the recovery coil L1 contributes to the LC resonance regardless of whether the transistor Q5 is on or off. The resonance time is fixed.

In this embodiment, transistors Q3 to Q3 are used.
5, the recovery capacitor Cr, the recovery coils L1 and L2, and the diodes D1 to D3 correspond to the recovery means, the subfield processor 3a corresponds to the control means, and the diode D3,
The transistor Q5 and the recovery coils L1 and L2 correspond to the inductance means and the variable inductance means,
The recovery capacitor Cr corresponds to a capacitive element, the recovery coil L1 corresponds to a first inductance element, the recovery coil L2 corresponds to a second inductance element, and the diode D1 and the transistor Q3 correspond to first switch means. However, the diode D3 and the transistor Q5 correspond to the second switch means, and other points are the same as those in the first embodiment.

23 to 26 are timing charts showing the operation during the sustain period of sustain driver 6b shown in FIG. 23 to 26, the voltage of the node N1 and the control signals S1 to S5 of FIG. 21 are shown.

As shown in FIG. 23, when the lighting rate is large, for example, when the lighting rate is 80 to 100%, first, in the period TA, the control signal S2 becomes low level, the transistor Q is turned off, and the control signal S3. Becomes high level, the transistor Q3 turns on, the control signal S5 becomes high level, the transistor S5 turns on, and the delay time becomes 0 ns. At this time, the control signals S1 and S4 are at low level, and the transistors Q1 and Q4 are off.

Therefore, the recovery capacitor Cr is connected to the recovery coil L via the transistor Q3 and the diode D1.
1 and is further connected to the recovery coil L2 through the diode D3 and the transistor Q5. As a result, 360 nH, which is the combined inductance value of the recovery coils L1 and L2, contributes to LC resonance, and the resonance time is 600 ns. The period TA that is the discharge recovery time at this time is 500 ns, and the voltage of the node N1 rises from the ground potential to the peak voltage Vp1.

At this time, when the voltage of the node N1 exceeds the discharge start voltage in the sustain period, the discharge cells 14 start discharging and sustain discharge is performed. Also, the recovery capacitor C
The charge of r is discharged to the panel capacitance Cp through the transistor Q3, the diode D1 and the recovery coil L1.

Next, in the period TB, the control signal S1 goes high and the transistor Q1 turns on, and the control signals S3 and S5 go low and the transistors Q3 and Q5 are turned on.
Turns off. Therefore, the node N1 is connected to the power supply terminal V1, the voltage of the node N1 rapidly rises, and is fixed to the sustain voltage Vsus.

Next, in the period TC, the control signal S1 goes low and the transistor Q1 turns off, and the control signal S4 goes high and the transistor Q4 turns on.
Therefore, the recovery capacitor Cr is connected to the recovery coil L1 via the diode D2 and the transistor Q4, and the voltage at the node N1 gradually drops due to LC resonance caused by the recovery coil L1 and the panel capacitance Cp.

At this time, the charge stored in the panel capacitance Cp is stored in the recovery capacitor Cr via the recovery coil L1, the diode D2 and the transistor Q4, and the charge is recovered. In this case, only the recovery coil L1 contributes to the LC resonance, and the inductance value contributing to the LC resonance is 1
It becomes 800 nH, and the resonance time becomes 1300 ns. The period TC which is the non-discharge recovery time at this time is 1300 ns.
Therefore, the non-discharge recovery time and the resonance time match.

Next, in the period TD, the control signal S2 goes high, the transistor Q2 turns on, the control signal S4 goes low, and the transistor Q4 turns off.
Therefore, node N1 is connected to the ground terminal, the voltage of node N1 drops, and is fixed at the ground potential.

Thus, when the delay time is 0 ns, the inductance value that contributes to the LC resonance in the entire discharge recovery time becomes the combined inductance value of the recovery coils L1 and L2, and the resonance time is shortened and the discharge recovery time is also short. To be extinguished.

Next, when the lighting rate becomes smaller, the delay time of the control signal S5 is set as shown in FIG.
In A, after the control signal S3 becomes high level and the transistor Q3 is turned on, the control signal S5 changes to the delay time DT1.
Only after being delayed, it goes high and transistor Q
5 is turned on.

Therefore, at the delay time DT1, the transistor Q3 is turned on and the recovery coil L1 contributes to LC resonance, but the transistor Q5 is turned off, so the recovery coil L2 does not contribute to LC resonance. Next, in the period after the delay time DT1 of the period TA, the transistors Q3, Q
5 is turned on, and recovery coils L1 and L2 are both LC
Contribute to resonance. As a result, the inductance value that contributes to LC resonance increases, and the resonance time increases.

For example, when the lighting rate is 40 to 50%, the resonance time is 800 ns, the peak voltage Vp2 of the sustain pulse Psu is higher than the peak voltage Vp1, the discharge recovery time is 700 ns, and the recovery efficiency is high. As well as improving, reactive power is reduced.

Next, when the lighting rate further decreases, as shown in FIG.
5, the delay time of the control signal S5 is further extended, the control signal S3 becomes high level and the transistor Q3 is turned on in the period TA, and the control signal S5 is delayed by the delay time DT2 and then becomes high level. Then, the transistor Q5 is turned on. Therefore, the period in which only the recovery coil L1 contributes to the LC resonance becomes longer, and the period in which both the recovery coils L1 and L2 contribute to the LC resonance become shorter, so that the inductance value contributing to the LC resonance becomes larger and the resonance time becomes longer. Will be longer.

For example, when the lighting rate is 20 to 30%, the resonance time becomes 1100 ns, the peak voltage Vp3 of the sustain pulse Psu becomes higher than the peak voltage Vp2, and
The discharge recovery time is also increased to 900 ns, the recovery efficiency is further improved, and the reactive power is further reduced.

Next, when the lighting rate further decreases, for example, when the lighting rate becomes 0 to 10%, as shown in FIG. 26, the control signal S5 is always at the low level and the transistor Q5 is always off. ing. Therefore, only the recovery coil L1 contributes to the LC resonance, the inductance value contributing to the LC resonance increases to 1800 nH, the resonance time increases to 1300 ns, and the discharge recovery time increases to 13%.
Lengthened to 00 ns. As a result, the peak voltage Vp4 of the sustain pulse Psu becomes higher than the peak voltage Vp3, the recovery efficiency is further improved, and the reactive power is further reduced.

As described above, as the lighting rate becomes smaller, the period TA which is the discharge recovery time is made longer, and the inductance value contributing to the LC resonance is made larger to make the resonance time longer. Therefore, the two recovery coils L1, L
2 can be used to sequentially change the inductance value in the period TA which is the discharge recovery time, and the optimum inductance value can be set according to the lighting rate.

As described above, in the present embodiment, the resonance time, the discharge recovery time and the sustain period can be controlled according to the lighting rate for each subfield as in the second embodiment. The same effect as that of the second embodiment can be obtained, and the resonance time can be set to various values by using the two recovery coils, so that the circuit configuration can be simplified.

In the present embodiment, the resonance time, the discharge recovery time and the sustain period are both changed according to the lighting rate, but only the discharge recovery time and the resonance time are changed without changing the sustain period. You may do it.

Next, the sustain driver 6 shown in FIG.
Another example of b will be described. FIG. 27 is a circuit diagram showing the configuration of another example of sustain driver 6b shown in FIG.

The difference between the sustain driver 6b 'shown in FIG. 27 and the sustain driver 6b shown in FIG. 21 is that
The diode D3 and the transistor Q5 are omitted, and the recovery coil L2 is replaced by the transistor Q6 and the diode D4.
The other points are the same as those of the sustain driver 6b shown in FIG. 21, and therefore, the same portions are denoted by the same reference numerals and detailed description thereof will be omitted below.

As shown in FIG. 27, the recovery capacitor Cr
A transistor Q3, a diode D1, and a recovery coil L1 connected in series, and a transistor Q6, a diode D4, and a recovery coil L2 connected in series are connected in parallel between and the node N1. Transistor Q
A control signal S5 is input to the gate of 6.

With the above configuration, the sustain driver 6b 'shown in FIG. 27 also corresponds to the sustain driver 6b shown in FIG.
The operation can be performed in the same manner as b, and the same effect can be obtained. In addition, the sustain driver 6 shown in FIG.
In b ′, one transistor Q6 and one diode D4 are provided between the recovery capacitor Cr and the recovery coil L2.
Since only the transistors are connected, the loss in the current path is smaller than that in the case where the two transistors Q3 and Q5 and the two diodes D1 and D3 are connected as in the sustain driver 6b shown in FIG. Therefore, the reactive power can be further reduced.

Next, the sustain driver 6 shown in FIG.
Still another example of b will be described. 28 is the same as FIG.
FIG. 9 is a circuit diagram showing a structure of still another example of the sustain driver 6b shown in FIG.

The difference between the sustain driver 6b ″ shown in FIG. 28 and the sustain driver 6b ′ shown in FIG. 27 is that the diode D2 is separated from the node N2 and the recovery coil L3 is inserted between the diode d2 and the node N1. The other points are the same as those of the sustain driver 6b shown in FIG. 27, and therefore, the same portions will be denoted by the same reference numerals and detailed description thereof will be omitted below.

As shown in FIG. 28, one end of the recovery coil L3 is connected to the node N1 and the other end of the recovery coil L3 is connected to the anode of the diode D2. Therefore, the recovery coil that contributes to the LC resonance during the period TC that is the non-discharge recovery time becomes the recovery coil L3, and the inductance value that contributes to the LC resonance during the non-discharge recovery time is the inductance value that contributes to the LC resonance during the discharge recovery time. It can be independently set to any value.

In this case, since the discharge is not performed during the non-discharge recovery time, the recovery time can be made sufficiently long without considering the discharge stability. For example, the collection time is 2
Set to 000ns and the resonance time is 2000n
By setting the inductance value of the recovery coil L3 to such an inductance value as s, the non-discharge recovery time can be further extended and the reactive power can be further reduced.

Next explained is a plasma display device according to the fourth embodiment of the invention. FIG. 29 shows
It is a block diagram which shows the structure of the plasma display apparatus by the 4th Embodiment of this invention.

The plasma display device shown in FIG. 29 differs from the plasma display device shown in FIG. 19 in that the subfield processor 3a and the scan driver 5b are different.
Further, the sustain driver 6b is changed to a subfield processor 3b, a scan driver 5c and a sustain driver 6c for changing the resonance time, the discharge recovery time, the non-discharge recovery time and the sustain period according to the lighting rate. Since other points are similar to those of the plasma display device shown in FIG. 19, the same portions are denoted by the same reference numerals, and different portions will be described in detail below.

FIG. 30 is a block diagram showing a structure of subfield processor 3b shown in FIG. The difference between the subfield processor 3b shown in FIG. 30 and the subfield processor 3a shown in FIG. 20 is that the discharge control signal generator 35
a is a control signal S1 for changing the resonance time, the discharge recovery time, the non-discharge recovery time and the sustain period according to the lighting rate.
20. The discharge control signal generator 35b that outputs .about.S5 is changed, and the other points are the same as those of the subfield processor 3a shown in FIG. The description is omitted.

Discharge control signal generator 35b shown in FIG.
Is the resonance time determined by the resonance time determiner 37, the recovery time determined by the recovery time determiner 32, that is, the discharge recovery time and the non-discharge recovery time, and the sustain cycle determined by the sustain cycle determiner 34. The control signals S1 to S5 are output as the sustain driver drive control signal US so that the sustain pulse is output at.

The scan driver 5c is also controlled by the subfield processor 3b in the same manner as above.
Similarly, the waveform and cycle of the sustain pulse applied to scan electrode 12 are controlled according to the lighting rate for each subfield.

FIG. 31 is a circuit diagram showing a structure of sustain driver 6c shown in FIG. Note that the scan driver 5c of the present embodiment is also configured and operates in the same manner as the sustain driver 6c, and therefore a detailed description of the scan driver 5c will be omitted, and only the sustain driver 6c will be described in detail below.

A difference between the sustain driver 6c shown in FIG. 31 and the sustain driver 6b shown in FIG. 21 is that the diode D3 and the transistor Q5 are changed to two transistors Q7 and Q8, and the other points are shown in FIG. 21 is similar to the sustain driver 6b shown in FIG.
The same parts are designated by the same reference numerals, and detailed description thereof will be omitted below.

As shown in FIG. 31, the drain of the transistor Q7 is connected to the node N2, the source of the transistor Q7 and the source of the transistor Q8 are connected, and the drain of the transistor Q8 is connected to the recovery coil L2.
The control signal S5 is input to the gates of the transistors Q7 and Q8.

With the above structure, sustain driver 6c shown in FIG. 31 can turn on / off the bidirectional current between node N2 and node N1, and the resonance time and discharge recovery at the rise of sustain pulse Psu. The time can be changed, and the resonance time and the non-discharge recovery time can be changed at the fall.

In this embodiment, the transistors Q3 and Q are used.
4, Q7, Q8, recovery capacitor Cr, recovery coil L
1, L2 and the diodes D1 and D2 correspond to the recovery means, the subfield processor 3b corresponds to the control means, the transistors Q7 and Q8 and the recovery coils L1 and L2 correspond to the inductance means and the variable inductance means, and the transistor Q7. , Q8 correspond to the second switch means, and other points are the same as in the third embodiment.

32 to 35 are timing charts showing the operation of the sustain driver 6c shown in FIG. 31 during the sustain period. 32 to 35, the voltage of the node N1 and the control signals S1 to S5 of FIG. 31 are shown.

As shown in FIGS. 32 to 35, in the sustain driver 6c, the discharge recovery time period TA and the delay times DT1 and DT2 are controlled in accordance with the lighting rate, as in the third embodiment. In addition, the period TC and the delay times DT1 and DT2 that are the non-discharge recovery time are controlled.

As described above, in the present embodiment, the lighting rate for each subfield is detected, and as the detected lighting rate for each subfield becomes smaller, the discharge recovery time at the rising and falling edges of the sustain pulse is increased. The non-discharge recovery time, the resonance time, and the sustain cycle can be lengthened, and the same effect as that of the first embodiment can be obtained.

Since the two field effect transistors Q7 and Q8 connected in series are used, the loss in the transistors Q7 and Q8 can be sufficiently reduced and the reactive power can be further reduced.

In the present embodiment, the discharge recovery time and its resonance time are the same as the non-discharge recovery time and its resonance time, but they are controlled independently to be different times. Good.

Further, although the transistors Q7 and Q8 are used as the switching means, the present invention is not limited to this example, and the MO
An insulated gate bipolar transistor (IGBT), which is an element in which an S (Metal Oxide Semiconductor) FET and a bipolar transistor are combined into one chip, may be used. In the third embodiment, the diode D1 and the transistor Q3 are used as the switch means.
Diode D2 and transistor Q4, diode D
Although 3 and the transistor Q5 are used, two field effect transistors connected in series may be used as in the fourth embodiment, or an insulated gate bipolar transistor or the like may be used. In this respect, the same applies to the fifth embodiment described later.

Next explained is a plasma display device according to the fifth embodiment of the invention. FIG. 36 shows
It is a block diagram which shows the structure of the plasma display apparatus by the 5th Embodiment of this invention.

The plasma display device shown in FIG. 36 differs from the plasma display device shown in FIG. 19 in that the subfield processor 3a and the scan driver 5b are different.
Further, the sustain driver 6b is changed to a subfield processor 3c, a scan driver 5d and a sustain driver 6d for changing the resonance time, the discharge recovery time, the non-discharge recovery time and the sustain period according to the lighting rate. Since other points are similar to those of the plasma display device shown in FIG. 19, the same portions are denoted by the same reference numerals, and different portions will be described in detail below.

FIG. 37 is a block diagram showing a structure of subfield processor 3c shown in FIG. The difference between the subfield processor 3c shown in FIG. 37 and the subfield processor 3a shown in FIG. 20 is that the discharge control signal generator 35
a is a control signal S1 for changing the resonance time, the discharge recovery time, the non-discharge recovery time and the sustain period according to the lighting rate.
20. The discharge control signal generator 35c that outputs .about.S6 is changed, and the other points are the same as the subfield processor 3a shown in FIG. The description is omitted.

A discharge control signal generator 35c shown in FIG.
Is the resonance time determined by the resonance time determining unit 37, the recovery time determined by the recovery time determining unit 32, that is, the discharge recovery time and the non-discharge recovery time, and the sustain cycle determined by the sustain cycle determining unit 34. The control signals S1 to S6 are output as the sustain driver drive control signal US so that the sustain pulse is output at.

The scan driver 5d is also controlled by the subfield processor 3c in the same manner as above.
Similarly, the waveform and cycle of the sustain pulse applied to scan electrode 12 are controlled according to the lighting rate for each subfield.

FIG. 38 is a circuit diagram showing a structure of sustain driver 6d shown in FIG. The scan driver 5d of the present embodiment is also configured and operates in the same manner as the sustain driver 6d, and therefore, detailed description of the scan driver 5d will be omitted, and only the sustain driver 6d will be described in detail below.

The difference between the sustain driver 6d shown in FIG. 38 and the sustain driver 6b shown in FIG. 21 is that the diode D3 and the transistor Q5 are omitted, and the recovery coil L2 includes the transistor Q9 and the diode D5 and the transistor Q10 and the diode D6. The other points are the same as those of the sustain driver 6b shown in FIG. 21 except that they are connected to the recovery capacitor Cr via the same, so that the same reference numerals are given to the same portions and detailed description thereof will be omitted below.

As shown in FIG. 38, the recovery capacitor Cr
A transistor Q9 and a diode D5, which are connected in series, and a transistor Q10 and a diode D6, which are connected in series, are connected in parallel between and the recovery coil L2. The control signal S5 is applied to the gate of the transistor Q9.
Is input, and the control signal S6 is input to the gate of the transistor Q10.

With the above structure, the sustain driver 6d shown in FIG. 38 can turn on / off the bidirectional current between the node N4 and the node N3, so that the recovery coil L2 is connected in parallel to the recovery coil L1. The state can be controlled independently at the rising and falling edges of the sustain pulse Psu, the resonance time and the discharge recovery time can be changed at the rising edge of the sustain pulse Psu, and the resonance time and the non-discharge recovery can be performed at the falling edge. You can change the time.

In this embodiment, the transistors Q3 and Q are used.
4, Q9, Q10, recovery capacitor Cr, recovery coil L
1, L2 and the diodes D1, D2, D5, D6 correspond to the recovery means, the subfield processor 3c corresponds to the control means, the transistors Q9, Q10, and the diode D.
5, D6 and the recovery coils L1, L2 correspond to the inductance means and the variable inductance means, the diode D5 and the transistor Q9 correspond to the second switch means, and the diode D2 and the transistor Q4 are the third.
Corresponding to the switch means, the diode D6 and the transistor Q10 correspond to the fourth switch means, and the other points are the same as in the third embodiment.

39 to 42 are timing charts showing the operation of the sustain driver 6d shown in FIG. 38 during the sustain period. 39 to 42 show the voltage of node N1 in FIG. 38 and control signals S1 to S6.

As shown in FIGS. 39 to 42, in the sustain driver 6d, the discharge recovery time period TA and the delay times DT1 and DT2 are controlled in accordance with the lighting rate, as in the fourth embodiment. In addition, the period TC and the delay times DT1 and DT2 that are the non-discharge recovery time are controlled.

As described above, in the present embodiment, the lighting rate for each subfield is detected, and as the detected lighting rate for each subfield becomes smaller, the discharge recovery time at the rise and fall of the sustain pulse is increased. The non-discharge recovery time, the resonance time, and the sustain cycle can be lengthened, and the same effect as that of the first embodiment can be obtained.

Since the on / off states of the transistors Q9 and Q10 can be controlled independently by the control signals S5 and S6, the resonance time at the rising and falling of the sustain pulse can be controlled independently. In addition, since the recovery coil L2 is shared at the rising and falling edges of the sustain pulse, the circuit configuration can be simplified.

With the above configuration, in the sustain driver 6d shown in FIG. 38, only one transistor Q9 and one diode D5 are connected between the recovery capacitor Cr and the recovery coil L2. Three transistors Q as shown in the sustain driver 6c
As compared with the case where 3, Q7, Q8 and one diode D1 are connected, the loss in the current path can be reduced and the reactive power can be further reduced.

In the present embodiment, the discharge recovery time and its resonance time and the non-discharge recovery time and its resonance time are the same, but they are controlled independently to be different times. Good.

Next explained is a plasma display device according to the sixth embodiment of the invention. FIG. 43 shows
It is a block diagram which shows the structure of the plasma display apparatus by the 6th Embodiment of this invention.

The plasma display device shown in FIG. 43 differs from the plasma display device shown in FIG. 36 in that the subfield processor 3c and the scan driver 5d are different.
And the sustain driver 6d is changed to a subfield processor 3d for changing the resonance time and the sustain period according to the lighting rate, the scan driver 5e, and the sustain driver 6e, and the other points are the plasma shown in FIG. Since it is the same as the display device, the same parts are denoted by the same reference numerals, and different parts will be described in detail below.

FIG. 44 is a block diagram showing the structure of the subfield processor 3d shown in FIG. The difference between the subfield processor 3d shown in FIG. 44 and the subfield processor 3c shown in FIG. 37 is that in the subfield processor 3d of FIG. 44, the discharge control signal generator 35c lights with a fixed recovery time. The discharge control signal generator 35d that outputs the control signals S1 to S6 for changing the resonance time and the sustain period according to the rate, the changed point, the lighting rate / recovery time LUT 31, and the recovery time determining unit 32 are provided. The other points are the same as those of the subfield processor 3c shown in FIG. 37, and therefore, the same portions are denoted by the same reference numerals and detailed description thereof will be omitted below.

Discharge control signal generator 35d shown in FIG.
Control signals S1 to S as the sustain driver drive control signal US so that the sustain driver 6e outputs the sustain pulse at the resonance time determined by the resonance time determining unit 37 and the sustain period determined by the sustain period determining unit 34.
6 is output.

The scan driver 5e is also controlled by the subfield processor 3d in the same manner as above.
Similarly, the waveform and cycle of the sustain pulse applied to scan electrode 12 are controlled according to the lighting rate for each subfield.

The structure of sustain driver 6e shown in FIG. 43 is similar to that of sustain driver 6d shown in FIG. The scan driver 5 shown in FIG.
The e is also configured and operates in the same manner as the sustain driver 6e.

As the configurations of the sustain driver 6e and the scan driver 5e, the configuration of the sustain driver 6b shown in FIG. 21, the configuration of the sustain driver 6b ′ shown in FIG. 27, and the configuration of the sustain driver 6b ″ shown in FIG. , The sustain driver 6 shown in FIG.
c configuration or the sustain driver 6 shown in FIG.
The configuration of d may be used. Also in this case, the subfield processor 3d of FIG. 44 fixes the recovery period and changes the resonance time and the sustain period according to the lighting rate.

Next, the control operation of the resonance time of the sustain pulse and the sustain period by the subfield processor 3d shown in FIG. 43 will be described.

FIG. 45 is a diagram showing an example of the relationship between the resonance time and the reactive power loss. The reactive power loss per pulse was measured when the recovery time was fixed to 700 ns and the resonance time was changed. Shows the data. As shown in FIG. 45, it can be seen that the shorter the resonance time, the smaller the reactive power loss per pulse.

FIG. 46 is a diagram showing an example of the relationship between the lighting rate at each resonance time and the stable discharge voltage that allows stable discharge. As shown in FIG. 46, as the resonance time becomes longer, the stable discharge voltage becomes higher even if the lighting rate is the same. For example, the resonance time is 1000n
In the case of s, when the lighting rate is in the range of 0 to 40%, stable discharge can be performed below the sustain voltage Vsus of the sustain pulse Psu, but the sustain voltage Vsus exceeds about 40%.
Then, it can be seen that stable discharge cannot be performed.

As described above, when the resonance time is short, stable discharge can be performed regardless of whether the lighting rate is large or small, but when the resonance time is long, stable light emission can be performed when the lighting rate is small. However, if the lighting rate increases, stable discharge cannot be performed.

Therefore, in the present embodiment, when the lighting rate is small, the resonance time is lengthened, and when the lighting rate is high, the resonance time is shortened. Reactive power is reduced when is large.

Specifically, using the solid line portion shown in FIG. 46, the resonance time is 1000 when the lighting rate is in the range of 0 to 20%.
ns, the resonance time is set to 900 ns in the lighting rate range of 20 to 50%, the resonance time is set to 800 ns in the lighting rate range of 50 to 80%, and the lighting rate is set to 80 to 1
In the range of 00%, the resonance time is set to 700 ns.

As a result, stable discharge can be performed at a voltage sufficiently lower than the sustain voltage Vsus for all lighting rates, the resonance time is shortened as the lighting rate increases, and the reactive power increases as the lighting rate increases. Has been reduced.

When the lighting rate is 0 to 20%, the subfield processor 3 generates the control signals S1 to S6 so that the sustain period is 8 μs, and the lighting rate is 20 to 50%.
In the case of, the control signal S1 is set so that the sustain period becomes 7 μs.
~ S6 is generated and the lighting rate is 80 to 100%,
The control signals S1 to S6 are generated so that the maintenance cycle is 6 μs. Therefore, when the lighting rate is small, the period of the drive pulse can be lengthened to sufficiently secure the resonance time.

As described above, in the present embodiment, the lighting rate for each subfield is detected, and as the detected lighting rate for each subfield becomes smaller, the resonance time and the sustain cycle of the sustain pulse are made longer. .

Therefore, the stable discharge voltage can be made constant by lengthening the resonance time when the lighting rate is small and shortening the resonance time when the lighting rate is large.
In particular, when the lighting rate is high, the resonance time can be shortened to enable stable discharge, and the recovery efficiency can be improved to reduce the reactive power. Further, since the recovery time is fixed, the clamp period to the power supply voltage can be made constant, and the stability of discharge can be improved. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

As the structure for changing the resonance time according to the lighting rate, the same structure as the inductance control circuit 9 and the sustain driver 6a shown in FIGS. 11 to 13 may be used.

Further, in the present embodiment, both the resonance time and the sustain period are changed according to the lighting rate, but only the resonance time may be changed.

Furthermore, in each of the above-described embodiments, the positive pulse that discharges at the rising edge of the sustain pulse has been described. The same can be applied, and in this case, the recovery time and the like are set so that stable discharge can be always performed and the reactive power can be reduced according to the lighting rate at the time of falling when discharging is performed.

[0250]

According to the present invention, since the recovery time for driving the drive pulse and the resonance time of the LC resonance are changed according to the lighting rate, the optimum recovery time and the resonance of the LC resonance according to the lighting rate are changed. The drive pulse can be driven in time. Therefore, when the lighting rate is high, it is possible to shorten the collection time to enable stable discharge, and to shorten the resonance time and reduce the reactive power.
Further, when the lighting rate is small, the recovery time can be lengthened to reduce the reactive power. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

Since the resonance time of LC resonance is changed according to the lighting rate, the drive pulse can be driven with the optimum recovery time and resonance time of LC resonance according to the lighting rate. Therefore, when the lighting rate is small, the inductance value of the inductance element is increased to lengthen the resonance time, and when the lighting rate is large, the inductance value of the inductance element is decreased to shorten the resonance time, thereby stabilizing the stable discharge voltage. Can be constant. In particular,
When the lighting rate is high, the resonance time can be shortened to enable stable discharge, and the recovery efficiency can be improved to reduce the reactive power. In addition, the stability of the discharge can be improved by keeping the collection time constant. As a result, stable discharge can be performed even when the lighting rate changes, and reactive power can be reduced to reduce power consumption.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a plasma display device according to a first embodiment of the present invention.

FIG. 2 is a timing diagram showing an example of drive voltages for scan electrodes and sustain electrodes in the PDP of FIG.

3 is a circuit diagram showing a configuration of a sustain driver shown in FIG.

FIG. 4 is a block diagram showing a configuration of a subfield processor shown in FIG.

5 is a timing diagram showing an example of an operation of a sustain period of the sustain driver shown in FIG.

FIG. 6 is a waveform diagram for explaining a collection time and a resonance time.

FIG. 7 is a waveform diagram for explaining variable control of recovery time.

FIG. 8 is a waveform diagram for explaining variable control of resonance time.

FIG. 9 is a diagram showing an example of the relationship between the recovery time and the reactive power loss.

FIG. 10 is a diagram showing an example of a relationship between a lighting rate at each recovery time and a stable discharge voltage capable of performing stable discharge.

FIG. 11 is a block diagram showing a configuration of a plasma display device according to a second embodiment of the present invention.

12 is a block diagram showing the configuration of the inductance control circuit shown in FIG.

FIG. 13 is a circuit diagram showing the configuration of the sustain driver shown in FIG.

14 is a circuit diagram showing a configuration of an example of a variable inductance section shown in FIG.

15 is a schematic diagram showing an ON / OFF state of each transistor of the variable inductance part shown in FIG. 14 and a drive waveform at the rising edge of a sustain pulse corresponding to each state.

FIG. 16 is a diagram showing an example of the relationship between resonance time and reactive power loss.

FIG. 17 is a circuit diagram showing the configuration of another example of the variable inductance section shown in FIG.

FIG. 18 is a schematic diagram showing ON / OFF states of transistors in the variable inductance section shown in FIG. 17 and drive waveforms at the rising edge of a sustain pulse corresponding to each state.

FIG. 19 is a block diagram showing a configuration of a plasma display device according to a third embodiment of the present invention.

20 is a block diagram showing the configuration of the subfield processor shown in FIG.

FIG. 21 is a circuit diagram showing a configuration of the sustain driver shown in FIG.

FIG. 22 is a diagram showing an example of a relationship between a resonance time and a delay time by two recovery coils.

23 is a first timing chart showing an operation during a sustain period of the sustain driver shown in FIG.

24 is a second timing chart showing an operation during a sustain period of the sustain driver shown in FIG.

FIG. 25 is a third timing chart showing the operation during the sustain period of the sustain driver shown in FIG.

FIG. 26 is a fourth timing chart showing an operation in a sustain period of the sustain driver shown in FIG.

FIG. 27 is a circuit diagram showing a configuration of another example of the sustain driver shown in FIG.

28 is a circuit diagram showing a configuration of still another example of the sustain driver shown in FIG.

FIG. 29 is a block diagram showing a configuration of a plasma display device according to a fourth embodiment of the present invention.

FIG. 30 is a block diagram showing the configuration of the subfield processor shown in FIG. 29.

FIG. 31 is a circuit diagram showing the configuration of the sustain driver shown in FIG. 29.

32 is a first timing chart showing an operation in a sustain period of the sustain driver shown in FIG. 31. FIG.

FIG. 33 is a second timing chart showing the operation of the sustain driver shown in FIG. 31 during the sustain period.

34 is a third timing chart showing the operation during the sustain period of the sustain driver shown in FIG. 31. FIG.

FIG. 35 is a fourth timing chart showing an operation in a sustain period of the sustain driver shown in FIG.

FIG. 36 is a block diagram showing a configuration of a plasma display device according to a fifth embodiment of the present invention.

FIG. 37 is a block diagram showing the configuration of the subfield processor shown in FIG. 36.

38 is a circuit diagram showing the configuration of the sustain driver shown in FIG.

39 is a first timing chart showing an operation in a sustain period of the sustain driver shown in FIG. 38. FIG.

40 is a second timing chart showing an operation in a sustain period of the sustain driver shown in FIG. 38. FIG.

41 is a third timing chart showing an operation in a sustain period of the sustain driver shown in FIG. 38. FIG.

42 is a fourth timing chart showing an operation in a sustain period of the sustain driver shown in FIG. 38. FIG.

FIG. 43 is a block diagram showing a configuration of a plasma display device according to a sixth embodiment of the present invention.

44 is a block diagram showing the configuration of the sub-field processor shown in FIG. 43.

FIG. 45 is a diagram showing an example of the relationship between resonance time and reactive power loss.

FIG. 46 is a diagram showing an example of a relationship between a lighting rate at each resonance time and a stable discharge voltage capable of performing stable discharge.

FIG. 47 is a circuit diagram showing a configuration of a sustain driver of a conventional plasma display device.

48 is a timing chart showing an operation during a sustain period of the sustain driver shown in FIG. 47.

[Explanation of symbols]

1 A / D converter 2 Video signal-subfield correlator 3, 3a-3d Subfield processor 4 Data driver 5, 5a-5e Scan driver 6, 6a-6e, 6b ', 6b "Sustain driver 7 PDP 8 Sub Field lighting rate measuring instrument 9 Inductance control circuit 11 Address electrode 12 Scan electrode 13 Sustain electrode 14 Discharge cell 31 Lighting rate / collection time LUT 32 Collection time determination unit 33 Lighting rate / maintenance cycle LUT 34 Maintenance cycle determination sections 35, 35a to 35c Discharge control signal generator 36 Lighting rate / resonance time LUT 37 Resonance time determining section 91 Lighting rate / inductance LUT 92 Inductance determining section Cr Recovery capacitors D1 to D6 Diodes L, L1 to L3, LA to LD, LA 'to LD' Recovery Coil VL variable inductance section Q1 Q10, QA-QD, QA'-QD 'FET

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification symbol FI G09G 3/28 K (72) Inventor Junpei Hashiguchi 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP 2000-172223 (JP, A) JP 2000-181405 (JP, A) JP 2000-206919 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G09G 3/28 G09G 3/20

Claims (21)

(57) [Claims] 1. A display device for displaying an image by selectively discharging a plurality of discharge cells including a capacitive load , wherein the charges accumulated in the discharge cells are collected and the collected charges are used. comprising a recovery means for driving the driving pulse, and a detecting means that detects a lighting rate of discharge cells to be lit at the same time during the sustain period among the plurality of discharge cells, wherein the collecting means is connected to one end of the capacitive load at least an inductance means having one inductance element, and a resonance driving means for driving the drive pulse by LC resonance between the inductance element and the capacitive load, said by the recovery means in accordance with the lighting rate being Further comprising control means for controlling the recovery means so as to change the recovery time for driving the drive pulse and the resonance time of the LC resonance. The display device according to symptoms. 2. In order to perform gradation display by dividing one field into a plurality of subfields and discharging discharge cells selected for each subfield, the image data of one field is converted into image data of each subfield. Further comprising a conversion means for converting, the detection means includes a subfield lighting rate detection means for detecting the lighting rate for each subfield, the control means for each subfield detected by the subfield lighting rate detection means 2. The display device according to claim 1, wherein the recovery means is controlled so as to change the recovery time and the resonance time of the LC resonance in accordance with the lighting rate of. 3. The control means controls the collecting means such that the collecting time becomes longer as the lighting rate detected by the detecting means becomes smaller.
The display device according to any one of 1 to 3. 4. The control means controls the recovery means such that the smaller the lighting rate detected by the detection means, the longer the resonance time of the LC resonance. The display device according to any one of claims. 5. The control means changes the discharge recovery time during which the discharge cells discharge during the recovery time according to the lighting rate detected by the detection means, and the discharge cells during the recovery time discharge. 5. The display device according to claim 1, wherein the recovery means is controlled so as not to change the non-discharge recovery time. 6. The non-discharge, wherein the control means does not discharge the discharge cells during the recovery time from the discharge recovery time during which the discharge cells discharge during the recovery time according to the lighting rate detected by the detection means. 6. The recovery means is controlled so that the recovery time becomes long.
The display device according to any one of 1. 7. A display device for displaying an image by selectively discharging a plurality of discharge cells including a capacitive load , wherein charges accumulated in the discharge cells are collected and the collected charges are used. comprising a recovery means for driving the driving pulse, and a detecting means that detects a lighting rate of discharge cells to be lit at the same time during the sustain period among the plurality of discharge cells, wherein the collecting means is connected to one end of the capacitive load A resonance drive means for driving the drive pulse by LC resonance of the capacitive load and the inductance element, and resonance of the LC resonance according to the lighting rate. The display device further comprising control means for controlling the collecting means so as to change the time. 8. The inductance means includes variable inductance means capable of changing the inductance value, and the control means changes the inductance value of the variable inductance means according to the lighting rate detected by the detection means. The display device according to claim 1 or 7, wherein 9. The variable inductance means includes a plurality of inductance elements connected in parallel, and a selection means controlled by the control means to select a predetermined inductance element from the plurality of inductance elements. The display device according to claim 8, wherein the display device is a display device. 10. The variable inductance means includes a plurality of inductance elements connected in series, and selection means controlled by the control means to select a predetermined inductance element from the plurality of inductance elements. The display device according to claim 8, wherein the display device is a display device. 11. The collecting means further includes a capacitive element for collecting charges from the capacitive load, the variable inductance means includes a first inductance element, and the resonance driving means includes the capacitance. A first switch means connected in series with the first inductance element between the capacitive load and the capacitive element, the variable inductance means being connected in series to both ends of the first inductance element. 9. The display device according to claim 8, further comprising a second inductance element and second switch means, wherein the control means controls ON / OFF states of the first and second switch means. . 12. The collecting means further includes a capacitive element for collecting charges from the capacitive load, the variable inductance means includes a first inductance element, and the resonance driving means includes the capacitance. A first switch means connected in series with the first inductance element between the capacitive load and the capacitive element, wherein the variable inductance means is provided between the capacitive load and the capacitive element. 9. A second inductance element and a second switch means connected in series are further included, and the control means controls the on / off state of the first and second switch means. Display device described. 13. The resonance drive means further includes a third inductance element and a third switch means connected in series between the capacitive load and the capacitive element, and the control means comprises: At least one of the first and second switch means is turned on during a discharge recovery time during which the discharge cells discharge during the recovery time, and the third during the non-discharge recovery time during which the discharge cells do not discharge during the recovery time. 13. The display device according to claim 12, wherein the switch means is turned on. 14. The resonance drive means further includes third switch means connected in parallel with the first switch means, and the variable inductance means is connected in parallel with the second switch means. 13. The display device according to claim 12, further comprising fourth switch means, wherein the control means controls ON / OFF states of the first to fourth switch means. 15. The control means controls ON / OFF states of the first and second switch means so that the second switch means is turned on after the first switch means is turned on. The display device according to claim 11, wherein the display device is a display device. 16. The image data of one field is converted into the image data of each subfield in order to divide one field into a plurality of subfields and discharge a selected discharge cell for each subfield to perform gradation display. Further comprising a conversion means for converting, the detection means includes a subfield lighting rate detection means for detecting the lighting rate for each subfield, the control means for each subfield detected by the subfield lighting rate detection means The display device according to any one of claims 11 to 15, wherein a period during which the second switch means is turned on is controlled according to a lighting rate of. 17. The first and second switch means are any one of a field-effect transistor and a diode connected in series, two field-effect transistors connected in series, and an insulated gate bipolar transistor. It is one or more, The claim 11 characterized by the above-mentioned.
16. The display device according to any one of 16. 18. The control means controls the recovery means such that the resonance time of the LC resonance becomes longer as the lighting rate detected by the detection means is smaller. The display device according to any one of claims. 19. The display device according to claim 1, wherein the control unit changes the cycle of the drive pulse according to the lighting rate detected by the detection unit. 20. A method of driving a display device for displaying an image by selectively discharging a plurality of discharge cells including a capacitive load , wherein the display device has at least one end connected to the capacitive load. A step of driving the drive pulse by LC resonance between the capacitive load and the inductance element, the charge being stored in the discharge cell, and including the inductance means having one inductance element; A step of detecting a lighting rate of discharge cells of the plurality of discharge cells that are simultaneously lit during a sustain period, and a recovery time of driving the drive pulse in the recovery step according to the lighting rate and the LC resonance And a step of changing the resonance time. 21. A driving method of a display device for displaying an image by selectively discharging a plurality of discharge cells including a capacitive load , wherein the display device has at least one end connected to the capacitive load. A step of driving the drive pulse by LC resonance between the capacitive load and the inductance element, the charge being stored in the discharge cell, and including the inductance means having one inductance element; A step of detecting a lighting rate of discharge cells of the plurality of discharge cells which are simultaneously turned on during a sustain period, and a step of changing a resonance time of the LC resonance according to the lighting rate. Driving method of display device.