JP3242097B1 - Display device and display method thereof - Google Patents

Abstract

The present invention provides a display device and a driving method thereof, which can stably and repeatedly discharge even when a lighting rate changes, and can improve luminous efficiency with respect to input power to reduce power consumption. . SOLUTION: A lighting rate of discharge cells 14 simultaneously lit by a sub-field lighting rate measuring device 8 is detected, and a scan driver 5 and a sustain driver 6 are controlled by a sub-field processing device 3, and according to the detected lighting rate. After changing the timing at which the sustain pulse rises again to generate the first discharge, the second discharge is generated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for displaying an image by selectively discharging a plurality of discharge cells, and a display device therefor.
It relates to a display method.

[0002]

2. Description of the Related Art PDP (Plasma Display Panel)
Is advantageous in that it can be made thinner and have a larger screen. In this plasma display device, an image is displayed by utilizing light emission at the time of discharge of a discharge cell constituting a pixel.

FIG. 45 is a view for explaining a method of driving a discharge cell in an AC type PDP. As shown in FIG. 45, in an AC-type PDP discharge cell, the surfaces of opposing electrodes 301 and 302 are made of dielectric layers 303 and 3 respectively.
04.

[0005] As shown in FIG.
When a voltage lower than the discharge start voltage is applied between the first and second electrodes 302, no discharge occurs. As shown in FIG. 45B, when a pulse-like voltage (writing pulse) higher than the discharge start voltage is applied between the electrodes 301 and 302, a discharge occurs. When the discharge occurs, the negative charge proceeds toward the electrode 301 and is accumulated on the wall surface of the dielectric layer 303, and the positive charge proceeds toward the electrode 302 and is accumulated on the wall surface of the dielectric layer 304. The charges accumulated on the wall surfaces of the dielectric layers 303 and 304 are called wall charges. The voltage induced by the wall charges is called a wall voltage.

[0005] As shown in FIG. 45 (c), the dielectric layer 3
The negative wall charges are accumulated on the wall surface of
Positive wall charges are accumulated on the wall surface. In this case, since the polarity of the wall voltage is opposite to the polarity of the externally applied voltage, the effective voltage in the discharge space decreases as the discharge proceeds,
The discharge stops automatically.

As shown in FIG. 45D, when the polarity of the externally applied voltage is reversed, the polarity of the wall voltage becomes the same direction as the polarity of the externally applied voltage, so that the effective voltage in the discharge space increases. . If the effective voltage at this time exceeds the discharge starting voltage, a discharge of the opposite polarity occurs. As a result, the positive charge advances toward the electrode 301, neutralizes the negative wall charge already accumulated in the dielectric layer 303, and the negative charge
2 to neutralize the positive wall charges already stored in the dielectric layer 304.

As shown in FIG. 45E, positive and negative wall charges are accumulated on the wall surfaces of the dielectric layers 303 and 304, respectively. In this case, since the polarity of the wall voltage is opposite to the polarity of the externally applied voltage, the effective voltage in the discharge space decreases as the discharge proceeds, and the discharge stops.

Further, as shown in FIG. 45 (f), when the polarity of the externally applied voltage is reversed, a discharge of the opposite polarity is generated, the negative charge proceeds in the direction of the electrode 301, and the positive charge becomes the electrode 3
It proceeds in the direction of 02 and returns to the state of FIG.

After the discharge is started once by applying a high write pulse, the polarity of the externally applied voltage (sustain pulse) lower than the write pulse is reversed by the action of the wall charge to cause the discharge. Can be maintained. Starting discharge by applying a write pulse is called address discharge, and sustaining discharge by applying alternately inverted sustain pulses is called sustain discharge.

Next, a description will be given of a sustain driver of a conventional plasma display device for driving a discharge cell by the above driving method. FIG. 46 is a circuit diagram showing a configuration of a sustain driver of a conventional plasma display device.

As shown in FIG. 46, the sustain driver 600 includes a recovery capacitor C11, a recovery coil L11,
Switches SW11, SW12, SW21, SW22 and diodes D11, D12 are included.

The switch SW11 is connected between the power supply terminal V11 and the node N11, and the switch SW12 is connected between the node N11 and the ground terminal. The voltage Vsus is applied to the power supply terminal V11. Node N1
1 is connected to, for example, 480 sustain electrodes, and FIG. 46 shows a panel capacitance Cp corresponding to the total capacitance between the plurality of sustain electrodes and the ground terminal.

The recovery capacitor C11 is connected between the node N13 and a ground terminal. Switch SW21 and diode D are connected between nodes N13 and N12.
11 are connected in series, and a diode D12 and a switch SW22 are connected in series between the node N12 and the node N13. The recovery coil L11 is connected to the node N12.
And the node N11.

FIG. 47 shows the sustain driver 6 of FIG.
FIG. 14 is a timing chart showing an operation during a sustain period of 00. FIG.
7 includes the voltage at the node N11 and the switch S in FIG.
The operations of W21, SW11, SW22, and SW12 are shown.

First, in the period Ta, the switch SW2
1 turns on and the switch SW12 turns off. At this time,
Switches SW11 and SW22 are off. Thereby, the LC by the recovery coil L11 and the panel capacity Cp
Due to the resonance, the voltage of the node N11 gradually rises.
Next, in a period Tb, the switch SW21 is turned off,
The switch SW11 turns on. Thereby, the node N1
1, the voltage of the node N11 is fixed at Vsus during the period Tc, and one sustain discharge is generated by the discharge current supplied from the power supply terminal V11.

Next, in a period Td, the switch SW11 turns off and the switch SW22 turns on. As a result, the voltage of the node N11 gradually drops due to LC resonance caused by the recovery coil L11 and the panel capacitance Cp. Thereafter, in the period Te, the switch SW22 is turned off and the switch SW12 is turned on. Thereby, the node N11
Voltage drops sharply and is fixed at the ground potential.

By repeating the above operation in the sustain period, a periodic sustain pulse Psu is applied to the plurality of sustain electrodes, and the discharge cells are discharged when the sustain pulse Psu rises, thereby performing sustain discharge.

[0018]

As described above, in the conventional plasma display device, the discharge cell is discharged only once at the rise of the sustain pulse using a sustain driver or the like, and the discharge cell is discharged until the next sustain pulse is applied. Discharge is stopped. In this one discharge, the discharge current is supplied from the power supply, and the current necessary for the discharge is sufficiently supplied.
Since the ultraviolet light is saturated with respect to the discharge current and the visible light intensity is further saturated with respect to the ultraviolet light, the luminance hardly increases even when the discharge current is increased.

As described above, in the conventional plasma display device, since the light is emitted by supplying the discharge current from the power supply and discharging once, the luminous efficiency is reduced with respect to the input power and the power consumption is increased. Become. In general, the power consumption of a plasma display device is higher than other display devices, and it is desired to reduce the power consumption.

When the discharge cells are driven at such a low current level that does not cause saturation of luminance, the discharge itself becomes unstable, and the discharge cannot be repeatedly and stably performed. Further, in the PDP, in order to display various images, the number of discharge cells that are turned on at the same time changes, and the required discharge current also changes. Therefore, when the discharge cells are driven at a low current level, the discharge becomes more unstable.

An object of the present invention is to provide a display device and a display method capable of stably repeating a discharge even if the lighting rate changes, improving the luminous efficiency with respect to the applied power and reducing the power consumption. It is to provide.

[0022]

Means for Solving the Problems (1) First Invention A display device according to a first invention is a display device for displaying an image by selectively discharging a plurality of discharge cells. A display panel including cells, a driving unit for applying a driving pulse to a selected discharge cell in the display panel to generate a first discharge and then generating a second discharge, and a plurality of discharge cells simultaneously. Detecting means for detecting a lighting rate of a discharge cell to be lit; and generating a second discharge after generating a first discharge in accordance with the lighting rate detected by the detecting means.
Control means for controlling the driving means so that the timing of the driving means changes .

In the display device according to the present invention, the lighting rate of the discharge cells to be lit simultaneously among the plurality of discharge cells is detected, and the driving pulse changed according to the detected lighting rate is selected in the display panel. The second discharge is generated after the first discharge is generated by applying the voltage to the discharged discharge cell. Therefore, it is possible to apply an optimal drive pulse according to the lighting rate, so that the first and second discharges can be generated to improve the luminous efficiency, and the first and second discharges can be repeated and stabilized. Can be generated. As a result, the discharge can be stably repeated even if the lighting rate changes, and the luminous efficiency with respect to the input power can be improved to reduce the power consumption.

(2) Second Invention In the display device according to the second invention, in the configuration of the display device according to the first invention, the control means is detected by the detection means.
After the first discharge is generated, the larger the
Driving to delay the timing to generate discharge 2
It controls the means.

In this case, the higher the lighting rate, the higher the first discharge.
The timing for generating the second discharge after generating
Because the lighting rate is slow, the first
And the second discharge are sufficiently separated to emit light by the first discharge
The effect of improving efficiency can be sufficiently obtained. Also lit
After the first discharge is generated according to the rate, the second discharge is generated.
If you want to change the timing of
Changing the light emitting state without giving a strange feeling
Can be.

(3) Third invention The display device according to the third invention is a display device according to the first invention.
In the configuration of the device, the control means detects the detection by the detection means.
After generating the first discharge in accordance with the increased lighting rate
The timing of generating the second discharge is delayed, and
The first discharge is performed when the lamp rate increases and exceeds a predetermined value.
The timing at which the second discharge is generated after the
That is, the driving means is controlled in such a manner as to reduce the number of times.

In this case, after the first discharge is generated,
Power consumption is further reduced at the timing of the discharge of 2
Power consumption.
The force can be further reduced.

(4) Fourth Invention A display device according to a fourth invention is a display device according to any one of the first to third aspects.
In the configuration of the display device according to the present invention, the control unit includes a first control unit.
Generating a second discharge after generating a second discharge
Drive means so that the luminance is approximately equal before and after the change in
Is controlled.

In this case, after the first discharge is generated,
The luminance before and after the change in the timing of generating the discharge of No. 2
Since it is controlled to be almost equal, the first discharge
In the timing of generating the second discharge after the generation
Brightness discontinuity can be corrected
After generating the first discharge without giving a sense of incongruity
It is possible to change the timing of generating the second discharge.
it can.

(5) Fifth Invention The display device according to the fifth invention is a display device according to the first invention.
In the configuration, the driving means increases the voltage of the driving pulse.
First driving means for generating a first discharge by applying
The first discharge is performed by increasing the voltage of the driving pulse again.
Driver that generates a second discharge after generating the
And control means for controlling the point detected by the detection means.
After generating the first discharge according to the lighting ratio, the second discharge is performed.
Second driving means so that the generation timing is changed
Is controlled.

In this case, after the first discharge is generated,
2 discharges, the first discharge
The second discharge can be performed in a state where the space is easily discharged,
The input power at the time of the second discharge can also be reduced. Ma
Also, by increasing the voltage of the driving pulse again, the second
Can supply the discharge current necessary for discharging
Therefore, wall charges can be reliably formed for the next discharge.
And the subsequent first and second discharges are repeatedly generated stably
Can be done.

(6) Sixth Invention The display device according to the sixth invention is a display device according to the fifth invention.
Detection in the configuration of the location, the control means, the detecting means
After the first discharge is generated, the larger the
The second is to delay the timing of generating the second discharge.
Is controlled.

In this case, the higher the lighting rate, the higher the first discharge.
The timing for generating the second discharge after generating
Because the lighting rate is slow, the first
And the second discharge are sufficiently separated to emit light by the first discharge
The effect of improving efficiency can be sufficiently obtained. Also lit
After the first discharge is generated according to the rate, the second discharge is generated.
If you want to change the timing of
Changing the light emitting state without giving a strange feeling
Can be.

(7) Seventh Invention The display device according to the seventh invention is a display device according to the fifth invention.
In the configuration of the device, the control means detects the detection by the detection means.
After generating the first discharge in accordance with the increased lighting rate
The timing of generating the second discharge is delayed, and
The first discharge is performed when the lamp rate increases and exceeds a predetermined value.
The timing at which the second discharge is generated after the
That is, the second driving means is controlled in such a manner as to make the second driving means.

In this case, after the first discharge is generated,
Power consumption is further reduced at the timing of the discharge of 2
Power consumption.
The force can be further reduced.

(8) Eighth Invention The display device according to the eighth invention is directed to any one of the fifth to seventh inventions
In the configuration of the display device according to the present invention, the control unit includes a first control unit.
Generating a second discharge after generating a second discharge
The second drive so that the luminance is substantially equal before and after the change in
It controls the moving means.

In this case, after the first discharge is generated,
The luminance before and after the change in the timing of generating the discharge of No. 2
Since it is controlled to be almost equal, the first discharge
In the timing of generating the second discharge after the generation
Brightness discontinuity can be corrected
After generating the first discharge without giving a sense of incongruity
It is possible to change the timing of generating the second discharge.
it can.

(9) Ninth Invention The display device according to the ninth invention is directed to any one of the fifth to eighth inventions
In the configuration of the display device according to the present invention, the first driving means
Is provided outside the display panel as a drive pulse current supply
Including the first capacitive element.

In this case, the current supply capability is lower than that of the power supply.
The current necessary for the first discharge is supplied by the capacitive element.
As a result, unnecessary current is not supplied
There is no power supply. Also, the first capacitive element is
It is provided separately from the display panel outside the display panel
Is large enough for the capacity of the discharge cells of the display panel.
The discharge current required for the first discharge.
As well as the configuration of the capacitive element, etc.
It can be easily changed and is the best among various driving methods
A simple driving method can be easily realized.

(10) Tenth invention A display device according to a tenth invention is a display device according to the ninth invention.
In the configuration of the device, the first capacitive element is connected to the discharge cell.
This is to collect the accumulated electric charge.

In this case, the discharge capacitance is generated by the first capacitive element.
Since the charge stored in the cell is recovered, the
Loads can be used efficiently, reducing power consumption
Can be

(11) Eleventh Invention The display device according to the eleventh invention is characterized in that any one of the first to tenth inventions
In the configuration of the display device according to the invention, the second discharge
When the first discharge starts and the voltage of the driving pulse
It occurs after the decrease.

(12) Twelfth Invention A display method for a display device according to a twelfth invention is directed to a display method for a display device , comprising
Display device table that displays images by selectively discharging cells
Display method, wherein a selected discharge cell in a display panel is
After applying the driving pulse to generate the first discharge, the second
Of the discharge cells and light up
The lighting rate of the discharge cell to be detected
After generating the first discharge according to the lighting ratio, the second discharge is performed.
The timing at which it is generated changes.

In the display method of the display device according to the present invention,
Is the discharge cell to be turned on at the same time among the plurality of discharge cells.
Lighting rate was detected and changed according to the detected lighting rate
Apply drive pulse to selected discharge cells in display panel
To generate a first discharge and then generate a second discharge
ing. Therefore, the optimal drive pulse according to the lighting rate
Can be applied, so that the first and second discharges
It can improve the luminous efficiency by generating
To stably generate the first and second discharges repeatedly
be able to. As a result, even if the lighting rate changes,
Power can be repeated, and
Power consumption can be reduced by improving luminous efficiency.
Wear.

(13) Thirteenth Invention A display method for a display device according to a thirteenth invention is directed to a twelfth invention.
In the display method for a display device according to
After the first discharge is generated, the second discharge
Is to delay the timing of generating
You.

In this case, the higher the lighting rate, the higher the first discharge.
The timing for generating the second discharge after generating
Because the lighting rate is slow, the first
And the second discharge are sufficiently separated to emit light by the first discharge
The effect of improving efficiency can be sufficiently obtained. Also lit
Calling the second discharge after the first discharge was generated in response to the rate
If you want to change the timing of
Changing the light emitting state without giving a strange feeling
Can be.

(14) Fourteenth Invention A display method for a display device according to a fourteenth invention is directed to a twelfth invention.
In the display method for a display device according to
After the first discharge is generated according to the increase in the rate, the second discharge is performed.
The timing to generate electricity is delayed, further increasing the lighting rate
To generate a first discharge when the voltage exceeds a predetermined value.
The timing to generate the second discharge after
It is.

In this case, after the first discharge is generated,
Power consumption is further reduced at the timing of the discharge of 2
Power consumption.
The force can be further reduced.

(15) Fifteenth Invention The display method of the display device according to the fifteenth invention is directed to a twelfth to a twelfth invention.
The display method of the display device according to any one of the fourteenth inventions
Then, after the first discharge is generated, the second discharge is generated.
The luminance before and after the timing change
Is what you do.

In this case, after the first discharge is generated,
The luminance before and after the change in the timing of generating the discharge of No. 2
Since it is controlled to be almost equal, the first discharge
In the timing of generating the second discharge after the generation
Brightness discontinuity can be corrected
After generating the first discharge without giving a sense of incongruity
It is possible to change the timing of generating the second discharge.
it can.

[0051]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an AC plasma display device will be described as an example of a display device according to the present invention. FIG. 1 is a block diagram showing the configuration of the plasma display device according to the first embodiment of the present invention.

The plasma display device shown in FIG.
D converter (analog-to-digital converter) 1, video signal-subfield associator 2, subfield processor 3, data driver 4, scan driver 5, sustain driver 6, PDP (plasma display panel) 7, and subfield lighting A rate measuring device 8 is provided.

The video signal VD is input to the A / D converter 1. The A / D converter 1 converts the analog video signal VD into digital image data, and outputs the digital image data to the video signal-subfield correlator 2. The video signal-subfield associator 2 creates image data SP of each subfield from image data of one field to divide one field into a plurality of subfields for display, and generates a subfield processor 3 and a subfield processor 3. Output to the field lighting rate measuring device 8.

The subfield lighting rate measuring device 8 detects the lighting rate of the discharge cells 14 simultaneously driven on the PDP 7 from the image data SP of each subfield, and uses the result as a subfield lighting rate signal SL. Output to the processor 3.

Here, the lighting rate is defined as the minimum unit of a discharge space that can be controlled to be in a lighting / non-lighting state independently as a discharge cell. (Lighting rate) = (lighting rate of discharge cells to be lit simultaneously) Number) / (total number of discharge cells of PDP).

More specifically, the subfield lighting rate measuring device 8 is decomposed into 1-bit information indicating the lighting / non-lighting of the discharge cells for each subfield generated by the video signal-subfield associating device 2. The lighting rates of all the subfields are separately calculated using the video signal information, and the result is output to the subfield processor 3 as a subfield lighting rate signal SL.

For example, the subfield lighting rate measuring device 8
Has a counter inside, and increases the value of the counter by one when the video signal information decomposed into 1-bit information indicating lighting / non-lighting indicates lighting, thereby reducing the total number of lit discharge cells. Calculated for each field and this is P
The lighting rate is obtained by dividing by the total number of discharge cells of DP7.

The subfield processor 3 generates a data driver drive control signal DS, a scan driver drive control signal CS, and a sustain driver drive control signal US from the image data SP for each subfield and the subfield lighting rate signal SL, etc. Output to the data driver 4, scan driver 5, and sustain driver 6, respectively.

The PDP 7 includes a plurality of address electrodes (data electrodes) 11, a plurality of scan electrodes (scan electrodes) 12, and a plurality of sustain electrodes (sustain electrodes) 13. The plurality of address electrodes 11 are arranged in the vertical direction of the screen, and include a plurality of scan electrodes 12 and a plurality of sustain electrodes 13.
Are arranged in the horizontal direction of the screen. The plurality of sustain electrodes 13 are commonly connected. Address electrode 11, scan electrode 12, and sustain electrode 13
Are formed at the respective intersections of the discharge cells 1.
4 constitutes a pixel on the screen.

The data driver 4 is connected to a plurality of address electrodes 11 of the PDP 7. Scan driver 5
Has a drive circuit provided for each scan electrode 12 therein, and each drive circuit is connected to the corresponding scan electrode 12 of the PDP 7. Sustain driver 6 uses P
It is connected to a plurality of sustain electrodes 13 of DP7.

According to the data driver drive control signal DS, the data driver 4 applies a write pulse to the corresponding address electrode 11 of the PDP 7 in the write period according to the image data SP. The scan driver 5 sequentially applies the write pulse to the plurality of scan electrodes 12 of the PDP 7 while shifting the shift pulse in the vertical scanning direction in the write period according to the scan driver drive control signal CS. Thereby, an address discharge is performed in the corresponding discharge cell 14.

In accordance with the scan driver drive control signal CS, the scan driver 5 applies a periodic sustain pulse to the plurality of scan electrodes 12 of the PDP 7 during the sustain period.
Is applied. On the other hand, the sustain driver 6 simultaneously applies a sustain pulse 180 ° out of phase with respect to the sustain pulse of the scan electrode 12 to the plurality of sustain electrodes 13 of the PDP 7 during the sustain period according to the sustain driver drive control signal US. As a result, sustain discharge is performed in the corresponding discharge cell 14.

In the above-mentioned sustain period, the scan driver 5 and the sustain driver 6 maintain the scan driver drive control signal CS and the sustain driver drive control signal US in accordance with the subfield lighting rate signal SL, as described later. Change the pulse waveform.

In the plasma display device shown in FIG. 1, ADS (Address Displa
y-Period Separation (address / display period separation) method is used. FIG. 2 is a diagram for explaining the ADS method applied to the plasma display device shown in FIG. Note that FIG. 2 shows an example of a negative polarity pulse which performs discharge at the time of the falling of the drive pulse. However, the basic operation is the same as that of a positive pulse which performs discharge at the time of the rise.

In the ADS system, one field (1/60)
(Seconds = 16.67 ms) is temporally divided into a plurality of subfields. For example, when performing 256 gradation display with 8 bits, one field is divided into eight sub-fields SF1.
~ SF8. Further, each subfield SF1 to SF1
SF8 includes a setup period P1, a write period P2,
It is separated into a sustain period P3, a setup process of each subfield is performed in a setup period P1, an address discharge for selecting a discharge cell 14 to be turned on in a write period P2 is performed, and a display for display is performed in the sustain period P3. Sustain discharge is performed.

In the setup period P1, a single pulse is applied to the sustain electrode 13, and the scan electrode 12
(In FIG. 2, n is displayed as the number of scan electrodes, but actually, for example, 480 scan electrodes are used.) Each single pulse is also applied. Thereby, a preliminary discharge is performed.

In the writing period P 2, the scan electrodes 12 are sequentially scanned, and a predetermined writing process is performed only on the discharge cells 14 that have received a pulse from the address electrode 11. Thus, an address discharge is performed.

In the sustain period P3, a sustain pulse corresponding to the value weighted for each of the subfields SF1 to SF8 is output to the sustain electrode 13 and the scan electrode 12. For example, in the subfield SF1, the sustain pulse is applied once to the sustain electrode 13, the sustain pulse is applied once to the scan electrode 12, and the discharge cell 14 selected in the writing period P2 performs the sustain discharge twice.
In the subfield SF2, the sustain electrode 13
, A sustain pulse is applied twice to the scan electrode 12, and the selected discharge cell 14 performs the sustain discharge four times in the writing period P2.

As described above, each of the subfields SF1 to SF1
In SF8, the sustain electrode 13 and the scan electrode 1
Once every 2 times, 2 times, 4 times, 8 times, 16 times, 32 times, 64 times
The sustaining pulse is applied 128 times, and the discharge cell 14 emits light with brightness (luminance) corresponding to the number of pulses. That is,
The sustain period P3 is a period in which the discharge cells 14 selected in the writing period P2 are discharged a number of times corresponding to the weighting amount of the brightness.

As described above, the subfields SF1 to SF
8, 1, 2, 4, 8, 16, 32, 6
4, 128 are weighted, and by combining these subfields SF1 to SF8,
The brightness level can be adjusted in 256 steps from 0 to 255. Note that the number of subfield divisions and the weighting values are not particularly limited to the above examples, and various changes are possible. For example, in order to reduce a moving image false contour, the subfield SF8 is divided into two. Thus, the weight value of the two subfields may be set to 64.

Next, the sustain driver 6 shown in FIG. 1 will be described in detail. FIG. 3 is a circuit diagram showing a configuration of the sustain driver 6 shown in FIG. Note that the scan driver 5 is configured and operates in the same manner as the sustain driver 6, so that detailed description of the scan driver 5 is omitted, and only the sustain driver 6 will be described in detail below. Further, in the following description, an example of a positive-polarity pulse that performs discharge at the time of rising of the drive pulse is shown; however, a negative-polarity pulse that performs discharge at the time of falling may be used.

The sustain driver 6 shown in FIG.
T (field effect transistor, hereinafter referred to as transistor) Q1 to Q4, a recovery capacitor C1, a recovery coil L,
Includes diodes D1, D2 and current limiting element IL.

The transistor Q1 has one end connected to the power supply terminal V1.
, And the other end is connected to the node N1. The voltage Vsus is applied to the power supply terminal V1. Current limiting element I
L is composed of, for example, a resistor having a predetermined resistance value, one end of which receives the control signal S1 and the other end of which is connected to the gate of the transistor Q1. Transistor Q2
Has one end connected to the node N1, the other end connected to the ground terminal, and a control signal S2 input to the gate.

The node N1 is connected to, for example, 480 sustain electrodes 13. FIG. 3 shows a panel capacitance Cp corresponding to the total capacitance between the plurality of sustain electrodes 13 and the ground terminal. . In this regard, the same applies to the sustain driver according to other embodiments described below.

The recovery capacitor C1 is connected between the node N3 and the ground terminal. Transistor Q3 and diode D1 are connected in series between nodes N3 and N2. Diode D2 and transistor Q4
Are connected in series between the node N2 and the node N3. The control signal S3 is input to the gate of the transistor Q3, and the control signal S4 is input to the gate of the transistor Q4. The recovery coil L is connected to the nodes N2 and N1.
Connected between

In this embodiment, the PDP 7 corresponds to the display panel, the scan driver 5 and the sustain driver 6 correspond to the driving means, the first driving means and the second driving means, and the subfield lighting rate measuring device 8 Corresponds to the detection means and the subfield lighting rate detection means, the subfield processor 3 corresponds to the control means, and the video signal-subfield association device 2 corresponds to the conversion means. Further, the recovery coil L, the recovery capacitor C1, the transistor Q3, and the diode D1 correspond to a first driving unit, and the transistor Q1, the current limiting element IL, and the power supply terminal V1 correspond to a second driving unit. The recovery capacitor C1 corresponds to a first capacitive element, the recovery coil L corresponds to an inductance unit and an inductance element, and the recovery capacitor C1, the transistor Q3, and the diode D1 correspond to a resonance driving unit.

FIG. 4 is a timing chart showing an example of the operation of the sustain driver 6 shown in FIG. 3 during the sustain period when the first and second discharges are continuously generated during the sustain discharge. FIG. 4 shows the voltage at node N1 in FIG. 3, the discharge intensity LR of PDP 7, and the control signals S1 to S4 input to transistors Q1 to Q4. The control signal S
1 to S4 are signals output from the subfield processor 3 as the sustain driver drive control signal US.

The discharge intensity is measured by the following method. In the case of a PDP using a mixed gas containing xenon, light emission uses vacuum ultraviolet rays (wavelength: 147 nm) generated at the time of discharge from xenon having a resonance level. This vacuum ultraviolet ray cannot be observed in the air through the front glass of the PDP. On the other hand, near infrared rays (wavelength: 828 nm) are emitted at the time of transition from the energy level further above the resonance level to the resonance level, and this near infrared ray is considered to be almost proportional to the discharge intensity. Using an avalanche photodiode or the like having a spectral sensitivity characteristic in the near-infrared region, the intensity of near-infrared light is measured for one discharge cell, and this is used as the discharge intensity.

Therefore, the continuous first
And the second discharge means that the second discharge is performed after the first discharge for each discharge cell, and that all the discharge cells of the PDP to be lit always discharge twice. This does not include the case where discharge cells that discharge early and discharge cells that discharge late are discharged only once each at a different timing due to cell variation.

First, in the period TA, the control signal S2 goes low, the transistor Q2 turns off, the control signal S3 goes high, and the transistor Q3 turns on.
At this time, the control signal S1 is at a low level and the transistor Q1 is off, and the control signal S4 is at a low level and the transistor Q4 is off. Therefore, the recovery capacitor C1 is connected to the recovery coil L via the transistor Q3 and the diode D1, and the voltage of the node N1 rises smoothly from the ground potential Vg due to LC resonance by the recovery coil L and the panel capacitance Cp. At this time, the charge of the recovery capacitor C1 is transferred to the transistor Q3 and the diode D
1 and to the panel capacitance Cp via the recovery coil L.

When the voltage of node N1 rises and exceeds the discharge start voltage in the sustain period and discharge cell 14 starts the first discharge, discharge intensity LR starts to rise. Thereafter, when the first discharge increases to some extent and the required discharge current exceeds the current supply capability of the circuit composed of the recovery capacitor C1 and the recovery coil L, the voltage at the node N1 changes from the maximum value Vpu to the minimum value Vpb. , The first discharge is weakened, and the discharge intensity LR is accordingly reduced. At the moment when the first discharge starts to weaken, the saturation of the amount of emitted ultraviolet light starts to be relaxed by the current limitation, and thereafter, the saturation of the ultraviolet light with respect to the discharge current is reduced, and the luminous efficiency is improved.

Next, in the period TB, the control signal S1 goes high, the transistor Q1 turns on, the control signal S3 goes low, and the transistor Q3 turns off.
At this time, the current of the control signal S1 is limited by the current limiting element IL, and the charge for forming the channel of the transistor Q1 is slowly charged through the gate of the transistor Q1. Therefore, the opening speed of the channel of the transistor Q1 is slowed, and the voltage of the node N1 is gradually reduced to Vsus at the rising speed in the period TA, that is, the rising speed (voltage / time) from the ground potential Vg to the maximum value Vpu. To rise. Therefore, no sharply changing edge portion is formed in sustain pulse Psu, and unnecessary radiation of electromagnetic waves is suppressed.

When the voltage of the node N1 rises from the minimum value Vpb and exceeds the discharge starting voltage again, the discharge cell 14
Following the discharge, the second discharge is started, and the discharge intensity LR also starts to increase again. At this time, the second discharge follows the first discharge.
During the second discharge, the first discharge occurs.
Priming effect of charged particles and excited atoms remaining in the discharge space by the discharge of
The second discharge can be performed stably.

In the second discharge, since the discharge current is sufficiently supplied from the power supply terminal V1 without being limited, the second discharge has a sufficient intensity, that is, a peak larger than the peak value of the first discharge. And the wall charges necessary for the next first discharge are sufficiently stored, and the sustain discharge can be stably repeated.

Thereafter, when the voltage of the node N1 is held at Vsus, the second discharge stops as in the conventional case, and the discharge intensity LR also decreases accordingly.

[0086] As described above, the first
When the second discharge is generated, the luminous efficiency is considered to be improved for the following reasons.

First, in the first discharge, the recovery capacitor C
Electric charge necessary for discharge is supplied from 1 through the recovery coil L, and the supplied current is limited to a value determined by the panel capacitance Cp and the resonance circuit of the recovery coil L. Further, since the supply source of the discharge current is the recovery capacitor C1, sufficient discharge cannot be supplied when the discharge increases, and the first discharge weakens or stops as the voltage of the node N1 decreases. That is, in the first discharge, unlike the case of the discharge by the current supply from the power supply which is connected without passing through the inductance element or the like and can supply a sufficient charge, only the minimum charge necessary for the discharge is supplied. Therefore, from the moment when the first discharge starts to weaken, the saturation of the ultraviolet emission amount starts to be relaxed by the current limitation, and thereafter, the saturation of the ultraviolet light with respect to the discharge current decreases, and the luminous efficiency improves. Therefore, no extra discharge current that does not contribute to the phosphor emission of the discharge cells 14 does not flow, so that the luminous efficiency with respect to the applied power can be improved.

In the second discharge, the wall voltage is reduced by the first discharge, and the discharge is performed in a state where the effective voltage applied to the discharge space is considerably low, that is, in a state where the voltage is not excessively applied. The luminous efficiency is improved to some extent by the discharge of.

As described above, since the luminous efficiency can be improved by continuously performing the first and second discharges, the luminous efficiency with respect to the input power can be improved, and the power consumption can be reduced. If the input power is not reduced, the power saved by improving the luminous efficiency can be used for improving the display luminance by increasing the number of times of light emission.

Next, in the period TC, the control signal S1 goes low, the transistor Q1 turns off, the control signal S4 goes high, and the transistor Q4 turns on.
Therefore, the recovery capacitor C1 is connected to the recovery coil L via the diode D2 and the transistor Q4,
Due to the LC resonance caused by the recovery coil L and the panel capacitance Cp, the voltage of the node N1 gradually drops. At this time,
The charge stored in the panel capacitance Cp is stored in the recovery capacitor C1 via the recovery coil L, the diode D2, and the transistor Q4, and the charge is recovered.

Next, in the period TD, the control signal S2 goes high, turning on the transistor Q2, the control signal S4 goes low, and the transistor Q4 turns off.
Therefore, node N1 is connected to the ground terminal, and the voltage of node N1 drops and is fixed at ground potential Vg.

By repeatedly performing the above operation in the sustain period, when the voltage rises from the ground potential Vg to the voltage Vsus, a periodic sustain pulse Psu for continuously generating the first and second discharges is applied to the plurality of sustain electrodes. 1
3 can be applied. In the same manner as above,
The scan driver 12 has a waveform similar to that of the above-described sustain pulse Psu, and is periodically applied to the scan electrode 12 by a 180 ° phase shift.

Next, when the first and second discharges are continuously generated as described above, the peak interval between the peak value of the first discharge and the peak value of the second discharge and the luminous efficiency are calculated. The relationship will be described.

FIG. 5 is a diagram showing the relationship between the peak interval of the discharge intensity of the plasma display device shown in FIG. 1 and the luminous efficiency. FIGS. 6 to 9 show the relationship between the discharge intensity of the plasma display device shown in FIG. Peak interval 100 ns, 300
FIG. 4 is a timing chart showing an operation of the sustain driver 6 shown in FIG. 3 during a sustain period in the case of ns, 550 ns, and 600 ns.

The luminous efficiency on the vertical axis in FIG. 5 is the luminous efficiency (lm / W) with respect to the applied power excluding the reactive power, and the peak interval on the horizontal axis is the discharge intensity in the near-infrared measurement. The peak interval (ns) between the peak value of the first discharge and the peak value of the second discharge. Also, FIG.
FIG. 9 shows the voltage of the node N1 in FIG. 3, the discharge intensity LR of the PDP 7, and the control signals S1 to S4 input to the transistors Q1 to Q4.

Each of the timing charts shown in FIGS. 6 to 9 shows a case where the sustain period of the sustain pulse is set to be sufficiently long, and the timing when the control signal S1 changes to high level (when the control signal S3 becomes low). The timing chart shown in FIG. 4 is the same as the timing chart shown in FIG.

As shown in FIG. 5, the peak interval is 100n.
At s or more, the effect of improving the luminous efficiency by the first discharge appears, and when the peak interval is 300 ns, the effect of improving the luminous efficiency by the first discharge becomes maximum. Thereafter, until the peak interval becomes 500 ns, the effect of improving the luminous efficiency by the first discharge is maintained at a substantially maximum state, and the peak interval becomes 550.
When the time exceeds ns, the luminous efficiency sharply decreases. Hereinafter, the discharge state at each peak interval will be described in detail.

First, as shown in FIG.
In the case of 00 ns, the voltage of the node N1 is changed to the ground potential Vg by LC resonance caused by the recovery coil L and the panel capacitance Cp.
From the discharge start voltage, the first discharge is started, and the discharge intensity LR starts to increase. afterwards,
When the first discharge increases to some extent and the required discharge current exceeds the current supply capability of the circuit composed of the recovery capacitor C1 and the recovery coil L, the voltage at the node N1 drops from the maximum value Vpu to the minimum value Vpb. As a result, the first discharge is weakened, and accordingly, the discharge intensity LR slightly decreases. Here, from the moment when the first discharge starts to weaken, the saturation of the ultraviolet emission amount starts to be reduced by the current limitation, and thereafter, the node N1
In the period until the voltage rises again, the saturation of ultraviolet light with respect to the discharge current is reduced, and the luminous efficiency is improved.

Next, when a discharge current is supplied from the power supply terminal V1 and the voltage of the node N1 rises again, a second discharge follows the first discharge and the discharge intensity LR also rises again. At this time, since the second discharge has a sufficient intensity, that is, a peak value larger than the peak value of the first discharge,
The wall charges necessary for the next first discharge are sufficiently stored, and the sustain discharge can be stably repeated.

Next, as shown in FIG.
In the case of 00 ns, the minimum value Vpb at the time of the first discharge further decreases, and the first discharge is once completely terminated. Then, when a discharge current is supplied from the power supply terminal V1, a second discharge occurs. As described above, the first discharge and the second discharge are continuously performed in a separated state, and the peak value of the second discharge is the first discharge.
Discharge peak value.

In this case, from the moment when the first discharge starts to weaken, until the first discharge is stopped, the saturation of the amount of emitted ultraviolet light is reduced by current limitation, and the effect of improving the luminous efficiency by the first discharge is completely enjoyed. can do. Further, since the second discharge has a sufficient intensity, that is, a peak value larger than the peak value of the first discharge, wall charges necessary for the next first discharge are sufficiently stored, and the sustain discharge is stabilized. Can be repeated.

Next, as shown in FIG.
In the case of 50 ns, the minimum value Vpb at the time of the first discharge drops to almost the same voltage as in FIG. 7, and after the first discharge is completely completed once, after a lapse of a predetermined period, the discharge current from the power supply terminal V1 When supplied, a second discharge occurs. Thus, the first discharge and the second discharge are continuously performed in a more separated state, and the peak value of the second discharge is substantially equal to the peak value of the first discharge.

In this case, from the moment when the first discharge starts to weaken, until the first discharge is stopped, the saturation of the amount of emitted ultraviolet light is reduced by current limitation, and the effect of improving the luminous efficiency by the first discharge is completely enjoyed. can do. Further, since the second discharge has a peak value equal to the peak value of the first discharge, it is possible to store wall charges necessary for the next first discharge, and to stably repeat the sustain discharge. Can be.

Next, as shown in FIG.
In the case of 00 ns, the minimum value Vpb at the time of the first discharge drops to almost the same voltage as that of FIG. 7, and after the first discharge is once completely completed, and further after a predetermined period has elapsed, the discharge current from the power supply terminal V1 Is supplied, a second discharge occurs. As described above, the first discharge and the second discharge are continuously performed in a state of being excessively separated, and the peak value of the second discharge is smaller than the peak value of the first discharge.

In this case, the first discharge and the second discharge are too separated from each other, so that when the second discharge is generated, the priming effect of the discharge space by the first discharge can be sufficiently enjoyed. Instead, the second discharge is smaller than the first discharge, and the discharge intensity LR also decreases. Further, when the sustain discharge is repeated at the peak interval, the formation of the wall charges necessary for the next first discharge becomes insufficient, and the first and second discharges gradually become smaller during the repetition of the sustain discharge. Discharge stops.

As a result, in order to obtain the effect of improving the luminous efficiency by the first discharge, the voltage of the node N1 is reduced after the voltage of the node N1 is reduced by the first discharge and the first discharge is at least weakened. Is preferably raised again to generate a second discharge. In the case of the present embodiment, the first discharge
It is preferable that the peak interval between the peak value of the discharge and the peak value of the second discharge be 100 ns or more.

In order to obtain the stability of the repetition of the sustain discharge by the second discharge, the voltage at the node N1 is raised again while the priming effect by the first discharge is obtained to generate the second discharge. Preferably, in the case of the present embodiment, the peak interval between the peak value of the first discharge and the peak value of the second discharge is preferably 550 ns or less.

Therefore, the peak value of the first discharge and the second discharge
The interval between the peak value and the discharge peak value is 100 ns or more and 5
It is preferably 50 ns or less. In this case, the effect of improving the luminous efficiency by the first discharge and the repetition stability of the sustain discharge by the second discharge can be obtained. Also,
The peak interval between the peak value of the first discharge and the peak value of the second discharge is more preferably 150 ns or more and 550 ns or less, and further preferably 200 ns or more and 500 ns or less. In the former case, the effect of improving the luminous efficiency by the first discharge can be further enhanced. In the case of the latter, the effect of improving the luminous efficiency by the first discharge can be substantially maximized, and the second effect can be obtained. Sufficient repetition stability of sustain discharge due to discharge can also be obtained.

The peak interval between the peak value of the first discharge and the peak value of the second discharge is at least 300 ns and 550 n
s or less, more preferably 200 ns or more and 40 or less.
More preferably, it is 0 ns or less. In the former case,
The effect of improving the luminous efficiency by the first discharge can be almost maximized. In the latter case, the effect of improving the luminous efficiency by the first discharge can be maximized, and the second effect can be obtained.
, The stability of the repetition of the sustain discharge by the discharge can be more sufficiently obtained.

Next, the relationship between power consumption and luminance when the first and second discharges are continuously generated as described above will be described. FIG. 10 is a diagram showing a relationship between power consumption and luminance of the plasma display device shown in FIG.
In the figure, open circles indicate measured values when the first and second discharges are continuously performed by the plasma display device of the present embodiment, and black circles indicate 1 as a comparative example, as in the related art.
The power consumption (W) on the horizontal axis is the total power during the sustain period including the charge / discharge power of the PDP, and the luminance (cd / m ² ) on the vertical axis is , Actually P
This is a measurement of the luminance generated from the DP.

As shown in FIG. 10, when the lighting rate on the PDP 7 is 40%, when the first and second discharges are continuously performed as in the present embodiment, only one discharge is performed as in the related art. It can be seen that the luminance is increased with the same power consumption as compared with the case where no light emission is performed. Specifically, when the first and second discharges are continuously performed, the luminance becomes about 452 (cd / m ² ) when the power consumption is about 396 (W), and the discharge is performed only once. When the power consumption is about 421 (W), the luminance is about 451 (cd / m ² ), and the first and second
As a result, the power consumption was reduced by about 6%.

Further, when the lighting rate is 70%, as shown in the figure, when the first and second discharges are continuously performed, the luminance is greatly reduced as compared with the conventional case where only one discharge is performed. It can be seen that it is rising. Specifically, when the first and second discharges are continuously performed, the power consumption is about 599.
(W), the luminance becomes about 467 (cd / m ² ),
When the power was discharged only once and the power consumption was about 685 (W), the luminance was about 445 (cd / m ² ), and the power consumption could be reduced by about 12%.

As described above, when the first and second discharges are continuously performed, it is understood that the luminous efficiency with respect to the applied power is improved and the power consumption can be further reduced depending on the lighting rate. On the other hand, depending on the lighting rate, if the first and second discharges are continuously performed, the luminous efficiency may decrease and the power consumption may increase. In the present embodiment, as described below, The discharge state is changed according to the lighting rate for each field, and the sustain discharge is performed in an optimal state according to the lighting rate.

First, as the operation of controlling the waveform of the sustain pulse according to the lighting rate of each subfield, the operation of controlling the timing at which the sustain pulse Psu rises again will be described. FIG. 11 is a block diagram showing a configuration of the subfield processor 3 shown in FIG.

The subfield processor 3 shown in FIG.
Lighting rate / delay time LUT (look-up table) 3
1, includes a delay time determination unit 32, a basic control signal generator 33, and delay units 34 and 35.

The lighting rate / delay time LUT 31 is connected to the delay time determining unit 32, and stores the relationship between the lighting rate and the delay time Td based on experimental data in a table format. For example, when the lighting rate is 0 to 45%, 100 ns is stored as the delay time Td, when the lighting rate is 45 to 60%, 200 ns is stored as the delay time Td, and when the lighting rate is 6%.
350 ns is stored as the delay time Td for 0 to 100%.

Here, the delay time Td refers to the recovery coil L
And the time when the potential of the sustain electrode 13 rises according to the voltage rise curve determined by the resonance of the panel capacitance Cp and reaches the discharge start voltage Vst at which discharge occurs is defined as the origin time,
It is defined as the time from the origin time until the control signal S1 becomes high level. Conventionally, this delay time T
At the timing when d becomes 0 ns, the control signal S1 is set to the high level to supply a discharge current from the power supply that supplies the sustain voltage Vsus, thereby achieving both recovery of the reactive power and stable discharge.

The delay time determining unit 32 includes delay units 34 and 35
The corresponding delay time Td is read from the lighting rate / delay time LUT 31 in accordance with the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8, and the delay operation is performed by the read delay time Td. , The delay units 34 and 35 are controlled. Note that the determination of the delay time Td is not particularly limited to an example in which the relationship between the lighting rate based on the experimental data and the delay time Td is stored in a table format as described above, and represents the relationship between the lighting rate and the delay time Td. The delay time Td corresponding to the lighting rate may be obtained from an approximate expression.

The basic control signal generator 33 outputs control signals S1 to S4 as the sustain driver drive control signal US, and the control signals S1 and S3 are output from the delay units 34 and 35, respectively.
And the control signals S2 and S4 are output to the sustain driver 6 as they are.

The delay unit 34 delays the rising edge of the control signal S1 by the delay time Td determined by the delay time determination unit 32.
The delay of the falling edge of the control signal S3 is delayed by the delay time Td determined by the formula (1), and is output to the sustain driver 6, respectively. The sustain driver 6 can operate in the same manner as described above even when the control signal S3 is at a low level when the control signal S1 is at a low level. In this case, the delay unit 35 can be omitted. .

With the above-described configuration, the subfield processor 3 changes the delay time Td according to the lighting rate measured by the subfield lighting rate measuring device 8 to control the control signal S1.
Controls the timing at which the control signal S3 goes high and the timing at which the control signal S3 goes low.

Note that the scan driver 5 is also controlled by the subfield processor 3 in the same manner as described above, and the scan electrode 1 is similarly controlled in accordance with the lighting rate of each subfield.
2 is controlled.

FIGS. 12 to 15 show that the delay time Td is 0n.
FIG. 4 is a timing chart showing an operation during a sustain period of the sustain driver 6 shown in FIG. 3 in the case of s, 100 ns, 200 ns, and 350 ns. 12 to 15 show the voltage of node N1, the discharge intensity LR of PDP 7, and control signals S1 to S4 input to transistors Q1 to Q4 in FIG. 3 when the sustain period of the sustain pulse is 6 μs. .

In the timing charts shown in FIGS. 12 to 15, the timing when control signal S1 changes to high level (timing when control signal S3 changes to low level)
Are the same as those in the timing chart shown in FIG. 4 except for the differences. Therefore, only the differences will be described in detail below.

First, as shown in FIG. 12, the delay time Td
Is 0 ns, during the period TA, the voltage of the node N1 rises smoothly from the ground potential Vg due to LC resonance caused by the recovery coil L and the panel capacitance Cp, and when the voltage exceeds the discharge start voltage Vst, a sustain discharge occurs. At this time, the control signal S1 becomes high level, and the voltage of the node N1 rises to the sustain voltage Vsus supplied from the power supply terminal V1,
As in the conventional case, the discharge in which the discharge current is supplied from the power supply is performed once, and the discharge intensity LR increases once. That is, FIG.
The case where the delay time Td shown in FIG. 2 is 0 ns indicates a case where the discharge current is supplied from the power supply and the discharge is performed once as in the related art.

Next, as shown in FIG. 13, the delay time Td
Is 100 ns, during the period TA, the node N1 is generated due to LC resonance caused by the recovery coil L and the panel capacitance Cp.
Rises smoothly from the ground potential Vg and exceeds the discharge start voltage Vst, the first discharge is started, and the discharge intensity L
R starts to rise.

Thereafter, when the first discharge increases to some extent and the required discharge current exceeds the current supply capability of the circuit composed of the recovery capacitor C1 and the recovery coil L,
The voltage of the node N1 drops from the local maximum value Vpu to the local minimum value Vpb to weaken the first discharge, and accordingly, the discharge intensity L
R also decreases. Here, from the moment when the first discharge starts to weaken, the saturation of the ultraviolet emission amount starts to be reduced by the current limitation, and thereafter, the saturation of the ultraviolet light with respect to the discharge current decreases during a period until the voltage of the node N1 rises again.
Luminous efficiency is improved.

Next, when the transistor Q1 is turned on after delaying the timing at which the control signal S1 goes high from the timing shown in FIG. 12 by 100 ns, a discharge current is supplied from the power supply terminal V1, and the voltage of the node N1 rises again. , The second discharge is generated following the first discharge, and the discharge intensity LR also increases again.

At this time, since the second discharge has a sufficient intensity, that is, a peak value larger than the peak value of the first discharge, the wall charges necessary for the next first discharge are sufficiently stored. Sustain discharge can be stably repeated.

Next, as shown in FIG. 14, the delay time Td
Is 200 ns, the first and second discharges are continuously performed as in FIG. 13, but the period during which the charge required for the first discharge is supplied from the recovery capacitor C1 becomes longer. Therefore, the period during which sufficient charge cannot be supplied becomes longer, the minimum value Vpb of the node N1 further drops, the first discharge is weakened, and the discharge intensity LR is further lowered. At this time, the saturation of the ultraviolet rays with respect to the discharge current becomes smaller and the period becomes longer, so that the luminous efficiency is further improved.

Next, when the transistor Q1 is turned on after delaying the timing at which the control signal S1 goes high from the timing shown in FIG. 12 by 200 ns, the electric charge required for discharge is supplied from the power supply terminal V1, and the second discharge is started. Occurs
The discharge intensity LR increases again. Thus, the delay time T
When d changes from 100 ns to 200 ns, the node N
The minimum value Vpb of 1 further decreases, the first discharge and the second discharge become more separated, and the luminous efficiency is further improved by the first discharge.

Next, as shown in FIG. 15, the delay time Td
Is 350 ns, the minimum value Vpb at the time of the first discharge is further reduced, the first discharge is once completed, and then the control signal S1 becomes high level and the discharge current is supplied from the power supply terminal V1. A second discharge occurs. in this way,
The first discharge and the second discharge are continuously performed in a state of being excessively separated, and the peak value of the second discharge is smaller than the peak value of the first discharge.

In this case, since the first discharge and the second discharge are too separated from each other, the priming effect of the discharge space cannot be sufficiently obtained when the second discharge occurs, and the second discharge cannot be performed. The discharge becomes smaller than the first discharge, and the discharge intensity LR also decreases. Further, when the sustain discharge is repeated with this delay time Td, the formation of wall charges necessary for the next first discharge becomes insufficient, and the first and second discharges gradually become smaller during the repetition of the sustain discharge. Eventually, discharge may stop.

Next, the relationship between the power consumption and the lighting rate in each of the above-described delay times will be described. FIG. 16 is a diagram showing the relationship between the efficiency evaluation value and the lighting rate in each delay time of the plasma display device shown in FIG.

In the figure, the black circles indicate that the delay time Td is 0 ns.
, A white circle indicates a case where the delay time Td is 100 ns, a black square indicates a case where the delay time Td is 200 ns, and a white triangle indicates a case where the delay time Td is 350 ns. The efficiency evaluation value on the vertical axis of the figure is the (luminance / power consumption (PDP) of the delay time 0 ns at each lighting rate.
Is used as a reference for efficiency, and this value is normalized by dividing the value of (brightness / power consumption (including PDP charge / discharge power)) at each delay time. That is, it is shown that the larger the efficiency evaluation value is, the smaller the power consumption is compared at the same luminance. The horizontal axis in the figure is the lighting rate (%) for each subfield.

As shown in FIG. 16, the lighting rate is 0 to 25%.
, The power consumption is lowest when the delay time is 0 ns, and the delay time is 100 when the lighting rate is in the range of 25 to 45%.
ns, the power consumption is the lowest, and the lighting rate is 45 to 60.
% And in the range of 85-100% the delay time is 2
00 ns has the lowest power consumption and the lighting rate is 60 to
In the range of 85%, the power consumption is lowest when the delay time is 350 ns.

As described above, when the lighting rate becomes equal to or more than the predetermined value, the power consumption is reduced as the delay time is increased. However, if the delay time is excessively increased, the efficiency evaluation value is reduced, and conversely, the power consumption is reduced. It can be seen that it increases.

FIG. 17 shows the efficiency evaluation value when the delay time Td is controlled in accordance with the lighting rate by the subfield processor 3 based on the relationship between the efficiency evaluation value and the lighting rate at each delay time shown in FIG. It is a figure showing the relation with lighting rate.

The solid line shown in FIG. 17 indicates that the lighting rate is 0 to 45%.
In this case, the delay time Td is set to 100 ns, the delay time Td is set to 200 ns when the lighting rate is 45 to 60%, and the delay time Td is set to 3 when the lighting rate is 60 to 100%.
The relationship between the efficiency evaluation value and the lighting rate when set to 50 ns is shown.

That is, the case where the first and second discharges are performed and the delay time Td is increased according to the lighting rate is shown. In this case, when the lighting rate is 0 to 20%, the efficiency evaluation value is smaller than 1, and the luminous efficiency is lower than before. However, at other lighting rates, the luminous efficiency is sufficiently improved. Power consumption can be reduced.

Next, the portion shown by the one-dot chain line in FIG. 17 shows the relationship between the efficiency evaluation value and the lighting rate when the delay time Td is set to 0 ns when the lighting rate is 0 to 25%. That is, when the lighting rate is a predetermined value, for example, 25% or more, the first and second discharges are generated, and the lighting rate becomes the predetermined value (25%).
%), A case is shown in which a discharge current is supplied from the power supply terminal V1 to perform one discharge as in the conventional case.
In this case, when the lighting rate is 0 to 25%, the efficiency evaluation value is 1
Thus, power consumption can be further reduced.

Next, the portion indicated by the two-dot chain line in FIG. 17 indicates that the delay time Td is 200 ns when the lighting rate is 85 to 100%.
2 shows the relationship between the efficiency evaluation value and the lighting rate when the setting is made. That is, the case where the delay time Td is reduced when the lighting rate is a predetermined value, for example, 85% or more is shown. In this case, the efficiency evaluation value is further improved for the lighting rate of 85 to 100%, and the power consumption can be further reduced.

As described above, when the timing at which the sustain pulse Psu rises again, that is, the timing when the control signal S1 goes high, is controlled according to the lighting rate, the PDP
Various controls can be performed in accordance with the characteristics of the lighting rate and the power consumption, and the delay time Td is sequentially increased in accordance with the increase in the lighting rate, or until the lighting rate becomes equal to or more than a predetermined value. One discharge is performed, and when it exceeds a predetermined value,
After the second discharge is generated or the delay time Td is increased in accordance with the increase in the lighting rate, the delay time Td is shortened when the lighting rate further increases and exceeds a predetermined value. Can be controlled.

If the delay time is increased to a predetermined value or more, the discharge may become unstable. In this case, the charge is externally supplied to the recovery capacitor C1 or the frequency of the sustain pulse in the sustain period is changed. By making it lower, discharge can be stably and continuously performed.

When the discharge is generated only once as in the conventional case, the luminous efficiency is not improved and the luminance does not change. However, the state is changed from the state in which the discharge is performed only once to the state of the first and second discharges. If it is changed, the luminous efficiency changes rapidly and the PD
The luminance on P7 also changes abruptly and may give a sense of visual discomfort. However, as the lighting rate for each subfield increases, the control signal S1 is controlled such that the timing at which the control signal S1 goes high sequentially decreases. By gradually changing from one discharge to the first and second discharges, it is possible to sequentially increase the luminance and eliminate the visual discomfort.

The control for switching from one discharge to the first and second discharges so that there is no visual discomfort is as follows.
In addition to the above-described control, the control for changing the video signal level in the signal processing so as to make the difference between the luminance obtained by one discharge and the luminance obtained by the first and second discharges inconspicuous and perform switching is also similar. Needless to say, the effect is obtained.

As described above, in the present embodiment, the first and second discharges are continuously generated at the rise of the sustain pulse, so that the luminous efficiency with respect to the applied power is improved and the power consumption is reduced. Can be. Further, since the timing at which the sustain pulse rises again is controlled in accordance with the lighting rate of each subfield, the luminous efficiency can be gradually improved, and the power consumption can be reduced without visually unnatural feeling.

The lighting rate of the subfield in which one light emission is switched to two light emission is not particularly limited as long as the power consumption can be reduced comprehensively and there is no visual discomfort.

Next, another sustain driver applied to the plasma display device shown in FIG. 1 will be described. FIG. 18 is a circuit diagram showing another configuration of the sustain driver shown in FIG. The difference between the sustain driver 6 'shown in FIG. 18 and the sustain driver 6 shown in FIG. 3 is that the recovery coil LL and the diode DD are added in series between the node N2 and the node N1. Are the same as those of the sustain driver 6 shown in FIG. 3, and therefore, the same portions are denoted by the same reference characters and detailed description thereof will not be repeated. The sustain driver 6 'shown in FIG.
Is applied to the plasma display device shown in FIG. 1, the scan driver 5 is also changed in the following manner.

In the sustain driver 6 'shown in FIG. 18, the recovery coil LL and the diode DD are connected in series between the node N2 and the node N1, and the recovery coil L and the recovery coil LL are connected in parallel. Therefore, when a current flows from the node N1 to the node N2, the recovery coils L and LL both contribute to the LC resonance operation, and when a current flows from the node N2 to the node N1, the current flowing to the recovery coil LL is limited by the diode DD. , Only the recovery coil L contributes to the LC resonance operation.

FIG. 19 is a timing chart representing the operation of the sustain driver 6 'shown in FIG. 18 during the sustain period. The difference between the timing chart shown in FIG. 19 and the timing chart shown in FIG. 4 is that the period TB is extended and the period T
C is shortened, and the other points are the same as those in the timing chart shown in FIG. 4, so that only different points will be described in detail below.

In the period TA, the current flowing from the recovery capacitor C1 to the recovery coil LL is limited by the diode DD, and the current from the recovery capacitor C1 flows only through the recovery coil L. Therefore, only the recovery coil L is LC
The rising waveform of the sustain pulse Psu which contributes to the resonance operation is the same as that of the sustain driver 6 shown in FIG. 3, and the sustain pulse Psu is maintained at the voltage Vsus in the period TB only during the shortened period TC. Is extended.

Next, in the period TC, the recovery coil LL
Is not limited by the diode DD, and both the recovery coils L and LL contribute to the LC resonance operation. Therefore, LC resonance occurs due to the combined inductance value of the recovery coils L and LL that is smaller than the inductance value of the recovery coil L, the LC resonance period is shortened, and the sustain pulse P
su drops sharply in a short period of time.

As described above, by shortening the period TC and extending the period TB by the shortened period, the period in which the sustain pulse Psu is maintained at the voltage Vsus can be extended. Therefore, a sufficient period for forming the wall charges after the second discharge can be secured, and the wall charges can be formed stably. As a result, the lighting stability in the sustain period can be improved.

Next, a description will be given of a plasma display device according to a second embodiment of the present invention. FIG.
FIG. 6 is a block diagram illustrating a configuration of a plasma display device according to a second embodiment of the present invention.

The difference between the plasma display device shown in FIG. 20 and the plasma display device shown in FIG.
The subfield processor 3 is changed to a subfield processor 3a for controlling the scan driver 5a and the sustain driver 6a so as to generate the third discharge following the first and second discharges in the sustain period, and for each subfield. Is added to the voltage control circuit 9 for controlling the voltage of the sustain pulse in accordance with the lighting rate of the pixel, and the other points are the same as those of the plasma display device shown in FIG.
The same portions are denoted by the same reference numerals, and only different portions will be described in detail below.

Subfield processor 3a shown in FIG.
Is based on the image data SP for each subfield and the subfield lighting rate signal SL in addition to the normal operation of the subfield processor 3 shown in FIG. , A scan driver drive control signal CS and a sustain driver drive control signal US for generating a discharge are generated and output to the scan driver 5a and the sustain driver 6a, respectively.

The voltage control circuit 9 outputs a subfield lighting rate signal SL output from the subfield lighting rate measuring device 8.
Then, voltage control signals VC and VU for controlling the voltage of the sustain pulse according to the lighting rate of each subfield are output to scan driver 5a and sustain driver 6a, respectively.

Next, the sustain driver 6 shown in FIG.
a will be described in detail. FIG. 21 is a circuit diagram showing a configuration of sustain driver 6a shown in FIG. Note that the scan driver 5a according to the present embodiment also has the same configuration and operates in the same manner as the sustain driver 6a. Therefore, detailed description of the scan driver 5a is omitted, and only the sustain driver 6a is described in detail below.

The difference between the sustain driver 6a shown in FIG. 21 and the sustain driver 6 shown in FIG. 3 is that transistors Q5 and Q6, a diode D3, a coil L1, a capacitor C2 and a variable voltage source VR are added. The other points are the same as those of the sustain driver 6 shown in FIG. 3, so the same parts are denoted by the same reference numerals, and only different points will be described in detail below.

As shown in FIG. 21, the capacitor C2 is
Connected between node N4 and the ground terminal. Transistor Q5, diode D3 and coil L1 are connected to node N4
And the node N1 are connected in series. One end of the transistor Q6 is connected to the node N4, and the other end is connected to one end of the variable voltage source VR. The control signal S5 is input to the gate of the transistor Q5, and the control signal S6 is input to the gate of the transistor Q6. The other end of the variable voltage source VR is connected to the ground terminal, and changes the output voltage according to the voltage control signal VU output from the voltage control circuit 9.

In this embodiment, the scan driver 5a
And the sustain driver 6a includes a driving unit and first to
The sub-field processor 3a corresponds to a control unit, the capacitor C2 corresponds to a second capacitive element, the variable voltage source VR corresponds to a voltage source and a variable voltage source, The control circuit 9 corresponds to voltage control means, and the capacitor C2, the coil L1, the transistors Q5 and Q6, the diode D3, and the variable voltage source VR correspond to second drive means, and include the transistor Q1, the current limiting element IL, and the power supply terminal V1. Correspond to the third driving means, and the other points are the same as those of the first embodiment.

FIG. 22 is a timing chart representing the operation of the sustain driver 6a shown in FIG. 21 during the sustain period. FIG. 22 shows the voltage at node N1, the discharge intensity LR of PDP 7, and the control signals S1 to S6 input to transistors Q1 to Q6 in FIG. The control signals S1 to S
Reference numeral 6 denotes a signal output from the subfield processor 3a as a sustain driver drive control signal US.

First, in the period TA, the control signals S2,
S6 goes low, transistors Q2 and Q6 turn off, control signal S3 goes high and transistor Q3
Turns on. At this time, the control signal S1 is at the low level and the transistor Q1 is off, the control signal S4 is at the low level and the transistor Q4 is off, and the control signal S5 is at the low level and the transistor Q5 is off. Therefore, the recovery capacitor C1 is connected to the recovery coil L via the transistor Q3 and the diode D1, and the recovery coil L and the panel capacitance Cp cause LC resonance,
The voltage of node N1 smoothly rises from ground potential Vg. At this time, the charge of the recovery capacitor C1 is released to the panel capacitance Cp via the transistor Q3, the diode D1, and the recovery coil L.

When the voltage of node N1 rises and exceeds the discharge start voltage in the sustain period and discharge cell 14 starts the first discharge, discharge intensity LR starts to increase. Thereafter, when the first discharge increases to a certain extent and the required discharge current exceeds the current supply capability of the circuit composed of the recovery capacitor C1 and the recovery coil L, the voltage of the node N1 rises from the first maximum value Vpu1. The first discharge decreases to the first minimum value Vpb1, the first discharge weakens or stops, and the discharge intensity LR also decreases accordingly.

Next, in the period TB, the control signal S5 goes high, turning on the transistor Q5, the control signal S3 goes low, and the transistor Q3 turns off.
Therefore, the capacitor C2 is connected to the coil L1 via the transistor Q5 and the diode D3, and the voltage of the node N1 rises smoothly again due to the LC resonance caused by the coil L1 and the panel capacitance Cp. At this time, the electric charge of the capacitor C2 is transferred to the transistor Q5 and the diode D3.
And is discharged to the panel capacitance Cp via the coil L1.

Here, as described later, the voltage of the capacitor C2 is charged by the variable voltage source VR when the transistor Q6 is turned on during the period TE, and the first minimum value Vpb
It is set to a value higher than an intermediate potential between 1 and the second maximum value Vpu2. Therefore, node N is caused by LC resonance.
1 from the first local minimum value Vpb1 to the second local maximum value Vpb1.
It rises to u2.

When the voltage at node N1 rises and exceeds the discharge start voltage again, and discharge cell 14 starts the second discharge,
The discharge intensity LR starts to increase. Thereafter, when the second discharge increases to a certain extent and the required discharge current exceeds the current supply capability of the circuit composed of the capacitor C2, the transistor Q5, the diode D3 and the coil L1, the voltage of the node N1 rises to the second level. Drop from the maximum value Vpu2 to the second minimum value Vpb2, the second discharge weakens or stops,
Accordingly, the discharge intensity LR also decreases.

Next, in the period TC, the control signal S1 goes high, the transistor Q1 turns on, the control signal S5 goes low, and the transistor Q5 turns off.
At this time, the current of the control signal S1 is limited by the current limiting element IL, and the charge for forming the channel of the transistor Q1 is slowly charged through the gate of the transistor Q1. Therefore, the opening speed of the channel of transistor Q1 is reduced, and the first maximum value Vp is determined from the rising speed in periods TA and TB, that is, the ground potential Vg.
The voltage of the node N1 gradually rises to Vsus at a rising speed until reaching u1, and at a rising speed lower than the rising speed from the first minimum value Vpb1 to the second maximum value Vpu2. Therefore, no sharply changing edge portion is formed in sustain pulse Psu, and unnecessary radiation of electromagnetic waves is suppressed.

At this time, when the voltage of the node N1 rises from the second minimum value Vpb2 and exceeds the discharge start voltage again,
The discharge cell 14 starts the third discharge following the second discharge, and the discharge intensity LR also starts to increase again. Thereafter, when the voltage of the node N1 is maintained at Vsus, the third discharge stops as in the conventional case, and the discharge intensity LR also decreases accordingly.

Next, in the period TD, the control signal S1 goes low, the transistor Q1 turns off, the control signal S4 goes high, and the transistor Q4 turns on.
Therefore, the recovery capacitor C1 is connected to the recovery coil L via the diode D2 and the transistor Q4,
Due to the LC resonance caused by the recovery coil L and the panel capacitance Cp, the voltage of the node N1 gradually drops. At this time,
The charge stored in the panel capacitance Cp is stored in the recovery capacitor C1 via the recovery coil L, the diode D2, and the transistor Q4, and the charge is recovered.

Next, in the period TE, the control signals S2,
S6 goes high, transistors Q2 and Q6 turn on, control signal S4 goes low and transistor Q4
Turns off. Therefore, node N1 is connected to the ground terminal, and the voltage of node N1 drops and is fixed at ground potential Vg. Further, the variable voltage source VR is connected to the capacitor C2 via the node N4, and the capacitor C2 is charged to a voltage higher than an intermediate potential between the first minimum value Vpb1 and the second maximum value Vpu2.

By repeatedly performing the above operation in the sustain period, when the voltage rises from the ground potential Vg to the voltage Vsus, a periodic sustain pulse Psu for continuously generating the first to third discharges is applied to the plurality of sustain electrodes 13. Can be applied. In the same manner as described above, the scan driver 12a periodically applies a sustain pulse having the same waveform as the above-described sustain pulse Psu and a phase shift of 180 ° to the scan electrode 12 as well.

Next, the operation of controlling the waveform of the sustain pulse according to the lighting rate of each subfield will be described.
In the following description, the sustain driver 6a is controlled by the subfield processor 3a, and the sustain pulse Ps
The operation for controlling the waveform of u will be described. The scan driver 5a is also controlled by the subfield processor 3a in the same manner as described below, and is similarly applied to the scan electrode 12 in accordance with the lighting rate of each subfield. The pulse waveform is controlled.

If the lighting rate measured by the subfield lighting rate measuring device 8 is smaller than a predetermined value, the subfield processor 3a discharges only once as in the conventional case. That is, the voltage of the sustain pulse is increased by the resonance of the recovery coil L and the panel capacitance Cp, and the sustain voltage Vs
A discharge for supplying a discharge current from a power supply providing us is performed once, and first to third discharges occur when the discharge current is equal to or greater than a predetermined value. At this time, the timing at which the sustain pulse Psu rises again in response to the subfield lighting rate signal SL, that is, the control signals S5 and S1 become high level so that each discharge occurs in a more separated state as the lighting rate increases. (And when the control signals S3 and S5 become low level) are sequentially changed to control the sustain driver 6a.

For example, when the lighting rate is smaller than a predetermined value in a certain subfield, the timing at which the control signals S5 and S1 become high level is advanced, or
5 is always at a low level, that is, after the second driving means in this embodiment is not operated, the timing at which the control signal S1 goes to a high level is advanced, and the resonance of the recovery coil L and the panel capacitance Cp is increased. As a result, the voltage of the sustain pulse is increased, and the discharge for supplying the discharge current from the power supply for providing the sustain voltage Vsus is performed once, and the discharge is generated only once as in the related art. On the other hand, when the lighting rate increases, the timing at which the control signals S5 and S1 become high level is sequentially delayed, and after the first discharge is weakened or stopped, a second discharge is generated, and further the second discharge is performed. After weakening or stopping, a third discharge is generated.

Therefore, in the present embodiment, similarly to the first embodiment, control is performed such that the timings at which control signals S5 and S1 become high level are sequentially delayed as the lighting rate for each subfield increases. In addition, by gradually changing the discharge from one discharge to the first to third discharges, the luminance is sequentially increased so that there is no visual discomfort. In addition, as control for switching from one discharge to the first to third discharges so as not to cause visual discomfort, in addition to the above-described control of sequentially delaying the timings at which the control signals S5 and S1 become high level, in addition to the above-described control. The same effect can be obtained by controlling the difference between the luminance obtained by one discharge and the luminance obtained by the first to third discharges so as to be inconspicuous by changing the video signal level by signal processing. Needless to say.

The lighting rate of the subfield in which one discharge is switched to the first to third discharges can be reduced as long as the power consumption can be reduced comprehensively and there is no visual discomfort. There is no particular limitation. In the present embodiment, for example, when the lighting rate is 25% or more, the first discharge to the first discharge
Control signals S5 and S1 so as to change to the third discharge.
Is set to a high level.

Next, the operation of controlling the voltage of the sustain pulse according to the lighting rate of each subfield will be described.
In the following description, an operation in which the sustain driver 6a is controlled by the voltage control circuit 9 to control the voltage of the sustain pulse Psu will be described.
Similarly, a is controlled by the voltage control circuit 9 in the same manner as described below, and similarly, the voltage of the sustain pulse applied to the scan electrode 12 is controlled according to the lighting rate of each subfield.

When the lighting rate increases, the required discharge current increases, the voltage drop at the node N1 increases, the first minimum value Vpb1 decreases, and when the lighting rate decreases, the required discharge current decreases. The voltage drop at the node N1 decreases, and the first minimum value Vpb1 increases. On the other hand, coil L
1 and the node N by LC resonance by the panel capacitance Cp.
In order to raise the voltage of 1 to the second maximum value Vpu2, the voltage of the node N4 must be higher than the intermediate potential between the first minimum value Vpb1 and the second maximum value Vpu2.

Therefore, in order to increase the voltage of the node N1 to the original second maximum value Vpu2 so that the second discharge can be performed stably, the lighting rate increases and the first minimum value Vpb1 becomes ΔV In this case, the voltage of the node N4 is reduced by ΔV / 2, and the lighting rate is reduced.
Is increased by ΔV, the node N4
Must be increased by ΔV / 2. For this reason, in the present embodiment, in order to stably perform the second discharge,
The voltage of the sustain pulse Psu is controlled according to the lighting rate as follows.

The voltage control circuit 9 determines that the lighting rate measured by the subfield lighting rate measuring device 8 is equal to or greater than a predetermined value,
When generating the first to third discharges, the output voltage of the variable voltage source VR decreases as the lighting rate increases.
The variable voltage source VR of the sustain driver 6a is controlled according to the subfield lighting rate signal SL.

For example, in a certain subfield, when the lighting rate increases and the first minimum value Vpb1 decreases, the voltage control circuit 9 controls the voltage so that the output voltage of the variable voltage source VR decreases as the lighting rate increases. Signal V
U is output to the variable voltage source VR. At this time, variable voltage source VR lowers the output voltage according to voltage control signal VU, and lowers the voltage at node N4. Therefore, the first
, The voltage of the node N1 can be raised to the original second maximum value Vpu2, and the second discharge can be continuously performed stably.

On the other hand, when the lighting rate decreases, a voltage control signal VU for increasing the output voltage of variable voltage source VR is output accordingly, and the voltage of node N4 increases.
Therefore, even if the first minimum value Vpb1 increases,
The voltage of the node N1 can be raised to the original second maximum value Vpu2, and the second discharge can be continuously performed stably.

As described above, in the present embodiment, the first to third discharges are continuously generated at the rise of the sustain pulse, so that the luminous efficiency with respect to the applied power is improved and the power consumption is reduced. Can be. Further, since the timing at which the sustain pulse rises again is controlled in accordance with the lighting rate of each subfield, the luminous efficiency can be gradually improved, and the power consumption can be reduced without visually unnatural feeling. Further, since the voltage of the sustain pulse is controlled according to the lighting rate of each subfield, the second discharge can be stably performed with a simple circuit configuration.

In the above description, the case where the first to third discharges are continuously performed has been described. However, the number of continuous discharges is not particularly limited to the above example, and the number of continuous discharges may be increased more. You may. In this case, the capacitor C2, the transistors Q5 and Q6, and the diode D shown in FIG.
3. By sequentially adding a driving circuit including the variable voltage source VR and the coil L1 for each discharge, discharge can be continuously performed in the same manner as described above.

In the case where discharge is continuously performed, in the present invention, the waveform of the last discharge portion of the sustain pulse is configured as follows. FIG. 23 is a diagram illustrating a waveform of the sustain pulse Psu when the voltage of the sustain pulse is sequentially increased by a plurality of LC resonances and finally increased to the voltage Vsus.

As shown in FIG. 23, the sustain pulse Psu
Rises by the voltage ΔV1 during the period Δt1 in the first step and then drops, and then rises only to the voltage ΔV2 during the period Δt2 in the next step, and thus sequentially rises by LC resonance, and finally During Δtn, the voltage rises by voltage ΔVn, and rises from ground potential Vg to voltage Vsus. At this time, the rising speed ΔV1 / Δt1, ΔV2 / Δt2,..., ΔVn−1 / of the sustain pulse Psu at each step.
The current value of the control signal S1 input to the gate of the transistor Q1 is limited by the current limiting element IL such that the rising speed ΔVn / Δtn in the final step is the smallest with respect to Δtn−1.

As described above, the rising waveform at each step of the sustain pulse Psu is constituted by a plurality of smooth overshoot waveforms due to LC resonance, and finally the power supply terminal V
When the voltage reaches one voltage Vsus, the voltage can be gradually increased. Therefore, unlike the conventional case, an edge portion that changes sharply is not formed, and unnecessary radiation of electromagnetic waves can be suppressed.

Next, a description will be given of a plasma display device according to a third embodiment of the present invention. FIG.
FIG. 9 is a block diagram illustrating a configuration of a plasma display device according to a third embodiment of the present invention.

The difference between the plasma display device shown in FIG. 24 and the plasma display device shown in FIG. 20 is that the voltage control circuit 9 is changed to a voltage control circuit 9a and minimum value detectors 10a and 10b are added. Since the other points are the same as those of the plasma display device shown in FIG. 20, the same portions are denoted by the same reference numerals, and only different portions will be described in detail below.

The minimum value detector 10a shown in FIG. 24 detects the minimum value of the sustain pulse in the sustain period of each scan electrode 12, and outputs the result to the voltage control circuit 9a as a minimum value signal MC. The minimum value detector 10b detects the minimum value of the sustain pulse in the sustain period of the sustain electrode 13, and uses the result as a minimum value signal MU to generate the voltage control circuit 9a.
Output to

The voltage control circuit 9a outputs the minimum value signals MC, M
According to U, a voltage control signal VC for controlling the output voltage of the variable voltage source of the scan driver 5a and a voltage control signal VU for controlling the output voltage of the variable voltage source VR of the sustain driver 6a are transmitted to the scan driver 5a and the scan driver 5a. Output to the sustain driver 6a. The subsequent operation of the scan driver 5a and the sustain driver 6a and the operation of controlling the waveform of the sustain pulse according to the lighting rate for each subfield are the same as those in the second embodiment, and thus detailed description is omitted.

In this embodiment, the voltage control circuit 9a corresponds to voltage control means, the minimum value detectors 10a and 10b correspond to potential detection means, and the other points are the same as those of the second embodiment. .

Next, the operation of controlling the voltage of the sustain pulse according to the lighting rate of each subfield will be described.
In the following description, an operation of controlling the sustain driver 6a by the voltage control circuit 9a and controlling the voltage of the sustain pulse Psu will be described. However, the scan driver 5a is also controlled by the voltage control circuit 9a in the same manner as described below. The voltage of the sustain pulse applied to the scan electrode 12 is controlled according to the first minimum value of the sustain pulse in the sustain period of each scan electrode 12 detected by the minimum value detector 10a.

The voltage control circuit 9a has a minimum value detector 10b
The variable voltage source VR of the sustain driver 6a is controlled according to the minimum value signal MU such that the smaller the detected first minimum value Vpb1 is, the smaller the output voltage of the variable voltage source VR becomes.

For example, when the lighting rate increases and the first minimum value Vpb1 decreases in a certain subfield, the voltage control circuit 9a decreases the output voltage of the variable voltage source VR as the first minimum value Vpb1 decreases. As described above, specifically, the voltage control signal VU is output to the variable voltage source VR such that when the first minimum value Vpb1 decreases by ΔV, the output voltage decreases by ΔV / 2. At this time,
Variable voltage source VR lowers the output voltage according to voltage control signal VU, and lowers the voltage at node N4. Therefore, even if the first minimum value Vpb1 decreases, the voltage of the node N1 can be increased to the original second maximum value Vpu2, and the second discharge can be continuously performed stably. Become.

On the other hand, the lighting rate decreases and the first minimum value V
When pb1 increases, the voltage control circuit 9a determines that the output voltage of the variable voltage source VR increases as the first minimum value Vpb1 increases. Specifically, the first minimum value Vp
The voltage control signal VU is output to the variable voltage source VR so that the output voltage increases by ΔV / 2 when b1 increases by ΔV. At this time, the variable voltage source VR outputs the voltage control signal V
The output voltage is increased according to U, and the voltage of the node N4 is increased. Therefore, even if the first minimum value Vpb1 increases, the node N1 is restored to the original second maximum value Vpu2.
Can be increased, and the second discharge can be continuously performed stably.

As described above, also in this embodiment, the same effects as those of the second embodiment can be obtained, and
Since the first minimum value of the sustain pulse is directly detected, the second maximum value can be adjusted with higher accuracy, and the second discharge can be performed more stably.

Next, a plasma display device according to a fourth embodiment of the present invention will be described. FIG.
FIG. 14 is a block diagram illustrating a configuration of a plasma display device according to a fourth embodiment of the present invention.

The difference between the plasma display device shown in FIG. 25 and the plasma display device shown in FIG.
The subfield processor 3 scans the scan driver 5 and the sustain driver 6 according to the subfield lighting rate signal.
Sub-field processor that switches the timing of the rise of the sustain pulse output from the PDP 7 again and controls the scan driver 5 and the sustain driver 6 to change the number of sustain pulses so that the luminance on the PDP 7 becomes equal before and after the switch. 3b, and the other points are the same as those of the plasma display device shown in FIG.
Hereinafter, only different portions will be described in detail.

The subfield processor 3b shown in FIG.
In addition to the normal operation of the subfield processor 3 shown in FIG. 1, when the timing for increasing the sustain pulse is switched again, the scan for increasing or decreasing the number of sustain pulses so that the luminance becomes equal before and after the switching is performed. A driver drive control signal CS and a sustain driver drive control signal US are generated and output to the scan driver 5 and the sustain driver 6, respectively.

FIG. 26 is a block diagram showing a configuration of subfield processor 3b shown in FIG. The difference between the subfield processor 3b shown in FIG. 26 and the subfield processor 3 shown in FIG. 11 is that the delay time / multiplication coefficient LUT
36, a multiplication coefficient determination unit 37 and a pulse number calculation unit 38 are added, and the basic control signal generator 33 is changed to a basic control signal generator 33a. The other points are the subfields shown in FIG. Since the processing unit is the same as the processing unit 3, the same parts are denoted by the same reference numerals, and detailed description will be omitted below.

A delay time / multiplication coefficient LUT3 shown in FIG.
Reference numeral 6 is connected to the multiplication coefficient determination unit 37, and stores the relationship between the delay time Td and the multiplication coefficient based on the experimental data in a table format. For example, when the delay time Td is 100 ns, 1 is stored as a multiplication coefficient, and the delay time Td is 20 ns.
431/439 is stored as a multiplication coefficient for 0 ns.

The multiplication coefficient determination section 37 is provided for the delay time determination section 3
2 and a pulse number calculation unit 38, and reads a corresponding multiplication coefficient from the delay time / multiplication coefficient LUT 36 according to the delay time Td determined by the delay time determination unit 32, and reads the read multiplication coefficient. Output to Note that the determination of the multiplication coefficient is not particularly limited to an example in which the relationship between the delay time Td and the multiplication coefficient based on the experimental data is stored in a table format as described above. A multiplication coefficient corresponding to the delay time may be obtained from the equation.

The number-of-pulses calculation section 38 is connected to the basic control signal generator 33a, and multiplies the number of sustain pulses adjusted by multiplying the multiplication coefficient determined by the multiplication coefficient determination section 37 with the reference number of sustain pulses. The signal is output to the signal generator 33a.

The basic control signal generator 33a outputs the control signals S1 to S4 as the sustain driver drive control signal US so that the sustain driver 6 outputs the sustain pulses with the adjusted number of sustain pulses.

With the above configuration, the sub-field processor 3b changes the delay time Td according to the lighting rate measured by the sub-field lighting rate measuring device 8, and outputs the control signal S
It controls the timing when 1 goes to a high level and the timing when the control signal S3 goes to a low level, and also controls the number of sustain pulses output from the sustain driver 6.

The scan driver 5 is also controlled by the subfield processor 3b in the same manner as described above, and similarly, the waveform and number of sustain pulses applied to the scan electrode 12 are controlled according to the lighting rate of each subfield. You.

In the present embodiment, the subfield processor 3b corresponds to the control means, and the other points are the same as in the first embodiment.

Using a PDP having characteristics as shown in FIG. 16, for example, when the lighting rate is 25 to 45%, the delay time Td is set to 100 ns, and when the lighting rate is 45 to 60%, the delay time Td is set to 200 ns. When set, the luminance as a boundary 45% lighting rate changes from 431cd / m ² to 439cd / m ^2, the luminance is changed by 8 cd / m ^2.

In order to correct such a luminance change, the subfield processor 3b corrects the number of sustain pulses after the switching to 431/439 times simultaneously with the switching of the delay time. For example, if the number of sustain pulses is 100, the number of pulses is changed to 98 (≒ 100 × 431/439) pulses, and if the number of sustain pulses is 150, 147 (≒ 1
(50 × 431/439) pulse.

By correcting the number of pulses in this way, the luminance becomes equal before and after the switching of the delay time, and it is possible to switch the delay time, that is, the timing at which the sustain pulse rises again without giving a sense of visual discomfort.

When the luminance differs before and after the switching as described above, the delay time may be switched in small increments without changing the delay time at a time, so that the luminance is changed so as to be substantially continuous.

For example, as described above, the lighting rate is 25 to 4
In the case of 5%, the delay time Td is set to 100 ns, and the continuity of the video signal is used. Then, every time the lighting rate increases by 1%, the delay time Td is sequentially increased by 10 ns, and the lighting rate is 55%. Alternatively, the delay time may be set to 200 ns. In this case, the change in luminance before and after the switching of the delay time is 2.4 (= (455-431) / 10) cd /
m ^2, which makes it possible to control the delay time, that is, the timing at which the sustain pulse rises again, in accordance with the lighting rate, without giving any visual discomfort.

Next, all the discharge cells on the PDP are the first
The relationship between the complete lighting voltage for lighting by the second discharge and the lighting rate will be described. FIG. 27 is a diagram illustrating the relationship between the complete lighting voltage and the lighting rate. In FIG. 27, 4
The relationship between the complete lighting voltage (V) and the lighting rate (%) when the delay time Td is 350 ns and the inductance value of the recovery coil L is 0.36 μH using a 2-inch PDP is shown. , A black square indicates a case where the maintenance period is 7 μs, and a black diamond indicates a case where the maintenance period is 8 μs.
μs.

As shown in FIG. 27, it can be seen that the complete lighting voltage decreases as the sustain period becomes longer. When driving a PDP at a practical voltage, for example, 185 V,
When the lighting period exceeds 80% when the maintenance period is 6 μs,
A discharge cell that does not light is generated in the discharge cell of the PDP, and stable sustain discharge cannot be performed. Also, if the maintenance cycle is 7
In the case of μs, all discharge cells can be lit for all lighting rates, but a sufficient margin cannot be secured in consideration of PDP variation and the like.

On the other hand, when the sustain period is 8 μs, the first and second discharges can be generated in all the discharge cells for all the lighting rates while securing a sufficient margin, and the light can be stably lit. . As described above, by changing the sustaining cycle according to the lighting rate, the stability of the sustaining discharge in performing the first and second discharges can be ensured. The embodiment will be described below.

Next, a description will be given of a plasma display device according to a fifth embodiment of the present invention. FIG.
FIG. 14 is a block diagram illustrating a configuration of a plasma display device according to a fifth embodiment of the present invention.

The difference between the plasma display device shown in FIG. 28 and the plasma display device shown in FIG.
The subfield processor 3 is changed to the subfield processor 3c, and the other points are the same as those of the plasma display device shown in FIG. Only the details will be described.

The subfield processor 3c shown in FIG.
Is a scan driver drive control signal for changing the maintenance cycle according to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 in addition to the normal operation of the subfield processor 3 shown in FIG. A CS and a sustain driver drive control signal US are generated and output to the scan driver 5 and the sustain driver 6, respectively.

FIG. 29 is a block diagram showing a configuration of subfield processor 3c shown in FIG. The difference between the subfield processor 3c shown in FIG. 29 and the subfield processor 3 shown in FIG.
9 and the maintenance cycle determining unit 40 are added, and the basic control signal generator 33 is changed to the basic control signal generator 33b. Other points are the same as those of the subfield processor 3 shown in FIG. Therefore, the same reference numerals are given to the same parts, and the detailed description is omitted below.

Lighting rate / sustain cycle LUT 39 shown in FIG.
Is connected to the maintenance cycle determination unit 40 and stores the relationship between the lighting rate and the maintenance cycle based on the experimental data in a table format. For example, a maintenance period of 6 μs is stored for a lighting ratio of less than 80%, and a maintenance period of 8 μs is stored for a lighting ratio of 80% or more.

The maintenance cycle determining section 40 is connected to the basic control signal generator 33b, and determines the corresponding maintenance cycle in accordance with the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 by the lighting rate / sustain cycle. The read sustain period is read from the LUT 39, and the read sustain period is stored in the basic control signal generator 33b.
Output to Note that the determination of the maintenance cycle is not particularly limited to an example in which the relationship between the lighting rate and the maintenance cycle based on the experimental data is stored in a table format as described above, and an approximate expression representing the relationship between the lighting rate and the maintenance cycle, For example, the maintenance cycle for a lighting rate of 60% or less is fixed to 6 μs, the maintenance cycle for a lighting rate of 100% is fixed to 8 μs, and the lighting rate is approximated by a linear expression between 60% and 100%. The maintenance cycle corresponding to the rate may be obtained.

Basic control signal generator 33b outputs control signals S1 to S4 as sustain driver drive control signal US so that sustain driver 6 outputs a sustain pulse at the sustain period determined by sustain period determining section 40. .

With the above configuration, the subfield processor 3c changes the delay time Td in accordance with the lighting rate measured by the subfield lighting rate measuring device 8, and outputs the control signal S
In addition to controlling the timing when 1 goes to a high level and the timing when the control signal S3 goes to a low level, the sustain period of the sustain pulse output from the sustain driver 6 is controlled.

The scan driver 5 is also controlled by the subfield processor 3c in the same manner as described above, and similarly, the waveform and cycle of the sustain pulse applied to the scan electrode 12 are controlled according to the lighting rate of each subfield. You.

In the present embodiment, the subfield processor 3c corresponds to the control means, and the other points are the same as in the first embodiment.

FIG. 30 is a timing chart showing the operation of the sustain driver 6 shown in FIG. 28 during the sustain period when the delay time Td is 350 ns and the sustain period is 8 μs. FIG. 30 shows the voltage at node N1, the discharge intensity LR of PDP 7, and the control signals S1 to S4 input to transistors Q1 to Q4 in FIG.

As shown in FIG. 30, when the delay time Td is 35
When the sustain period is 8 μs at 0 ns, the first
And the second discharge are continuously performed. However, since the sustain period is long, the wall voltage can be sufficiently formed by the second discharge. Therefore, the first discharge and the second discharge after a half period are performed. Discharge is more reliable. As a result, the second discharge can sufficiently enjoy the priming effect of the first discharge, and the second discharge has a sufficient intensity, that is, a peak value larger than the peak value of the first discharge. Sustain discharge can be stably repeated.

FIG. 31 is a diagram showing the relationship between the efficiency evaluation value and the lighting rate when the maintenance cycle is 6 μs and 8 μs in the plasma display device shown in FIG. In addition,
In the figure, open triangles indicate the case where the maintenance period is 6 μs, black triangles indicate the case where the maintenance period is 8 μs, and the delay times are both 350 ns.

As shown in FIG. 31, the lighting rate is 80 to 10
In the 0% range, the efficiency evaluation value is higher when the maintenance period is 8 μs than when the maintenance period is 6 μs. As described above, when the lighting rate becomes equal to or more than the predetermined value, it is understood that the power consumption when displaying the same luminance can be reduced by lengthening the maintenance period.

FIG. 32 is a graph showing the relationship between the efficiency evaluation value and the lighting rate shown in FIG. 31, and when the lighting rate becomes 80% or more by the subfield processor 3c, the sustain period is changed from 6 μs to 8%.
It is a figure which shows the relationship between the efficiency evaluation value at the time of switching to microseconds, and a lighting rate.

The solid line shown in FIG. 32 indicates the relationship between the efficiency evaluation value and the lighting rate when the power consumption is minimized in the delay time control according to the lighting rate described with reference to FIG. When the rate is 0 to 25%, the delay time Td is 0 ns
When the lighting rate is 25 to 45%, the delay time Td is set to 100 ns, and when the lighting rate is 45 to 60%, the delay time Td is set to 200 ns, and the lighting rate is 60 to 85%.
, The delay time Td is set to 350 ns, and the lighting rate is 8
When 5% to 100%, the delay time Td is set to 200 ns, and the maintenance period is set to 6 μs for all lighting rates.
2 shows the relationship between the efficiency evaluation value and the lighting rate when the setting is made.

Next, the portion shown by the dashed line in FIG. 32 indicates that the delay time Td is 350 ns when the lighting rate is 80 to 100%.
And the relationship between the efficiency evaluation value and the lighting rate when the maintenance cycle is changed to 8 μs. That is, the case where the maintenance cycle is lengthened when the lighting rate is a predetermined value, for example, 80% or more is shown. In this case, the lighting rate is 8
The efficiency evaluation value further increases in the range of 0 to 100%, and the power consumption can be further reduced.

Next, a description will be given of a plasma display device according to a sixth embodiment of the present invention. FIG.
FIG. 14 is a block diagram illustrating a configuration of a plasma display device according to a sixth embodiment of the present invention.

The difference between the plasma display device shown in FIG. 33 and the plasma display device shown in FIG. 28 is that the subfield processor 3c is changed to a subfield processor 3d, and the other points are shown in FIG. Since the configuration is the same as that of the plasma display device shown, the same portions are denoted by the same reference numerals, and only different portions will be described below in detail.

The subfield processor 3d shown in FIG.
In addition to the normal operation of the subfield processor 3c shown in FIG. 28, a scan driver drive control signal CS for increasing or decreasing the number of sustain pulses so as to make the luminance equal before and after switching when the sustain period is switched. And a sustain driver drive control signal US is generated and output to the scan driver 5 and the sustain driver 6, respectively.

FIG. 34 is a block diagram showing a configuration of subfield processor 3d shown in FIG. The difference between the subfield processor 3d shown in FIG. 34 and the subfield processor 3c shown in FIG.
T41, multiplication coefficient determination unit 42 and pulse number calculation unit 43
Are added, and the basic control signal generator 33b is changed to the basic control signal generator 33c. Other points are the same as those of the subfield processor 3c shown in FIG. The same reference numerals are given and the detailed description is omitted below.

A maintenance cycle / multiplication coefficient LUT4 shown in FIG.
Numeral 1 is connected to the multiplication coefficient determination unit 42 and stores the relationship between the maintenance cycle and the multiplication coefficient based on the experimental data in a table format. For example, 1 is stored as a multiplication factor for a maintenance period of 6 μs, 1 / 1.006 is stored as a multiplication factor for a maintenance period of 7 μs, and a maintenance period of 8 μs
Is stored as 1 / 1.012 as a multiplication coefficient.

The multiplication coefficient determination unit 42
The multiplication coefficient is connected from the maintenance cycle / multiplication coefficient LUT 41 in accordance with the maintenance cycle determined by the maintenance cycle determination unit 40 and is connected to the zero and pulse number calculation unit 43, and the read multiplication coefficient is transmitted to the pulse number calculation unit 43. Output. The determination of the multiplication coefficient is not particularly limited to an example in which the relationship between the maintenance cycle and the multiplication coefficient based on the experimental data is stored in a table format as described above. A multiplication coefficient corresponding to the maintenance cycle may be obtained.

The number-of-pulses calculation section 43 is connected to the basic control signal generator 33c, and multiplies the number of sustain pulses adjusted by multiplying the multiplication coefficient determined by the multiplication coefficient determination section 42 with the reference number of sustain pulses. The signal is output to the signal generator 33c.

The basic control signal generator 33c outputs control signals S1 to S4 as sustain driver drive control signals US so that the sustain driver 6 outputs sustain pulses with the adjusted number of sustain pulses.

With the above configuration, the subfield processor 3d controls the delay time Td and the sustain period in accordance with the lighting rate measured by the subfield lighting rate measuring device 8, and maintains the output from the sustain driver 6. Control the number of pulses.

The scan driver 5 is also controlled by the subfield processor 3d in the same manner as described above, and similarly, the waveform, period and number of the sustain pulse applied to the scan electrode 12 according to the lighting rate of each subfield are determined. Controlled.

In the present embodiment, the subfield processor 3d corresponds to the control means, and the other points are the same as in the first embodiment.

In the case where a PDP having the characteristics shown in FIG. 16 is used, for example, if the sustain period is extended by 1 μs, the luminance increases by 0.6%. In order to correct such a change in luminance, the subfield processor 3d corrects the number of sustain pulses after the switching at the same time as the switching of the sustain cycle. For example, when the sustain period is switched from 6 μs to 8 μs, 99 (≒) when the number of sustain pulses is 100 pulses
If the number of pulses is changed to 100-100 × 0.012 and the number of sustain pulses is 150, 148 (≒ 150-15)
0 × 0.012) Change to pulse.

By correcting the number of pulses in this way, the luminance becomes equal before and after the switching of the maintenance period, and the delay time Td and the maintenance period can be switched without giving a sense of visual discomfort. In the above description, the case where the maintenance cycle is switched once is described. However, when the maintenance cycle is switched a plurality of times, the same effect is obtained by performing the same control at each switching. be able to.

In the case where the luminance is different before and after the switching as described above, the period may be switched in small increments without changing the period at once, and may be changed so as to be substantially continuous.

For example, when the lighting rate is 80%, 6 μs to 8
Instead of switching to μs, control may be performed to extend the maintenance period by 0.1 μs every time the lighting rate increases by 1% using the continuity of the video signal. In this case, the change in luminance before and after the cycle switching is 0.06 (= 1.2 / 2).
0)%, and the delay time Td and the maintenance period can be switched according to the lighting rate without giving a visual unnatural feeling.

Next, a description will be given of a plasma display device according to a seventh embodiment of the present invention. FIG.
FIG. 16 is a block diagram illustrating a configuration of a plasma display device according to a seventh embodiment of the present invention.

The difference between the plasma display device shown in FIG. 35 and the plasma display device shown in FIG. 28 is that the subfield processor 3c is changed to a subfield processor 3e, and the other points are shown in FIG. Since the configuration is the same as that of the plasma display device shown, the same portions are denoted by the same reference numerals, and only different portions will be described below in detail.

The subfield processor 3e shown in FIG.
In addition to the normal operation of the sub-field processor 3c shown in FIG. 28, when the delay time Td and the maintenance period are switched, the same sub-field is set according to the lighting rate of each sub-field so that the luminance becomes equal before and after the switching. A scan driver drive control signal CS and a sustain driver drive control signal US for changing the delay time Td and the ratio of two types of sustain pulses having different sustain periods in the field are produced and output to the scan driver 5 and the sustain driver 6, respectively. I do.

FIG. 36 is a block diagram showing the structure of subfield processor 3e shown in FIG. The difference between the subfield processor 3e shown in FIG. 36 and the subfield processor 3c shown in FIG.
A UT 44 and a changing pulse number determination unit 45 are added, and the delay time determination unit 32, the maintenance period determination unit 40, and the basic control signal generator 33b are replaced with the delay time determination unit 32a, the maintenance period determination unit 40a, and the basic control signal generator. 33d, and the other points are the same as those of the subfield processor 3c shown in FIG. 29.

Lighting rate / change pulse number LUT shown in FIG.
Reference numeral 44 is connected to the changing pulse number determining unit 45, and stores the relationship between the lighting rate and the changing pulse number based on the experimental data in a table format. For example, when the lighting rate is 35 to 45%, the number of change pulses is 0 when the lighting rate is 35%, becomes 1 when the lighting rate is 45%, and increases in proportion to the increase in the lighting rate. 1 is stored. Similarly, 0 to 1 is stored as the number of change pulses for the lighting rate of 55 to 65%, and 0 to 1 is stored as the number of change pulses for the lighting rate of 80 to 90%. For other lighting rates, 0 is stored as the number of change pulses.

Here, the number of change pulses is determined by first applying the first sustain pulse in the same subfield to discharge the discharge cells in the first discharge state, and thereafter changing the first sustain pulse.
When the discharge cells are discharged in a second discharge state different from the first discharge state by applying a second sustain pulse different from the first sustain pulse, the second sustain pulse for the total number of times of application of the sustain pulse in the same subfield is applied. This is the ratio of the number of times the sustain pulse is applied. Therefore, when the number of change pulses is 0, only the first sustain pulse is applied in the same subfield, and the number of times of application of the second sustain pulse increases in accordance with the increase in the number of change pulses, and the number of change pulses is 1 In this case, only the second sustain pulse is applied within the same subfield.

The changing pulse number determining unit 45 is connected to the delay time determining unit 32a and the sustain period determining unit 40a, and corresponds to the changing pulse corresponding to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8. The number is read from the lighting rate / change pulse number LUT 44, and the read change pulse number is output to the delay time determination unit 32a and the maintenance cycle determination unit 40a. The number of change pulses is determined by
As described above, the relationship between the lighting rate and the number of change pulses based on the experimental data is not particularly limited to an example in which the relationship is stored in a table format.
The number of changing pulses corresponding to the lighting rate may be obtained from an approximate expression representing the relationship between the lighting rate and the number of changing pulses.

In the present embodiment, for example, the lighting rate / delay time LUT 31 stores 0 ns as the first delay time Td1 for a lighting rate of 0 to 35%, and a lighting rate of 35%.
0 ns is stored as the first delay time Td1 with respect to ４５45%, and 20 ns is stored as the second delay time Td2.
0 ns is stored, and the lighting rate is 45% to 55%.
200 ns is stored as the first delay time Td1 of the lighting rate 55-65%.
00ns is stored, and the second delay time Td2
Is stored as 350 ns as the first delay time Td1 for the lighting rate of 65 to 80%, and the first delay time Td for the lighting rate of 80 to 90%.
350 ns is stored as 1 and 200 ns is stored as the second delay time Td2.
200% as the first delay time Td1 for ２００100%
ns is stored.

Here, the first delay time Td1 is set so that the first sustain pulse is first applied in the same subfield to discharge the discharge cells in the first discharge state, and thereafter the first delay time Td1 is set to the first discharge time. When a second sustain pulse different from the sustain pulse is applied to discharge the discharge cells in a second discharge state different from the first discharge state, a delay time Td of the first sustain pulse and a second delay time Time Td2 is the delay time Td of the second sustain pulse in this case.

The lighting rate is 0 to 35%, 45 to 55
%, 65 to 80% and 90 to 100%, the second delay time Td2 is not stored. In the case of these lighting rates, in the present embodiment, the first delay time Td2 is not stored in the same subfield. This is because only the pulse is applied, the second sustain pulse is not applied, and the second delay time Td2 becomes unnecessary.

The delay time determining unit 32a includes delay units 34 and 3
5, the first and second delay times Td1 and Td2 corresponding to the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8 are read from the lighting rate / delay time LUT 31, and the change pulse Number determination unit 4
One of the first and second delay times Td1 and Td2 is set as a delay time Td so that the first and second sustain pulses are applied in the same subfield in accordance with the number of change pulses output from Step 5. Output to the delay units 34 and 35, and the delay unit 3 performs the delay operation by the delay time Td.
4, 35 are controlled.

More specifically, in the sustain period of the same subfield, delay time determining section 32a sets the first sustain pulse so that all sustain pulses in the sustain period become the first sustain pulse when the number of change pulses is zero. Is output, and the second delay time Td2 is output so that the number of times of application of the second sustain pulse increases according to the increase in the number of change pulses. For example, when the number of change pulses is 0.2 The first 80% of the sustain pulse in the sustain period is the first sustain pulse so as to be the first sustain pulse.
After outputting the delay time Td1, the second delay time Td2 is output so that the remaining 20% becomes the second sustain pulse. Finally, when the number of change pulses is 1, all of the sustain period is output. The second delay time Td2 is output so that the sustain pulse becomes the second sustain pulse. Therefore, in the sustain period of the same subfield, two types of first and second sustain pulses having different delay times can be applied at a rate corresponding to the number of change pulses.

In the present embodiment, the lighting rate / sustain cycle LUT 39 stores, for example, 6 μs as the first sustain cycle for a lighting rate of 0 to 35% and a lighting rate of 35 to 45%.
%, 6 μs is stored as the first maintenance cycle, 7 μs is stored as the second maintenance cycle, and 7 μs as the first maintenance cycle for the lighting rate of 45 to 55%.
Is stored, 7 μs is stored as the first maintenance cycle for the lighting rate of 55 to 65%, and 8 μs is stored for the second maintenance cycle, and the first maintenance cycle is 65 to 80%. Is stored as 8 μs as the first maintenance cycle for a lighting rate of 80 to 90%, and 7 μs is stored as the second maintenance cycle, and the lighting rate is 90 to 100%. , 7 μs is stored as the first maintenance cycle.

Here, in the first sustain period, the first sustain pulse is first applied in the same subfield to discharge the discharge cells in the first discharge state, and thereafter, the first sustain pulse is applied. When a discharge cell is discharged in a second discharge state different from the first discharge state by applying a second sustain pulse different from the pulse, the sustain period is a sustain period of the first sustain pulse, and the second sustain period is , The sustain period of the second sustain pulse in this case.

The lighting rate is 0 to 35%, 45 to 55
%, 65 to 80% and 90 to 100%, the reason why the second sustain period is not stored is that, in the case of these lighting rates, in the present embodiment, the first sustain pulse is in the same subfield. This is because only the second sustain pulse is applied and the second sustain pulse is not applied, and the second sustain cycle is not required.

The maintenance cycle determining unit 40a is connected to the basic control signal generator 33d,
The corresponding first and second sustain periods are read from the lighting ratio / sustain period LUT 39 in accordance with the subfield lighting rate signal SL output from the sub-field, and are identical in accordance with the number of changing pulses output from the changing pulse number determining unit 45. One of the first and second sustain periods is output to basic control signal generator 33d so that the first and second sustain pulses are applied in the subfield.

More specifically, in the sustain period of the same subfield, the sustain period determining unit 40a operates the first sustain pulse so that all the sustain pulses in the sustain period become the first sustain pulse when the number of change pulses is zero. And outputs a second sustaining cycle such that the number of times of application of the second sustaining pulse increases as the number of changing pulses increases. For example, when the number of changing pulses is 0.2, the second sustaining cycle is maintained. First 80 of sustain pulse of period
% Is the first sustain pulse, and the second sustain cycle is output so that the remaining 20% is the second sustain pulse. Finally, the number of change pulses Is 1, the second sustain period is output so that all the sustain pulses in the sustain period become the second sustain pulses. Therefore,
In the sustain period of the same subfield, two types of first and second sustain pulses having different sustain periods can be applied at a rate corresponding to the number of change pulses.

Basic control signal generator 33d outputs control signals S1 to S4 as sustain driver drive control signal US such that sustain driver 6 outputs a sustain pulse at the sustain period determined by sustain period determining section 40a. .

With the above configuration, the subfield processor 3e controls the delay time and the sustain period of the sustain pulse in accordance with the lighting rate measured by the subfield lighting rate measuring device 8, and also controls the number of change pulses. Thus, the ratio between the number of times of applying the first sustain pulse and the number of times of applying the second sustain pulse in the same subfield can be controlled.
Since the number of sustain pulses in the sustain period of each subfield is set to a predetermined number in advance, the number of application of the first and second sustain pulses may not always be set at a rate corresponding to the number of change pulses. However, in this case, the settable number of application times that is closest to the ratio according to the number of change pulses is set.

The scan driver 5 is also controlled by the subfield processor 3e in the same manner as described above, and similarly, the delay time and the sustain period of the sustain pulse applied to the scan electrode 12 according to the lighting rate of each subfield are set. In addition to the control, the ratio between the number of times the first sustain pulse is applied and the number of times the second sustain pulse is applied in the same subfield is controlled in accordance with the number of change pulses.

In the present embodiment, the subfield processor 3e corresponds to the control means, and the other points are the same as in the first embodiment.

When a PDP having the characteristics shown in FIG. 16 is used, as described in the fourth and sixth embodiments, the luminance becomes discontinuous due to the switching of the delay time and the maintenance period, and The user may feel this change in luminance as flicker. This is because the delay times and the sustain periods of all the sustain pulses in the subfield change simultaneously.

In the present embodiment, with the above configuration, the ratio of the two types of first and second sustain pulses having different delay times and sustain periods in accordance with the lighting rate of each subfield is determined as follows. By changing within the same subfield, the above-mentioned large change in luminance is suppressed,
We try not to make viewers feel flicker.

First, when the lighting rate is 0 to 35%, the delay time is 0 ns and the sustain period is 6 μm in each subfield.
s of the first sustain pulse is applied. That is, only one type of sustain pulse for performing one discharge in the sustain period of the same subfield is applied.

On the other hand, when the lighting rate is 45 to 55%, a first sustain pulse having a delay time of 200 ns and a sustain period of 7 μs is applied in each subfield. That is, only one type of sustain pulse for performing the first and second discharges in the sustain period of the same subfield is applied.

Here, when the lighting rate is 35 to 45%, a first sustaining pulse having a delay time of 0 ns and a sustaining period of 6 μs in each subfield (a sustaining pulse when the lighting rate is 0 to 35%) is used. 200 ns delay time and 7 maintenance cycles
A second sustain pulse of μs (sustain pulse when the lighting rate is 45 to 55%) is applied at a rate corresponding to the lighting rate. That is, a first sustain pulse for performing one discharge and a second sustain pulse for performing the first and second discharges are applied at a rate corresponding to the lighting rate in the sustain period of the same subfield.

Specifically, when the lighting rate is 35%, the first
Are applied so that the ratio of the sustain pulse is 100% and the ratio of the second sustain pulse is 0%. When the lighting rate increases, the number of application of the first sustain pulse in the sustain period of the same subfield is decreased and the number of application of the second sustain pulse is increased in accordance with the increase in the lighting rate. In the case of%, the number of application of the first and second sustain pulses is controlled so that the first 80% of the sustain period becomes the first sustain pulse and the remaining 20% becomes the second sustain pulse. Finally, when the lighting rate is 45%, the sustain pulse is applied so that the ratio of the first sustain pulse is 0% and the ratio of the second sustain pulse is 100%.

As described above, when the delay time and the sustain period are switched, the ratio between the sustain pulse before the switch and the sustain pulse after the switch is gradually changed in the same subfield according to the lighting rate. All the sustain pulses in the field are not switched at the same time, and the luminance changes continuously when switching from one discharge to the first and second discharges, thereby preventing the occurrence of flicker.

Next, when the lighting rate is 65 to 80%, a first sustain pulse having a delay time of 350 ns and a sustain period of 8 μs is applied in each subfield. That is, only one type of sustain pulse for performing the first and second discharges in the sustain period of the same subfield is applied.

Here, when the lighting rate is 55 to 65%, the first sustaining pulse having a delay time of 200 ns and a sustaining period of 7 μs in each subfield (the lighting rate is 45 to 55%)
And a second sustain pulse having a delay time of 350 ns and a sustain period of 8 μs (lighting rate of 65 to 80%)
Is applied at a rate corresponding to the lighting rate. That is, a first sustain pulse for performing the first and second discharges in the sustain period of the same subfield, and a second sustain for performing the first and second discharges having a longer delay time and a longer sustain period than the first sustain pulse. And a pulse are applied at a rate corresponding to the lighting rate.

Specifically, when the lighting rate is 55%, the first
Are applied so that the ratio of the sustain pulse is 100% and the ratio of the second sustain pulse is 0%. When the lighting rate increases, the number of application of the first sustain pulse in the sustain period of the same subfield is decreased and the number of application of the second sustain pulse is increased in accordance with the increase of the lighting rate. In the case of%, the number of application of the first and second sustain pulses is controlled so that the first 80% of the sustain period becomes the first sustain pulse and the remaining 20% becomes the second sustain pulse. Finally, when the lighting rate is 65%, the sustain pulse is applied such that the ratio of the first sustain pulse is 0% and the ratio of the second sustain pulse is 100%.

As described above, when the delay time and the sustain period are switched, the ratio between the sustain pulse before the switch and the sustain pulse after the switch is gradually changed in the same subfield in accordance with the lighting rate. All sustain pulses in the field are not switched at the same time, and the brightness changes continuously when switching from the first and second discharges at short time intervals to the first and second discharges at long time intervals. And flicker can be prevented.

Finally, when the lighting rate is 90 to 100%,
In each subfield, a first sustain pulse having a delay time of 200 ns and a sustain period of 7 μs is applied. That is, only one type of sustain pulse for performing the first and second discharges in the sustain period of the same subfield is applied.

Here, when the lighting rate is 80 to 90%, the first sustaining pulse having a delay time of 350 ns and a sustaining period of 8 μs in each subfield (lighting rate of 65 to 80%
And a second sustain pulse having a delay time of 200 ns and a sustain period of 7 μs (lighting rate of 90 to 100).
%) And a rate corresponding to the lighting rate. That is, the first sustain pulse for performing the first and second discharges during the sustain period of the same subfield and the first sustain pulse
, And a second sustain pulse for performing first and second discharges having a shorter delay time and a shorter sustain period than the sustain pulse are applied at a rate corresponding to the lighting rate.

Specifically, when the lighting rate is 80%, the first
Are applied so that the ratio of the sustain pulse is 100% and the ratio of the second sustain pulse is 0%. When the lighting rate increases, the number of application of the first sustain pulse in the sustain period of the same subfield is decreased and the number of application of the second sustain pulse is increased in accordance with the increase of the lighting rate. In the case of%, the number of application of the first and second sustain pulses is controlled so that the first 80% of the sustain period becomes the first sustain pulse and the remaining 20% becomes the second sustain pulse. Finally, when the lighting rate is 90%, the sustain pulse is applied such that the ratio of the first sustain pulse is 0% and the ratio of the second sustain pulse is 100%.

As described above, when the delay time and the sustain period are switched, the ratio between the sustain pulse before the switch and the sustain pulse after the switch is gradually changed in the same subfield according to the lighting rate. All sustain pulses in the field are not switched at the same time, and the brightness changes continuously when switching from the first and second discharges at a long time interval to the first and second discharges at a short time interval. And flicker can be prevented.

FIG. 37 shows the relationship between the efficiency evaluation value and the lighting rate of the plasma display device shown in FIG. As shown in FIG. 37, in the present embodiment, as described above, by switching the delay time and the maintenance period according to the lighting rate for each subfield, the luminous efficiency with respect to the applied power is improved, and the power consumption is reduced. Can be reduced.

Further, in this embodiment, before and after the switching of the delay time and the sustaining period, the ratio of the sustaining pulse before the switching and the sustaining pulse after the switching in the same subfield is changed according to the lighting rate. The brightness can be continuously changed by gradually changing the ratio of the two different types of sustain pulses, and the delay time and the sustain period can be switched without giving a visual sense of incongruity.

In the above description, the switching of the delay time and the maintenance cycle is performed three times.
Even when the delay time and the maintenance period are switched another number of times, the same effect can be obtained by performing the same control as above at each switching.

In addition, the control of the number of times of applying the first and second sustain pulses is not performed in all subfields, but is performed only in subfields having a large visual influence on the viewer and having large weights. Is also good.

In this embodiment, both the delay time and the sustain period are switched. However, when either the delay time or the sustain period is switched, the number of times of applying the first and second sustain pulses is controlled. You may.

Next, a description will be given of a plasma display device according to an eighth embodiment of the present invention. FIG.
FIG. 16 is a block diagram illustrating a configuration of a plasma display device according to an eighth embodiment of the present invention.

The difference between the plasma display device shown in FIG. 38 and the plasma display device shown in FIG.
The difference is that an inductance control circuit 15 for changing the inductance value of the scan driver 5b and the sustain driver 6b according to the lighting rate of each subfield is added, and the other points are the same as those of the plasma display device shown in FIG. The same reference numerals are given to the same portions, and only different portions will be described in detail below.

The inductance control circuit 15 shown in FIG.
Receives the sub-field lighting rate signal SL output from the sub-field lighting rate measuring device 8 and generates inductance control signals LC and LU for controlling an inductance value contributing to LC resonance according to the lighting rate of each sub-field. Output to the scan driver 5b and the sustain driver 6b, respectively.

FIG. 39 is a block diagram showing a configuration of inductance control circuit 15 shown in FIG. The inductance control circuit 15 illustrated in FIG. 39 includes a lighting rate / inductance LUT 151 and an inductance determination unit 152.

The lighting rate / inductance LUT 151 is
It is connected to the inductance determining unit 152, and stores the relationship between the lighting rate based on experimental data and the inductance value that contributes to LC resonance in a table format. For example, when the lighting rate is 65 to 100%, the inductance value is set to 0.1.
36 μH is stored, and 0.6 μH is stored as an inductance value for a lighting rate of 0 to 65%.

The inductance determining section 152 reads a corresponding inductance value from the lighting rate / inductance LUT 151 in accordance with the subfield lighting rate signal SL output from the subfield lighting rate measuring device 8, and reads the read inductance value as an inductance control signal. LC,
The data is output as an LU to the scan driver 5b and the sustain driver 6b. Note that the determination of the inductance value is not particularly limited to an example in which the relationship between the lighting rate and the inductance value based on the experimental data is stored in a table format as described above, and is determined from an approximate expression representing the relationship between the lighting rate and the inductance value. An inductance value corresponding to the lighting rate may be obtained.

With the above configuration, the inductance control circuit 15 controls the inductance value of the scan driver 5b and the sustain driver 6b that contributes to the LC resonance according to the lighting rate measured by the subfield lighting rate measuring device 8.

Next, the sustain driver 6 shown in FIG.
b will be described in detail. FIG. 40 is a circuit diagram showing a configuration of sustain driver 6b shown in FIG. Note that the scan driver 5b of the present embodiment is also configured and operates similarly to the sustain driver 6b.
A detailed description of the scan driver 5b is omitted, and only the sustain driver 6b will be described in detail below.

The difference between the sustain driver 6b shown in FIG. 40 and the sustain driver 6 shown in FIG. 3 is that the recovery coil L is changed to a variable inductance unit VL that changes the inductance value according to the inductance control signal LU. The other parts are the same as those of the sustain driver 6 shown in FIG.
Hereinafter, only different points will be described in detail.

The variable inductance section VL shown in FIG.
Is connected between the node N2 and the node N1, and changes the inductance value according to the inductance control signal LU output from the inductance control circuit 15.

In the present embodiment, the scan driver 5b
And the sustain driver 6b corresponds to the driving unit and the first and second driving units, and the variable inductance unit V
L, the recovery capacitor C1, the transistor Q3, and the diode D1 correspond to a first driving unit, the inductance control circuit 15 corresponds to an inductance control unit, the variable inductance unit VL corresponds to an inductance unit and a variable inductance unit. The points are the same as in the first embodiment.

FIG. 41 is a circuit diagram showing a configuration of variable inductance portion VL shown in FIG. The variable inductance section VL shown in FIG. 41 includes recovery coils LB and LS and a transistor QL.

The recovery coil LB is connected between the nodes N2 and N
1, the recovery coil LS and the transistor QL are connected in series between the node N2 and the node N1, and the recovery coil LB and the recovery coil LS are connected in parallel. The inductance control signal LU is input to the gate of the transistor QL.

Here, when the inductance value of the recovery coil LB is 0.6 μH and the inductance value of the recovery coil LS is 0.9 μH, the combined inductance value of the recovery coils LB and LS is 0.36 μH. FIG. 42 shows the relationship between the lighting rate and the efficiency evaluation value at each delay time when the inductance value is 0.6 μH, and the lighting rate and the lighting rate at each delay time Td when the inductance value is 0.36 μH. The relationship with the efficiency evaluation value is shown in FIGS. 16 and 31 (FIG. 31 shows a case where the delay time in FIG. 16 is 350 ns).
The relationship in the case where the period is changed in a part of the lighting rate range) is shown in FIG.

In FIG. 42, the delay time Td represented by each symbol is the same as in FIG. 16, and the efficiency evaluation value of each delay time Td at each lighting rate is the delay of the corresponding lighting rate shown in FIG. When the time is 0 ns, that is, when the inductance value is 0.36 μH, the delay time 0 of the corresponding lighting rate is 0.
The efficiency evaluation value of ns is used as a reference, and the result is divided by this value and normalized. This shows that the power consumption decreases as the efficiency evaluation value increases.

Comparing FIG. 42 with FIG. 16, it can be seen that the power consumption is further reduced in FIG. 42 having a larger inductance value. Therefore, power consumption can be reduced not only by controlling the delay time Td but also by changing the inductance value that contributes to LC resonance, as in the above embodiments.

FIG. 43 shows that the inductance value is changed from 0.6 μH to 0.36 μH when the lighting rate becomes 65% or more by the inductance control circuit 15 based on the relationship between the efficiency evaluation value and the lighting rate shown in FIG. FIG. 9 is a diagram illustrating a relationship between an efficiency evaluation value and a lighting rate when switching is performed.

The solid line shown in FIG. 43 shows the relationship between the efficiency evaluation value and the lighting rate when the power consumption is minimized, that is, the lighting rate in the control of the maintenance cycle according to the lighting rate described with reference to FIG. Is 0 to 25%, the delay time Td is set to 0 ns. When the lighting rate is 25 to 45%, the delay time Td is set to 1 ns.
When the lighting rate is 45-60%, the delay time Td is set to 200 ns, and the lighting rate is 60-100%.
, The delay time Td is set to 350 ns,
When the lighting rate is 0 to 80%, the maintenance cycle is set to 6 μs,
It shows the relationship between the efficiency evaluation value and the lighting rate when the maintenance period is set to 8 μs when the lighting rate is 80 to 100%.

Next, the portion indicated by the dashed line in FIG. 43 indicates that the lighting value was set to 0 μH after setting the inductance value to 0.6 μH.
The delay time is set to 0 ns with respect to ~ 30%, and the lighting rate is 30 ~
The relationship between the lighting rate and the efficiency evaluation value when the delay time is set to 200 ns for 65% is shown. As the control of the inductance value, when the lighting rate is 0 to 65%, the inductance value is controlled to 0.6 μH, and when the lighting rate is 65 to 100%, the inductance value is controlled to 0.36 μH.
That is, the case where the inductance value is reduced when the lighting rate is a predetermined value, for example, 65% or more, is shown. In this case, the efficiency evaluation value further increases in the lighting rate range of 0 to 65%, and the power consumption can be further reduced.

Therefore, when the lighting rate is 0 to 65%,
The inductance control circuit 15 outputs a low-level signal as the inductance control signal LU, the transistor QL is turned off, and only the inductance LB having an inductance value of 0.6 μH contributes to LC resonance. When the lighting rate is 65 to 100%, the inductance control circuit 15 outputs a high-level signal as the inductance control signal LU, and the transistor QL is turned on.
Recovery coil L having an inductance value of 0.36 μH
The combined inductance of S and LB contributes to LC resonance.

As described above, in the present embodiment, not only the timing when the sustain pulse increases again, but also the inductance value of the LC resonance that causes the sustain pulse to rise according to the increase in the lighting rate is controlled. Therefore, discharge can be performed in a state where power consumption is further reduced. In addition,
In the above description, both the timing at which the sustain pulse rises again and the inductance value are controlled. However, the power consumption may be reduced by controlling only the inductance value.

FIG. 44 is a circuit diagram showing a configuration of another example of the variable inductance section shown in FIG. The variable inductance section shown in FIG. 44 includes recovery coils La to Ld and transistors Qa to Qd.

The collection coil La and the transistor Qa are connected in parallel, and thereafter, similarly, the collection coil Lb to Ld and the transistors Qb to Qd are connected in parallel, respectively.
A recovery coil and a transistor connected in parallel are connected in series between nodes N2 and N1.

[0315] Here, when the inductance value of the recovery coil La and L _0, the inductance value of the recovery coil Lb to L _0/2, the inductance value of the recovery coil Lc is L
_0/4, the inductance value of the recovery coil Ld is L ₀ /
8 respectively. In this case, outputs the inductance control signal LU1~LU4 inductance control circuit 15 four as an inductance control signal LU, by controlling the on / off transistor QA to QD, it is possible to set the inductance value of two ways ⁴ it can. Therefore, in the case of this example, it is possible to change the inductance value more finely according to the lighting rate, to set a more optimal LC resonance state, and to further reduce power consumption.

[0316] The number of connection of the recovery coil and the transistor is not particularly limited to the above four, but can be changed to various numbers. The variable inductance section is not particularly limited to the above examples, and may have another configuration as long as the variable inductance section can change the inductance value according to the inductance control signal.

In each of the above embodiments, the subfield division by the ADS method has been described as an example. However, the lighting rate of the discharge cells that are simultaneously lit even in the subfield division by the address / sustain simultaneous driving method. A similar effect can be obtained by detecting. Also,
In each of the above embodiments, the description has been given of the case where the luminous efficiency with respect to the input power is improved to reduce the power consumption. May be increased to achieve higher luminance.

[0318]

According to the present invention, the lighting rate of the discharge cells to be lit simultaneously among the plurality of discharge cells is detected, and the driving pulse changed according to the detected lighting rate is selected in the display panel. Since the second discharge is generated after the first discharge is generated by applying the first discharge to the discharge cell, it is possible to apply an optimal drive pulse according to the lighting rate, and the first and second discharges are performed. The light emission efficiency can be improved by the generation, and the first and second discharges can be repeatedly and stably generated. As a result, the discharge can be stably repeated even if the lighting rate changes, and the luminous efficiency with respect to the input power can be improved to reduce the power consumption.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a plasma display device according to a first embodiment of the present invention.

FIG. 2 is a view for explaining an ADS method used in the plasma display device shown in FIG. 1;

FIG. 3 is a circuit diagram showing a configuration of a sustain driver shown in FIG. 1;

FIG. 4 is a timing chart showing an example of the operation of the sustain driver shown in FIG. 3 during the sustain period when the first and second discharges are continuously generated during the sustain discharge;

5 is a diagram showing a relationship between a peak interval of discharge intensity and luminous efficiency of the plasma display device shown in FIG.

FIG. 6 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the peak interval of the discharge intensity of the plasma display device shown in FIG. 1 is 100 ns;

7 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the peak interval of the discharge intensity of the plasma display device shown in FIG. 1 is 300 ns.

8 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the peak interval of the discharge intensity of the plasma display device shown in FIG. 1 is 550 ns.

9 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the peak interval of the discharge intensity of the plasma display device shown in FIG. 1 is 600 ns.

10 is a diagram showing a relationship between power consumption and luminance of the plasma display device shown in FIG.

11 is a block diagram showing a configuration of a subfield processor shown in FIG.

12 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the delay time is 0 ns.

FIG. 13 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the delay time is 100 ns;

14 is a timing chart showing an operation of the sustain driver shown in FIG. 3 during a sustain period when the delay time is 200 ns;

FIG. 15 is a timing chart showing the operation of the sustain driver shown in FIG. 3 during the sustain period when the delay time is 350 ns;

16 is a diagram showing a relationship between an efficiency evaluation value and a lighting rate in each delay time of the plasma display device shown in FIG.

FIG. 17 shows a relationship between the efficiency evaluation value and the lighting rate when the delay time is controlled by the subfield processor according to the lighting rate based on the relationship between the efficiency evaluation value and the lighting rate at each delay time shown in FIG. Figure showing

FIG. 18 is a circuit diagram showing another configuration of the sustain driver shown in FIG. 1;

FIG. 19 is a timing chart showing an operation of the sustain driver shown in FIG. 18 during a sustain period;

FIG. 20 is a block diagram showing a configuration of a plasma display device according to a second embodiment of the present invention.

FIG. 21 is a circuit diagram showing a configuration of the sustain driver shown in FIG. 20;

FIG. 22 is a timing chart showing an operation of the sustain driver shown in FIG. 21 during a sustain period;

FIG. 23 is a diagram showing a waveform of a sustain pulse when discharging is performed continuously multiple times according to the present invention.

FIG. 24 is a block diagram showing a configuration of a plasma display device according to a third embodiment of the present invention.

FIG. 25 is a block diagram showing a configuration of a plasma display device according to a fourth embodiment of the present invention.

26 is a block diagram showing a configuration of a subfield processor shown in FIG.

FIG. 27 is a diagram showing a relationship between a complete lighting voltage and a lighting rate.

FIG. 28 is a block diagram showing a configuration of a plasma display device according to a fifth embodiment of the present invention.

FIG. 29 is a block diagram showing a configuration of a subfield processor shown in FIG. 28;

30 is a timing chart showing the operation of the sustain driver shown in FIG. 28 during the sustain period when the delay time is 350 ns and the sustain period is 8 μs;

31 is a diagram showing the relationship between the efficiency evaluation value and the lighting rate of the plasma display device shown in FIG. 28 when the maintenance period is 6 μs and 8 μs.

FIG. 32 is a diagram showing the relationship between the efficiency evaluation value and the lighting rate when the maintenance cycle is switched from 6 μs to 8 μs when the lighting rate becomes 80% or more.

FIG. 33 is a block diagram showing a configuration of a plasma display device according to a sixth embodiment of the present invention.

FIG. 34 is a block diagram showing a configuration of a subfield processor shown in FIG. 33;

FIG. 35 is a block diagram showing a configuration of a plasma display device according to a seventh embodiment of the present invention.

FIG. 36 is a block diagram showing a configuration of a subfield processor shown in FIG. 35;

FIG. 37 is a view showing the relationship between the efficiency evaluation value and the lighting rate of the plasma display shown in FIG. 35;

FIG. 38 is a block diagram showing a configuration of a plasma display device according to an eighth embodiment of the present invention.

FIG. 39 is a block diagram showing a configuration of the inductance control circuit shown in FIG. 38;

40 is a circuit diagram showing a configuration of the sustain driver shown in FIG. 38.

FIG. 41 is a circuit diagram showing a configuration of a variable inductance unit shown in FIG. 40;

FIG. 42 is a diagram showing the relationship between the lighting rate and the efficiency evaluation value at each delay time when the inductance value is 0.6 μH.

FIG. 43 is a diagram showing the relationship between the efficiency evaluation value and the lighting rate when the inductance value is switched from 0.6 μH to 0.36 μH when the lighting rate becomes 65% or more.

FIG. 44 is a circuit diagram showing a configuration of another example of the variable inductance section shown in FIG. 40;

FIG. 45 is a view for explaining a method of driving a discharge cell of a conventional plasma display device.

FIG. 46 is a circuit diagram showing a configuration of a sustain driver of a conventional plasma display device.

FIG. 47 is a timing chart showing an operation of the sustain driver shown in FIG. 46 during a sustain period;

[Explanation of symbols]

 Reference Signs List 1 A / D converter 2 Video signal-subfield correlator 3, 3a-3e Subfield processor 4 Data driver 5, 5a, 5b Scan driver 6, 6 ', 6a, 6b Sustain driver 7 PDP 8 Subfield lighting rate Measuring instrument 9, 9a Voltage control circuit 10a, 10b Minimum value detector 11 Address electrode 12 Scan electrode 13 Sustain electrode 14 Discharge cell 15 Inductance control circuit 31 Lighting rate / delay time LUT 32 Delay time determination unit 33, 33a to 33d Basic control Signal generators 34, 35 Delay unit 36 Delay time / multiplication coefficient LUT 37, 42 Multiplication coefficient determination unit 38, 43 Pulse number calculation unit 39 Lighting rate / maintenance period LUT 40 Maintenance period determination unit 41 Maintenance period / multiplication coefficient LUT 44 Lighting Rate / Change pulse number LUT 45 Change pal Number determination unit 151 Lighting rate / inductance LUT 152 Inductance determination unit C1 Recovery capacitor C2 Capacitors D1 to D3, DD diode L, LL, LB, LS, La to Ld Recovery coil L1 Coil VL Variable inductance unit IL Current limiting element Q1 to Q6 , QL, Qa-Qd FET VR variable voltage source

────────────────────────────────────────────────── ─── Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI G09G 3/20 670 H04N 5/66 101B H04N 5/66 101 G09G 3/28 H (72) Inventor Hiroyuki Tachibana Kadoma, Osaka Prefecture 1006 Kadoma Matsushita Electric Industrial Co., Ltd. (56) References JP-A-11-282396 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G09G 3/28 G09G 3/20 611 G09G 3/20 621 G09G 3/20 641 G09G 3/20 642 G09G 3/20 670 H04N 5/66 101

Claims (15)

(57) [Claims] 1. A display device for displaying an image by selectively discharging a plurality of discharge cells, comprising: a display panel including the plurality of discharge cells; and a driving pulse applied to a selected discharge cell in the display panel. And a driving unit for generating a second discharge after applying the first discharge, and a detecting unit for detecting a lighting rate of a discharge cell to be turned on simultaneously among the plurality of discharge cells; The first discharge is performed according to the detected lighting rate.
Timing of generating the second discharge after generating electricity
And a control means for controlling the driving means so as to change . 2. The control means according to claim 1 , wherein
After the first discharge is generated as the emitted lighting rate is higher,
So that the timing for generating the second discharge is delayed
The display device according to claim 1, wherein the display device controls the driving unit . 3. The control means according to claim 1 , wherein said control means detects said detection means.
The first discharge was generated in accordance with the increase of the lighting rate issued.
Later, the timing for generating the second discharge is delayed, and
When the lighting rate increases to a predetermined value or more, the first
Timing of generating the second discharge after generating electricity
Controlling the driving means to speed up
The display device according to claim 1 . 4. The control means generates a first discharge.
Before and after the change of the timing to generate the second discharge after
Control the driving means so that the brightness becomes substantially equal.
The display device according to claim 1, wherein: 5. The driving means generates the first discharge by increasing the voltage of the driving pulse.
First driving means for generating the driving pulse and increasing the voltage of the driving pulse again to
Generating the second discharge after generating the first discharge;
And a second drive unit, wherein the control unit is configured to control the lighting rate detected by the detection unit.
Generates a second discharge after generating a first discharge according to
The second driving means so that the timing of the driving is changed
The display device according to claim 1, wherein the display device is controlled. 6. The control means according to claim 1 , wherein
After the first discharge is generated as the emitted lighting rate is higher,
So that the timing for generating the second discharge is delayed
2. The method according to claim 1, wherein the second driving unit is controlled.
5. The display device according to 5 . 7. The control means according to claim 1 , wherein
The first discharge was generated in accordance with the increase of the lighting rate issued.
Later, the timing for generating the second discharge is delayed, and
When the lighting rate increases to a predetermined value or more, the first
Timing of generating the second discharge after generating electricity
Controlling the second driving means so that
The display device according to claim 5, wherein: 8. The control means generates a first discharge.
Before and after the change of the timing to generate the second discharge after
Control the second driving means so that the brightness becomes substantially equal
The display device according to claim 5, wherein: 9. The driving circuit according to claim 1, wherein the first driving means includes a driving pulse.
A first power supply provided outside the display panel as a current supply source
9. The method according to claim 5, wherein the capacitive element comprises:
The display device according to any of the above. 10. The discharge cell according to claim 1, wherein the first capacitive element is connected to the discharge cell.
Recovering the charge stored in the device.
9. The display device according to 9 . 11. The method according to claim 11, wherein the second discharge is performed by the first discharge.
After starting and after the voltage of the driving pulse is reduced
11. The method according to claim 1, wherein the generation is performed.
The display device according to. 12. A method for selectively discharging a plurality of discharge cells.
A display method of a display device for displaying an image, wherein a drive pulse is applied to a selected discharge cell in a display panel.
To generate a first discharge and then generate a second discharge.
So, in the discharge cells to be lit at the same time among the plurality of discharge cells
The lighting rate is detected, and the lighting rate is determined according to the detected lighting rate.
A tie for generating a second discharge after generating a first discharge
Display method characterized by changing the zooming
Law. 13. The higher the detected lighting rate, the greater the first
Timin for generating a second discharge after generating a discharge
13. The method according to claim 12, wherein the speed is slowed down.
Display method of the display device. 14. The method according to claim 1, further comprising:
Generating a second discharge after generating a second discharge
The lighting rate and increase the lighting rate
In this case, the first discharge is generated and then the second discharge is generated.
Claims wherein the generation timing is made earlier
13. The display method of the display device according to 12. 15. The second release of after generating the first discharge
Before and after the change in the timing of generating electricity,
15. The method according to claim 12, wherein
A display method of the display device according to any one of the above.