JP3383807B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a technique for forming contact holes.

[0002]

2. Description of the Related Art In recent years, there has been an increasing demand for higher integration and higher performance of semiconductor devices. In order to meet these demands, a technique for forming contact holes with higher precision and higher selectivity is required. is necessary. And
In forming the contact hole, a conventional method for manufacturing a semiconductor device according to the first embodiment, which is shown step by step in the process sectional view of FIG . 3 , is adopted. At this time, the following procedure is followed. It is common to carry out processing.

That is, first, as shown in FIG. 3A, a gate oxide film 2 is formed over the entire surface of a semiconductor substrate 1 made of silicon (Si), and the gate oxide film 2 is formed by a CVD method. After depositing a polysilicon (polySi) film (not shown) over the entire upper surface, a gate electrode 3 made of polySi is formed by photolithography and dry etching. Subsequently, ion implantation for forming the lightly impurity diffused region 4 is performed in the semiconductor substrate 1, and as shown in FIG. 3B, the CVD method is used to cover the entire surface of the semiconductor substrate 1 with silicon oxide. (Si
After depositing an O ₂ ) film (not shown), a sidewall 5 made of SiO ₂ is formed along the sidewall of the gate electrode 3 by anisotropic dry etching.

Next, ion implantation is re-executed to form the impurity diffusion regions 6 serving as the source and the drain in the semiconductor substrate 1 and, as shown in FIG.
By depositing the interlayer insulating film 7 made of O ₂ on the entire surface of the semiconductor substrate 1 by the CVD method and removing the contact hole pattern of the interlayer insulating film 7 and the gate oxide film 2 by photolithography and dry etching, Contact hole 8 on impurity diffusion region 6
To form. In the dry etching at this time, the etching rate of the interlayer insulating film 7 made of SiO ₂ is required to be higher than the etching rate of the semiconductor substrate 1 made of Si. However, if the method for forming the contact hole 8 according to such a procedure is adopted, it is difficult to align the mask in the photolithography process. Therefore, when the alignment error is taken into consideration, the contact hole 8 between the gate electrode 3 and the contact hole 8 is not considered. A processing margin must be increased, and miniaturization of semiconductor devices becomes difficult.

Therefore, recently, in order to cope with the miniaturization of semiconductor devices, a manufacturing method capable of eliminating a processing margin due to an alignment error in a lithography process, that is, a self-alignment type (self-alignment type) is called. It has been proposed to adopt a contact hole forming method. The method of forming the contact hole at this time is characterized in that the side wall is formed by using silicon nitride (SiN), and the conventional method 2 shown in a stepwise manner in the process sectional view of FIG. It is a method of manufacturing such a semiconductor device.

First, as shown in FIG. 4A, a gate oxide film 2 is formed over the entire surface of a semiconductor substrate 1 made of Si, and a CVD method is used to cover the entire surface of the gate oxide film 2. After depositing a poly-Si film (not shown), the gate electrode 3 made of poly-Si is formed by photolithography and dry etching. Then, as shown in FIG. 4B, by performing ion implantation for forming the lightly impurity diffused region 4 in the semiconductor substrate 1 and adopting the CVD method, silicon over the entire surface of the semiconductor substrate 1 is formed. After depositing a nitride film (not shown), a sidewall 5 made of a silicon nitride film is formed along the sidewall of the gate electrode 3 by anisotropic dry etching.

Subsequently, ion implantation is re-executed to form impurity diffusion regions 6 serving as a source and a drain in the semiconductor substrate 1, and as shown in FIG.
_{After the} interlayer insulating film 7 made of _{2 is} deposited on the entire surface of the semiconductor substrate 1 by the CVD method, the contact hole pattern of the interlayer insulating film 7 and the gate oxide film 2 is removed by photolithography and dry etching to diffuse impurities. A contact hole 8 is formed on the region 6. In addition, in the dry etching at this time,
Since the etching rates of the semiconductor substrate 1, the gate electrode, and the sidewalls 5 and the interlayer insulating film 7 are different from each other, and the etching rate of SiO ₂ is higher than that of Si, poly-Si, and silicon nitride film, The contact hole 8 is formed in a self-aligned manner.

[0008]

In the method of forming a contact hole described with reference to FIG. 4, any one of the semiconductor substrate 1 made of Si, the gate electrode 3 made of poly-Si, and the sidewall 5 made of a silicon nitride film is used. Interlayer insulating film 7 made of SiO ₂ rather than etching rate
It is difficult to satisfy such a selection ratio at the same time, although a higher selection ratio is required for the etching rate in. That is, in dry etching for forming the contact hole 8, CF ₄ , CHF ₃ ,
Although gas such as C ₄ F ₈ is used, the etching rate is generally in the order of SiO ₂ >SiN> Si, and the selection ratio between the gate electrode 3 and the interlayer insulating film 7 is 4 and FIG. 4C corresponding to FIG. 4C because the selection ratio between the sidewalls 5 and the interlayer insulating film 7 cannot be the same.
As shown in (d), the gate electrode 3 and the sidewall 5
Defects due to the even etching were to occur.

A method of manufacturing a semiconductor device according to the present invention is
The present invention was devised in view of such inconveniences, and provides a method for forming a contact hole that can easily realize miniaturization of a semiconductor device without etching even a gate electrode or a side wall. Is what you are trying to do.

[0010]

The method of manufacturing a semiconductor device according to the present invention According to an aspect of, after forming a gate electrode made of polysilicon on a semiconductor substrate, on said semi <br/> conductor substrate including the gate electrode depositing a silicon oxide film or a silicon nitride film, the silicon oxide film or the nitride silicon
A step of etching a contact film to form sidewalls of the gate electrode, a step of forming an impurity diffusion region in the semiconductor substrate, and a plasma treatment or a CVD treatment .
Including the gate electrode and the side wall performed
Wherein the step of forming the entire surface carbonized silicon down film on a semiconductor substrate, an interlayer insulating film and depositing on said silicon carbide film, the interlayer insulating film partially etched to the non <br/> Jun A step of forming a contact hole to expose the object diffusion region, and the silicon carbide exposed in the contact hole.
The emission layer and a step of removing by plasma treatment. And according to the manufacturing method including these steps,
Since the SiC film deposited on the semiconductor substrate including the gate electrode and the side wall functions as an etching stopper, the gate electrode and the side wall are removed by the etching process when forming the contact hole in the interlayer insulating film. It will not be etched, and it will be possible to easily prevent the occurrence of defects due to the etching process. The SiC film exposed in the contact hole is easily removed by plasma treatment.

[0011]

The method of manufacturing a semiconductor device according to claim 1 of the present invention DETAILED DESCRIPTION OF THE INVENTION, after forming a gate electrode made of polysilicon on a semiconductor substrate, said <br/> semiconductor substrate including the gate electrode depositing a silicon oxide film or a silicon nitride film, the silicon oxide film or the nitride sheet
Etching a recon film to form sidewalls of the gate electrode ; forming an impurity diffusion region in the semiconductor substrate; plasma treatment or CVD treatment;
Forming a carbonized silicon down film on the entire surface of the semiconductor substrate including the gate electrode and the side wall by performing the steps of depositing an interlayer insulating film on the silicon carbide film, part of the interlayer insulating film etched and forming a contact hole exposing the <br/> impurity diffusion region, said carbonized silicon exposed in the contact hole
And a step of removing the con film by plasma treatment.

[0012] Then, one method of manufacturing a semiconductor device according to claim 2 ends when the etching process was exposed the gate electrode when forming the side wall, the method of manufacturing a semiconductor device according to claim 3 It is set to be the silicon oxide film or the silicon nitride film etching process when forming the sub <br/> Idouoru on the gate <br/> gate electrode is terminated at the time of the still remaining. The method of manufacturing a semiconductor device according to claim 4 is characterized in that performing the plasma treatment in forming the silicon carbide film in terms of using a gas mainly composed of carbon.

Furthermore, a method of manufacturing a semiconductor device according to claim 5 gas mainly containing the carbon CmHn (m, n
Is a hydrocarbon gas which is represented by the molecular formula of the natural numbers), carbon oxides method of manufacturing a semiconductor device according to claim 6 gas mainly containing the carbon represented by the molecular formula of cmon (m, n is a natural number) while being a gas, a method of manufacturing a semiconductor device according to claim 7 gas CxHyOz mainly the carbon (x, y, z are natural numbers) by oxidizing the hydrocarbon gas is expressed by the molecular formula of It is characterized by being. Furthermore, in the method for manufacturing a semiconductor device according to claim 8, a fluorohydrocarbon gas represented by a molecular formula of CxHyFz (x, y, z is a natural number) , or a fluorocarbon gas , and oxygen or It is characterized in that a plasma treatment is carried out when removing the silicon carbide film after using a mixed gas with ozone.

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a process sectional view showing a method for manufacturing a semiconductor device according to a first embodiment, specifically, a contact hole forming technique, in a simplified manner. Reference numeral 11 denotes a SiC film. In FIG. 1, parts and portions that are the same as those in FIGS. 3 and 4 are given the same reference numerals.

In the method of manufacturing the semiconductor device according to the first embodiment, that is, in the contact hole forming technique, as shown in FIG. 1A, the gate oxide film 2 is formed on the entire surface of the semiconductor substrate 1 made of Si. And C
After depositing a poly-Si film (not shown) over the entire surface of the gate oxide film 2 by adopting the VD method, poly-Si film is formed by photolithography and dry etching.
The gate electrode 3 made of is formed. Then, as shown in FIG. 1B, after the light impurity diffusion region 4 is formed in the semiconductor substrate 1 by ion implantation, CV
After adopting the D method, a SiO ₂ film (not shown) is deposited on the entire surface of the semiconductor substrate 1.

Subsequently, anisotropic dry etching by an etch back method is adopted, and then etching is performed until the upper surface of the gate electrode 3 is exposed to form a sidewall 5 made of SiO ₂ along the side wall of the gate electrode 3. To do. That is, the side wall 5 at this time
The etching process for forming is performed until the gate electrode 3 is exposed, and is ended when the gate electrode 3 is exposed. In addition, the first embodiment
Although the sidewall 5 is made of SiO ₂ , the sidewall 5 made of Si ₃ N ₄ may of course be formed by an etching process after depositing a Si ₃ N ₄ film.

Next, the gate electrode 3 and the side wall 5
After the impurity diffusion regions 6 to be the source and the drain are formed in the semiconductor substrate 1 by re-executing the ion implantation with using as a mask, as shown in FIG.
A hydrocarbon film such as CH ₄ or the like, that is, a gas mainly containing carbon (C) is used to perform a plasma treatment, and then a SiC film is formed over the entire surface of the semiconductor substrate 1 including the gate electrode 3 and the sidewalls 5. 11 is formed. Although the hydrocarbon gas used in the plasma treatment when forming the SiC film 11 is CH ₄ here, it is not limited to CH ₄ gas alone, and CmHn (m and n are natural numbers) and A structure represented by the molecular formula of CmOn (m and n are natural numbers), or Cx
It may be a hydrocarbon gas having a structure represented by a molecular formula of HyOz (x, y, z are natural numbers).

By the way, at this time, the SiC film 1 is formed by plasma treatment using a hydrocarbon gas.
1 is formed, it is needless to say that the SiC film 11 may be deposited after adopting the CVD method without being limited to the plasma treatment. When the CVD method is used to deposit the SiC film 11, an atmospheric pressure CVD apparatus is used. At this time, SiH ₄ and C ₃ H ₈ are used as source gases and H is used as a carrier gas.
₂ will be used. The depot conditions at this time are
SiH ₄ = 0.5 sccm, C ₃ H ₈ = 0.25 sccc
m, H ₂ = 3.0 s / m, the substrate temperature is 1500 ° C.
It is said that

Further, after depositing the SiC film 11, as shown in FIG.
As shown in (d), the interlayer insulating film 7 made of SiO _{2 is} deposited on the entire surface of the semiconductor substrate 1 by the CVD method, and the interlayer insulating film 7 is partially removed by photolithography and dry etching. A contact hole 8 exposing the impurity diffusion region 6 is formed. And in the etching process at this time,
Since the etching rate of the SiC film 11 is smaller than that of the interlayer insulating film 7 made of SiO ₂ , the SiC film 11
Will function as an etching stopper during the etching process for the interlayer insulating film 7. Continuing with Figure 1
As shown in (e), the contact hole 8 is formed by plasma treatment using a mixed gas of CHF ₃ and O _2.
After removing the SiC film 11 exposed inside, the gate oxide film 2 remaining on the impurity diffusion region 6 is removed by an etching process.
That is, in the plasma treatment at this time, SiC is modified into SiO by the action of O _{2 in} the mixed gas, and SiO is removed by fluorine radicals and ions generated from CHF ₃ in the mixed gas. Therefore, the SiC film 11 is removed and the contact hole 8 is completed.

The gas used in the plasma treatment for removing the SiC film 11 is not limited to the mixed gas of CHF ₃ and O ₂ , and may be CxHyFz.
A mixed gas of a fluorohydrocarbon gas or a fluorocarbon gas having a structure represented by a molecular formula (x, y, z are natural numbers) and O ₂ or ozone (O ₃ ) may be used. Then, at this time, the polymerized film composed of carbon (C) and hydrogen (H) becomes S
It is formed on the surface of each of the semiconductor substrate 1 made of i and the sidewall 5 made of SiO ₂ , and this polymer film acts as a protective film against etching. As a result, the underlying semiconductor substrate 1 and the gate electrode 3 are formed. The sidewalls 5 formed along the sidewalls will not be etched, and defects will not occur in the impurity diffusion regions 6. Therefore, when the manufacturing method according to the first embodiment is adopted, it is not affected by the alignment accuracy of the mask, and the semiconductor device can be miniaturized by self-alignment.

(Second Embodiment) In the method of manufacturing a semiconductor device according to the first embodiment, when the side wall 5 made of SiO ₂ deposited on the semiconductor substrate 1 including the gate electrode 3 is formed, the gate electrode 3 is formed. S until the upper surface is exposed
Although the iO ₂ film is etched, it is also possible to adopt a method for manufacturing a semiconductor device according to the procedure described below, that is, a contact hole forming technique as shown in the procedure in FIG. Is. In FIG. 2, the same parts and portions as those in FIG. 1 are designated by the same reference numerals.

In the second embodiment, as shown in FIG. 2A, the gate oxide film 2 is formed on the entire surface of the semiconductor substrate 1 made of Si, and the gate oxide film 2 is formed by using the CVD method. After depositing a poly-Si film (not shown) over the entire upper surface, the gate electrode 3 made of poly-Si is formed by photolithography and dry etching. After that, continue to Figure 2.
As shown in (b), the semiconductor substrate 1 is formed by ion implantation.
A light impurity diffusion region 4 is formed in the inside, and a CVD method is adopted. Then, SiO _{2 is} spread over the entire surface of the semiconductor substrate 1.
After depositing a film (not shown), the SiO ₂ film is etched by adopting the etch back method and then etching the Si 2
The sidewall 5 made of O ₂ is formed along the side wall of the gate electrode 3.

[0024] By the way, the side wall 5 is is to consist of SiO _2, it is not limited to SiO _2,
It goes without saying that the sidewall 5 made of Si ₃ N ₄ may be formed by etching after depositing the Si ₃ N ₄ film. When the sidewall 5 is formed, unlike the procedure according to the first embodiment, the etching process may be terminated at the time when the SiO ₂ film 12 having a predetermined film thickness remains on the gate electrode 3. Has been done. In order to leave the SiO ₂ film 12 on the gate electrode 3, the etching rate of the SiO ₂ film is measured prior to the etching process, and the etching time and conditions are adjusted. Also, Si
When monitoring the film thickness of the O ₂ film, a method of measuring the intensity change of the interference wave when a laser beam of a certain specific wavelength is incident, or a light having a constant wavelength in plasma and the SiO ₂ film are used. The method of measuring the intensity change of the interfering wave will be adopted.

Next, the gate electrode 3 and the side wall 5
After the impurity diffusion regions 6 to be the source and the drain are formed in the semiconductor substrate 1 by re-executing the ion implantation with using as a mask, as shown in FIG.
The gate electrode 3 and the sidewall 5 are formed by plasma treatment using a hydrocarbon gas such as CH _4.
The SiC film 11 is formed over the entire surface of the semiconductor substrate 1 including the. That is, Si on the gate electrode 3
When the O ₂ film 12 is left, since the thick SiC film 11 is deposited on the gate electrode 3, the reliability as an etching stopper is improved as compared with the case where the first embodiment is adopted. It will be. Note that carbonization at this time
Hydrogen gas is CmHn (m and n are natural numbers) and CmOn
Needless to say, it may be an oxidized hydrocarbon gas having a structure represented by a molecular formula of (m and n are natural numbers) or a structure represented by a molecular formula of CxHyOz (x, y and z are natural numbers).

After that, as shown in FIG. 2D, SiO
_After depositing the interlayer insulating film 7 made of ₂ on the entire surface of the semiconductor substrate 1 by the CVD method, the contact hole 8 is formed by partially removing the interlayer insulating film 7 by photolithography and dry etching. Then, in the etching process at this time, Si
Since the etching rate of the SiC film 11 is smaller than that of the interlayer insulating film 7 made of O ₂ , the SiC film 11 functions as an etching stopper during the etching process for the interlayer insulating film 7. Further, as shown in FIG. 2E, after removing the SiC film 11 exposed inside the contact hole 8 by plasma treatment using a mixed gas of CHF ₃ and O ₂ , impurity diffusion is performed. The gate oxide film 2 and the SiO ₂ film remaining on the region 6 are removed by etching.

That is, in the plasma treatment at this time, SiC is modified into SiO by the action of O _{2 in} the mixed gas, and SiO is modified by fluorine radicals and ions generated from CHF ₃ in the mixed gas. As a result of being removed, the SiC film 11 is removed and the contact hole 8 is completed. The gas used in the plasma treatment for removing the SiC film 11 is not limited to the mixed gas of CHF ₃ and O ₂ , and is represented by the molecular formula of CxHyFz (x, y, z are natural numbers). As in the first embodiment, a mixed gas of a fluorinated hydrocarbon gas having a structure described above and O ₂ or ozone (O ₃ ) may be used.

[0028]

As described above, according to the method of manufacturing a semiconductor device of the present invention, since the SiC film deposited on the semiconductor substrate including the gate electrode and the sidewall functions as an etching stopper, The gate electrode and sidewalls will not be etched by the etching process when forming the contact hole in the insulating film, and it is possible to easily prevent defects caused by the etching process when forming the contact hole. It will be possible. Therefore, the design processing margin between the gate electrode and the contact hole is small or unnecessary, and as a result, the excellent effect that the miniaturization and high integration of the semiconductor device can be realized can be obtained.

[Brief description of drawings]

FIG. 1 is a process sectional view illustrating a method for manufacturing a semiconductor device according to a first embodiment.

FIG. 2 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment.

FIG. 3 is a process cross-sectional view showing the method of manufacturing a semiconductor device according to the conventional form 1.

FIG. 4 is a process cross-sectional view showing the method of manufacturing a semiconductor device according to the conventional form 2.

[Explanation of symbols] 1 Semiconductor substrate 3 Gate electrode 5 Sidewall 6 Impurity diffusion region 7 Interlayer insulation film 8 contact holes 11 SiC film (silicon carbide film)

Continuation of front page (56) Reference JP-A-60-128642 (JP, A) JP-A-6-53162 (JP, A) JP-A-8-301612 (JP, A) JP-A-7-142447 (JP , A) JP-A-7-226057 (JP, A) JP-A-3-222367 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 29/78

Claims (8)

(57) [Claims] [Claim 1] After forming the gate electrode made of polysilicon on a semiconductor substrate, depositing a silicon oxide film or a silicon nitride film on the semiconductor <br/> body substrate including the gate electrode, wherein sidewalls of the gate electrode of a silicon oxide film or the silicon nitride film is etched
A step of forming an impurity diffusion region in the semiconductor substrate, and a plasma treatment or a CVD treatment .
Before including the gate electrode and the side wall is in
Forming on the entire surface a silicon carbide film on the serial semiconductor substrate, depositing an interlayer insulating film on the silicon carbide film, the impurity <br/> was diffuse the interlayer insulating film is partially etched the method of manufacturing a semiconductor device, characterized in that it includes the steps of forming a contact hole exposing a region, and removing the silicon carbide film exposed in the contact hole by the plasma treatment. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the etching treatment at the time of forming the sidewall comprises:
A method of manufacturing a semiconductor device, which is terminated when the gate electrode is exposed. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the etching process at the time of forming the sidewall includes:
The method of manufacturing a semiconductor device, wherein the silicon oxide film or the silicon nitride film on the gate electrode is terminated at the time of the still remaining. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the plasma treatment when forming the silicon carbide film uses a gas mainly containing carbon. A method for manufacturing a semiconductor device, which is performed. 5. The method for manufacturing a semiconductor device according to claim 4, wherein the gas mainly containing carbon is a hydrocarbon gas represented by a molecular formula of CmHn (m and n are natural numbers). A method for manufacturing a characteristic semiconductor device. 6. The method of manufacturing a semiconductor device according to claim 4, wherein the gas mainly containing carbon is a carbon oxide gas represented by a molecular formula of CmOn (m and n are natural numbers). A method for manufacturing a characteristic semiconductor device. 7. The method of manufacturing a semiconductor device according to claim 4, wherein the carbon-based gas is CxHyOz (x, y,
A manufacturing method of a semiconductor device, wherein z is an oxidized hydrocarbon gas represented by a molecular formula of natural number). 8. The method for manufacturing a semiconductor device according to claim 1, wherein the plasma treatment when removing the silicon carbide film is C
A fluorohydrocarbon gas represented by a molecular formula of xHyFz (x, y, and z are natural numbers) , or a fluorocarbon gas and oxygen (O
₂ ) or a method of manufacturing a semiconductor device, which is carried out by using a mixed gas with ozone (O ₃ ) .