JP3341825B2 - Synchronous rectification type DC-DC converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a synchronous rectification type DC-D.
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a C-converter, and more particularly to a synchronous rectification type DC-DC converter in which the drive loss of a synchronous rectifier circuit under light load or no load is substantially reduced to improve efficiency.

[0002]

2. Description of the Related Art A diode rectifier such as a Schottky barrier diode (SBD) is generally used in an output rectifier circuit of a DC-DC converter with a low output voltage. However, the power loss during conduction increases, causing a reduction in efficiency. For this reason, a synchronous rectification type DC-DC converter that improves efficiency by using a switching element such as a MOS-FET having a low electric resistance when the output rectifier circuit is conductive and having no forward voltage drop as a synchronous rectifier is used. Proposed. For example, the synchronous rectification type DC-DC converter shown in FIG. 4 includes a DC power supply 1 such as a battery or a capacitor input type rectifier circuit, a primary winding 2a of a transformer 2 connected in series to both ends of the DC power supply 1, and a main switching device. MO as an element
Synchronous rectification MOS-FET as a synchronous rectification switching element connected in series with an S-FET 3 and a secondary winding 2b magnetically coupled to the primary winding 2a of the transformer 2 with the opposite polarity.
4, the secondary winding 2b of the transformer 2 and the MOS-
A smoothing capacitor 5 as a smoothing circuit connected to both ends of the series connection circuit of the FETs 4 is provided. Resistors 6, 7 and a diode 8 are connected in series between the upper end of the secondary winding 2b of the transformer 2 and the drain terminal of the synchronous rectification MOS-FET 4, and are synchronized with the upper end of the secondary winding 2b of the transformer 2. A resistor 9 is provided between the source terminal of the rectifying MOS-FET 4 and
10 and a diode 11 are connected in series. The connection point of the resistor 7 and the diode 8 and the synchronous rectification MO
A resistor 12 is connected between the S-FET 4 and the source terminal. The voltage V _{1 at} the connection point between the resistors 6 and 7 and the resistor 9,
The voltage V _{2 at} the connection point 10 is input to the inverting input terminal and the non-inverting input terminal of the comparator 13 and compared, and the pulse signal V
₃ is output. The output signal V ₃ of the comparator 13 is applied as a synchronous rectification control signal V _G2 to the gate terminal of the synchronous rectification MOS-FET 4 via the drive circuit 14, synchronous rectification MOS-FET 4 is on-off operation. That is, the resistors 6, 7, 9, 10, 12 and the diodes 8, 1
1, the comparator 13 and the drive circuit 14 constitute a synchronous rectification control circuit 15 for the synchronous rectification MOS-FET 4.

Further, both ends of the smoothing capacitor 5 and the MOS-
Between the gate terminal of the FET 3 and the DC output voltage V supplied to the load 16 connected to both ends of the smoothing capacitor 5
By controlling the pulse width of the control pulse signal V _{G1 applied} to the gate terminal of the MOS-FET 3 according to _O , the MOS
-A constant voltage control circuit 17 for controlling the ON / OFF period of the FET 3 is provided. The constant voltage control circuit 17 includes a reference power supply 18 that generates a reference voltage _VR1 that defines an output voltage value.
And the DC output voltage V _O and the reference voltage V _{R1 of the} reference power supply 18.
And a light emitting unit 20b driven by the output of the error amplifier 19 and a light receiving unit 20b for controlling a current flowing through the light emitting unit 20a according to the light output of the light emitting unit 20a. Photocoupler 20
And the pulse width of the control pulse signal V _{G1 applied} to the gate terminal of the MOS-FET 3
and a PWM modulation circuit 21 for controlling according to the current flowing through b. The PWM modulation circuit 21 increases the light output of the light emitting unit 20a of the photocoupler 20 and increases the light output of the light receiving unit 20b.
Current flowing increases, the collector of the light receiving portion 20b - the voltage between the emitter and the operation of narrowing the pulse width of the control pulse signal V _G1 when lowered, the light emitting portion 2 of the photocoupler 20
Light output 0a is reduced to decrease the current flowing through the light receiving portion 20b is, the collector of the light receiving portion 20b - emitter voltage to an operation to widen the pulse width of the control pulse signal V _G1 when raised.

The operation of the main circuit of the synchronous rectification type DC-DC converter shown in FIG. 4 is as follows. Constant voltage control circuit 1
7, when the control pulse signal V _G1 is applied from the PWM modulation circuit 21 and the MOS-FET 3 is turned off from the on state, the voltage V between the drain and the source of the MOS-FET 3
_DS1 becomes substantially equal to the DC input voltage E of the DC power supply 1. At this time, counter electromotive force current I ₁ flows in the secondary circuit occurs in the secondary winding 2b of the transformer 2, V from the maximum value of the current I _1
S / L _S (V _S: voltage of the secondary winding 2b, L _S: inductance of the secondary winding 2b) decreases gradually in the ratio of. Due to the current I ₁ flowing through the secondary side circuit, voltages V ₁ and V ₂ are generated at respective connection points of the resistors 6 and 7 and the resistors 9 and 10 in the synchronous rectification control circuit 15, and these voltages V ₁ and V 2 ₂ is input to the inverting input terminal and the non-inverting input terminal of the comparator 13, respectively. At this time, the relationship between the voltages V ₁ and V ₂ is V ₁ <V ₂
Since it is, the synchronous rectification control signal V _{G 2} applied from the comparator 13 to the gate terminal of the synchronous rectification MOS-FET 4 via the drive circuit 14 becomes high level. As a result, the synchronous rectification MOS-FET 4 is turned on,
MOS-FET for synchronous rectification from secondary winding 2b of transformer 2
A DC output is supplied to the load 16 via the capacitor 4 and the smoothing capacitor 5. The current I ₁ flowing through the secondary circuit becomes substantially zero, and the relationship between the voltages V ₁ and V ₂ input to the inverting input terminal and the non-inverting input terminal of the comparator 13 is V ₁ > V _2.
Then, the synchronous rectification control signal V _{G2 applied} from the comparator 13 to the gate terminal of the synchronous rectification MOS-FET 4 via the drive circuit 14 changes from a high level to a low level. As a result, the synchronous rectification MOS-FET 4 changes from the on state to the off state, and the charge of the smoothing capacitor 5 charged during the on period of the synchronous rectification MOS-FET 4 is supplied to the load 16. In addition, the PWM modulation circuit 21
The control pulse signal V _{G1 applied} to the gate terminal of the S-FET 3 changes from a low level to a high level, and the MOS-FET 3
Is changed from the off state to the on state, the voltage V _DS1 between the drain and the source of the MOS-FET 3 becomes substantially 0 V, and energy is stored in the transformer 2 from the DC power supply 1.

[0005] The constant voltage control operation of the synchronous rectification type DC-DC converter shown in FIG. 4 is as follows. For example,
When the load 16 becomes lightly loaded and the DC output voltage V _O rises, the output voltage of the error amplifier 19 increases and the light output of the light emitting section 20 a of the photocoupler 20 increases. Accordingly, the current flowing through the light receiving portion 20b of the photocoupler 20 increases, and the voltage between the collector and the emitter of the light receiving portion 20b decreases. As a result, the PWM modulation circuit 21
Control pulse signal V _{G1 applied} to the gate terminal of FET3
Becomes narrower, and the ON period of the MOS-FET 3 becomes shorter, so that the DC output voltage V _O decreases. Conversely, when the load 16 is overloaded and the DC output voltage V _O decreases, the output voltage of the error amplifier 19 decreases and the light output of the light emitting unit 20a of the photocoupler 20 decreases. Accordingly, the current flowing through the light receiving portion 20b of the photocoupler 20 decreases, and the voltage between the collector and the emitter of the light receiving portion 20b increases. As a result, the PWM modulation circuit 21
The pulse width of the control pulse signal V _{G1 applied} to the gate terminal of the S-FET 3 becomes wider, and the ON period of the MOS-FET 3 becomes longer, so that the DC output voltage V _O rises. By the above operation, the DC output voltage V _{O of the} synchronous rectification type DC-DC converter shown in FIG. 4 is controlled to a constant value, and a constant voltage DC output is supplied to the load 16.

[0006]

By the way, in the conventional synchronous rectification type DC-DC converter shown in FIG.
Synchronous rectification MOS in synchronization with ON / OFF operation of FET3
-Since the rectification operation of the secondary side circuit is performed by turning off or on the FET 4, a drive loss is generated by combining the switching loss due to the on / off operation of the synchronous rectification MOS-FET 4 and the power loss in the drive circuit 14. .
For example, increase (decrease) the switching frequency of a primary-side switching element such as a resonant DC-DC converter.
In a DC-DC converter of an output control method in which the DC output voltage supplied to the load is reduced (increased), when the secondary side circuit is a synchronous rectifier circuit similar to that shown in FIG. Since the switching frequency of the primary side switching element is further increased and the on / off operation is frequently performed, the drive in which the switching loss of the synchronous rectification switching element forming the synchronous rectification circuit and the power loss in the drive circuit are combined. Losses also increase. For this reason, there arises a problem that the drive loss of the synchronous rectifier circuit becomes extremely large at the time of a load standby or the like. Therefore,
Similarly, the synchronous rectification type DC-DC converter shown in FIG.
-MO for synchronous rectification in synchronization with ON / OFF operation of FET3
Since the S-FET 4 is frequently turned off or on, a drive loss, which is the sum of the switching loss of the synchronous rectification MOS-FET 4 and the power loss in the drive circuit 14, occurs.
There was a disadvantage that the efficiency was significantly reduced.

Accordingly, an object of the present invention is to provide a synchronous rectification type DC-DC converter capable of improving the efficiency by making the drive loss of the synchronous rectification circuit substantially zero at the time of light load or no load.

[0008]

A synchronous rectification type DC-DC converter according to the present invention comprises a primary winding (2a) of a transformer (2) connected in series to both ends of a DC power supply (1) and a main switching element. (3), a synchronous rectification switching element (4) connected in series with the secondary winding (2b) of the transformer (2), and the secondary winding
(2b) and a smoothing circuit (5) connected to both ends of the series circuit of the synchronous rectifying switching element (4), and the synchronous rectifying switching element (4) by turning on and off the main switching element (3). The switching of the synchronous rectification switching element (4) is switched on and off according to the detected value, and the main switching element (3) is switched on according to the output voltage of the smoothing circuit (5). By performing the off control, a constant-voltage DC output is supplied from the secondary winding (2b) of the transformer (2) to the load (16) via the smoothing circuit (5). This synchronous rectification type DC-DC converter includes a rectifying element (4a) connected in parallel with a synchronous rectifying switching element (4), and a load (1).
Output current detecting means (22) for detecting the current (I _O ) flowing through 6) as a voltage (V _A ) corresponding to the current (I _O ), and output current detecting means
When the detection voltage (V _A ) of (22) is lower than the reference value, the synchronous rectification switching element (4) is turned off to perform the rectification operation via the rectification element (4a), and the output current detection means (22 ) Is provided with a comparison means (26) for turning on / off the synchronous rectification switching element (4) to perform the rectification operation when the detection voltage (V _A ) is equal to or higher than the reference value. When the switching element (3) is turned on from off, energy is accumulated from the DC power supply (1) in the transformer (2). When the switching element (3) is turned off from on, a back electromotive force is generated in the secondary winding (2b) of the transformer (2), and a current (I ₁ ) flows to the secondary side circuit, and the secondary side The switching element (4) for synchronous rectification is turned on by the current (I ₁ ) flowing in the circuit, and the secondary winding (2b) of the transformer (2) is turned on.
A DC output is supplied to the load (16) via the synchronous rectification switching element (4) and the smoothing circuit (5). When the current (I ₁ ) flowing in the secondary circuit becomes substantially zero, the synchronous rectification switching element (4) changes from the on state to the off state, and the smoothing charged during the synchronous rectification switching element (4) is on. The charge of the circuit (5) is supplied to the load (16). At the time of light load or no load where the current (I _O ) flowing through the load (16) is extremely small,
When the detection voltage (V _A ) of the output current detecting means (22) is lower than the reference value, the synchronous rectifying switching element is operated by the comparing means (26).
(4) turns off and the switching element for synchronous rectification (4)
The rectifying operation is performed by the rectifying element (4a) connected in parallel with the rectifying element. Then, when the detection voltage (V _A ) of the output current detection means (22) becomes equal to or higher than the reference value, the switching element (4) for synchronous rectification is controlled by the comparison means (26) to perform a rectification operation. As a result, when the detection voltage (V _A ) of the output current detection means (22) is less than the reference value at a light load or no load, the synchronous rectification switching element (4) does not operate. The drive loss of the element (4) becomes substantially zero. At this time, since the current flowing through the rectifier (4a) is extremely small, the power loss due to the forward voltage drop of the rectifier (4a) is extremely small. Therefore, the efficiency can be improved by making the drive loss of the synchronous rectification circuit substantially zero at the time of light load or no load.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A synchronous rectification type D according to the present invention will be described below.
One embodiment of a C-DC converter will be described with reference to FIG. However, in FIG. 1, the same portions as those shown in FIG. 4 are denoted by the same reference numerals, and description thereof will be omitted. As shown in FIG. 1, the synchronous rectification type DC-DC converter according to the present embodiment detects current I _O flowing through the load 16 as a voltage _VA corresponding to the output current I _O as current detection means as output current detection means. the use resistor 22 connected between the smoothing capacitor 5 shown in FIG. 4 and the load 16, the output current I _O flowing to the load 16
_A reference power supply 23 for generating a reference voltage V _R2 that defines a reference value of the voltage V _A corresponding to the reference voltage V _A , and a detection voltage V _A of the current detection resistor 22 is compared with a reference voltage V _R2 of the reference power supply 23 for current detection. comparator 24 outputs a high level signal V _B when the detected voltage V _a of the resistor 22 becomes the reference voltage V _R2 or
If shows a comparison circuit 26 as a comparison means comprising an AND gate 25 for outputting a logical product signal V ₄ of the comparison output signal V _B of the comparison output signal V ₃ and the comparator 24 of the comparator 13 to the drive circuit 14 in FIG. 4 The synchronous rectification MOS-FET shown in FIG.
A parasitic diode 4a present in the synchronous rectification MOS-FET 4 is used as a rectifying element connected in parallel between the drain and source terminals of the MOSFET 4. The other circuit configuration is substantially the same as the synchronous rectification type DC-DC converter shown in FIG.

Next, a synchronous rectification type DC-DC converter shown in FIG.
The operation of the main circuit of the inverter will be described. Load 16
The load 16 enters the light load state or no load state,
Style I _ODecreases, the current is detected by the current detecting resistor 22.
Voltage V_ADecrease. Detection voltage of the current detection resistor 22
Pressure V_AIs the non-inverting input of the comparator 24 in the comparison circuit 26.
Input terminal, and at the same time, input to the inverting input terminal.
Reference voltage V of the reference power supply 23_R2Is compared to This and
Voltage V of the current detection resistor 22_AIs the reference power supply 23
Reference voltage V_R2Lower than the ratio of the comparator 24
Signal V output from the comparison output terminal_BIs low level.
Low level signal V from comparator 24_BIs a comparison
Output signal V_ThreeTogether with the AND gate 25
And these AND signals V_FourIs AND gate 25?
Is output to the drive circuit 14. At this time,
AND signal V output from port 25_FourIs a low level
Therefore, the drive circuit 14 is switched from the synchronous rectification control circuit 15
To the gate terminal of MOS-FET4 for synchronous rectification via
Synchronous rectification control signal V_G2Is low level. But
Therefore, the synchronous rectification MOS-FET 4 is in the off state,
At this time, the rectification operation of the secondary side circuit is performed by synchronous rectification MOS-
This is performed via a parasitic diode 4a in the FET 4. negative
The load 16 is in the normal state and is detected by the current detecting resistor 22.
Output voltage V_AIs the reference voltage V of the reference power supply 23_R2more than
Is output from the comparison output terminal of the comparator 24.
Signal V_BIs at a high level. This high level signal V_BIs
Comparison output signal V of the comparator 13_ThreeAND gate with
25 and these AND signals V_FourIs an AND game
From the drive 25 to the drive circuit 14. At this time,
AND signal V output from AND gate 24_FourIs con
Comparison output signal V from parator 13_ThreeIs equal to
From the synchronous rectification control circuit 15 via the drive circuit 14.
Rectification to the gate terminal of synchronous rectification MOS-FET4
Control signal V_G2Is given, and MOS-FET4 for synchronous rectification
Is controlled on / off. Therefore, the secondary
The rectification operation of the side circuit is synchronized in a manner similar to that of FIG.
It is performed by the ON / OFF operation of the diverted MOS-FET4.
You. The synchronous rectification type DC-DC converter shown in FIG.
Is substantially the same as that shown in FIG.
Therefore, the description is omitted.

In the synchronous rectification type DC-DC converter of the present embodiment, the output current I _O flowing through the load 16 when the load 16 is in a light load state or no load state is extremely small, and the detection voltage _VA of the current detection resistor 22 is low. Reference voltage V _R2 of reference power supply 23
If it is lower, the synchronous rectification MOS-FET 4 is turned off by the output signal of the comparison circuit 26 and the synchronous rectification MO-FET 4 is turned off.
The rectification operation is performed by the parasitic diode 4a in the S-FET 4. When the load 16 is in the normal state, the current detecting resistor 2
When the second detection voltage V _A becomes the reference voltage V _{R 2} or more of the reference power supply 23, synchronous rectification MO by the output signal of the comparator circuit 26
The S-FET 4 is turned on and off to perform a rectification operation. As a result, the detection voltage _VA of the current detection resistor 22 is changed to the reference voltage V _{R2 of the} reference power supply 23 at light load or no load.
When the voltage is lower, the synchronous rectification MOS-FET 4 does not operate, so that the drive loss obtained by adding the switching loss of the synchronous rectification MOS-FET 4 and the power loss in the drive circuit 14 is substantially zero. At this time, since the current flowing through the parasitic diode 4a in the synchronous rectification MOS-FET 4 is extremely small, the power loss due to the forward voltage drop of the parasitic diode 4a is extremely small. Therefore, the drive loss of the synchronous rectifier circuit can be reduced to almost zero under light load or no load, and the efficiency can be improved. Further, in the present embodiment, the parasitic diode 4a built in the synchronous rectification MOS-FET 4 as a rectifier connected in parallel between the drain and source terminals of the synchronous rectification MOS-FET 4
Is used, there is no need to externally connect a rectifying diode or the like between the drain and source terminals of the synchronous rectification MOS-FET 4, and therefore there is an advantage that the number of components can be reduced.

The synchronous rectification type DC-D of the embodiment shown in FIG.
The C converter can be changed. For example, the synchronous rectification type DC-DC converter of the embodiment shown in FIG. 2 is different from the synchronous rectification type DC-DC converter shown in FIG. 1 in that the comparison output terminal of the comparator 24 is connected to the inverting input terminal of the comparator 13 via the series resistor 27. To comparator 2
4, a reference power supply 23 is connected to the non-inverting input terminal, the inverting input terminal of the comparator 24 is connected to one end of the smoothing capacitor 5, and the AND gate 25 is omitted. That is, in the embodiment shown in FIG. 2, the comparison circuit 26 includes the reference power supply 23, the comparator 24, and the series resistor 27. Other circuit configurations are substantially the same as those of the synchronous rectification type DC-DC converter shown in FIG.

Synchronous rectification type DC-DC converter shown in FIG.
In the loader, when the load 16 is in the light load state or the no load state,
Output current I flowing through 6_OIs extremely low and the current detection resistor
Detection voltage V of anti-22_AIs the reference voltage V of the reference power supply 23_R2Yo
When it is lower, the comparator 24 in the comparison circuit 26
High level signal V_BIs output, and the
The signal is input to the inverting input terminal of the comparator 13. This and
The signal V output from the comparator 13_ThreeBut low level
The synchronous rectification M via the drive circuit 14.
Synchronous rectification control applied to the gate terminal of OS-FET4
Signal V_G2Is low level. Therefore, the synchronous rectification MO
The S-FET 4 is off, and the secondary circuit at this time is
Rectification operation is performed by the parasitic die in the synchronous rectification MOS-FET 4.
It is performed via an ode 4a. The load 16 is in the normal state.
The detection voltage V of the current detection resistor 22 _AIs the reference power supply 23
Reference voltage V_R2Above, the comparator in the comparison circuit 26
From the low level signal V_BIs output. This and
Connect the resistors 6 and 7 to the inverting input terminal of the comparator 13.
Connection point voltage V₁Is input and the comparator 24
Low-level signal V via the series resistor 27_BIs entered,
The voltage V at the connection point of the resistors 9 and 10 is applied to the non-inverting input terminal._TwoEnters
Output from the comparison output terminal of the comparator 13
A signal V substantially the same as in the case of FIG._ThreeIs output. this
Therefore, the synchronous rectification MOS-F
Synchronous rectification control similar to the case of Fig. 4 at the gate terminal of ET4
Control signal V_G2And the synchronous rectification MOS-FET 4 is
On / off control is performed and rectification of the secondary circuit is performed.
You. Therefore, the synchronous rectification type DC of the embodiment shown in FIG.
-DC converter is substantially the same as that shown in FIG.
The effect is obtained. In particular, in the embodiment shown in FIG.
Since logic circuits such as gates are not required, the implementation shown in FIG.
There is an advantage that parts cost can be reduced as compared with the form.

The synchronous rectification type D of the embodiment shown in FIG.
The C-DC converter is a synchronous rectification type DC-D shown in FIG.
In the C converter, the comparison output terminal of the comparator 24 is connected to the base terminal of the transistor 28 through the series resistor 27, and the emitter terminal of the transistor 28 is connected to the source terminal of the synchronous rectification MOS-FET 4 and the smoothing capacitor 5
, The collector terminal of the transistor 28 is connected to the comparison output terminal of the comparator 13, the non-inverting input terminal of the comparator 24 is connected to the reference power supply 23, and the inverting input terminal of the comparator 24 and the smoothing capacitor 5 are connected. One end is connected and the AND gate 25 is omitted. That is, in the embodiment shown in FIG. 3, the reference power source 23, the comparator 24, the series resistor 27, and the transistor 2
8 constitutes a comparison circuit 26. Other circuit configurations are substantially the same as those of the synchronous rectification type DC-DC converter shown in FIG.

A synchronous rectification type DC-DC converter shown in FIG.
In the loader, when the load 16 is in the light load state or the no load state,
Output current I flowing through 6_OIs extremely low and the current detection resistor
Detection voltage V of anti-22_AIs the reference voltage V of the reference power supply 23_R2Yo
When the voltage is lower than the threshold,
And the high-level signal V is applied to the base terminal of the transistor 28. _B
Is output. At this time, the transistor 28 is turned on.
From the collector terminal of the transistor 28.
Signal V output to the comparison output terminal of_CBut low level
The synchronous rectification M via the drive circuit 14.
Synchronous rectification control applied to the gate terminal of OS-FET4
Signal V_G2Is low level. Therefore, the synchronous rectification MO
The S-FET 4 is off, and the secondary circuit at this time is
Rectification operation is performed by the parasitic die in the synchronous rectification MOS-FET 4.
It is performed via an ode 4a. The load 16 is in the normal state.
The detection voltage V of the current detection resistor 22_AIs the reference power supply 23
Reference voltage V_R2At this point, the comparator 24
Low to the base terminal of the transistor 28 via the column resistor 27
Level signal V_BIs output. At this time, the transistor
Since the transistor 28 is turned off, the collector of the transistor 28 is
Nothing is output from the data terminal. For this reason,
From the comparison output terminal of the
The gate terminal of the rectifying MOS-FET 4 shown in FIG.
Synchronous rectification control signal V substantially similar to the case_G2Granted and synchronized
The rectification MOS-FET 4 is turned on / off and the secondary side
A rectification operation of the circuit is performed. Therefore, the actual state shown in FIG.
FIG. 9 also illustrates the synchronous rectification type DC-DC converter of the embodiment.
In this case, substantially the same effect as in the case shown in FIG. In particular, FIG.
In the embodiment shown, a logic circuit such as an AND gate is not required.
Therefore, the embodiment shown in FIG. 1 is similar to the embodiment shown in FIG.
There is an advantage that the cost of parts can be reduced as compared with the state. Change
In the embodiment shown in FIG.
The output of the comparator 13 by turning on or off the star 28
Signal V_ThreeWhat is a low-level signal or a signal
Since it is switched to the other, compared to the embodiment shown in FIG.
There is an advantage that operation is reliable.

The embodiments of the present invention are not limited to the above embodiments, and various modifications are possible. For example, in each of the embodiments described above, the form in which the parasitic diode 4a built in the synchronous rectification MOS-FET 4 is used as the rectifier connected in parallel between the drain and source terminals of the synchronous rectification MOS-FET 4 has been described. If the effect of the parasitic diode 4a cannot be expected, a normal rectification diode may be connected in parallel between the drain and source terminals of the synchronous rectification MOS-FET 4. In each of the above embodiments, a PWM (pulse width modulation) method in which the frequency of the control pulse signal is kept constant to control the pulse width is used as the constant voltage control method for the DC output voltage V _O of the synchronous rectification type DC-DC converter. However, it is also possible to adopt a PFM (pulse frequency modulation) method in which the ON period of the control pulse signal is kept constant and the OFF period is controlled. In this case, instead of the PWM modulation circuit 21 in the above embodiment, the light output of the light emitting unit 20a of the photocoupler 20 increases, the current flowing in the light receiving unit 20b increases, and the voltage between the collector and the emitter of the light receiving unit 20b increases. When the output voltage decreases, the off period of the control pulse signal output is extended, the light output of the light emitting unit 20a of the photocoupler 20 decreases, the current flowing to the light receiving unit 20b decreases, and the collector-emitter connection of the light receiving unit 20b decreases. P that operates to narrow the off period of the control pulse signal output when the voltage of
An FM modulation circuit may be used. Further, in each of the embodiments described above, the form in which the present invention is applied to the flyback type synchronous rectification type DC-DC converter is shown. However, the present invention is also applied to the forward type or resonance type synchronous rectification type DC-DC converter. It is possible to

[0017]

According to the present invention, the switching element for synchronous rectification is turned off at the time of light load or no load, so that the drive loss of the synchronous rectifier circuit at the time of light load or no load is substantially zero. Can be Therefore, it is possible to make the drive loss of the synchronous rectifier circuit substantially zero during a load standby state (for example, during a printing standby state of the printer device), thereby significantly improving the conversion efficiency of the synchronous rectification type DC-DC converter. In particular, the resonance type DC-DC
The effect of the present invention is remarkable when applied to a DC-DC converter of an output control method in which the switching frequency increases when the load becomes light like a converter.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram showing an embodiment of a synchronous rectification type DC-DC converter according to the present invention.

FIG. 2 is an electric circuit diagram showing a modified embodiment of FIG. 1;

FIG. 3 is an electric circuit diagram showing another modified embodiment of FIG. 1;

FIG. 4 is an electric circuit diagram showing a conventional synchronous rectification type DC-DC converter.

[Explanation of symbols]

1. . . DC power supply, 2. . . Transformer, 2a. . . Primary winding, 2b. . . 2. secondary winding; . . 3. MOS-FET (main switching element); . . MOS-FE for synchronous rectification
T (switching element for synchronous rectification), 4a. . . 4. Parasitic diode (rectifier); . . Smoothing capacitor (smoothing circuit), 6,7. . . Resistance, 8. . . Diode, 9,
10. . . Resistance, 11. . . Diode, 12. . . Resistance, 13. . . Comparator, 14. . . Drive circuit, 15. . . 15. Synchronous rectification control circuit, . . Load, 1
7. . . Constant voltage control circuit, 18. . . Reference power supply, 1
9. . . Error amplifier, 20. . . Photo coupler, 20
a. . . Light emitting section, 20b. . . Light receiving section, 21. . . PWM
Modulation circuit, 22. . . 23. current detecting resistor (output current detecting means); . . Reference power supply, 24. . . comparator,
25. . . AND gate, 26. . . Comparison circuit (comparing means), 27. . . Series resistance, 28. . . Transistor

Claims (1)

(57) [Claims] A primary winding and a main switching element of a transformer connected in series to both ends of a DC power supply; a synchronous rectification switching element connected in series with a secondary winding of the transformer; A winding and a smoothing circuit connected to both ends of a series circuit of the synchronous rectification switching element, and detects a voltage caused by a current flowing through the synchronous rectification switching element by an on / off operation of the main switching element. By switching on / off the switching element for synchronous rectification according to the detected value and controlling on / off of the main switching element according to the output voltage of the smoothing circuit, the secondary winding of the transformer In a synchronous rectification type DC-DC converter for supplying a constant voltage DC output to a load via a smoothing circuit, the synchronous rectification switching element A rectifying element connected in parallel with the rectifying element; an output current detecting means for detecting a current flowing through the load as a voltage corresponding to the current; and a synchronous rectifying device when the detected voltage of the output current detecting means is less than a reference value. A switching element is turned off to perform a rectification operation via the rectification element. When a detection voltage of the output current detection means is equal to or higher than the reference value, the synchronous rectification switching element is turned on / off to perform the rectification operation. And a comparing means for performing the following.