JP2999905B2 - Switching power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a switching power supply that uses an FET and synchronizes the ON / OFF operation of the MOS FET with the switching operation of a switching element.

[0002]

2. Description of the Related Art A diode generally used as a rectifier has a power loss due to the presence of a forward voltage drop. As one means for reducing the power loss in the rectifying element, it is conceivable to use a transistor (here, a MOS FET) having a low power loss in an ON state as the rectifying element. However, when a MOS FET is used as a rectifying element, it is necessary to consider the existence of a parasitic diode of the MOS FET. That is, the reason is based on the following three items. When the parasitic diode conducts, the loss increases due to the forward voltage drop. When a reverse voltage is applied after the parasitic diode conducts, a surge current is generated due to the reverse recovery characteristic of the diode. When the parasitic diode conducts, carriers are present in the channel-drain junction region, and the MOS FE
The dV / dt characteristic of T turn-on / off is deteriorated. Since the above-mentioned phenomenon is not preferable in driving the switching power supply, a means for preventing the parasitic diode of the MOS FET from conducting is required.

FIG. 2 shows an example of a circuit of a conventional switching power supply in which a MOS FET is used as a rectifying element and its parasitic diode is not conducted. In FIG. 2, M1 is a MOS FET as a rectifying element for main rectification.
And M2 is a MOS as a rectifying element for rectification during commutation.
FET. T2 is a converter transformer, which has a plurality of windings in addition to the primary winding N1 and the secondary winding N2, N3 is a driving winding of the commutating rectification MOS FET M2, and N4 is a bias. Winding of the capacitor C2 for charging,
N5 is a driving winding of the rectifying MOS FET M1. The operation of the circuit shown in FIG. 2 will be described below with reference to FIG. 3 showing the voltage waveform at each point of the circuit.

When the switching transistor Q1 is in the ON state, the DC transformer E supplies the converter transformer T
Current flows through the second primary winding N1, and a voltage is induced in each of the windings N2 to N5. At this time, the voltage V _t that is induced in the driving winding N5, rectifying MOS FET M1 is turned on is positively biased. Rectification MOS FET M
1 supplies DC power to the induced voltage V _t load in the secondary winding N2 by the ON state. Here, the bias capacitor C2 is in a charged state, and its terminal voltage V
The relationship between the voltages V ₁ generated in _C and the driving winding N3 is V ₁
Assuming that> V _C , a commutation rectification MOS is generated by the voltage V _1.
FET M2 is reverse biased off.

Next, when the switching transistor Q1 shifts to the off state, a voltage in the opposite direction to that of the current is generated in each of the windings N2 to N5 due to the inductance of the windings. Since the polarity of the voltage of each winding is inverted, the rectifying MOS FET M1 is reverse-biased and turned off. At this time, the voltage generated in the charging winding N4 becomes the forward voltage of the backflow preventing diode D1 and charges the bias capacitor C2, and the commutation rectification MOS FET
M2 is positively biased by a voltage obtained by superimposing a voltage generated on the driving winding N3 and a voltage V _C between terminals of the bias capacitor C2, and is turned on. Commutation rectification MOS
When the FET M2 is turned on, a commutating rectification MOS FET M2 is connected between both ends of the choke coil L1.
, A closed circuit is formed through the main current path, and the flyback voltage generated in the choke coil L1 supplies DC power to the load.

When the switching transistor Q1 is in the off state and the converter transformer T2 is in the magnetic flux reset state and the voltage generated in each of the windings N2 to N5 becomes zero, the voltage V _C across the terminals of the bias capacitor C2. As a result, the commutating rectification MOS FET M2 keeps on. By repeating the above operation, the switching power supply shown in FIG. 2 is driven, and the rectification MOS FET M1 and the commutation rectification MOS
One of the FETs M2 is always turned on,
The parasitic diode present in the MOSFET does not conduct.

However, when the converter transformer T2 is in the magnetic flux reset state, the commutating rectifying MOS FET M
It should be noted that there are some restrictions on the voltage V _C between the terminals of the bias capacitor C2 that maintains the ON state of the capacitor C2. In the following, the rectifying MOS FET M1 and the commutating rectifying MOS F
This will be described with reference to FIG. 4 showing the waveform of each gate voltage of ETM2. In FIG. 4, V _G2 is a commutating M during commutation.
The gate voltage of OS FET M2, _VG1 is a rectifying MOS
The gate voltage, V _TH of FET M1 is the threshold voltage of the MOS FET, t ₁ represents the time in which the switching transistor Q1 is turned on, when and raising the voltage V _C from the top, shows the different operating states ing.

In the description of the operation of the conventional example, the relationship between the voltage V ₁ generated in the driving winding N ₃ and the voltage V _{C is} as follows: V ₁ > V
_C said. However, as a matter of course, if the on-state of the commutation rectification MOS FET M2 cannot be maintained, the parasitic diode will conduct, so the lower limit of the voltage V _C is the threshold of the commutation rectification MOS FET M2. Voltage V _TH
That is all. The switching transistor Q1 is turned on at time t ₁
When turned in, the gate voltage rises or drops, the time difference for MOS FET is turned on and off is generated, wherein, when a large voltage value of the voltage V _C, the drop of the gate voltage V _G2 It takes a lot of time. Therefore, as shown in the bottom of FIG. 4, because of the increased voltage V _C, the commutation time rectification MOS FET
Rectifying MOS FET before M2 turns off
M1 may be turned on. If the MOS FETs serving as the two rectifiers are turned on at the same time, the circuit may not work properly due to a short circuit on the secondary side of the converter transformer T2.

Therefore, although it depends on the time until the rectifying MOS FET M1 is turned on, the voltage V _C is equal to the MO.
The threshold voltage of the S FET is equal to or higher than V _TH and two MOs
The voltage must be lower than the voltage value at which the SFET is not simultaneously turned on. However, in this case, the commutation MOS for commutation
Since the DC power is supplied to the load by the flyback voltage of the choke coil L1 when the FET M2 is in the ON state, the commutating rectifying MOS FET M2 is in the ON state until immediately before the rectifying MOS FET M1 is turned on. , The power conversion efficiency of the switching power supply becomes higher. Therefore, in theory, rectifying MOS FE
MOSFET for rectification during turn-on and commutation of T M1
Turn-off of the M2 is most desirable to set the voltage V _C so as simultaneously.

[0010]

In the circuit shown in FIG. 2, the converter transformer T2 is provided with a driving winding N3 and a driving winding N5, so that a commutation rectifying MOS is provided.
The bias capacitor C2 is charged by applying a bias to the FET M2 and the rectifying MOS FET M1 and providing a charging winding N4. Providing a large number of windings on a single transformer in this manner is not sufficient for insulation between the windings, particularly for the insulation between the primary winding and the secondary and other windings, and for the transformer due to heat generation of the windings. It cannot be said that it is an advantage in terms of heat radiation measures and miniaturization of the device.

Further, the charging of the bias capacitor C2 is performed by directly applying the voltage generated in the charging winding N4, but the voltage value of the voltage generated in the charging winding N4 depends on the input voltage and other values. It is easily influenced by the surrounding state, and it is difficult to obtain a constant voltage value. For these reasons, when the switching power supply is in operation, the biasing capacitor C
When the voltage between the terminals fluctuates, the power conversion efficiency decreases,
In the worst case, the device may be damaged due to the secondary side short circuit. Then, even if an attempt is made to change the output voltage of the switching power supply, the voltage generated in the charging winding N4 changes and the voltage between the terminals of the bias capacitor C2 also changes, so that the output voltage can be adjusted. The request is virtually unresponsive. Therefore, the present invention uses a MOS FET as a rectifying element, and the MOS FET minimizes an increase in the number of windings provided in a converter transformer in a switching power supply driven in synchronization with the switching element, and furthermore, uses a MOSFET for a bias capacitor. It is an object of the present invention to obtain a switching power supply that can maintain a constant voltage between terminals and that can adjust the output voltage.

[0012]

According to the present invention, a converter winding is provided with a drive winding, and one end of the drive winding is connected to the gate of a MOSFET for rectification at the time of commutation. The end is connected to the source of a rectifying MOS FET at the time of commutation via a bias capacitor, and when the switching element is on, the bias capacitor is charged by an electromotive voltage generated in the secondary winding of the converter transformer. A diode for preventing reverse current between a connection point between the bias capacitor and the driving winding and one end of the secondary winding of the converter transformer so that the charging voltage of the bias capacitor becomes a predetermined value. And a constant-voltage circuit.

[0013]

FIG. 1 shows a circuit of an embodiment of a switching power supply according to the present invention in which an increase in the number of windings provided in a converter transformer is suppressed as much as possible and a voltage between terminals of a bias capacitor is kept constant. . In FIG. 1, the same parts as those in FIG. 2 are denoted by the same reference numerals. In FIG. 1, a primary winding N1 of a converter transformer T1 having a primary winding, a secondary winding and a tertiary winding as a driving winding between both ends of a DC power supply E and an N-channel MOSFET.
The main current paths of the switching transistor Q1 are connected in series. The output terminal of the PWM control circuit, not shown in FIG. 1, is connected to the gate of the switching transistor Q1. Converter transformer T1-2
One end of the next winding N2 is connected via a choke coil L1 and a smoothing capacitor C1 to a source of a rectifying MOS FET M1 as a rectifying element composed of an N-channel type MOS FET, and a drain of the rectifying MOS FET M1 is connected to a secondary. Connected to the other end of the winding N2. At this time, one end of the secondary winding N2 of the converter transformer T1 on the choke coil L1 side has the same polarity as one end of the primary winding N1 connected to the high potential side of the DC power supply E.

The gate of the rectifying MOS FET M1 is
It is connected to a connection point between the secondary winding N2 of the converter transformer T1 and the choke coil L1. The main current path of the commutating rectification MOS FET M2 as a rectifying element composed of an N-channel type MOS FET is connected to the smoothing capacitor C1 in parallel with the choke coil L1 and the smoothing capacitor C1.
One side is connected as a source. MOS F for commutation rectification
The gate of the ET M2 is connected to one end of the tertiary winding N3 of the converter transformer T1, and the other end of the tertiary winding N3 is connected via a bias capacitor C2 to a commutating MOS FET for commutation.
Connect to the source of M2. At this time, one end of the tertiary winding N3 of the converter transformer T1 on the side of the bias capacitor C2 and one end of the secondary winding N2 on the side of the choke coil L1 have the same polarity. A series circuit of a diode D1 for backflow prevention and a resistor R1 is provided between a connection point between the secondary winding N2 of the converter transformer T1 and the choke coil L1 and a connection point between the tertiary winding N3 and the bias capacitor C2. , Diode D
1 is connected as the secondary winding N2 side. A Zener diode DZ is connected in parallel with the bias capacitor C2 such that the cathode thereof is on the resistor R1 side, and the constant voltage circuit 1 is formed by the Zener diode DZ and the resistor R1. The smoothing capacitor C
1 are output terminals of the switching power supply, and a load _RL is connected in parallel with the smoothing capacitor C1.

The operation of the switching power supply according to the present invention having the above-described circuit configuration will be described below. When the switching transistor Q1 is on, a current flows through the primary winding N1 of the converter transformer T1 by the DC power supply E, and a voltage is induced in the secondary winding N2 and the tertiary winding N3. At this time, the induced voltage V _t in the secondary winding N2, rectification MOS FET M1 is turned on is positively biased. Rectifying MOS FET M1 is that the ON state, the DC power to the load by the voltage induced V _t in the secondary winding N2 is supplied. Further, the voltage V _t to the constant voltage circuit 1 is input through the diode D1, the bias capacitor C2 is charged by the output voltage of a predetermined voltage value from the constant voltage circuit 1. Here, assuming that the relationship between the inter-terminal voltage V _C in the charged state of the bias capacitor C2 and the voltage V ₁ induced in the tertiary winding N3 is V ₁ > V _C , commutation during commutation by the voltage V _1. MOS FET M2
Is reverse biased and turned off.

Next, when the switching transistor Q1 shifts to the OFF state, a voltage in the opposite direction to that of the previous voltage is generated in the secondary winding N2 and the tertiary winding N3 of the converter transformer T1 due to the inductance of the windings. . Since the polarity of the voltage between both ends of the secondary winding N2 of the converter transformer T1 is inverted, the rectifying MOS FET M1 is reverse-biased and turned off. MOS FET for commutation during commutation
M2 is a voltage generated in the tertiary winding N3 of the converter transformer T1 and a voltage V _C between terminals of the bias capacitor C2.
Are positively biased by the superimposed voltage and are turned on. When the commutation-time rectification MOS FET M2 is turned on, a closed circuit is formed between both ends of the choke coil L1 via the main current path of the commutation-time rectification MOS FET M2, and is generated in the choke coil L1. DC power is supplied to the load by the flyback voltage thus obtained.

When the switching transistor Q1 is off and the converter transformer T1 is in a magnetic flux reset state, the voltage generated in the secondary winding N2 and the tertiary winding N3 becomes zero. MOS F
ETM2 keeps on by the terminal voltage V _C of the bias capacitor C2. With the above operation, one of the rectifying MOS FET M1 and the commutating rectifying MOS FET M2 is always turned on, and the parasitic diode existing in the MOS FET does not conduct.

In the circuit of the present invention shown in FIG.
The embodiment has been described using the N-channel type MOSFET for rectification and rectification during commutation.
An SFET can also be used, in which case the circuit may be configured so that the polarity of each winding is reversed. Further, although the embodiment has been described with the simplest circuit including the resistor R1 and the Zener diode DZ as the constant voltage circuit, a three-terminal regulator may be used as the constant voltage circuit. Further, in order to reduce spike noise when the MOSFET is turned off, a MOSFET as a rectifying element is used.
In parallel, a Schottky barrier diode having a smaller forward voltage drop than the parasitic diode of the MOS FET may be provided in parallel.

[0019]

As described above, according to the present invention, in a switching power supply using a MOSFET as a rectifier, a voltage induced in a secondary winding of a converter transformer is supplied to a bias capacitor via a constant voltage circuit. , The bias capacitor is always charged with a predetermined voltage so that the voltage between its terminals becomes constant. This eliminates the need for a winding for charging in the conventional circuit, suppresses an increase in the number of windings of the converter transformer, and facilitates insulation of the windings and measures for heat dissipation. Furthermore, since the voltage between the terminals of the bias capacitor can be kept constant by the constant voltage circuit, the operating point of the MOS FET moves due to the fluctuation of the voltage between the terminals of the bias capacitor, and the power conversion efficiency of the switching power supply decreases. In addition, it is possible to prevent the device from being damaged by the secondary-side short circuit, and at the same time, to be able to adjust the output voltage.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of a switching power supply according to the present invention.

FIG. 2 is a circuit diagram of a conventional switching power supply.

FIG. 3 is a voltage waveform at each point of the circuit shown in FIG. 2;

FIG. 4 shows a MOS as each rectifier in the circuit shown in FIG.
FET gate voltage waveform

[Explanation of symbols]

 E DC power supply T1 Converter transformer L1 Choke coil M1 Main rectification MOS FET M2 Commutation rectification MOS FET C2 Bias capacitor 1 Constant voltage circuit

Claims (2)

(57) [Claims] A switching element connected to a primary winding of a converter transformer performs a switching operation, so that a stabilized DC output is supplied to a load via a rectifying and smoothing circuit connected to a secondary winding of the converter transformer. In the switching power supply to be supplied, the rectifying and smoothing circuit includes a rectifying element, a rectifying element for commutation, a choke coil, and a smoothing capacitor.
An SFET is used, a driving winding is provided on the converter transformer, one end of the driving winding is connected to the gate of the MOSFET for commutation rectification, and the other end of the driving winding is connected. M for commutation during commutation via a bias capacitor
When the switching element is on, the bias capacitor is charged by an electromotive voltage generated in a secondary winding of the converter transformer, and the charging voltage of the bias capacitor is set to a predetermined value. And a circuit for providing a backflow preventing diode and a constant voltage circuit between the connection point of the bias capacitor and the driving winding and one end of the secondary winding of the converter transformer. When the switching element is in the on state, the rectifying MOS FET is in the on state, and the commutating MOS FET is in the off state. When the switching element is in the off state, the rectifying MOS FET is in the off state. A synchronous rectification type switching power supply in which an off state and the commutating MOS FET are turned on. 2. The switching power supply according to claim 1,
A switching power supply, wherein a gate drive voltage of the rectifying MOS FET is obtained from a voltage generated in a secondary winding of a converter transformer.