JP3262112B2 - Synchronous rectifier circuit and power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a power supply device,
In particular, the present invention relates to a synchronous rectifier circuit and a power supply device used for an electrophotographic printer or copier.

[0002]

2. Description of the Related Art Conventionally, a power supply device as shown in FIG. 25 has been known as a power supply device used in an electrophotographic printer or copier. Power supply device 100 shown in FIG.
Then, the DC power input from the DC input power supply 102 to the input unit 106 including the input capacitor 104 is switched by the switching unit 110 based on the control signal output from the drive unit 108, and the diode 112 and the output filter Power is supplied to the load 118 from the output unit 116 including the power supply 114. In addition, load 1
The voltage and current output to the power supply 18 are detected by the detection unit 120, and the detected value and the load 118 set by the setting unit 122 are detected.
Is compared by the comparison operation unit 124, and a control signal based on the comparison result is output from the driving unit 108 to the switching unit 110. In this way, control is performed so that the power supplied to the load matches the control target value.

FIG. 26 shows a specific circuit configuration of such a power supply device. As shown in FIG.
10 is an active element (for example, a transistor or a MOS-FE
T etc.) 126. The output unit 116 includes a commutation diode 112 and an output filter 114 including a choke coil 128 and a capacitor 130. The control unit 132 includes a comparison operation unit 124, a setting unit 122, and a driving unit 108. Further, the control unit 132 includes an oscillation circuit (not shown).
From 08, a pulse signal is output to the active element 126. Thereby, the DC input power supply 102 applied to the active element 126
Is switched.

When the active element 126 is on, DC power is charged to the choke coil 128 and the capacitor 130 and supplied to the load 118. Active element 1
When the switch 26 is off, the energy charged in the choke coil 128 and the capacitor 130 is supplied to the load 118 via the commutation diode 112.

At this time, the control section 132 monitors the output voltage detected by the detection section 120 in the comparison operation section 124, compares the output voltage with the control target value set in the setting section 122, and outputs the comparison result from the drive section 108. Is output to the switching unit 110. As a result, the active element 126 is turned on / off, and the power supplied to the load is controlled to match the control target value. The output voltage V _{0 at} this time is expressed by the following equation (1).

V ₀ = V _IN × (T _ON / T) (1) where V _IN is a DC input voltage, T is a cycle of a pulse signal output from the driving unit 108, and T _ON is a cycle T. The pulse signal indicates the time during which the active element 126 is turned on. That is, T _ON / T indicates a duty ratio.

On the commutation side of the output section 116, a diode which is a passive element is usually used as shown in FIG. 26 (see also an insulation type power supply device shown in FIG. 32). The diode 112 has a current-voltage characteristic as shown in FIG. 27. When the current exceeds a predetermined value, the forward voltage is saturated. This saturation voltage is about 0.9 V to 1.3 V for a high-speed diode and about 0.45 V to 0.55 V for a Schottky diode. As described above, there is a problem in that the forward voltage of the commutation diode 112 is saturated, which causes power loss and deteriorates power conversion efficiency. Furthermore, since the power loss is large and the junction temperature of the element rises, the larger the output current, the more the commutation diode 1
There is a problem that it is necessary to increase the number of T.12s (two, three, etc.) in parallel, disperse the power loss per element, and suppress the junction temperature.

In order to solve this problem, there is known a synchronous rectification type power supply device using a MOS-FET 202 on the commutation side as shown in FIG. 29 (see also an insulation type power supply device shown in FIG. 34). ). This is because the current-voltage characteristic of the diode is non-linear as shown in FIG.
This is based on the fact that the current-voltage characteristic of the OS-FET becomes linear depending on the gate voltage, and the voltage drop is smaller than that of a diode.

A power supply device 200 shown in FIG. 29 includes a switching MOS-FET 204,
A control signal is input from the chopper drive circuit 206 to the gate terminal of the ET 204. MOS-FET20
4 is conducting, the input power is
8, the smoothing capacitor 210 is charged and supplied to the load 212. Next, when the MOS-FET 204 is turned off, the magnetic energy stored in the choke coil 208 is released, and the commutation current flows through the detection resistor 214 and the parasitic diode 202A via the capacitor 210 and the load 212. At this time, the detection resistor 21
4 causes a voltage drop, and this voltage drop is compared with a reference voltage Vref output from a reference voltage power supply 218 by a comparator 216 as a detection voltage. When the detection voltage is higher than the reference voltage, the comparator 216 outputs a high level, and the MOS-FET 202
Is made conductive. The reference voltage power supply 218 is configured using a resistor and a Zener diode, for example, as shown in FIGS.

[0010]

However, in such a synchronous rectification type power supply device, a reference voltage having a fixed voltage value is compared with a detection voltage.
Or, as shown in FIG. 35 (H), at the time of light load,
The detection voltage may be lower than the reference voltage even though the commutation current is flowing. Therefore, MOS-FET
202 does not conduct and the commutation current is
And the power loss increases. Further, in this case, if the reference voltage is lowered, the MOS-FET 202 becomes conductive even at a light load,
There is a problem that it is difficult to accurately discriminate the timing of the conduction start and the conduction end of the FET 202, and under heavy load, a through current flows under the influence of a surge voltage, resulting in a large power loss. Further, when the reference voltage is set high, the efficiency (output voltage / input voltage) becomes poor when the load current is small, as indicated by the dotted line B in FIG. 8, and when the reference voltage is set low, the dotted line C shown in FIG. like,
There is a problem that the efficiency is reduced when the load current is large.

The present invention has been made to solve the above problems, and has as its object to provide a synchronous rectifier circuit and a power supply device capable of improving power supply efficiency.

[0012]

In order to achieve the above object, a synchronous rectifier circuit according to the present invention is provided in a power supply device.
An applied synchronous rectifier circuit, the output side of the power supply
A detecting element for detecting return current returning from the comparison means for said entering the detected voltage with the reference voltage comparison according to the detected return current by sensing element, and outputs a control signal corresponding to the comparison result, An element for passing the return current.
And the detection voltage is higher than the reference voltage based on the control signal and connected in series with the detection element.
A switching element that is controlled to be turned on when it is low and to be turned off when it is low , in a synchronous rectifier circuit , the voltage decreases as the detection voltage decreases, and increases as the detection voltage increases. In this way, a change means for changing the reference voltage is provided.

The synchronous rectifier circuit is applied to a power supply device.
And a detecting element for detecting a return current returning from the output side of the power supply device . For this detection element, for example, a resistor can be used. When the return current flows through the detecting element, a voltage corresponding to the flowing current can be detected. In the comparing means, the return detected by the detecting element is
The detection voltage corresponding to the current and the reference voltage are input and compared, and a control signal according to the comparison result, for example, is set to a high level when the detection voltage is higher than the reference voltage and to a low level when the detection voltage is lower than the reference voltage. Output a control signal.

The switch element is controlled based on the control signal. For example, it turns on when the control signal is at a high level, and turns off when it is at a low level. Further, the switch element is connected in series with the detection element. Therefore, for example, when the switch element is turned on by the control signal, the current flowing through the detection element also flows through the switch element, and when the switch element is turned off by the control signal, the current flowing through the detection element flows through the switch element. Does not flow. That is, the switch element is controlled according to the current flowing through the detection element. Note that a unipolar transistor such as a MOS-FET or a bipolar transistor can be used as the switch element.

In such a synchronous rectifier circuit, the changing means changes the reference voltage for controlling the power supplied to the load. This change is performed so that the detected voltage follows the detected voltage. That is, the reference voltage is increased as the detection voltage increases, and the reference voltage is decreased as the detection voltage decreases. In other words, the reference voltage increases as the current flowing through the detection element increases, and the reference voltage decreases as the current flowing through the detection element decreases. As a result, even when the supply power fluctuates due to the load fluctuation, the reference voltage fluctuates following the fluctuation. This change can be made, for example, by preparing a plurality of reference voltage power supplies and switching between them according to the magnitude of the detection voltage.

Thus, when the current flowing through the detecting element is small, the reference voltage is also small. Therefore, even when the current flowing through the detecting element is small, the switching element can be reliably turned on, and the power supply efficiency can be improved. it can.

Preferably, the changing means is an integrating means for integrating the detected voltage. Since the integrating means uses the voltage obtained by integrating the detection voltage as the reference voltage, the reference voltage gradually increases when a current starts flowing through the detection element, and gradually decreases when no current flows through the detection element. That is, the reference voltage changes so as to follow the detection voltage. Therefore, since there is no need to switch the reference voltage according to the detection voltage, a power supply for the reference voltage is not required.

Further, the synchronous rectifier circuit outputs the energy stored in the choke coil when the switching element on the primary side of the transformer is on, and stores the energy stored in the choke coil when the switching element is off. So-called forward-type power supply device that discharges power, and a so-called flyback-type power supply device that stores energy in the transformer when the switching element on the primary side of the transformer is on and sends power to the output side when the switching element is off. ,
A transformer is provided with a plurality of switching elements on its primary side, and these switching elements are alternately turned on and off at predetermined timings, so that a transformer use efficiency can be improved.
The present invention can be applied to a power supply device of a full bridge type or a push-pull type).

According to a third aspect of the present invention, there is provided a transformer having a primary winding and a secondary winding provided with a middle point, and after applying a unidirectional voltage to the primary winding of the transformer. Voltage applying means for stopping the application of the voltage for a predetermined time, applying a voltage in the other direction to the primary winding, and then stopping the application of the voltage for a predetermined time; and both ends of a secondary winding of the transformer. A pair of switch elements individually inserted between the connection points connecting the both ends to each other and flowing a return current controlled by a control signal and returned from the output side; and a middle point of the secondary winding. A smoothing means provided between the connection point and smoothing and outputting power between the two points, a pair of detection elements connected in series with the pair of switch elements and detecting the return current, Returns detected by a pair of sensing elements respectively A pair of integrating means for generating a reference voltage by each integrating part of the detection voltage corresponding to the flow, type and said detection voltage and the reference voltage comparison,
A pair of comparing means for outputting a control signal corresponding to the comparison result to each of the pair of switch elements.

The transformer has a primary winding and a secondary winding provided with a middle point. The voltage applying means stops the application of the voltage for a predetermined time after applying the voltage in one direction to the primary winding of the transformer, and stops the application of the voltage for a predetermined time after applying the voltage in the other direction to the primary winding. repeat. This can be realized, for example, by providing a plurality of switching elements and sequentially turning on these switching elements. That is, when any one of the switching elements is on, the other switching elements are turned off, and the switching element to be turned on is switched to alternately reverse the direction of the voltage applied to the primary winding of the transformer (so-called "Takiishi"). method). Thereby, electric power is induced on the secondary winding side. By switching the input power applied to the primary winding side of the transformer by the plurality of switching elements in this manner, the use efficiency of the transformer can be increased.
As a method of using a plurality of switching elements on the primary side of the transformer in this way, there are the so-called half-bridge method, full-bridge method, push-pull method, and the like.

A pair of switch elements are individually inserted between both ends of the secondary winding of the transformer and a connection point connecting these ends to each other, and are controlled by a control signal and returned from the output side. That is, a rectified current flows. When a voltage in one direction is applied to the primary winding, one of the pair of switching elements is turned on, and the first point is connected to the connection point → one of the pair of switching elements → the middle point of the secondary winding. When a voltage in the other direction is applied to the primary winding, the other of the pair of switch elements is turned on, and the connection point →
The second rectified current flows through the path from the other of the pair of switch elements to the middle point of the secondary winding.

The smoothing means is provided between the middle point of the secondary winding and the connection point, and smoothes and outputs power between the two points. That is, when a voltage in one direction is applied to the primary winding of the transformer, the power is smoothed while storing the power by the first rectified current and output to the output side. Also, the transformer 1
When a voltage in the other direction is applied to the next winding, the power is smoothed while storing the power by the second rectified current and output to the output side. This smoothing means can be composed of, for example, a choke coil for storing power and a capacitor for smoothing. Further, when the application of the voltage to the primary winding is stopped, the commutation current due to the electric power stored in the smoothing means is shunted and flows through the same paths as the first and second rectified currents.

The pair of detecting elements are connected in series with the pair of switching elements, respectively, and detect the return current.
In other words, when a rectified current or a commutation current flows through this detecting element, a voltage corresponding to the flowing current can be detected.

The pair of integrators respectively generate a reference voltage by integrating a part of the detection voltage corresponding to the return current detected by the pair of detection elements. The generation of the reference voltage can be easily realized by, for example, using a plurality of resistors connected in series as a detecting element and integrating a voltage detected by a part of the plurality of resistors.

As described above, since the reference voltage is a voltage obtained by integrating a part of the detection voltage, the reference voltage gradually rises when a current starts flowing through the detection element, and when no current flows through the detection element, the reference voltage becomes higher. Gradually descend. That is, the reference voltage changes so as to follow a part of the detection voltage.

The pair of comparing means inputs and compares the detection voltage and the reference voltage, and outputs a control signal corresponding to the comparison result to each of the pair of switch elements. For example, when the detection voltage is higher than the reference voltage, a control signal for turning on the switch element is output, and when the detection voltage is lower than the reference voltage, a control signal for turning off the switch element is output.

By the way, in the power supply device of the so-called multi-stone type, as described above, there is an off period in which the application of the voltage to the primary winding is stopped, and this off period depends on the power stored in the smoothing means. The commutation current shunts and flows through each detection element and switch element. For this reason, the current flowing through each detection element or switch element during the off period is smaller than the first and second rectified currents flowing when a voltage is applied to the primary winding. Therefore, when a voltage obtained by integrating the detection voltage as it is is used as the reference voltage, the reference voltage may be larger than the detection voltage in the off period, and the switching element cannot be turned on. There is.

However, since the integrating means generates the reference voltage by integrating a part of the detection voltage as described above, the reference voltage does not exceed the detection voltage even in the off period, and is surely in the off period. The switch element can be turned on, and the power efficiency can be improved even in the multi-stone power supply device.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] A first embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a power supply device 10 according to the present invention. As shown in FIG. 1, a power supply device 10 includes a P-channel MOS-FET 12 and a MOS-F
The power terminal 14 is connected to the source terminal of the ET 12. A DC voltage Vin is applied to the power supply terminal 14. The drain terminal of the MOS-FET 12 is connected to one terminal of the choke coil 16 and an N-channel MOS-FET.
18 drain terminals are connected. MOS-FET
A chopper drive circuit 20 is connected to the gate terminal 12. The chopper drive circuit 20 includes a MOS-
A control signal (pulse signal) is output to the gate terminal of the FET 12.

The other terminal of the choke coil 16 is connected to one terminal of a capacitor (for example, an electrolytic capacitor) 22 and a load terminal 24. The other terminal of the capacitor 22 is connected to a GND (ground) terminal 26.
A load (for example, a resistor) 30 is connected between the load terminal 24 and the GND terminal.

The source terminal of the MOS-FET 18 is connected to one terminal of the detection resistor 32 and one terminal of the capacitor 34. The other terminal of the detection resistor 32 is a resistor 36
And the GND terminal 26. The other terminal of the capacitor 34 and the other terminal of the resistor 36 are connected to the inverting input terminal of the comparator 38. The capacitor 34 and the resistor 36 constitute an integrating circuit 40, and the output voltage of the integrating circuit 40 is used as a reference voltage Vref (see also FIG. 7A). The non-inverting input terminal of the comparator 38 is connected to the other terminal of the capacitor 22. The voltage input to the non-inverting input terminal of the comparator 38 becomes the detection voltage. The output terminal of the comparator 38 is connected to the input terminal of the drive circuit 42. The output terminal of the drive circuit 42 is a MOS-
It is connected to the gate terminal of FET18. Also, MO
The S-FET 18 has a parasitic diode 18 due to its characteristics.
A is provided.

The GND terminal 39 of the comparator 38 is connected to one terminal of the detection resistor 32. Therefore, the reference voltage input to the inverting input terminal and the detection voltage input to the non-inverting input terminal are input at a positive potential with respect to the potential of the GND terminal 39.

Next, the operation of the first embodiment will be described.

First, when the MOS-FET 12 is turned on by a control signal from the chopper drive circuit 20, a current supplied from a DC power supply (not shown) is output to the load 30 while charging the capacitor 22 via the choke coil 16. You.

Next, when the MOS-FET 12 is turned off, the energy stored in the choke coil 16 passes through the capacitor 22, the load 30, the detection resistor 32, the MOS
-Flows as a commutation current through the parasitic diode 18A of the FET 18;

At this time, the comparator 38 compares the detection voltage input to the non-inverting input terminal with the reference voltage output from the integrating circuit 40 input to the inverting input terminal.
When the detected voltage is equal to or higher than the reference voltage, the comparator 38
Outputs a high level to the gate terminal of the MOS-FET 18 via the drive circuit 42. With this, MOS-FET
18 turns on, and the commutation current flows through the MOS-FET 18 and is supplied to the load 30 side.

FIG. 2 shows voltage and current waveform diagrams of each part. FIG. 2A shows the waveform of the reference voltage input to the inverting input terminal of the comparator 38, that is, the waveform of the output voltage of the integrating circuit 40, and the waveform of the detection voltage input to the non-inverting input terminal of the comparator 38. 2 (B) shows the output voltage of the comparator 38, FIG. 2 (C) shows the waveform of the current flowing through the parasitic diode 18A, and FIG. 2 (D) shows the waveform of the current flowing through the MOS-FET 18. ing.

As described above, the reference voltage input to the inverting input terminal of the comparator 38 is a voltage obtained by integrating the voltage drop caused by the detection resistor 32. Accordingly, as shown in FIG. 2A, the reference voltage changes according to the voltage drop due to the detection resistor 32, in other words, the commutation current flowing through the detection resistor 32. That is, the reference voltage decreases as the commutation current decreases, and the reference voltage increases as the commutation current increases. For this reason, when a commutation current flows, the MOS-FET 18 can be reliably used from a light load to a heavy load.
Can be turned on, as shown by the solid line A in FIG.
Power loss can be suppressed from a light load to a heavy load. Further, the reference voltage decreases as the commutation current decreases, and the reference voltage increases as the commutation current increases.
2 is on, that is, even when a surge voltage occurs when no commutation current flows, the MOS-FE
It is possible to prevent T18 from being turned on. Therefore, it is possible to prevent a through current from flowing, so that power loss can be suppressed.

[Second Embodiment] Next, a second embodiment of the present invention will be described. In the second embodiment, a detailed circuit configuration of the power supply device 10 described in the first embodiment will be described. Note that the same parts as those of the power supply device 10 shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The power supply 10 shown in FIG. 3 has a detection circuit 44 for detecting an output voltage Vout output to the load side.
It has. The output voltage detected by the detection circuit 44 is
It is output to the comparison operation unit 46 of the chopper drive circuit 20. The comparison operation unit 46 compares the target control value set by the setting unit 48 with the output voltage detected by the detection circuit 44, and outputs a control signal corresponding to the comparison result to the gate terminal of the MOS-FET 12. That is, the chopper drive circuit 20 performs feedback control so that the output voltage matches the target control value.

The drive circuit 42 includes an NPN transistor 50 and a PNP transistor 52. The collector terminal of the transistor 50 is connected to the other terminal of the choke coil 16, and the emitter terminal is connected to the emitter terminal of the transistor 52. The collector terminal of the transistor 52 is connected to one terminal of the detection resistor 32. The output terminals of the comparator 38 are connected to the base terminals of the transistors 50 and 52. Such a drive circuit 42 amplifies the output of the comparator 38 and
It outputs to the gate terminal of S-FET18.

As described above, the synchronous rectifier circuit 15 is constituted by the MOS-FET 18, the detection resistor 32, the comparator 38, the integrating circuit 40, and the drive circuit 42. The input terminal A of the synchronous rectifier circuit 15 The output terminal B is connected to one end of the choke coil 16.

Next, the operation of the second embodiment will be described.

First, when the MOS-FET 12 is turned on by a control signal from the chopper drive circuit 20, a drain current _ID1 flows and is output to the load 30 while charging the capacitor 22 through the choke coil 16.

Next, when the MOS-FET 12 is turned off, flows energy capacitor 22 accumulated in the choke coil 16, a detection resistor 32 via the load 30 as a commutation current I _S.

At this time, the comparator 38 compares the detection voltage with a reference voltage obtained by integrating the voltage drop caused by the product of the resistance value of the detection resistor 32 and the commutation current by the integration circuit 40. When the detected voltage is equal to or higher than the reference voltage, the comparator 38 outputs a high level to the drive circuit 42. The drive circuit 42 amplifies the output from the comparator 38 and
Output to the gate terminal of T18. This allows MOS-F
ET18 is turned on, and the commutation current I _S becomes MOS-FET1.
8, and flows through the parasitic diode 18A (I _D and I _{d in the} figure) and is supplied to the load 30 side.

Here, the on-loss P _off occurring in the MOS-FET 18 can be calculated as in the following equation (2).

P _off = R _on × (I _D ) ² (2) where I _D = ｛(T _off / 3T) · (I _a ² + I _a × I _b + I
_b ² )｝ ^1/2 , R _on is the on-resistance of MOS-FET 18, T
The time off cycle of the MOS-FET 18, T _off is the MOS-FET 18 of the T time are on, I _a,
Ib is the current at the time of commutation shown in FIG.

In order to drive the MOS-FET 18, it is necessary to satisfy the following expression (3).

R × I _S > Vref (3) where R is the resistance value of the detection resistor 32.

FIG. 4 is a waveform diagram showing the voltage and current of each part. FIG. 4A shows the waveform of the reference voltage Vref input to the inverting input terminal of the comparator 38, that is, the waveform of the output voltage of the integrating circuit 40 and the waveform of the detection voltage Von input to the non-inverting input terminal of the comparator 38. 4 (B) shows the output voltage of the comparator 38, and FIG.
The waveform of the current flowing through 8A is shown in FIG.
FIG. 4E shows the waveform of the current flowing through the ET 18, and FIG. 4E shows the waveform of the commutation current I _S (= I _D + I _d ).

As described above, the reference voltage input to the inverting input terminal of the comparator 38 is a voltage obtained by integrating the voltage drop caused by the detection resistor 32. Therefore, as shown in FIG. 4A, the reference voltage changes according to the voltage drop due to the detection resistor 32, in other words, the commutation current flowing through the detection resistor 32. That is, the reference voltage decreases as the commutation current decreases, and the reference voltage increases as the commutation current increases. For this reason, when a commutation current flows, the MOS-FET 18 can be reliably used from a light load to a heavy load.
Can be turned on, as shown by the solid line A in FIG.
Power loss can be suppressed from a light load to a heavy load. Further, the reference voltage decreases as the commutation current decreases, and the reference voltage increases as the commutation current increases. Therefore, when the MOS-FET 12 is on,
That is, it is possible to prevent the MOS-FET 18 from being turned on by mistake even when a surge voltage occurs when no commutation current flows. Therefore, it is possible to prevent a through current from flowing, so that power loss can be suppressed.

Third Embodiment Next, a third embodiment of the present invention will be described. In the third embodiment, a modified example of the power supply device 10 described in the second embodiment will be described. The same parts as those of power supply device 10 shown in FIG. 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The power supply device 10 shown in FIG. 5 is different from the power supply device 10 shown in FIG. 3 in that the GND terminal 39 of the comparator 38 is connected to one terminal of the detection resistor 32 in the power supply device 10 shown in FIG. In contrast, the power supply device 10 shown in FIG. 5 is grounded, whereas the power supply device 10 shown in FIG. 3 has one terminal of the resistor 36 grounded and one terminal of the capacitor 34 connected to one terminal of the detection resistor 32. 5, the power supply device 10 shown in FIG. 5 has one terminal of the resistor 36 connected to one terminal of the detection resistor 32, and one terminal of the capacitor 34 grounded. (See also FIG. 7). As a result, the detection voltage and the reference voltage are input at a minus potential with respect to the potential of the GND terminal 39 as shown in FIG. Except for this point, the second embodiment is the same as the second embodiment, and the description is omitted.

[Fourth Embodiment] Next, a fourth embodiment of the present invention will be described. In the fourth embodiment, a so-called forward type that outputs while storing energy in a choke coil when the switching element on the primary side of the transformer is on, and releases energy stored in the choke coil when the switching element is off. A case where the present invention is applied to a power supply device will be described. The same parts as those of power supply device 10 shown in FIG. 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The power supply 10 shown in FIG.
It has. One end of the primary winding 11A of the transformer 11 is connected to a power supply end 13A to which a DC voltage supplied by, for example, full-wave rectification of an AC voltage and then smoothed by a smoothing capacitor (not shown) is connected, and the other end is a drain of the MOS-FET 17 Terminal is connected. The gate terminal of the MOS-FET 17 is connected to the control circuit 19, and the source terminal is connected to the power supply terminal (ground terminal) 13B. MOS-FE
When a control signal is input from the control circuit 19 to the gate terminal of T17, the DC voltage applied to the primary winding 11A of the transformer 11 is switched. This allows
An AC voltage is induced on the secondary winding 11B side of the transformer 11.

One end of the secondary winding 11B is connected to the output end B of the synchronous rectifier circuit 15B for synchronously rectifying the commutation current and one end of the choke coil 16, and is connected to the synchronous rectifier circuit 15B.
Is connected to the other end of the capacitor 22 and the GND terminal 26 together with the input terminal A of the synchronous rectifier circuit 15A. On the other hand, the other end of the secondary winding 11B is connected to an output terminal B of a synchronous rectifier circuit 15A for synchronously rectifying a rectified current.

The synchronous rectifier circuits 15A and 15B differ from the synchronous rectifier circuit 15 shown in FIG. 3 in that the drive circuit 42 is connected to the gate terminal of the MOS-FET 18 via the resistor 43. Since it is substantially the same as the synchronous rectifier circuit shown in FIG. 3, detailed description of the synchronous rectifier circuits 15A and 15B is omitted.

The output voltage detected by the detection circuit 44 is fed back to the control circuit 19 via the photocoupler 21 that insulates the primary and secondary signals of the transformer 11 from each other. The control circuit 19 controls the duty of the control signal supplied to the MOS-FET 17 so that the detected output voltage becomes the target voltage.

Next, the operation of the fourth embodiment will be described.

An oscillator (not shown) built in the control circuit 19 outputs a control signal to the gate terminal of the MOS-FET 17 to be repeatedly turned on and off at a predetermined cycle.
T17 is turned on the drain current I _DS flows through the primary winding 11A of the transformer 11, the voltage in the secondary winding 11B is induced. The current caused by the induced voltage is smoothed by the capacitor 22 while being accumulated in the choke coil 16 and output to the load side. Also, the rectified current I
₁ (= I _D1 + I _d1 ) flows through the synchronous rectifier circuit 15A.

Next, when the MOS-FET 17 is turned off, the energy accumulated in the choke coil 16 passes through the capacitor 22 and the load, and the commutation current I ₂ (= I _D2 + I
_d2 ) flows through the synchronous rectifier circuit 15B.

At the time of rectification, the voltage drop due to the product of the resistance value R ₁ of the detection resistor 32 of the synchronous rectifier circuit 15A and the rectified current I ₁ , that is, the detection voltage V ₁ (= R ₁ × I ₁ ) and the detection voltage V _The comparator 38 compares the reference voltage _Vref obtained by integrating ₁ with the integration circuit 40. Then, the detection voltage V ₁
Is higher than the reference voltage _Vref , the comparator 38 outputs a high level to the drive circuit 42. The drive circuit 42 amplifies the output from the comparator 38 and outputs the amplified output to the gate terminal of the MOS-FET 18. Thus MOS-FET 18 is turned on, the rectified current I ₁ represents the flow through the MOS-FET 18 and the parasitic diode 18A (FIG. 9 I _D1 and I _d1,
See also FIG. 10).

[0065] In this way, the reference voltage V _ref is the detection voltage V ₁
10, the reference voltage V _ref also decreases as the rectified current I ₁ decreases, as shown in FIG.
Reference voltage V _ref in accordance with rectified current I ₁ is greater increases. Therefore, as shown in FIG. 10, the rectified current I ₁
When the load is flowing, the MO
The S-FET 18 can be turned on, and the solid line A in FIG.
As shown by, power loss can be suppressed from a light load to a heavy load. Note that the operation at the time of commutation is the same as that at the time of rectification, and a description thereof will be omitted.

[Fifth Embodiment] Next, a fifth embodiment of the present invention will be described. In the fifth embodiment, a modified example of the power supply device 10 described in the fourth embodiment will be described. The same parts as those of the power supply device 10 shown in FIG. 9 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The power supply device 10 shown in FIG. 11 is different from the power supply device 10 shown in FIG. 9 in that the GND terminal 39 of the comparator 38 is connected to one terminal of the detection resistor 32 in the power supply device 10 shown in FIG. In contrast, the power supply 1 shown in FIG.
0, the terminal is grounded. In the power supply device 10 shown in FIG.
11 is connected to one terminal of the detection resistor 32, whereas the power supply 10 shown in FIG.
6 is connected to one terminal of the detection resistor 32 and one terminal of the capacitor 34 is grounded. As a result, the detection voltages V ₁ and V ₂ and the reference voltage V
_ref is input as a negative potential with respect to the potential of the GND terminal 39 as shown in FIG. The operation is the same as that of the fourth embodiment, and the description is omitted.

[Sixth Embodiment] Next, a sixth embodiment of the present invention will be described. In the sixth embodiment, the present invention is applied to a so-called flyback type power supply device that stores energy in a transformer when a switching element on the primary side of the transformer is on and sends power to an output side when the switching element is off. A description will be given of the case in which this is done. The same parts as those of the power supply device 10 shown in FIG. 9 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The power supply device 10 shown in FIG. 13 is different from the power supply device 10 shown in FIG.
A and A have different polarities between the secondary winding 11B and the absence of the choke coil 16 and the synchronous rectifier circuit 15B for commutation. That is, the power supply device 10 shown in FIG.
This is a flyback type power supply device that stores energy in the transformer 11 when the FET 17 is on and sends power to the output side when the MOS-FET 17 is off.

Next, the operation of the sixth embodiment will be described.

An oscillator (not shown) built in the control circuit 19 outputs a control signal to the gate terminal of the MOS-FET 17 to repeatedly turn on and off at a predetermined cycle.
T17 is turned on the drain current I _DS flows through the primary winding 11A of the transformer 11, the voltage in the secondary winding 11B is induced. When the MOS-FET 17 is turned off, the energy stored in the secondary winding 11B is smoothed by the capacitor 22 and output to the load side. A rectified current I ₁ (= I _D1 + I _d1 ) flows through the synchronous rectifier circuit 15A from the load side.

At the time of rectification, the voltage drop due to the product of the resistance value R ₁ of the detection resistor 32 of the synchronous rectifier circuit 15A and the rectified current I ₁ , that is, the detection voltage V ₁ (= R ₁ × I ₁ ) and the detection voltage V _The comparator 38 compares the reference voltage _Vref obtained by integrating ₁ with the integration circuit 40. Then, as shown in FIG. 14, when the detection voltage V ₁ is equal to or higher than the reference voltage V _ref, the comparator 38 outputs a high level to the drive circuit 42. The drive circuit 42 amplifies the output from the comparator 38 and
Output to the gate terminal of FET18. This allows MOS
-FET 18 is turned on, and the rectified current I ₁ is
18 and the parasitic diode 18A (I _D1 and I _d1 shown in FIG. 13; see also FIG. 14).

[0073] In this way, the reference voltage V _ref is the detection voltage V ₁
14, the reference voltage V _ref also decreases as the rectified current I ₁ decreases, as shown in FIG.
Reference voltage V _ref in accordance with rectified current I ₁ is greater increases. Therefore, as shown in FIG. 14, the rectified current I ₁
When the load is flowing, the MO
The S-FET 18 can be turned on, and the solid line A in FIG.
As shown by, power loss can be suppressed from a light load to a heavy load.

[Seventh Embodiment] Next, a seventh embodiment of the present invention will be described. In the seventh embodiment, a modified example of the power supply device 10 described in the sixth embodiment will be described. The same parts as those of power supply device 10 shown in FIG. 13 are denoted by the same reference numerals, and detailed description thereof will be omitted.

Power supply device 10 shown in FIG. 15 is different from power supply device 10 shown in FIG. 13 in that power supply device 10 shown in FIG.
13, the GND terminal 39 of the comparator 38 is connected to one terminal of the detection resistor 32, whereas the power supply device 10 shown in FIG. 15 is grounded, and the power supply device 1 shown in FIG.
0, one terminal of the resistor 36 is grounded, and one terminal of the capacitor 34 is connected to one terminal of the detection resistor 32. On the other hand, in the power supply device 10 shown in FIG. The terminal is connected to one terminal of the detection resistor 32, and the one terminal of the capacitor 34 is grounded. As a result, the detection voltage V ₁ and the reference voltage V
_ref is input at a negative potential with respect to the potential of the GND terminal 39 as shown in FIG. The operation is the same as in the sixth embodiment, and a description thereof will be omitted.

[Eighth Embodiment] Next, an eighth embodiment of the present invention will be described. In the eighth embodiment, a transformer is provided with a plurality of switching elements on the primary side, and these switching elements are alternately turned on and off at a predetermined timing to improve the use efficiency of the transformer. A case in which the present invention is applied to a power supply device of (method) will be described. The same parts as those of the power supply device 10 shown in FIG. 9 are denoted by the same reference numerals.

As shown in FIG. 17, the power supply 10
The transformer 11 includes a secondary winding 11A and a secondary winding 11B provided with a middle point. One end of the primary winding 11A of the transformer 11 is connected to the source terminal of the MOS-FET 17A and the drain terminal of the MOS-FET 17B. The drain terminal of the MOS-FET 17A is connected to, for example, a power supply terminal 13A to which a DC voltage smoothed by a smoothing capacitor (not shown) after an AC voltage is full-wave rectified and one end of a capacitor 23A. The other end of the capacitor 23A is connected to the other end of the primary winding 11A and the capacitor 2A.
It is connected to one end of 3B. The other end of the capacitor 23B is connected to the source terminal of the MOS-FET 17B and to the power supply terminal 13B (ground terminal). MOS-
The control circuit 19 is connected to the gate terminals of the FETs 17A and 17B.

The control circuit 19 controls the MO so that the detection voltage input from the detection circuit (not shown) for detecting the output voltage via the photocoupler (not shown) matches the target voltage.
A control signal for turning on and off the S-FETs 17A and 17B alternately at a predetermined timing is supplied to the MOS-FETs 17A and 17B.
It outputs to the gate terminal of B. Thereby, the transformer 11
Are applied alternately to the primary winding 11A. That is, the circuit on the primary winding 11A side is a so-called half-bridge type inverter circuit.

One end of the secondary winding 11B of the transformer 11
The output terminal B of the synchronous rectifier circuit 15A is connected, and the other end of the secondary winding 11B is connected to the output terminal B of the synchronous rectifier circuit 15B. The synchronous rectifier circuits 15A, 15B
Has the same configuration as the synchronous rectifier circuit 15 shown in FIG.

The middle point of the secondary winding 11 B is connected to one end of the choke coil 16,
The other end of 6 is connected to the load terminal 24 and one end of the capacitor 22. The other end of the capacitor 22 is connected to the GND terminal 26 and the input terminals A of the synchronous rectifier circuits 15A and 15B.

Next, the operation of the eighth embodiment will be described.

First, the control circuit 19 sends the MOS-FET 1
A predetermined control signal, that is, a control signal for turning on and off the MOS-FETs 17A and 17B alternately at a predetermined cycle is output to the gate terminals of the gates 7A and 17B.

When the MOS-FET 17A is turned on, the power supply terminal 13A → the MOS-FET 17A → the transformer 1
When a current flows through a path from the primary winding 11A to the capacitor 23B and the MOS-FET 17B is turned on,
A current flows through a path of the power supply terminal 13A → the capacitor 23A → the primary winding 11A of the transformer 11 → the MOS-FET 17B.

Therefore, the direction of the current flowing through the primary winding 11A (the direction of the voltage applied to the primary winding 11A) is
When the S-FET 17A is on and the MOS-FET
The direction is reversed when 17B is on.

Thus, the primary winding 11 of the transformer 11
The A, sandwiching a constant OFF period Toff as shown in FIG. 18, of different polarity voltages (primary voltage Vp) is applied alternately reverse current (primary current Ip) is alternately each other Flows. When the voltage is applied to the primary winding 11A of the transformer 11 as described above, a secondary winding voltage is generated in the secondary winding 11B.

When the MOS-FET 17A is on (FIG. 1
8, the middle point of the secondary winding 11B of the transformer 11 → the choke coil 16 →
Capacitor 22 and load (not shown) → synchronous rectifier circuit 15
The secondary side current I ₁ (= I _D1 ) as shown in FIG.
+ I _d1 ) flows.

On the other hand, when the MOS-FET 17B is on (period T2 in FIG. 18), the middle point of the secondary winding 11B of the transformer 11 → the choke coil 16 → the capacitor 22 and the load (not shown) as shown in FIG. → The secondary side current I as shown in FIG.
₂ (= I _D2 + I _d2 ) flows.

When both the MOS-FETs 17A and 17B are off (Toff period in FIG. 18 ), no voltage is induced in the secondary winding 11B of the transformer 11, so that the energy stored in the choke coil 16 , The secondary currents I ₁ and I ₂ simultaneously flow through the path of the choke coil 16 → the capacitor 22 and the load → the synchronous rectifier circuits 15A and 15B → the middle point of the secondary winding 11B.

When the MOS-FET 17A is ON (period T1 in FIG. 18), the synchronous rectifier circuit 15A
, The voltage drop due to the product of the resistance value R ₁ of the detection resistor 32 and the secondary current I ₁ , that is, the detection voltage V ₁ (= R ₁ × I ₁ ),
The comparator 38 compares the detection voltage V ₁ with a reference voltage V _ref obtained by integrating the detection voltage V ₁ by the integration circuit 40. Then, the detection voltages V ₁ is equal to or larger than the reference voltage V _ref, the comparator 38, as shown in FIG. 18 outputs a high level to the drive circuit 42. The drive circuit 42 amplifies the output from the comparator 38 and outputs the amplified output to the gate terminal of the MOS-FET 18. As a result, the MOS-FET 18 is turned on, and the secondary side current I ₁ becomes MO
It flows through the S-FET 18 and the parasitic diode 18A.

[0090] In this way, the reference voltage V _ref is the detection voltage V ₁
For integrating the voltage, as shown in FIG. 18, also decreases the reference voltage V _ref in accordance with the secondary-side current I ₁ becomes smaller, the reference voltage V _ref in accordance with the secondary-side current I ₁ increases
Also increases. Therefore, as shown in FIG.
-When the FET 17A is on, that is, during the period T1 in FIG.
The FET 18 can be turned on, and as shown by the solid line A in FIG. 8, power loss can be suppressed from a light load to a heavy load. The operation when the MOS-FET 17B is on (period T2 in FIG. 18) is the same as that described above, and a description thereof will be omitted.

In the above description, the primary-side circuit has been described as a half-bridge type circuit. However, the present invention is not limited to this, and the present invention can be applied to a full-bridge type or push-pull type circuit.

[Ninth Embodiment] Next, a ninth embodiment of the present invention will be described. In the ninth embodiment, a modified example of the power supply device 10 described in the eighth embodiment will be described. The same parts as those of power supply device 10 shown in FIG. 17 are denoted by the same reference numerals, and detailed description thereof will be omitted.

Power supply device 10 shown in FIG. 19 is different from power supply device 10 shown in FIG. 17 in that power supply device 10 shown in FIG.
19, the GND terminal 39 of the comparator 38 is connected to one terminal of the detection resistor 32, whereas the power supply 10 shown in FIG. 19 is grounded, and the power supply 1 shown in FIG.
0, one terminal of the resistor 36 is grounded, and one terminal of the capacitor 34 is connected to one terminal of the detection resistor 32. On the other hand, in the power supply device 10 shown in FIG. The terminal is connected to one terminal of the detection resistor 32, and the one terminal of the capacitor 34 is grounded. Thereby, the detection voltage V ₁ (or the detection voltage V ₂ )
The reference voltage _Vref is input at a negative potential with respect to the potential of the GND terminal 39 as shown in FIG. In addition,
The operation is the same as in the eighth embodiment, and a description thereof will be omitted.

[Tenth Embodiment] Next, a tenth embodiment of the present invention will be described.
An embodiment will be described. In the tenth embodiment, the eighth
A modification of the power supply device 10 described in the embodiment will be described. The same parts as those of power supply device 10 shown in FIG. 17 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In the power supply device 10 shown in FIG. 17 described in the eighth embodiment, during the Toff period shown in FIG. 18, the secondary currents I ₁ and I _{2 are} generated by the energy stored in the choke coil 16 as described above. Flow simultaneously at the same time. The secondary currents I ₁ and I _{2 at} this time are, as shown in FIG.
It becomes smaller (for example, about １ ／) than the secondary currents I ₁ and I ₂ flowing during the period T1 or T2. Therefore, the detection voltage V
_{Since 1} (= R ₁ × I ₁ ) and the detection voltage V ₂ (= R ₁ × I ₂ ) are also reduced, the comparator 38 may not be turned on during the Toff period, and synchronous rectification may not be performed.

Therefore, in the tenth embodiment, a power supply device capable of turning on the comparator 38 reliably even in the Toff period and performing synchronous rectification will be described with reference to FIG.

The power supply device 10 shown in FIG. 21 is different from the power supply device 10 shown in FIG.
₁ ) is divided into resistors 32A and 32B, and one terminal of the resistor 36 of the integrating circuit 40 is connected to the resistor 32A and the resistor 32B.
Is connected between Here, the resistance 32
The resistance values R _A and R _B of A and 32B are, for example, both R _1/2 . That is, the reference voltage Vref is equal to the detection voltage V
_{Since A} (= R _A × I ₁ ) is integrated, the voltage is。 of the reference voltage Vref of the power supply device 10 shown in FIG. Further, the detection voltage V ₁ is (R _A + R _B ) × I ₁ (=
R ₁ × I ₁ ). Therefore, the reference voltage Vref does not exceed the detection voltage V ₁ (or V ₂ ) even during the Toff period.

That is, in the synchronous rectifier circuit 15A, the voltage drop due to the product of the total resistance value (R _A + R _B ) of the detection resistors 32A and 32B and the secondary current I ₁ , that is, the detection voltage V ₁
(= (R _A + R _B ) × I ₁ ) and the voltage drop due to the product of the resistance value R _A of the detection resistor 32A and the secondary current I ₁ , that is, the detection voltage V _A (= R _A × I ₁ ). The comparator 38 compares the reference voltage _Vref integrated by the integration circuit 40 with the reference voltage _Vref . When the detection voltage V ₁ is equal to or higher than the reference voltage V _ref , FIG.
As shown in FIG. 2, the comparator 38 (comparator A) is
Output a high level. The drive circuit 42 includes a comparator 38
Is amplified and output to the gate terminal of the MOS-FET 18. As a result, the MOS-FET 18 is turned on,
Secondary current I ₁ flows in the MOS-FET 18 and the parasitic diode 18A.

As described above, the reference voltage V _ref is equal to the detection voltage V _A.
For (= V _1/2) integrating the voltage, as shown in FIG. 22, the reference voltage V according to the secondary-side current I ₁ decreases
_The reference voltage V _ref also increases as the secondary side current I ₁ increases, and the reference voltage V _ref does not exceed the detection voltage V ₁ . The same applies to the synchronous rectifier circuit 15B. For this reason, as shown in FIG.
The MOS-FET 18 can be reliably turned on even during the period, and the power loss can be further suppressed.

Note that the resistance values R of the detection resistors 32A and 32B are
_A, R_BIs R₁Was explained as half of the
Output voltage V_AReference voltage V which is a voltage obtained by integrating_refIs detected
Pressure V ₁Can be set freely so as not to exceed.

[Eleventh Embodiment] Next, an eleventh embodiment of the present invention will be described. First
In one embodiment, a modified example of the power supply device 10 described in the tenth embodiment will be described. The same parts as those of the power supply device 10 shown in FIG.
A detailed description thereof will be omitted.

Power supply device 10 shown in FIG. 23 is different from power supply device 10 shown in FIG. 21 in that power supply device 10 shown in FIG.
23, the GND terminal 39 of the comparator 38 is connected to one terminal of the detection resistor 32B, whereas the power supply device 10 shown in FIG. 23 is grounded, and the power supply device 10 shown in FIG. Of the detection resistor 32
B is connected to one terminal, whereas the power supply device 10 shown in FIG. 23 is such that one terminal of the capacitor 34 is grounded. As a result, the detection voltage V ₁ (or the detection voltage V ₂ ) and the reference voltage _Vref are input at a negative potential with respect to the potential of the GND terminal 39 as shown in FIG. The operation is the same as that of the tenth embodiment, and the description is omitted.

[0103]

As described above, according to the first aspect of the present invention, since the changing means for changing the reference voltage in accordance with the detected voltage is provided, the switch can be reliably switched even when the current flowing through the detecting element is small. This has an effect that the element can be turned on and power supply efficiency can be improved.

According to the second aspect of the present invention, since the integrating means integrates the detected voltage into the changing means, there is no need to switch the reference voltage according to the detected voltage, and a power supply for the reference voltage becomes unnecessary. It has the effect of.

According to the third aspect of the present invention, since the integrating means generates the reference voltage by integrating a part of the detection voltage, the switching element is reliably turned on without the reference voltage exceeding the detection voltage. This has the effect that power efficiency can be improved even in a multi-stone power supply device.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a power supply device according to a first embodiment.

FIG. 2 is a waveform diagram showing current and voltage waveforms of each unit of the power supply device according to the first embodiment.

FIG. 3 is a schematic configuration diagram of a power supply device according to a second embodiment.

FIG. 4 is a waveform diagram showing current and voltage waveforms of respective units of a power supply device according to a second embodiment.

FIG. 5 is a schematic configuration diagram of a power supply device according to a third embodiment.

FIG. 6 is a waveform diagram showing current and voltage waveforms of each part of the power supply device according to the third embodiment.

FIG. 7 is a circuit diagram illustrating a circuit configuration of an integration circuit.

FIG. 8 is a diagram showing a relationship between load current and power supply efficiency.

FIG. 9 is a schematic configuration diagram of a power supply device according to a fourth embodiment.

FIG. 10 is a waveform diagram showing current and voltage waveforms of respective parts of a power supply device according to a fourth embodiment.

FIG. 11 is a schematic configuration diagram of a power supply device according to a fifth embodiment.

FIG. 12 is a waveform chart showing waveforms of current and voltage of each unit of the power supply device according to the fifth embodiment.

FIG. 13 is a schematic configuration diagram of a power supply device according to a sixth embodiment.

FIG. 14 is a waveform diagram showing waveforms of current and voltage of each unit of the power supply device according to the sixth embodiment.

FIG. 15 is a schematic configuration diagram of a power supply device according to a seventh embodiment.

FIG. 16 is a waveform chart showing waveforms of current and voltage of each unit of the power supply device according to the seventh embodiment.

FIG. 17 is a schematic configuration diagram of a power supply device according to an eighth embodiment.

FIG. 18 is a waveform diagram showing current and voltage waveforms of each unit of the power supply device according to the eighth embodiment.

FIG. 19 is a schematic configuration diagram of a power supply device according to a ninth embodiment.

FIG. 20 is a waveform diagram showing waveforms of current and voltage of each unit of the power supply device according to the ninth embodiment.

FIG. 21 is a schematic configuration diagram of a power supply device according to a tenth embodiment.

FIG. 22 is a waveform chart showing current and voltage waveforms of respective parts of the power supply device according to the tenth embodiment.

FIG. 23 is a schematic configuration diagram of a power supply device according to an eleventh embodiment.

FIG. 24 is a waveform chart showing waveforms of current and voltage of each unit of the power supply device according to the eleventh embodiment.

FIG. 25 is a schematic configuration diagram of a conventional power supply device.

FIG. 26 is a schematic configuration diagram of a conventional power supply device.

FIG. 27 is a diagram showing a relationship between a voltage drop of a diode and a current.

FIG. 28 is a diagram showing a relationship between a voltage drop of a diode and a MOS-FET and a current.

FIG. 29 is a schematic configuration diagram of a conventional power supply device.

FIG. 30 is a waveform diagram showing current and voltage waveforms of various parts of a conventional power supply device.

FIG. 31 is a circuit diagram showing an example of a circuit configuration of a conventional reference voltage power supply.

FIG. 32 is a schematic configuration diagram of a conventional insulated power supply device.

FIG. 33 is a waveform diagram showing current and voltage waveforms at various parts of a conventional insulated power supply device.

FIG. 34 is a schematic configuration diagram of a conventional insulated power supply device.

FIG. 35 is a waveform diagram showing current and voltage waveforms at various parts of a conventional insulated power supply device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Power supply device 12, 18 MOS-FET 12A, 18A Parasitic diode 16 Choke coil 20 Chopper drive circuit 22 Capacitor 30 Load 32 Detection resistance 38 Comparator 40 Integrator circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-8-336282 (JP, A) JP-A-9-84337 (JP, A) JP-A-10-146051 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H02M 7/21 H02M 3/155

Claims (5)

(57) [Claims] 1. A synchronous rectifier circuit applied to a power supply device.
A detection element for detecting a return current returning from the output side of the power supply device, and a detection voltage and a reference voltage corresponding to the return current detected by the detection element are input and compared, and control is performed according to the comparison result. comparison means for outputting a signal, the return collector
Element for flowing a current, and is connected in series with the detection element and detects the detection voltage based on the control signal.
Turns on when the voltage is higher than the reference voltage, and turns off when the voltage is lower.
A switching element is controlled to off, the synchronous rectifier circuit with, so as to reduce in accordance with the detected voltage is decreased,
A synchronous rectifier circuit comprising: a changing unit that changes the reference voltage so that the reference voltage increases as the detection voltage increases. 2. The synchronous rectifier circuit according to claim 1, wherein said changing means is integrating means for integrating said detected voltage. 3. A transformer having a primary winding and a secondary winding provided with a middle point, and applying a voltage in one direction to the primary winding of the transformer and then applying the voltage in a predetermined direction. Voltage applying means for stopping the application for a predetermined time after applying a voltage in the other direction to the primary winding for a predetermined time, and connecting both ends of the secondary winding of the transformer and both ends to each other A pair of switch elements that are individually inserted between the connection points and flow a return current that is controlled by a control signal and returns from the output side; and between a middle point of the secondary winding and the connection point. A smoothing means for smoothing and outputting power between the two points, a pair of detection elements connected in series with the pair of switch elements and detecting the return current, and a pair of detection elements. Detection current according to the detected return current And a pair of integrating means for generating a reference voltage by respectively integrating a part of the detection voltage and the reference voltage, inputting and comparing the detection voltage and the reference voltage, and transmitting a control signal corresponding to the comparison result to the pair of switch elements. And a pair of comparing means for outputting. 4. The changing means increases the reference voltage as the current flowing through the detection element according to the size of the load increases, and decreases the reference voltage as the current flowing through the detection element decreases. The synchronous rectifier circuit according to claim 1 or 2, wherein: 5. The return current according to claim 3, wherein the return current is a rectified current or a commutated current according to the size of the load.
The power supply as described.