JP3324535B2 - Display panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a display panel such as a liquid crystal display panel.

[0002]

2. Description of the Related Art As a conventional example, an active matrix type liquid crystal display panel will be described. FIG. 8 shows an equivalent circuit plan view of a part of an example of such a conventional liquid crystal display panel. This liquid crystal display panel has a glass substrate 1. A region surrounded by a dashed line on the glass substrate 1 is a display region 2, and the outside thereof is a non-display region 3. In the display area 2, a plurality of pixel electrodes 4 arranged in a matrix, a thin film transistor 5 as a switching element connected to each of the pixel electrodes 4,
A plurality of scanning lines 6 extending in the row direction for supplying a scanning signal to the thin film transistor 5; a plurality of signal lines 7 extending in the column direction for supplying a data signal to the thin film transistor 5; A frame-shaped short-circuit ring 8 disposed around the pixel electrode 4, and two electrostatic protections connected to the right-hand side of the short-circuit ring 8 and each scanning line 6 outside the right-hand side of the short-circuit ring 8. A thin film transistor 9 for
Outside the lower side of the short-circuit ring 8, two thin-film transistors 10 for electrostatic protection connected to the lower side of the short-circuit ring 8 and the respective signal lines 7 are provided.
The right end of the scanning line 6 is connected to an output side connection pad 12 provided in a semiconductor chip mounting area 11 indicated by a dotted line of the non-display area 3. The lower end of the signal line 7 is connected to an output-side connection pad 14 provided in a semiconductor chip mounting area 13 indicated by a dotted line of the non-display area 3. The input-side connection pads 15 and 16 provided in the semiconductor chip mounting areas 11 and 13 are connected to external connection terminals 17 provided at predetermined locations in the non-display area 3 via lead-out lines 18.

Next, a specific structure of a part of the liquid crystal display panel will be described with reference to FIG. First, the formation region of the thin film transistor 5 and the like will be described. A gate electrode 21 made of Al is provided at a predetermined location on the upper surface of the glass substrate 1.
Are formed, and a gate insulating film 22 made of silicon oxide is formed on the entire upper surface thereof. A semiconductor layer 23 made of intrinsic amorphous silicon is formed in a portion corresponding to the gate electrode 21 at a predetermined location on the upper surface of the gate insulating film 22. At the center of the upper surface of the semiconductor layer 23, a blocking layer 24 made of silicon nitride is formed. Ohmic contact layers 25 and 26 made of n ⁺ silicon are formed on both sides of the upper surface of the blocking layer 24 and on the upper surface of the semiconductor layer 23 on both sides thereof.
On the upper surfaces of the ohmic contact layers 25 and 26, a drain electrode 27 and a source electrode 28 made of Cr are formed. The signal lines 7 made of Al are formed at predetermined locations on the upper surface of the drain electrode 27 and the upper surface of the gate insulating film 22. An overcoat film 29 made of silicon nitride is formed on the entire upper surface of the gate insulating film 22 including the signal lines 7 and the like. A pixel electrode 4 made of a transparent metal oxide such as ITO (indium tin oxide) is provided at a predetermined location on the upper surface of the overcoat film 29 via a contact hole 30 formed at a predetermined location of the overcoat film 29. It is formed so as to be connected to the source electrode 28. In such a liquid crystal display panel, since the pixel electrode 4 is located in the uppermost layer, the top pixel electrode structure (top ITO structure)
is called.

[0004] Next, the scanning line 6 and the wiring 31 orthogonal thereto are provided.
The connection part forming region with will be described. In this case, the connection portion between the scanning line 6 and the wiring 31 orthogonal thereto is the wiring 31 extending in the column direction among the wiring connecting the scanning line 6 and the thin film transistor 9 for electrostatic protection in FIG. The wiring 31 is formed simultaneously with the formation of the signal line 7 made of Al.) And the scanning line 6. Since the wiring 31 extending in the column direction is formed at the same time as the formation of the signal line 7, it is formed at a predetermined position on the upper surface of the gate insulating film 22. The wiring 31 is formed on the gate insulating film 22.
Rectangular contact hole 3 formed at a predetermined location
2 and a scanning line 6. The signal line 7
The structure of the connecting portion between the signal line 7 and the wiring extending in the row direction (this wiring is formed at the same time as the formation of the scanning line 6 made of Al) among the wirings connecting the wiring and the thin film transistor 10 for electrostatic protection is formed. The structure is the same as that described above, except that the wiring extending in the row direction is on the lower side and the signal line 7 is on the upper side.

Next, the scanning line 6 forming area 6a in the non-display area 3 will be described. The scanning line 6 in the non-display area 3 does not cross the signal line 7. Therefore, an upper scanning line 33 made of Al is formed on the scanning line 6 in the non-display area 3 simultaneously with the formation of the signal line 7. In this case, the upper scanning line 33 is formed on the upper surface of the gate insulating film 22 and is connected to the scanning line 6 via a groove-shaped contact hole 34 formed in the gate insulating film 22.
As a result, a substantial scanning line in the non-display area 3 has a two-layer structure, and the resistance can be reduced. The substantial signal line structure in the non-display area 3 also has the same two-layer structure as described above because the lower signal line made of Al is formed below the signal line 7 simultaneously with the formation of the scanning line 6. Has become.

[0006]

By the way, in such a conventional liquid crystal display panel, when the overcoat film 29 has a defect, the wiring such as the signal line 7 under the defect may be disconnected. For example, an intrinsic amorphous silicon layer for forming the semiconductor layer 23, an n ⁺ silicon layer for forming the ohmic contact layers 25 and 26, and a Cr layer for forming the drain electrode 27 and the source electrode 28.
When the layer is formed and then etched to form a device area, the periphery of the drain electrode 27 in particular becomes an eaves shape,
When the signal line 7 is formed thereon, a cavity is formed below the eaves, and the cavity may cause a defect in the overcoat film 29 due to poor coverage. In the scanning line 6 forming area 6a in the non-display area 3,
In reality, as shown in FIG. 10, both ends in the width direction of the upper scanning line 33 are raised on the gate insulating film 22 outside the contact hole 34, so that the overcoat film 29 between the raised portions 33a has a thickness. Defective portion 29a may occur. Such a defective portion 29a may also occur in a connection portion forming region between the scanning line 6 and the wiring 31 orthogonal to the scanning line 6. in this way,
If a defect occurs in the overcoat film 29, the pixel electrode 4
The etching solution of ITO when forming the semiconductor layer penetrates into the defective portion of the overcoat film 29 and the signal line 7 made of Al
Contact with wiring such as, by the Al-ITO battery reaction,
Extremely thin wiring melts and breaks, which is a factor in lowering the yield. Further, when the overcoat film 29 on the wiring 18 has a defect, moisture in the air may permeate into the defective portion of the overcoat film 29 and come into contact with the wiring 18. On the other hand, there is a large difference between the voltages applied to the plurality of routing lines 18 adjacent to each other. As a result, disconnection due to corrosion may occur due to a so-called electrolytic corrosion effect of an electrochemical reaction that occurs when an electric field is applied to the permeated moisture in the wiring 18 having a higher applied voltage among the wirings 18 adjacent to each other. . An object of the present invention is to prevent disconnection of a wiring under a defect even when the insulating film such as an overcoat film has a defect.

[0007]

According to a first aspect of the present invention, there is provided a display panel in which a plurality of thin film transistors each having a gate electrode, a semiconductor layer, a source electrode and a drain electrode are arranged on a glass substrate. In a display panel in which a scanning line is connected to a gate electrode, a signal line is connected to a drain electrode, and a source electrode is connected to a transparent pixel electrode, a part of the signal line is overlapped with each drain electrode of each thin film transistor. Covering the thin film transistor and the signal line with an insulating film, and forming the pixel electrode connected to the source electrode through a contact hole formed in the insulating film on the insulating film, The drain electrode and the corresponding part of the region where the signal line overlaps are made of the same material as the pixel electrode and are electrically isolated Jo protective film is obtained by the formation.
In the display panel according to the second aspect of the present invention, a plurality of thin film transistors each having a gate electrode, a semiconductor layer, a source electrode, and a drain electrode are arranged on a glass substrate, and a scanning line is connected to the gate electrode of each transistor. A signal line connected to a drain electrode, a display region having a display region in which a source electrode is connected to a transparent pixel electrode, and a non-display region arranged at the periphery of the display region, wherein each of the scanning lines is It extends to a non-display area, and this extended portion is covered with a gate insulating film having a contact hole exposed except for both ends in the width direction of the scanning line, and is exposed from the contact hole of each scanning line. Forming an upper scanning line on a portion and a side edge of the contact hole of the gate insulating film, wherein the thin film transistor, the signal line, and the upper scanning line are formed. Covered with an insulating film, in the display region
On definitive the insulating film, thereby forming the pixel electrode connected to the source electrode through a contact hole formed in the insulating film, in a region corresponding to the upper scanning lines in the non-display area, the pixel It is made of the same material as the electrodes and has an electrically isolated island-like protective film formed thereon. In the display panel according to the present invention, a plurality of thin film transistors each having a gate electrode, a semiconductor layer, a source electrode, and a drain electrode are arranged on a glass substrate, and a scanning line is connected to the gate electrode of each transistor. A signal line connected to the drain electrode, a display region having a source electrode connected to the transparent pixel electrode, and a non-display region arranged at the periphery of the display region; Forming an output-side connection pad connected to each of the scanning lines or the signal lines, an external connection terminal, and a routing line for connecting the corresponding output-side connection pad and the external connection terminal to the corresponding output-side connection pad; And an insulating film having first and second contact holes exposing the external connection terminal, covering the thin film transistor, the signal line, and the lead-out line. Forming, on the insulating film, the pixel electrode connected to the source electrode via a third contact hole formed in the insulating film, and patterning the pixel electrode in correspondence with the wiring line; A protective film made of the same material as that of the pixel electrode is formed to connect the output-side connection pad and the external connection pad corresponding to each other via the first and second contact holes. According to the present invention, since the protective film for preventing occurrence of disconnection due to a defect in the insulating film is formed on the insulating film corresponding to at least a part of the wiring, even if the insulating film has a defect, In addition, disconnection can be prevented from occurring in the wiring under the defect.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described for the case where the present invention is applied to each area of a liquid crystal display panel.

FIGS. 1A and 1B show an example in which the present invention is applied to a thin film transistor or the like forming region of a liquid crystal display panel. FIG. FIG. 3B is a plan view of the region, and FIG.
Shows a cross-sectional view along the line BB. In these drawings, the same portions as those in FIG. 9 are denoted by the same reference numerals, and the description thereof will be omitted as appropriate. In this example, the signal line 7 is connected to the drain electrode 2
A protective film 41 is formed on the upper surface of the overcoat film (insulating film) 29 in a portion slightly larger than the portion overlapping with 7 by the same material as the pixel electrode 4 (a transparent metal oxide such as ITO) at the same time when the pixel electrode 4 is formed. Is formed. In this case, although the protective film 41 is not electrically connected to any part, it is preferable that the protective film 41 does not overlap with the semiconductor layer 23 under the blocking layer 24 so as not to adversely affect the characteristics of the thin film transistor 5. desirable.

The periphery of the drain electrode 27 is shaped like an eave, and the signal line 7 is formed thereon, so that a cavity is formed under the eave. Even if defects occur due to defects,
The protective film 41 exists on the defect. As a result, when the pixel electrode 4 is formed, for example, the etching solution of ITO does not permeate the defective portion of the overcoat film 29, and the Al-I-I
Disconnection due to the TO battery reaction can be prevented, and the yield can be improved accordingly. Also,
Since the protection film 41 is formed simultaneously with the formation of the pixel electrode 4, the number of manufacturing steps can be prevented from increasing.

As shown in FIGS. 2A and 2B,
A drain electrode 42 and a source electrode 43 made of n ⁺ silicon are formed on both sides of the upper surface of the blocking layer 24 and on the upper surface of the semiconductor layer 23 on both sides thereof. When the signal line 44 composed of the two layers of the layer 44a and the Al layer 44b is formed, the end of the Cr layer 44a does not have an eaves shape. However, the signal line 44 is formed on the drain electrode 42, and a relatively large step occurs at a portion where the right end of the signal line 44 in FIG. 2A and both ends in the vertical direction of the drain electrode 42 intersect. In some cases, a defect occurs in the overcoat film 29 due to the step. Therefore,
In this case, as shown in FIGS. 2A and 2B, the protection film 41 may be formed only on the upper surface of the overcoat film 29 at the step.

FIG. 3 shows a practical cross-sectional view of an example in which the present invention is applied to a scanning line forming area in a non-display area of a liquid crystal display panel. In this figure, the same parts as those in FIG. 10 are denoted by the same reference numerals, and the description thereof will be appropriately omitted. In this example, a protective film 51 is formed on the upper surface of the overcoat film 29 on the portion covering the scanning lines 6 and the upper scanning lines 33 by the same material as the pixel electrode (a transparent metal oxide such as ITO) at the same time as the formation of the pixel electrode. Have been.

Therefore, both end portions in the width direction of the upper scanning line 33 are raised on the gate insulating film 22 outside the contact hole 34, so that these raised portions 3
Even if a thin defective portion 29a occurs in the overcoat film 29 between the portions 3a, the protective film 51 is formed on the defective portion 29a.
Will exist. As a result, when the pixel electrode is formed, for example, the etching solution of ITO does not permeate into the defective portion 29 a of the overcoat film 29, and the upper scanning line 33 and the scanning line 6 made of Al have the Al-I
Disconnection due to the TO battery reaction can be prevented, and the yield can be improved accordingly. Also,
Since the protective film 51 is formed simultaneously with the formation of the pixel electrodes, the number of manufacturing steps can be prevented from increasing.

Next, FIG. 4 shows another example in which the present invention is applied to a scanning line forming area in a non-display area of a liquid crystal display panel, where (A) is a plan view of the area and (B).
Shows a cross-sectional view along the line BB. In these drawings, the same reference numerals are given to the same components as those in FIG. 3, and the description thereof will be omitted as appropriate. In this example, a groove-like contact hole 34 larger than the width of the upper scanning line 33 is formed in the gate insulating film 22. An upper scanning line 33 is formed on the upper surface of the scanning line 6 and the upper surface of the glass substrate 1 in the vicinity thereof. On the upper surface of the overcoat film 29, a protective film 51 is formed so as to cover the upper scanning line 33.

By the way, in this case, the raised portion 33a and the defective portion 29a having a small thickness as shown in FIG. 3 are not formed. Therefore, here, it is assumed that a defect occurs in the overcoat film 29 on the upper scanning line 33 due to entry of foreign matter. Also in such a case, since the protective film 51 is present on the defect of the overcoat film 29, for example, an etching solution of ITO does not permeate the defect of the overcoat film 29 when forming the pixel electrode. Further, disconnection of the upper scanning line 33 and the scanning line 6 made of Al due to the Al-ITO battery reaction can be prevented, and the yield can be improved accordingly.

FIGS. 5A and 5B show a case where the present invention is applied to a scanning line of a liquid crystal display panel and a wiring perpendicular thereto. It shows an example when applied to the connection part forming area,
(A) shows a plan view of the region, and (B) shows the BB
FIG. 3 shows a sectional view along the line. In these drawings, the same portions as those in FIG. 9 are denoted by the same reference numerals, and the description thereof will be omitted as appropriate. In this example, a protective film 52 is formed on the upper surface of the overcoat film 29 at a portion slightly larger than the intersection between the wiring 31 and the scanning line 6 by using the same material as the pixel electrode (a transparent metal oxide such as ITO). Are formed simultaneously with the formation of Therefore, the same effect as that shown in FIG. 3 can be obtained.

As shown in FIGS. 6A and 6B,
The size of the protection film 52 may be smaller than the size of the intersection between the wiring 31 and the scanning line 6, and the size of the contact hole 34 may be smaller than the size of the protection film 52. Even in this case, the same effect as that shown in FIG. 3 can be obtained. In addition, since the size of the protection film 52 is smaller than the size of the protection film 51 shown in FIG. 6, the degree of freedom in pattern design around the protection film 51 can be increased.

FIG. 7 shows an example in which the present invention is applied to a lead line forming area in a non-display area of a liquid crystal display panel. ) Shows a plan view of the region, and (B) shows a cross-sectional view along the line BB. However, in this example, of the wirings shown in FIG. 8, the leading line 1 connecting the input side connection pad 16 and the external connection terminal 17 is used.
8 will be described. The input-side connection pads 16, the external connection terminals 17, and the lead-out lines 18 between them are arranged in this order from the bottom to the first Al layer 6 formed simultaneously with the formation of the scanning lines.
1. Second Al layer 6 formed simultaneously with formation of signal lines
2. It has a three-layer structure of an ITO layer (protective film) 63 which is a transparent metal oxide formed simultaneously with the formation of the pixel electrode. The two Al layers 61 and 62 are formed on the upper surface of the glass substrate 1. In this case, although the gate insulating film is not shown, the portions of both Al layers 61 and 62 may have a structure as shown in FIG. 3 or a structure as shown in FIG. The ITO layer 63 is formed on the upper surface of the overcoat film 29, and is connected to the second Al layer 62 in the input-side connection pad 16 formation region via a contact hole 64 formed at a predetermined portion of the overcoat film 29. And external connection terminals 1 through contact holes 65 formed in other predetermined portions of the overcoat film 29.
7 is connected to the second Al layer 62 in the formation region.

Therefore, also in this example, the Al layers 61, 6
2 has a defect in the overcoat film 29,
Due to the presence of the ITO layer 63 on the defect, the etching solution of ITO when forming the pixel electrode does not permeate the defective portion of the overcoat film 29, and the Al layers 61 and 62 have the Al-ITO battery. Disconnection due to the reaction can be prevented, and the yield can be improved accordingly. In addition, the moisture in the air is permeated into the defective portion of the overcoat film 29 by the ITO layer 63.
Al layers 61 and 62
Disconnection due to corrosion can be prevented.
Here, since the ITO layer 63 itself is a metal oxide, disconnection due to such corrosion hardly occurs. Further, since the ITO layer 63 is formed simultaneously with the formation of the pixel electrode, the number of manufacturing steps can be prevented from increasing. In the above, the contact holes 64 and 65 are formed simultaneously with the formation of the contact hole 30 shown in FIG. In each of the above embodiments, the pixel electrode 4 is formed of the overcoat film 2.
9, the present invention is also applicable to a case where the pixel electrode is formed on an intermediate insulating film.

[0020]

As described above, according to the present invention, a protection film for preventing occurrence of disconnection due to a defect in an insulating film is formed on an insulating film corresponding to at least a part of a wiring. Therefore, even if there is a defect in the insulating film, it is possible to prevent disconnection of the wiring under the defect.

[Brief description of the drawings]

FIG. 1 shows an example in which the present invention is applied to a region for forming a thin film transistor or the like of a liquid crystal display panel.
Is a plan view of the region, and (B) is a cross-sectional view along the line BB.

FIG. 2 shows another example in which the present invention is applied to a region for forming a thin film transistor or the like of a liquid crystal display panel.
(A) is a plan view of the region, and (B) is a cross-sectional view along the line BB.

FIG. 3 is a realistic cross-sectional view showing an example in which the present invention is applied to a scanning line forming area in a non-display area of a liquid crystal display panel.

FIGS. 4A and 4B show another example in which the present invention is applied to a scanning line forming area in a non-display area of a liquid crystal display panel, wherein FIG. 4A is a plan view of the area, and FIG. Sectional view along the line.

FIGS. 5A and 5B show an example in which the present invention is applied to a connection portion forming region between a scanning line of a liquid crystal display panel and a wiring orthogonal thereto, where FIG. 5A is a plan view of the region and FIG. Sectional drawing along the BB line.

6A and 6B show another example in which the present invention is applied to a connection portion forming region between a scanning line of a liquid crystal display panel and a wiring orthogonal thereto, wherein FIG. 6A is a plan view of the region, and FIG. () Is a cross-sectional view along the line BB.

FIGS. 7A and 7B show an example in which the present invention is applied to a wiring line forming area in a non-display area of a liquid crystal display panel, wherein FIG. 7A is a plan view of the area, and FIG.
Sectional view along the line.

FIG. 8 is an equivalent circuit plan view of a part of an example of a conventional liquid crystal display panel.

9 is a cross-sectional view of a part of a specific structure of the liquid crystal display panel shown in FIG.

10 is a cross-sectional view for explaining one defect of the overcoat film in the liquid crystal display panel shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Glass substrate 4 Pixel electrode 5 Thin film transistor 6 Scanning line 7 Signal line 27 Drain electrode 28 Source electrode 29 Overcoat film 41 Protective film

Continuation of the front page (56) References JP-A-10-325967 (JP, A) JP-A-4-195122 (JP, A) JP-A-7-318975 (JP, A) JP-A-4-362923 (JP) , A) JP-A-5-53135 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G02F 1/1368 G09F 9/30 338

Claims (3)

(57) [Claims] 1. A gate electrode is provided on a glass substrate.
Having a pole, a semiconductor layer, a source electrode and a drain electrode
A plurality of thin film transistors are arranged, and
A scanning line is connected to the gate electrode, and a signal line is connected to the drain electrode.
Is connected and the source electrode is connected to the transparent pixel electrode
In the display panel, a part of the signal line is connected to each of the thin film transistors.
Formed on each drain electrode of the transistor,
The thin film transistor and the signal line are covered with an insulating film.
A contact hole formed in the insulating film is formed on the insulating film.
Forming the pixel electrode connected to the source electrode via
And the area where the drain electrode and the signal line overlap.
The corresponding part of the region is made of the same material as the pixel electrode,
A display panel, comprising a gas-isolated island-like protective film . 2. A plurality of thin film transistors each having a gate electrode, a semiconductor layer, a source electrode and a drain electrode are arranged on a glass substrate, a scanning line is connected to a gate electrode of each transistor, and a signal line is connected to a drain electrode. In a display panel having a display area connected and a source electrode connected to a transparent pixel electrode, and a non-display area arranged at the periphery of the display area, each of the scanning lines extends to the non-display area, The extended portion is covered with a gate insulating film having a contact hole that is exposed except for both ends in the width direction of the scanning line, and the portion of the scanning line exposed from the contact hole and the gate insulating film. wherein the upper scan line is formed on a side edge of the contact hole, covering the thin film transistor, the signal lines and the upper scanning line with an insulating film, wherein the display On the insulating film in the region, thereby forming the pixel electrode connected to the source electrode through a contact hole formed in the insulating film, wherein
In a region corresponding to the upper scanning line in the non-display region ,
A display panel comprising the same material as the pixel electrode and having an electrically isolated island-shaped protective film formed thereon. 3. A gate electrode is provided on a glass substrate.
Having a pole, a semiconductor layer, a source electrode and a drain electrode
A plurality of thin film transistors are arranged, and
A scanning line is connected to the gate electrode, and a signal line is connected to the drain electrode.
Is connected and the source electrode is connected to the transparent pixel electrode
A display area, and a non-display area arranged at a periphery of the display area.
A display panel having an area and the non-display area,
The output connection pads connected to the respective run 査線or signal lines
, An external connection terminal, and the output side connection pad corresponding to the external connection terminal
And forming a lead wire connecting the external connection terminal and
A first for exposing an output side connection pad and the external connection terminal;
An insulating film having a second contact hole;
Cover the transistor, the signal line and the routing line, and
A third contact hole formed on the insulating film is formed on the insulating film.
The pixel electrode connected to the source electrode via a
And a pattern pattern corresponding to the routing line.
Corresponding to each other and connected by the wiring lines.
The output side connection pad and the external connection pad are connected to the first,
The pixel electrode connected through two contact holes
Characterized in that a protective film made of the same material as
Display panel.