JP3292645B2 - Wiring board and method of manufacturing the same - Google Patents

Wiring board and method of manufacturing the same

Info

Publication number
JP3292645B2
JP3292645B2 JP33226395A JP33226395A JP3292645B2 JP 3292645 B2 JP3292645 B2 JP 3292645B2 JP 33226395 A JP33226395 A JP 33226395A JP 33226395 A JP33226395 A JP 33226395A JP 3292645 B2 JP3292645 B2 JP 3292645B2
Authority
JP
Japan
Prior art keywords
precursor
cured
semi
solder
powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP33226395A
Other languages
Japanese (ja)
Other versions
JPH09172233A (en
Inventor
省吾 松尾
直広 鹿取
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP33226395A priority Critical patent/JP3292645B2/en
Priority to US08/717,119 priority patent/US5837356A/en
Publication of JPH09172233A publication Critical patent/JPH09172233A/en
Application granted granted Critical
Publication of JP3292645B2 publication Critical patent/JP3292645B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子を収容
するための半導体素子収納用パッケージや混成集積回路
基板等に用いられる配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for a package for housing a semiconductor element for housing a semiconductor element or a hybrid integrated circuit board.

【0002】[0002]

【従来の技術】従来、配線基板、例えば半導体素子を収
容する半導体素子収納用パッケージに使用される配線基
板は、酸化アルミニウム質焼結体等のセラミックスより
成り、その上面中央部に半導体素子を収容する凹部を有
する絶縁基体と、前記絶縁基体の凹部周辺から下面にか
けて導出されたタングステン、モリブデン等の高融点金
属粉末から成る配線導体とから構成されており、前記絶
縁基体の凹部底面に半導体素子をガラス、樹脂、ロウ材
等の接着剤を介して接着固定するとともに半導体素子の
各電極を例えばボンディングワイヤ等の電気的接続手段
を介して配線導体に電気的に接続し、しかる後、前記絶
縁基体の上面に、金属やセラミックス等から成る蓋体を
絶縁基体の凹部を塞ぐようにしてガラス、樹脂、ロウ材
等の封止材を介して接合させ、絶縁基体の凹部内に半導
体素子を気密に収容することによって製品としての半導
体装置となり、配線導体の絶縁基体凹部底面に導出した
部位を外部電気回路基板の配線導体に接続することによ
って半導体素子の各電極が外部電気回路基板に電気的に
接続されることとなる。
2. Description of the Related Art Conventionally, a wiring board, for example, a wiring board used for a semiconductor element housing package for housing a semiconductor element is made of ceramics such as an aluminum oxide sintered body, and a semiconductor element is housed in a central portion of an upper surface thereof. And a wiring conductor made of a refractory metal powder such as tungsten or molybdenum which is led out from the periphery of the recess to the lower surface of the insulating base, and a semiconductor element is formed on the bottom of the recess of the insulating base. The electrodes of the semiconductor element are electrically connected to wiring conductors via electrical connection means such as a bonding wire, and then the insulating base is adhered and fixed by an adhesive such as glass, resin, or brazing material. A lid made of metal, ceramics, or the like is placed on the top surface of the insulating base with a sealing material such as glass, resin, brazing material, etc. A semiconductor device as a product is obtained by joining the semiconductor elements in a concave portion of the insulating base in an airtight manner, and a portion of the wiring conductor led out to the bottom of the concave portion of the insulating base is connected to the wiring conductor of the external electric circuit board. Each electrode of the element is electrically connected to the external electric circuit board.

【0003】尚、前記配線基板は一般に、セラミックグ
リーンシート積層法によって製作されており、具体的に
は、酸化アルミニウム、酸化珪素、酸化マグネシウム、
酸化カルシウム等のセラミック原料粉末に適当な有機バ
インダー、溶剤等を添加混合して泥漿状となすとともに
これを従来周知のドクターブレード法を採用してシート
状とすることによって複数のセラミックグリーンシート
を得、しかる後、前記セラミックグリーンシートに適当
な打ち抜き加工を施すとともに配線導体となる金属ペー
ストを所定パターンに印刷塗布し、最後に前記セラミッ
クグリーンシートを所定の順に上下に積層して生セラミ
ック成形体となすとともに該セラミック生成形体を還元
雰囲気中約1600℃の高温で焼成することによって製
作される。
Incidentally, the wiring board is generally manufactured by a ceramic green sheet laminating method, and specifically, aluminum oxide, silicon oxide, magnesium oxide,
A ceramic raw material powder such as calcium oxide is mixed with an appropriate organic binder, a solvent, and the like to form a slurry, which is formed into a sheet by employing a conventionally known doctor blade method, thereby obtaining a plurality of ceramic green sheets. Thereafter, the ceramic green sheet is subjected to a suitable punching process and a metal paste to be a wiring conductor is printed and applied in a predetermined pattern, and finally, the ceramic green sheets are stacked up and down in a predetermined order to form a green ceramic molded body. It is manufactured by sintering and firing the ceramic forming body at a high temperature of about 1600 ° C. in a reducing atmosphere.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この従
来の配線基板は、絶縁基体を構成する酸化アルミニウム
質焼結体等のセラミックスが硬くて脆い性質を有するた
め、搬送工程や半導体装置製作の自動ライン等において
配線基板同士が、あるいは配線基板と半導体装置製作自
動ラインの一部とが激しく衝突すると絶縁基体に欠けや
割れ、クラック等が発生し、その結果、半導体素子を気
密に収容することができず、半導体素子を長期間にわた
り正常、且つ安定に作動させることができなくなるとい
う欠点を有していた。
However, in this conventional wiring board, since the ceramics such as the aluminum oxide sintered body constituting the insulating base have a hard and brittle property, the automatic wiring of the transfer process and the semiconductor device manufacturing is difficult. When the wiring boards collide with each other or the wiring board and a part of the semiconductor device manufacturing automatic line violently collide with each other, chips, cracks, cracks, etc. occur in the insulating base, and as a result, the semiconductor element can be housed in an airtight manner. In addition, the semiconductor device cannot operate normally and stably for a long period of time.

【0005】また、前記配線基板の製造方法によれば、
セラミック生成形体を焼成する際、セラミック生成形体
に不均一な焼成収縮が発生し、得られる配線基板に反り
等の変形や寸法のばらつきが発生し、その結果、半導体
素子の各電極と配線導体とを、或いは配線導体と外部電
気回路基板の配線導体とを正確、且つ確実に電気的に接
続することが困難であるという欠点を有していた。
According to the method of manufacturing a wiring board,
When firing the ceramic forming body, uneven firing shrinkage occurs in the ceramic forming body, resulting in deformation and dimensional variation such as warpage of the obtained wiring board, and as a result, each electrode of the semiconductor element and the wiring conductor Or the wiring conductor and the wiring conductor of the external electric circuit board are difficult to accurately and reliably electrically connect.

【0006】[0006]

【課題を解決するための手段】発明の配線基板は、6
0乃至95重量%の無機絶縁物粉末と5乃至40重量%
の熱硬化性樹脂とから成り、前記無機絶縁物粉末を前記
熱硬化性樹脂の前駆体で結合して成る前駆体シートを半
硬化させてその複数枚を積層して熱硬化させた、前記無
機絶縁物粉末を前記熱硬化性樹脂により結合して成る
数枚の絶縁基板を積層して成る絶縁基体の前記絶縁基板
に、半硬化の前記前駆体シートとともに熱硬化させた、
銅粉末をフェノール樹脂により結合した配線導体を被着
させて成ることを特徴とするものである。
According to the present invention, there is provided a wiring board comprising:
0 to 95% by weight of inorganic insulating powder and 5 to 40% by weight
Comprising a thermosetting resin, wherein the inorganic insulating powder is
Precursor sheet composed of thermosetting resin precursor
Thereof a plurality are stacked and thermally cured by curing, multi comprising the inorganic insulator powder bonded by the thermosetting resin
The insulating substrate <br/> insulating substrate formed by laminating several sheets of the insulating substrate, and together with the precursor sheet in a semi-cured and thermally cured,
The copper powder is characterized in that the composed by depositing a wiring conductor bound by a phenolic resin.

【0007】また本発明の配線基板は、前記配線導体の
銅粉末が半田で接合されていることを特徴とするもので
ある。
The wiring board of the present invention is characterized in that the copper powder of the wiring conductor is joined by solder.

【0008】更に本発明の配線基板の製造方法は、熱硬
化性樹脂前駆体と無機絶縁物粉末とを混合して成る前駆
体シートを準備する工程と、該前駆体シートを加熱して
半硬化させる工程と、半硬化した前記前駆体シートにフ
ェノール樹脂前駆体と銅粉末とを混合して成る金属ペー
ストを所定パターンに印刷するとともに加熱して半硬化
させる工程と、半硬化した前記金属ペーストが印刷され
た半硬化の前記前駆体シートを複数枚上下に積層すると
ともにこれを加熱して前記前駆体シートの熱硬化性樹脂
前駆体及び前記金属ペーストのフェノール樹脂前駆体を
熱硬化させる工程と、から成ることを特徴とするもので
ある。
Further, in the method for manufacturing a wiring board according to the present invention, there is provided a step of preparing a precursor sheet formed by mixing a thermosetting resin precursor and an inorganic insulating powder, and heating the precursor sheet.
A step of semi-curing, and printing a metal paste obtained by mixing a phenol resin precursor and copper powder on the semi-cured precursor sheet in a predetermined pattern and heating and semi-curing
A step of causing, semi cured the metal paste is printed
When a plurality of semi-cured precursor sheets are vertically stacked
Both are characterized in that consisting of the step of thermally curing the phenolic resin precursor of a thermosetting resin precursor and the metal paste is heated to the precursor sheet this.

【0009】また更に本発明の配線基板の製造方法は、
熱硬化性樹脂前駆体と無機絶縁物粉末とを混合して成る
前駆体シートを準備する工程と、該前駆体シートを加熱
して半硬化させる工程と、半硬化した前記前駆体シート
にフェノール樹脂前駆体と銅粉末と半田粉末を混合し
て成る金属ペーストを所定パターンに印刷する工程と、
前記金属ペーストを熱処理し、銅粉末を半田で接合させ
る工程と、熱処理した前記金属ペーストが被着された半
硬化の前記前駆体シートを複数枚上下に積層するととも
にこれを加熱して前記前駆体シートの熱硬化性樹脂前駆
体及び前記金属ペーストのフェノール樹脂前駆体を熱硬
化させる工程と、から成ることを特徴とするものであ
る。
Still further, the method for manufacturing a wiring board according to the present invention comprises:
Preparing a precursor sheet comprising a mixture of a thermosetting resin precursor and an inorganic insulating powder, and heating the precursor sheet;
A step of semi-curing by the steps of printing a semi-cured the precursor sheet to the phenolic resin precursor and the copper powder and the solder powder and the formed by mixing the metal paste in a predetermined pattern,
A step of heat-treating the metal paste and joining copper powder with solder; and a step of attaching the heat-treated metal paste to the metal paste.
A plurality of the precursor sheets for curing are laminated one above the other.
Is characterized in that consists of the steps of thermally curing the phenolic resin precursor of a thermosetting resin precursor and the metal paste of the precursor sheet by heating it to.

【0010】更にまた本発明の配線基板の製造方法は、
前記金属ペースト中に更に半田濡れ促進剤が含有されて
いることを特徴とするものである。
Further, the method for manufacturing a wiring board according to the present invention comprises:
The metal paste further contains a solder wetting accelerator.

【0011】本発明の配線基板によれば、絶縁基体が無
機絶縁物粉末を靱性に優れる熱硬化性樹脂で結合するこ
とによって形成されていることから配線基板同士あるい
は配線基板と半導体装置製作自動ラインの一部とが激し
く衝突しても絶縁基体に欠けや割れ、クラック等が発生
することはない。
According to the wiring board of the present invention, since the insulating base is formed by bonding the inorganic insulating powder with the thermosetting resin having excellent toughness, the wiring boards are mutually connected or the wiring board and the semiconductor device manufacturing automatic line. Even if a portion of the insulating base material collides violently, the insulating substrate will not be chipped, cracked or cracked.

【0012】また本発明の配線基板によれば、配線導体
の銅粉末を結合するフェノール樹脂が銅粉末の表面酸化
を有効に防止し、これによって銅粉末同士間の電気的接
続が良好となって耐マイグレーション性及び高周波特性
等が向上する。
Further, according to the wiring board of the present invention, the phenol resin binding the copper powder of the wiring conductor effectively prevents the surface oxidation of the copper powder, thereby improving the electrical connection between the copper powders. The migration resistance and high frequency characteristics are improved.

【0013】更に本発明の配線基板によれば、配線導体
の銅粉末同士を半田を介して結合させておくと銅粉末同
士間の電気的接続がより良好となり、その結果、配線導
体の耐マイグレーション性及び高周波特性等がより向上
する。
Further, according to the wiring board of the present invention, when the copper powders of the wiring conductors are bonded together via solder, the electrical connection between the copper powders becomes better, and as a result, the migration resistance of the wiring conductors is improved. Properties and high frequency characteristics are further improved.

【0014】また更に本発明の配線基板の製造方法によ
れば、絶縁基体を得る際に焼成工程がないことから焼成
に伴う不均一な収縮による変形や寸法のばらつきが発生
することがない。
Further, according to the method of manufacturing a wiring board of the present invention, since there is no baking step for obtaining an insulating substrate, there is no deformation or dimensional variation due to uneven shrinkage due to baking.

【0015】更にまた本発明の配線基板の製造方法によ
れば、金属ペースト中に半田及び半田濡れ促進剤を含有
させておくと銅粉末同士間の半田を介しての接合を短い
時間に、且つ確実に行うことができ、これによって配線
導体の電気抵抗値を小さいものとするとともに耐マイグ
レーション性及び高周波特性等をよりよいものとするこ
とができる。
Further, according to the method of manufacturing a wiring board of the present invention, when solder and a solder wetting accelerator are contained in a metal paste, bonding between copper powders via solder can be performed in a short time. As a result, the electrical resistance of the wiring conductor can be reduced, and the migration resistance, high-frequency characteristics, and the like can be improved.

【0016】[0016]

【発明の実施の形態】次に、本発明を添付図面に基づき
詳細に説明する。
Next, the present invention will be described in detail with reference to the accompanying drawings.

【0017】図1は、本発明の配線基板を半導体素子を
収容する半導体素子収納用パッケージに適用した場合の
一実施例を示し、1は絶縁基体、2は配線導体である。
FIG. 1 shows an embodiment in which the wiring board of the present invention is applied to a package for housing a semiconductor element for housing a semiconductor element, wherein 1 is an insulating base, and 2 is a wiring conductor.

【0018】前記絶縁基体1は、三枚の絶縁基板1a、
1b、1cを積層することによって形成されており、そ
の上面中央部に半導体素子を収容するための凹部1dを
有し、該凹部1dの底面には半導体素子3が樹脂等の接
着剤を介して接着固定される。
The insulating substrate 1 comprises three insulating substrates 1a,
The semiconductor device 3 is formed by laminating 1b and 1c, and has a concave portion 1d for accommodating a semiconductor element in the center of the upper surface, and the semiconductor element 3 is provided on the bottom surface of the concave portion 1d via an adhesive such as resin. Adhesively fixed.

【0019】前記絶縁基体1を構成する絶縁基板1a、
1b、1cは、例えば酸化珪素、酸化アルミニウム、窒
化アルミニウム、炭化珪素、チタン酸バリウム、ゼオラ
イト等の無機絶縁物粉末をエポキシ樹脂、ポリイミド樹
脂,ポリフェニレンエーテル樹脂等の熱硬化性樹脂で結
合することによって形成されており、絶縁基体1を構成
する三枚の絶縁基板1a、1b、1cはその各々が無機
絶縁物粉末を靭性に優れる熱硬化性樹脂で結合すること
によって形成されていることから絶縁基体1に外力が印
加されても該外力によって絶縁基体1に欠けや割れ、ク
ラック等が発生することはない。
An insulating substrate 1a constituting the insulating base 1;
1b and 1c are obtained by bonding an inorganic insulating powder such as silicon oxide, aluminum oxide, aluminum nitride, silicon carbide, barium titanate, and zeolite with a thermosetting resin such as an epoxy resin, a polyimide resin, and a polyphenylene ether resin. The three insulating substrates 1a, 1b, and 1c constituting the insulating substrate 1 are formed by bonding inorganic insulating powder with a thermosetting resin having excellent toughness. Even when an external force is applied to the insulating substrate 1, the external force does not cause chipping, cracking, cracking or the like in the insulating substrate 1.

【0020】尚、前記無機絶縁物粉末を熱硬化性樹脂で
結合して成る絶縁基体1を構成する三枚の絶縁基板1
a、1b、1cは、無機絶縁物粉末の含有量が60重量
%未満であると絶縁基体1の熱膨脹係数が半導体素子3
の熱膨脹係数に対して大きく相違し、半導体素子3が作
動時に熱を発し、該熱が半導体素子3と絶縁基体1の両
者に印加されると、両者間に両者の熱膨脹係数の相違に
起因する大きな熱応力が発生し、この大きな熱応力によ
って半導体素子3が絶縁基体1から剥離したり、半導体
素子3に割れや欠けが発生してしまう。また95重量%
えると無機絶縁物粉末を熱硬化性樹脂で完全に結合
させることができず、所定の絶縁基板1a、1b、1c
を得ることができなくなる。従って、前記絶縁基体1を
構成する絶縁基板1a、1b、1cは、その各々の内部
に含有される無機絶縁物粉末の量が60乃至95重量%
の範囲に特定される。
Incidentally, three insulating substrates 1 constituting an insulating base 1 formed by bonding the inorganic insulating powder with a thermosetting resin.
a, 1b, and 1c show that when the content of the inorganic insulating powder is less than 60% by weight, the thermal expansion coefficient of the insulating base 1 is lower than that of the semiconductor element 3.
When the semiconductor element 3 emits heat during operation and the heat is applied to both the semiconductor element 3 and the insulating substrate 1, the difference is caused by the difference in the thermal expansion coefficient between the two. A large thermal stress is generated, and the large thermal stress causes the semiconductor element 3 to be separated from the insulating base 1 or the semiconductor element 3 to be cracked or chipped. 95% by weight
The ultra El and the inorganic insulating powder can not be completely bound with a thermosetting resin, a predetermined insulating substrate 1a, 1b, 1c
Can not be obtained. Therefore, the insulating substrates 1a, 1b, and 1c constituting the insulating base 1 have an inorganic insulating powder content of 60 to 95% by weight contained therein.
Specified in the range.

【0021】また前記絶縁基体1は、その凹部1d周辺
から下面にかけて銅粉末をフェノール樹脂により結合し
た配線導体2が被着形成されている。
The insulating base 1 has a wiring conductor 2 formed by bonding copper powder with a phenol resin from the periphery of the concave portion 1d to the lower surface.

【0022】前記配線導体2は、内部に収容する半導体
素子3の各電極を外部電気回路に電気的に接続する作用
を為し、絶縁基体1の凹部1d周辺に位置する部位には
半導体素子3の各電極がボンディングワイヤ4を介して
電気的に接続され、また絶縁基体1の下面に導出された
部位は外部電気回路に電気的に接続される。
The wiring conductor 2 serves to electrically connect each electrode of the semiconductor element 3 housed therein to an external electric circuit. Are electrically connected via bonding wires 4, and a portion led out to the lower surface of the insulating base 1 is electrically connected to an external electric circuit.

【0023】前記配線導体2はまた銅粉末をフェノール
樹脂を介して結合されており、該フェノール樹脂は銅粉
末の表面酸化を防止する作用があることから銅粉末の表
面に酸化物が形成されることは殆どなく、その結果、銅
粉末同士間の電気的接続が良好となり、配線導体2の耐
マイグレーション性及び高周波特性等が大きく向上す
る。
The wiring conductor 2 is formed by bonding copper powder through a phenol resin. Since the phenol resin has an effect of preventing surface oxidation of the copper powder, an oxide is formed on the surface of the copper powder. As a result, the electrical connection between the copper powders becomes good, and the migration resistance and high frequency characteristics of the wiring conductor 2 are greatly improved.

【0024】尚、前記配線導体2に含有される銅粉末は
その含有量が70重量%未満では配線導体2の電気抵抗
値が高くなる傾向にあり、また95重量%をえると銅
粉末をフェノール樹脂で強固に結合するのが困難となる
傾向にある。従って、前記配線導体2に含有される銅粉
末はその含有量が70重量乃至95重量%の範囲が好
ましい。
[0024] Incidentally, copper powder contained in the wiring conductor 2 will tend the content of the electric resistance value of the wiring conductor 2 is high is less than 70 wt%, also the ultra-El and copper powder 95 wt% It tends to be difficult to bond firmly with a phenolic resin. Therefore, the content of the copper powder contained in the wiring conductor 2 is preferably in the range of 70 % by weight to 95% by weight.

【0025】更に前記配線導体2はその内部に鉛半田や
鉛レス半田等の半田を含有させておき、該半田で銅粉末
同間を結合するようにしておくと銅粉末同士間の電気的
接続が確実となり、配線導体2の耐マイグレーション性
及び高周波特性等がより大きく向上する。
Further, the wiring conductor 2 contains solder such as lead solder or lead-less solder in the inside thereof, and the copper powder is connected between the copper powders by the solder so that the electrical connection between the copper powders can be obtained. And the migration resistance and high frequency characteristics of the wiring conductor 2 are further improved.

【0026】前記配線導体2に鉛半田や鉛レス半田等の
半田を含有させておく場合、銅粉末と、半田の合計重量
を配線導体2の全重量に対し、60重量%乃至95重量
%の範囲としておく必要があり、更に銅粉末と半田は、
銅粉末の量が該銅粉末と半田の合計重量に対し20重量
%未満となると銅粉末に対して半田が多くなり、半田同
士が溶融し合って銅粉末を取り込んだ一体化が困難とな
って配線導体2の電気抵抗値が高くなる傾向にあり、ま
た80重量%をえると銅粉末を接合させる半田の量が
相対的に少なくなり、銅粉末を完全に結合させることが
できず配線導体2の電気抵抗値が高くなってしまう傾向
にある。従って、配線導体2に鉛半田や鉛レス半田等の
半田を含有させておく場合、銅粉末は、該銅粉末と半田
の合計重量に対し20重量%乃至80重量%の範囲とし
ておくことが好ましい。
When the wiring conductor 2 contains solder such as lead solder or lead-less solder, the total weight of the copper powder and the solder is 60 to 95% by weight based on the total weight of the wiring conductor 2. It is necessary to keep the range, and further, copper powder and solder,
When the amount of the copper powder is less than 20% by weight based on the total weight of the copper powder and the solder, the amount of the solder increases with respect to the copper powder, and the solders are melted with each other to make it difficult to integrate the copper powder. tends to electric resistance of the wiring conductor 2 is high, and the amount of 80% by weight solder for bonding is exceeded and copper powder is relatively small, the wiring conductor can not be completely bonded copper powder 2 tends to have a high electric resistance. Therefore, when the wiring conductor 2 contains solder such as lead solder or lead-less solder, it is preferable that the copper powder be in the range of 20% by weight to 80% by weight based on the total weight of the copper powder and the solder. .

【0027】また前記配線導体2に含有される銅粉末や
半田は、その平均粒径が0.1μm未満となると銅粉末
及び半田が凝集して均一な分散が得られなくなり、また
50μmをえると配線導体2の幅を一般的に要求され
る50μm〜200μmの範囲に印刷形成するのが困難
となる傾向にある。従って、前記配線導体2に含有され
る銅粉末と半田はその平均粒径を0.1μm乃至50μ
mの範囲としておくことが好ましい。
Further copper powder and the solder contained in the wiring conductor 2 has an average particle size of no longer copper powder and the solder are aggregated uniform dispersion is obtained when less than 0.1 [mu] m, also a 50μm is exceeded In addition, it tends to be difficult to print and form the width of the wiring conductor 2 in a generally required range of 50 μm to 200 μm. Accordingly, the copper powder and the solder contained in the wiring conductor 2 have an average particle size of 0.1 μm to 50 μm.
It is preferable to set the range of m.

【0028】更に前記配線導体2は、その露出する表面
にニッケル、金等の耐食性に優れ、かつ良導電性の金属
をメッキ法により1.0乃至20.0μmの厚みに層着
させておくと配線導体2の酸化腐食を有効に防止するこ
とができるとともに配線導体2とボンディングワイヤ4
とを強固に電気的に接続させることができる。従って前
記配線導体2は、その露出する表面にニッケルや金等の
耐食性に優れ、且つ良導電性の金属をメッキ法により
1.0乃至20.0μmの厚みに層着させておくことが
好ましい。
Further, the wiring conductor 2 is preferably provided with a metal having excellent corrosion resistance and good conductivity, such as nickel or gold, having a thickness of 1.0 to 20.0 μm by plating on the exposed surface. Oxidation and corrosion of the wiring conductor 2 can be effectively prevented, and the wiring conductor 2 and the bonding wire 4
Can be firmly and electrically connected. Therefore, it is preferable that the wiring conductor 2 is coated with a metal having excellent corrosion resistance such as nickel or gold and a good conductivity to a thickness of 1.0 to 20.0 μm by a plating method on the exposed surface.

【0029】かくして本発明の配線基板によれば、絶縁
基体1の凹部1d底面に半導体素子3を樹脂等の接着剤
を介して接着固定するとともに半導体素子3の各電極を
ボンディングワイヤ4を介して配線導体2に電気的に接
続し、最後に前記絶縁基体1の上面に蓋体5を樹脂等か
ら成る封止材を介して接合させ、絶縁基体1と蓋体5と
から成る容器内部に半導体素子3を気密に収容すること
により製品としての半導体装置が完成する。
Thus, according to the wiring board of the present invention, the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1 d of the insulating base 1 with an adhesive such as a resin, and each electrode of the semiconductor element 3 is bonded with the bonding wire 4. It is electrically connected to the wiring conductor 2, and finally, the lid 5 is joined to the upper surface of the insulating base 1 via a sealing material made of resin or the like, and the semiconductor is placed inside the container formed of the insulating base 1 and the lid 5. The semiconductor device as a product is completed by housing the element 3 in an airtight manner.

【0030】次に前記半導体素子収納用パッケージに使
用される配線基板の製造方法について図2に基づき説明
する。
Next, a method of manufacturing a wiring board used for the semiconductor element storage package will be described with reference to FIG.

【0031】先ず、図2(a)に示すように三枚の前駆
体シート11a、11b、11cを準備する。
First, as shown in FIG. 2A, three precursor sheets 11a, 11b and 11c are prepared.

【0032】前記三枚の前駆体シート11a、11b、
11cは、無機絶縁物粉末を熱硬化性樹脂前駆体で結合
することによって形成されており、例えば、粒径が0.
1μm〜100μm程度の酸化珪素粉末にビスフェノー
ルA型エポキシ樹脂、ノボララック型エポキシ樹脂、グ
リシジルエステル型エポキシ樹脂等のエポキシ樹脂及び
アミン系硬化剤、イミダゾール系硬化剤、酸無水物系硬
化剤等の硬化剤を添加混合してペースト状となし、しか
る後、このペーストをシート状になすとともに約25〜
100℃の温度で1〜60分間加熱し、半硬化させるこ
とによって製作される。
The three precursor sheets 11a, 11b,
11c is formed by bonding an inorganic insulating powder with a thermosetting resin precursor, and for example, has a particle size of 0.1.
Epoxy resin such as bisphenol A type epoxy resin, novolak type epoxy resin, glycidyl ester type epoxy resin and amine type curing agent, imidazole type curing agent, acid anhydride type curing agent etc. to silicon oxide powder of about 1 μm to 100 μm. Is added and mixed to form a paste. Thereafter, the paste is formed into a sheet and about 25 to
It is manufactured by heating at a temperature of 100 ° C. for 1 to 60 minutes and semi-curing.

【0033】次に図2(b)に示すように前記三枚の前
駆体シート11a、11b、11cのうち二枚の前駆体
シート11a、11bに半導体素子3を収容する凹部1
dとなる開口A、A’を、二枚の前駆体シート11b、
11cに配線導体2を引き回すための貫通孔B、B’を
各々形成する。
Next, as shown in FIG. 2 (b), two of the three precursor sheets 11a, 11b, 11c have the recess 1 for accommodating the semiconductor element 3 in the two precursor sheets 11a, 11b.
The openings A and A ′ to be d are formed by two precursor sheets 11b,
11c, through holes B and B 'for routing the wiring conductor 2 are respectively formed.

【0034】前記開口A、A’及び貫通孔B、B’は、
前駆体シート11a、11b、11cに従来周知のパン
チング加工法を施し、前駆体シート11a、11b、1
1cの各々に所定形状の孔を穿孔することによって形成
される。
The openings A and A 'and the through holes B and B'
The precursor sheets 11a, 11b, and 11c are subjected to a conventionally known punching method, and the precursor sheets 11a, 11b, and 1c are subjected to punching.
1c is formed by piercing a hole of a predetermined shape.

【0035】次に図2(c)に示すように、前記前駆体
シート11b、11cの上下面及び貫通孔B、B’内に
配線導体2となる金属ペースト12を従来周知のスクリ
ーン印刷法及び充填法を採用して所定パターンに印刷塗
布するとともにこれを所定温度で熱処理し、半硬化させ
る。
Next, as shown in FIG. 2C, a metal paste 12 to be the wiring conductor 2 is formed on the upper and lower surfaces of the precursor sheets 11b and 11c and in the through holes B and B 'by a screen printing method known in the art. A predetermined pattern is printed and applied by using a filling method, and this is heat-treated at a predetermined temperature to be semi-cured.

【0036】前記配線導体2となる金属ペースト12と
しては、例えば粒径が0.1〜20μm程度の銅粉末
に、フェノール樹脂前駆体を添加混合したものが使用さ
れる。
As the metal paste 12 to be the wiring conductor 2, for example, a mixture of a copper powder having a particle size of about 0.1 to 20 μm and a phenol resin precursor added and used is used.

【0037】また前記配線導体2となる金属ペースト1
2は銅粉末に、フェノール樹脂前駆体を添加混合したも
のが使用され、フェノール樹脂は銅粉末の表面酸化を有
効に防止する作用をなすことから銅粉末表面に酸化物の
膜が形成されることは殆どなく、その結果、銅粉末同士
間の電気的接続が良好となって耐マイグレーション性及
び高周波特性等が向上する。
The metal paste 1 to be the wiring conductor 2
No. 2 is a mixture of copper powder and a phenolic resin precursor added and mixed, and since phenolic resin acts to effectively prevent surface oxidation of copper powder, an oxide film is formed on the surface of copper powder. As a result, the electrical connection between the copper powders is improved, and the migration resistance, the high-frequency characteristics, and the like are improved.

【0038】そして最後に前記三枚の半硬化された前駆
体シート11a、11b、11cを上下に積層するとと
もにこれを約80〜300℃の温度で約10秒〜24時
間加熱し、前記前駆体シート11a、11b、11cの
熱硬化性樹脂前駆体と前駆体シート11b、11cに所
定パターンに印刷塗布された金属ペースト12のフェノ
ール樹脂前駆体とを完全に熱硬化させることによって図
1に示すような絶縁基体1に配線導体2を被着させた配
線基板が完成する。この場合、前記前駆体シート11
a、11b、11c及び金属ペースト12は、熱硬化時
に収縮することは殆どなく、従って、得られる配線基板
に変形や寸法のばらつきが発生せず、配線導体に断線
が招来することはなく、配線導体を介して半導体素子
等の電極を外部電気回路に確実に電気的接続すること
が可能となる。
Finally, the three semi-cured precursor sheets 11a, 11b and 11c are vertically stacked and heated at a temperature of about 80 to 300 ° C. for about 10 seconds to 24 hours. The thermosetting resin precursors of the sheets 11a, 11b and 11c and the phenolic resin precursor of the metal paste 12 printed and applied in a predetermined pattern on the precursor sheets 11b and 11c are completely thermoset as shown in FIG. A wiring board in which the wiring conductor 2 is applied to the insulating base 1 is completed. In this case, the precursor sheet 11
The a, 11b, 11c and the metal paste 12 hardly shrink during thermosetting, and therefore, the resulting wiring board does not undergo deformation or dimensional variation, and the wiring conductor 2 does not break. Semiconductor element via wiring conductor 2
It is possible to reliably electrically connect the third and other electrodes to an external electric circuit.

【0039】また本発明の製造方法において、上述する
銅粉末とフェノール樹脂前駆体とから成る金属ペースト
12中に更に鉛半田や鉛レス半田等の半田及び半田と銅
粉末との濡れ性を良好とするための半田濡れ促進剤、具
体的にはロジン系フラックスや脂肪酸またはその金属
塩、金属キレート剤、オキシジルカルボン酸またはその
金属塩、アミノジカルボン酸またはその金属塩等を含有
させておくと、金属ペーストを前駆体シート11b、1
1cの上下面等に印刷塗布した後、これを約200℃程
度の温度で加熱し、半田を溶融させ、該溶融した半田で
銅粉末を結合するようにすれば、銅粉末同士間の結合が
完全となって配線導体の電気的接続がより良好とな
り、その結果、配線導体の耐マイグレーション性及び
高周波特性等をより向上させことが可能となる。従っ
て、本発明のは配線基板の製造方法においては配線導
となる金属ペースト中に鉛半田や鉛レス半田等の半
田、及び半田と銅粉末との濡れ性を良好とするための半
田濡れ促進剤を含有させておくことが好ましい。
Further, in the manufacturing method of the present invention, the metal paste 12 composed of the above-mentioned copper powder and the phenol resin precursor further improves the wettability between the solder such as lead solder and lead-less solder and the solder and the copper powder. Solder wetting accelerator for, specifically, a rosin flux or a fatty acid or a metal salt thereof, a metal chelating agent, oxydylcarboxylic acid or a metal salt thereof, aminodicarboxylic acid or a metal salt thereof, etc. The metal paste is applied to the precursor sheet 11b, 1
1c is printed and applied on the upper and lower surfaces, etc., and then heated at a temperature of about 200 ° C. to melt the solder and bond the copper powder with the melted solder. fully and become to become a better electrical connection of the wiring conductor 2, as a result, it becomes possible to Ru further improve the migration resistance and high frequency characteristics of the wiring conductor 2 and the like. Therefore, according to the present invention, in the method of manufacturing a wiring board, solder such as lead solder or lead-less solder and solder wettability for improving the wettability between solder and copper powder in the metal paste to be the wiring conductor 2 are provided . It is preferable to contain an accelerator.

【0040】更に、配線導体となる金属ペースト12
中に更に鉛半田や鉛レス半田等の半田及び半田と銅粉末
との濡れ性を良好とするための半田濡れ促進剤を含有さ
せる場合、ロジン系フラックスや脂肪酸等から成る半田
濡れ促進剤の量は全金属ペーストの重量に対し、0.1
重量%未満となると、半田と銅粉末との濡れ性が低下す
る傾向にあり、また20重量%をえると配線導体
電気抵抗が大きなものとなる傾向にある。従って、金属
ペースト12中に半田濡れ促進剤を含有させる場合は、そ
の量を金属ペースト12の全重量に対し、0.1重量%
乃至20重量%の範囲としておくことが好ましい。
Further, the metal paste 12 to be the wiring conductor 2
When further containing a solder such as lead solder or lead-less solder and a solder wetting accelerator for improving the wettability between the solder and the copper powder, the amount of the solder wetting accelerator consisting of a rosin flux, a fatty acid, etc. Is 0.1% with respect to the weight of the total metal paste.
If less than wt%, there is a tendency that wettability between the solder and the copper powder is lowered, there is a 20% by weight tends to Exceeding the electric resistance of the wiring conductor 2 becomes large. Therefore, when the solder wetting accelerator is contained in the metal paste 12, the amount thereof is 0.1% by weight based on the total weight of the metal paste 12.
It is preferable to set it in the range of 20 to 20% by weight.

【0041】尚、本発明は、上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれ
ば、種々の変更は可能であり、例えば上述の実施例で
は、本発明の配線基板を半導体素子を収容する半導体素
子収納用パッケージに適用した場合を例に採って説明し
たが、例えば混成集積回路等他の用途に使用される配線
基板に適用してもよい。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. Although the description has been given by taking as an example the case where the wiring board is applied to a semiconductor element housing package for housing a semiconductor element, the wiring board may be applied to a wiring board used for other purposes such as a hybrid integrated circuit.

【0042】また、上述の実施例では、三枚の前駆体シ
ートを積層することによって配線基板を製作したが、一
枚や二枚、あるいは四枚以上の前駆体シートを使用して
配線基板を製作してもよい。
In the above-described embodiment, the wiring board is manufactured by laminating three precursor sheets. However, the wiring board is formed by using one, two, or four or more precursor sheets. May be manufactured.

【0043】[0043]

【発明の効果】本発明の配線基板によれば、絶縁基体が
無機絶縁物粉末を靱性に優れる熱硬化性樹脂で結合する
ことによって形成されていることから配線基板同士ある
いは配線基板と半導体装置製作自動ラインの一部とが激
しく衝突しても絶縁基体に欠けや割れ、クラック等が発
生することはない。
According to the wiring board of the present invention, since the insulating base is formed by bonding the inorganic insulating powder with a thermosetting resin having excellent toughness, the wiring boards are mutually connected or the wiring board and the semiconductor device are manufactured. Even if a part of the automatic line collides violently, the insulating substrate will not be chipped, cracked or cracked.

【0044】また本発明の配線基板によれば、配線導体
の銅粉末を結合するフェノール樹脂が銅粉末の表面酸化
を有効に防止し、これによって銅粉末同士間の電気的接
続が良好となって耐マイグレーション性及び高周波特性
等が向上する。
Further, according to the wiring board of the present invention, the phenol resin binding the copper powder of the wiring conductor effectively prevents the surface oxidation of the copper powder, thereby improving the electrical connection between the copper powders. The migration resistance and high frequency characteristics are improved.

【0045】更に本発明の配線基板によれば、配線導体
の銅粉末同士を半田を介して結合させておくと銅粉末同
士間の電気的接続がより良好となり、その結果、配線導
体の耐マイグレーション性及び高周波特性等がより向上
する。
Further, according to the wiring board of the present invention, when the copper powders of the wiring conductors are bonded to each other via solder, the electrical connection between the copper powders becomes better, and as a result, the migration resistance of the wiring conductors is improved. Properties and high frequency characteristics are further improved.

【0046】また更に本発明の配線基板の製造方法によ
れば、絶縁基体を得る際に焼成工程がないことから焼成
に伴う不均一な収縮による変形や寸法のばらつきが発生
することがない。
Further, according to the method of manufacturing a wiring board of the present invention, since there is no baking step for obtaining an insulating base, there is no occurrence of deformation or dimensional variation due to uneven shrinkage due to baking.

【0047】更にまた本発明の配線基板の製造方法によ
れば、金属ペースト中に半田及び半田濡れ促進剤を含有
させておくと銅粉末同士間の半田を介しての接合を短い
時間に、且つ確実に行うことができ、これによって配線
導体の電気抵抗値を小さいものとするとともに耐マイグ
レーション性及び高周波特性等をよりよいものとするこ
とができる。
Furthermore, according to the method of manufacturing a wiring board of the present invention, when solder and a solder wetting promoter are contained in a metal paste, bonding between copper powders via solder can be performed in a short time and As a result, the electrical resistance of the wiring conductor can be reduced, and the migration resistance, high-frequency characteristics, and the like can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の配線基板を半導体素子収納用パッケー
ジに適用した場合の一実施例を示す断面図である。
FIG. 1 is a sectional view showing an embodiment in which a wiring board of the present invention is applied to a package for housing a semiconductor element.

【図2】本発明の配線基板の製造方法を説明するための
工程毎の断面図である。
FIG. 2 is a cross-sectional view of each process for explaining the method for manufacturing a wiring board of the present invention.

【符号の説明】[Explanation of symbols]

1・・・絶縁基体 2・・・配線導体 11・・・前駆体シート 12・・・金属ペースト DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Wiring conductor 11 ... Precursor sheet 12 ... Metal paste

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H05K 1/02,1/03,1/09 H05K 3/12,3/46 H01L 23/12,23/14 H01B 1/00 - 1/24 ────────────────────────────────────────────────── ─── Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1 / 02,1 / 03,1 / 09 H05K 3 / 12,3 / 46 H01L 23 / 12,23 / 14 H01B 1/00-1/24

Claims (5)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】60乃至95重量%の無機絶縁物粉末と5
乃至40重量%の熱硬化性樹脂とから成り、前記無機絶
縁物粉末を前記熱硬化性樹脂の前駆体で結合して成る前
駆体シートを半硬化させてその複数枚を積層して熱硬化
させた、前記無機絶縁物粉末を前記熱硬化性樹脂により
結合して成る複数枚の絶縁基板を積層して成る絶縁基体
の前記絶縁基板に、半硬化の前記前駆体シートとともに
熱硬化させた、銅粉末をフェノール樹脂により結合した
配線導体を被着させて成ることを特徴とする配線基板。
An inorganic insulating powder of 60 to 95% by weight and 5
Or consists of a 40 wt% of a thermosetting resin, wherein the inorganic insulation
Before bonding the edge powder with the thermosetting resin precursor
Semi-cured precursor sheets, laminating multiple sheets and heat curing
An insulating base formed by laminating a plurality of insulating substrates each formed by bonding the inorganic insulating powder with the thermosetting resin.
On the insulating substrate , together with the semi-cured precursor sheet
A wiring board, comprising a wiring conductor formed by bonding a heat-cured copper powder with a phenol resin to a wiring conductor.
【請求項2】前記配線導体の銅粉末が半田で接合されて
いることを特徴とする請求項1に記載の配線基板。
2. The wiring board according to claim 1, wherein the copper powder of the wiring conductor is joined by solder.
【請求項3】熱硬化性樹脂前駆体と無機絶縁物粉末とを
混合して成る前駆体シートを準備する工程と、該前駆体
シートを加熱して半硬化させる工程と、半硬化した前記
前駆体シートにフェノール樹脂前駆体と銅粉末とを混合
して成る金属ペーストを所定パターンに印刷するととも
に加熱して半硬化させる工程と、半硬化した前記金属ペ
ーストが印刷された半硬化の前記前駆体シートを複数枚
上下に積層するとともにこれを加熱して前記前駆体シー
トの熱硬化性樹脂前駆体及び前記金属ペーストのフェノ
ール樹脂前駆体を熱硬化させる工程と、から成ることを
特徴とする配線基板の製造方法。
3. A process for preparing a precursor sheet formed by mixing a thermosetting resin precursor and the inorganic insulating powder, said precursor
A step of semi-cured by heating the sheet, printing a semi-cured the precursor sheet to the phenolic resin precursor and the copper powder formed by mixing a metal paste in a predetermined pattern together
A step of semi-cured by heating the said metal Bae was semi-cured
A plurality of semi-cured precursor sheets on which paste is printed
Method for manufacturing a wiring substrate, characterized in that it consists a step of thermally curing the phenolic resin precursor is heated to the thermal curing of the precursor sheet resin precursor and the metal paste which, as well as vertically stacked.
【請求項4】熱硬化性樹脂前駆体と無機絶縁物粉末とを
混合して成る前駆体シートを準備する工程と、該前駆体
シートを加熱して半硬化させる工程と、半硬化した前記
前駆体シートにフェノール樹脂前駆体と銅粉末と半田粉
を混合して成る金属ペーストを所定パターンに印刷
する工程と、前記金属ペーストを熱処理し、銅粉末を半
田で接合させる工程と、熱処理した前記金属ペーストが
被着された半硬化の前記前駆体シートを複数枚上下に積
層するとともにこれを加熱して前記前駆体シートの熱硬
化性樹脂前駆体及び前記金属ペーストのフェノール樹脂
前駆体を熱硬化させる工程と、から成ることを特徴とす
る配線基板の製造方法。
4. A process for preparing a precursor sheet formed by mixing a thermosetting resin precursor and the inorganic insulating powder, said precursor
A step of semi-cured by heating the sheet, a step of printing a semi-cured the precursor sheet to the phenolic resin precursor and the copper powder and the solder powder formed by mixing a metal paste in a predetermined pattern, the metal paste Heat-treating, bonding the copper powder with solder, and the heat-treated metal paste
A plurality of the applied semi-cured precursor sheets are stacked vertically.
Method for manufacturing a wiring substrate, characterized in that it consists a step of thermally curing the phenolic resin precursor is heated to the thermal curing of the precursor sheet resin precursor and the metal paste which, together with the layers.
【請求項5】前記金属ペースト中に更に半田濡れ促進剤
が含有されていることを特徴とする請求項4に記載の配
線基板の製造方法。
5. The method according to claim 4, wherein the metal paste further contains a solder wetting accelerator.
JP33226395A 1995-09-22 1995-12-20 Wiring board and method of manufacturing the same Expired - Fee Related JP3292645B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP33226395A JP3292645B2 (en) 1995-12-20 1995-12-20 Wiring board and method of manufacturing the same
US08/717,119 US5837356A (en) 1995-09-22 1996-09-20 Wiring board and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33226395A JP3292645B2 (en) 1995-12-20 1995-12-20 Wiring board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH09172233A JPH09172233A (en) 1997-06-30
JP3292645B2 true JP3292645B2 (en) 2002-06-17

Family

ID=18252997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33226395A Expired - Fee Related JP3292645B2 (en) 1995-09-22 1995-12-20 Wiring board and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3292645B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5038216B2 (en) * 2008-03-31 2012-10-03 日本碍子株式会社 Ceramic molded body, ceramic part, method for manufacturing ceramic molded body, and method for manufacturing ceramic part

Also Published As

Publication number Publication date
JPH09172233A (en) 1997-06-30

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