JP3292623B2 - Wiring board and method of manufacturing the same - Google Patents

Wiring board and method of manufacturing the same

Info

Publication number
JP3292623B2
JP3292623B2 JP11294395A JP11294395A JP3292623B2 JP 3292623 B2 JP3292623 B2 JP 3292623B2 JP 11294395 A JP11294395 A JP 11294395A JP 11294395 A JP11294395 A JP 11294395A JP 3292623 B2 JP3292623 B2 JP 3292623B2
Authority
JP
Japan
Prior art keywords
precursor
powder
thermosetting resin
wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11294395A
Other languages
Japanese (ja)
Other versions
JPH08307024A (en
Inventor
直広 鹿取
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP11294395A priority Critical patent/JP3292623B2/en
Publication of JPH08307024A publication Critical patent/JPH08307024A/en
Application granted granted Critical
Publication of JP3292623B2 publication Critical patent/JP3292623B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体素子を収容する
ための半導体素子収納用パッケージや混成集積回路基板
等に用いられる配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device and a wiring board used for a hybrid integrated circuit board.

【0002】[0002]

【従来の技術】従来、配線基板、例えば半導体素子を収
容する半導体素子収納用パッケージに使用される配線基
板として比較的高密度の配線が可能な積層セラミック
ス配線基板が多用されている。この配線基板は、酸化ア
ルミニウム質焼結体等のセラミックスより成り、その上
面中央部に半導体素子を収容する凹部を有する絶縁基体
と、前記絶縁基体の凹部周辺から下面にかけて導出され
たタングステン、モリブデン等の高融点金属粉末から成
る配線導体とから構成されており、前記絶縁基体の凹部
底面に半導体素子をガラス、樹脂、ロウ材等の接着剤を
介して接着固定するとともに該半導体素子の各電極を例
えばボンディングワイヤ等の電気的接続手段を介して配
線導体に電気的に接続し、しかる後、前記絶縁基体の上
面に、金属やセラミックス等から成る蓋体を絶縁基体の
凹部を塞ぐようにしてガラス、樹脂、ロウ材等の封止材
を介して接合させ、絶基体の凹部内に半導体素子を気
密に収容することによって製品としての半導体装置とな
る。
2. Description of the Related Art Hitherto, as a wiring board used for a wiring board, for example, a semiconductor element housing package for housing a semiconductor element , a laminated ceramic wiring board capable of relatively high-density wiring has been frequently used. This wiring board is made of ceramics such as an aluminum oxide sintered body, and has an insulating base having a concave portion for accommodating a semiconductor element in a central portion of an upper surface thereof, and tungsten, molybdenum, etc. led out from the periphery of the concave portion to the lower surface of the insulating base. And a semiconductor element is bonded and fixed to the bottom surface of the concave portion of the insulating base via an adhesive such as glass, resin, or brazing material, and each electrode of the semiconductor element is For example, glass is electrically connected to a wiring conductor via an electrical connection means such as a bonding wire, and thereafter, a cover made of metal, ceramics, or the like is placed on the upper surface of the insulating base so as to cover the concave portion of the insulating base. , resins, through a sealing material of the brazing material or the like is bonded, the semiconductor instrumentation as a product by housing airtightly semiconductor element in the recess of the insulation substrate To become.

【0003】またこの従来の配線基板は、一般にセラミ
ックグリーンシート積層法によって製作され、具体的に
は、酸化アルミニウム、酸化珪素、酸化マグネシウム、
酸化カルシウム等のセラミック原料粉末に適当な有機バ
インダー、溶剤等を添加混合して泥漿状となすとともに
これを従来周知のドクターブレード法を採用しシート状
とすることによって複数のセラミックグリーンシートを
得、しかる後、前記セラミックグリーンシートに適当な
打ち抜き加工を施すとともに配線導体となる金属ペース
トを所定パターンに印刷塗布し、最後に前記セラミック
グリーンシートを所定の順に上下に積層してセラミック
生成形体となすとともに該セラミック生成形体を還元雰
囲気中、約1600℃の高温で焼成することによって製
作される。
The conventional wiring board is generally manufactured by a ceramic green sheet laminating method. Specifically, aluminum wiring, silicon oxide, magnesium oxide,
A plurality of ceramic green sheets are obtained by adding a suitable organic binder, a solvent, and the like to a ceramic raw material powder such as calcium oxide to form a slurry by mixing and forming the slurry into a sheet using a conventionally known doctor blade method, Thereafter, the ceramic green sheet is subjected to a suitable punching process and a metal paste to be a wiring conductor is applied by printing in a predetermined pattern, and finally, the ceramic green sheets are stacked up and down in a predetermined order to form a ceramic forming body. It is manufactured by firing the ceramic forming body at a high temperature of about 1600 ° C. in a reducing atmosphere.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この従
来の配線基板は、絶縁基体を構成する酸化アルミニウム
質焼結体等のセラミックスが硬くて脆い性質を有するた
め、搬送工程や半導体装置製作の自動ライン等において
配線基板同士が、あるいは配線基板と半導体装置製作自
動ラインの一部とが激しく衝突すると絶縁基体に欠けや
割れ、クラック等が発生し、その結果、半導体素子を気
密に収容することができず、半導体素子を長期間にわた
り正常、且つ安定に作動させることができなくなるとい
う欠点を有していた。
However, in this conventional wiring board, since the ceramics such as the aluminum oxide sintered body constituting the insulating base have a hard and brittle property, the automatic wiring of the transfer process and the semiconductor device manufacturing is difficult. When the wiring boards collide with each other or the wiring board and a part of the semiconductor device manufacturing automatic line violently collide with each other, chips, cracks, cracks, etc. occur in the insulating base, and as a result, the semiconductor element can be housed in an airtight manner. In addition, the semiconductor device cannot operate normally and stably for a long period of time.

【0005】また前記配線基板の製造方法によれば、セ
ラミック生成形体を焼成する際、各セラミックグリーン
シートにおけるセラミック原料粉末の密度のバラツキに
起因してセラミック生成形体に不均一な焼成収縮が発生
して得られる配線基板に反り等の変形や寸法のバラツキ
が生じ、変形や寸法のバラツキが大きいと配線導体に断
線を招来するという欠点も有していた。
Further, according to the method of manufacturing a wiring substrate, when firing the ceramic formed body, uneven firing shrinkage occurs in the ceramic formed body due to the variation in the density of the ceramic raw material powder in each ceramic green sheet. In addition, the resulting wiring board has a defect such as deformation such as warpage or dimensional variation, and a large deformation or dimensional variation leads to disconnection of the wiring conductor.

【0006】[0006]

【発明の目的】本発明は、かかる従来の半導体素子収納
用パッケージの欠点に鑑み案出されたものであり、その
目的は衝撃力の印加による欠けや割れ等の発生を有効に
防止し、内部に収容する半導体素子を長期間にわたり正
常、且つ安定に作動させることができる配線基板を提供
することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks of the conventional package for housing a semiconductor device. It is an object of the present invention to effectively prevent the occurrence of chipping or cracking due to the application of an impact force. It is an object of the present invention to provide a wiring board that can normally and stably operate a semiconductor element housed in a semiconductor device for a long period of time.

【0007】また本発明の他の目的は反り等の変形や寸
法のバラツキが少なく、配線導体の断線を有効に防止し
て半導体素子等の電極を外部電気回路に確実に電気的接
続することができる配線基板の製造方法を提供すること
にある。
Another object of the present invention is to reduce the deformation such as warpage and the dimensional variation, to effectively prevent the disconnection of the wiring conductor, and to securely connect the electrodes of the semiconductor element and the like to the external electric circuit. It is an object of the present invention to provide a method for manufacturing a wiring board which can be performed.

【0008】[0008]

【課題を解決するための手段】本発明の配線基板は、6
0乃至95重量%の無機絶縁物粉末と5乃至40重量%
の熱硬化性樹脂とから成り、前記無機絶縁物粉末を前記
熱硬化性樹脂の前駆体で結合して成る前駆体シートを半
硬化させてその複数枚を積層して熱硬化させた、前記無
機絶縁物粉末を前記熱硬化性樹脂により結合した複数枚
の絶縁基板を積層して成る絶縁基体の前記絶縁基板に、
半硬化の前記前駆体シートとともに熱硬化させた、金属
粉末と導電性樹脂を熱硬化性樹脂により結合した配線導
体を被着させて成ることを特徴とするものである。
According to the present invention, there is provided a wiring board comprising:
0 to 95% by weight of inorganic insulating powder and 5 to 40% by weight
Comprising a thermosetting resin, wherein the inorganic insulating powder is
Precursor sheet composed of thermosetting resin precursor
Thereof a plurality are stacked and thermally cured by curing, plural linked by the thermosetting resin the inorganic insulator powder
The insulating substrate of the insulating substrate formed by laminating the insulating substrates of
Together with the precursor sheet in a semi-cured thermally cured, in which the metal powder and the conductive resin, characterized by comprising by depositing the wiring conductors more bound to the thermosetting resins.

【0009】また本発明の配線基板の製造方法は、熱硬
化性樹脂前駆体と無機絶縁物粉末とを混合して成る前駆
体シートを準備する工程と、前記前駆体シートに、熱硬
化性樹脂前駆体と金属粉末と導電性樹脂前駆体とを混合
して成る金属ペーストを所定パターンに印刷する工程
と、前記前駆体シートを加熱して半硬化させる工程と、
前記金属ペーストが印刷された半硬化の前記前駆体シー
トを複数枚上下に積層するとともにこれを加熱して前記
前駆体シート及び所定パターンに印刷された前記金属ペ
ーストを熱硬化させる工程とから成ることを特徴とする
ものである。
Further, in the method for manufacturing a wiring board according to the present invention, there is provided a step of preparing a precursor sheet obtained by mixing a thermosetting resin precursor and an inorganic insulating powder, and adding a thermosetting resin to the precursor sheet. A step of printing a metal paste formed by mixing a precursor, a metal powder, and a conductive resin precursor in a predetermined pattern, and a step of heating and curing the precursor sheet, and semi-curing the precursor sheet,
The semi-cured precursor sheet on which the metal paste is printed
The precursor sheet and the metallic paste printed into a predetermined pattern by heating it with laminated bets on a plurality vertically and is characterized in that comprising a step of thermally curing.

【0010】[0010]

【作用】本発明の配線基板によれば、絶縁基体が無機絶
縁物粉末を靱性に優れる熱硬化性樹脂で結合することに
よって形成されていることから配線基板同士あるいは配
線基板と半導体装置製作自動ラインの一部とが激しく衝
突しても絶縁基体に欠けや割れ、クラック等が発生する
ことはない。
According to the wiring substrate of the present invention, since the insulating base is formed by bonding the inorganic insulating powder with a thermosetting resin having excellent toughness, the wiring substrates are connected to each other or to the wiring substrate and the semiconductor device manufacturing automatic line. Even if a portion of the insulating base material collides violently, the insulating substrate will not be chipped, cracked or cracked.

【0011】また本発明の配線基板によれば配線導体
が金属粉末と導電性樹脂を熱硬化性樹脂で結合すること
によって形成されており、金属粉末間の電気的接続が導
電性樹脂で助長されているため配線導体の電気抵抗が低
抵抗となる。
[0011] According to the wiring board of the present invention, the wiring conductor is formed by combining the metal powder and conductive resin in thermosetting resins, the electrical connection between the metal powder in the conductive resin As a result, the electrical resistance of the wiring conductor is reduced.

【0012】更に本発明の配線基板の製造方法によれ
ば、熱硬化性樹脂前駆体と無機絶縁物粉末とを混合して
成る前駆体シート、及び熱硬化性樹脂前駆体と金属粉末
と導電性樹脂前駆体とを混合して成る金属ペーストを熱
硬化させることによって製作され、焼成工程がないこと
から不均一な焼成収縮に起因する変形や寸法のバラツキ
は発生せず、その結果、配線導体に断線が招来すること
もなく、配線導体を介して半導体素子等の電極を外部電
気回路に確実に電気的接続することが可能となる。
Further , according to the method for manufacturing a wiring board of the present invention,
For example, a precursor sheet formed by mixing a thermosetting resin precursor and an inorganic insulating powder, and a metal paste formed by mixing a thermosetting resin precursor, a metal powder, and a conductive resin precursor are thermoset. Since there is no firing step, there is no deformation or dimensional variation due to uneven firing shrinkage. Electrodes such as elements can be reliably electrically connected to an external electric circuit.

【0013】[0013]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1は本発明の配線基板を半導体素子を収容する半
導体素子収納用パッケージに適用した場合の一実施例を
示し、1は絶縁基体、2は配線導体である。この配線導
体2を絶縁基体1に被着させたものが配線基板となる。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 shows an embodiment in which the wiring board of the present invention is applied to a semiconductor element housing package for housing a semiconductor element, wherein 1 is an insulating base, and 2 is a wiring conductor. The wiring substrate formed by attaching the wiring conductor 2 to the insulating base 1 is a wiring substrate.

【0014】前記絶縁基体1は3枚の絶縁基板1a、1
b、1cを積層することによって形成されており、その
上面の中央部に半導体素子を収容するための凹部1dを
有し、該凹部1d底面には半導体素子3が樹脂等の接着
材を介して接着固定される。
The insulating substrate 1 comprises three insulating substrates 1a, 1
The semiconductor element 3 is formed by laminating b and 1c, and has a concave portion 1d for accommodating the semiconductor element at the center of the upper surface thereof. Adhesively fixed.

【0015】前記絶縁基体1を構成する3枚の絶縁基板
1a、1b、1cは例えば酸化珪素、酸化アルミニウ
ム、窒化アルミニウム、炭化珪素、チタン酸バリウム等
の無機絶縁物粉末をエポキシ樹脂、ポリイミド樹脂等の
熱硬化性樹脂で結合することによって形成されており、
絶縁基体1を構成する3枚の絶縁基板1a、1b、1c
はその各々が無機絶縁物粉末を靱性に優れる熱硬化性樹
脂で結合することによって形成されていることから絶縁
基体1に外力が印加されても該外力によって絶縁基体1
に欠けや割れ、クラック等が発生することはない。
The three insulating substrates 1a, 1b, and 1c constituting the insulating base 1 are made of an inorganic insulating powder such as silicon oxide, aluminum oxide, aluminum nitride, silicon carbide, barium titanate, or the like. It is formed by bonding with thermosetting resin of
Three insulating substrates 1a, 1b, 1c constituting the insulating base 1
Are formed by bonding inorganic insulating powder with a thermosetting resin having excellent toughness, so that even if an external force is applied to the insulating substrate 1,
No chipping, cracking, cracking or the like occurs.

【0016】尚、前記無機絶縁物粉末を熱硬化性樹脂で
結合して成る絶縁基体1を構成する3枚の絶縁基板1
a、1b、1cは無機絶縁物粉末の含有量が60重量%
未満であると絶縁基体1の熱膨脹係数が半導体素子3の
熱膨脹係数に対して大きく相違し、半導体素子3が作動
時に熱を発し、該熱が半導体素子3と絶縁基体1の両者
に印加されると両者間に両者の熱膨脹係数の相違に起因
する大きな熱応力が発生し、この大きな熱応力によって
半導体素子3が絶縁基体1より剥離したり、半導体素子
3に割れや欠け等が発生してしまう。また95重量%を
えると無機絶縁物粉末を熱硬化性樹脂で完全に結合さ
せることができず、所定の絶縁基板1a、1b、1cを
得ることができなくなる。従って、前記絶縁基体1を構
成する絶縁基板1a、1b、1cはその各々の内部に含
有される無機絶縁物粉末の量が60乃至95重量%の範
囲に特定される。
Incidentally, three insulating substrates 1 constituting an insulating base 1 formed by bonding the inorganic insulating powder with a thermosetting resin.
a, 1b, and 1c each have a content of the inorganic insulating powder of 60% by weight.
If it is less than 1, the coefficient of thermal expansion of the insulating substrate 1 greatly differs from the coefficient of thermal expansion of the semiconductor element 3, and the semiconductor element 3 generates heat during operation, and the heat is applied to both the semiconductor element 3 and the insulating substrate 1. a large thermal stress due to the difference of thermal expansion coefficient therebetween is generated between them, or peeling the semiconductor element 3 is of an insulating substrate 1 by the large thermal stresses, cracking and chipping on the semiconductor element 3 occurs . 95% by weight
Ultra El and the inorganic insulating powder can not be completely bound with a thermosetting resin, it becomes impossible to obtain a predetermined insulating substrate 1a, 1b, and 1c. Therefore, the amount of the inorganic insulating powder contained in each of the insulating substrates 1a, 1b, and 1c constituting the insulating base 1 is specified in the range of 60 to 95% by weight.

【0017】また前記絶縁基体1はその凹部1d周辺か
ら下面にかけて配線導体2が被着形成されており、該配
線導体2は銅、銀、金等の金属粉末と導電性樹脂をエポ
キシ樹脂等の熱硬化性樹脂により結合したもので形成さ
れている。
A wiring conductor 2 is formed on the insulating base 1 from the periphery of the concave portion 1d to the lower surface. The wiring conductor 2 is made of a metal powder such as copper, silver or gold and a conductive resin such as epoxy resin. It is formed by bonding with a thermosetting resin.

【0018】前記配線導体2は半導体素子3の電極を外
部電気回路に接続する作用を為し、絶縁基体1の凹部1
d周辺部位に位置する配線導体2には半導体素子3の各
電極がボンディングワイヤ4を介して電気的に接続さ
れ、また絶縁基体1の下面に導出される部位は外部電気
回路に電気的に接続される。
The wiring conductor 2 serves to connect the electrodes of the semiconductor element 3 to an external electric circuit, and
d Each electrode of the semiconductor element 3 is electrically connected to the wiring conductor 2 located at the peripheral portion via a bonding wire 4, and the portion led out to the lower surface of the insulating base 1 is electrically connected to an external electric circuit. Is done.

【0019】前記配線導体2はまた金属粉末と導電性樹
脂をエポキシ樹脂等の熱硬化性樹脂により結合すること
によって形成されており、金属粉末間の電気的接続が導
電性樹脂で助長されているため配線導体2の電気抵抗が
低抵抗となる。
The wiring conductor 2 is formed by bonding a metal powder and a conductive resin with a thermosetting resin such as an epoxy resin, and the electrical connection between the metal powders is promoted by the conductive resin. Therefore, the electric resistance of the wiring conductor 2 becomes low.

【0020】尚、前記配線導体2に含有される金属粉末
及び導電性樹脂は配線導体2の全重量に対し、60重
未満となると金属粉末及び導電性樹脂間の接合が不
充分となって配線導体2の電気抵抗が高くなり、また9
5重量%をえるとエポキシ樹脂等の熱硬化性樹脂で金
属粉末及び導電性樹脂を結合させるのが困難となる傾向
にある。従って、前記配線導体2に含有される金属粉末
及び導電性樹脂の総量は配線導体2の全重量に対し、6
0乃至95重量%の範囲としておくことが好ましい。
When the amount of the metal powder and the conductive resin contained in the wiring conductor 2 is less than 60 % by weight based on the total weight of the wiring conductor 2, the bonding between the metal powder and the conductive resin is reduced. Is insufficient, the electrical resistance of the wiring conductor 2 increases, and 9
5 wt% tends to be difficult to bond the metal powder and conductive resin with a thermosetting resin such as ultra-El and epoxy resin. Therefore, the total amount of the metal powder and the conductive resin contained in the wiring conductor 2 is 6 to the total weight of the wiring conductor 2.
It is preferable to set it in the range of 0 to 95% by weight.

【0021】また前記配線導体2に含有される金属粉
末はその平均粒径が0.5μm未満となると金属粉末間
の接触抵抗が増加して配線導体2の電気抵抗が高くな
り、また10μmをえると絶縁基体1に所定パターン
の配線導体2を形成するのが困難となる傾向にある。従
って、前記配線導体2に含有される金属粉末はその粒径
を0.5乃至10μmの範囲としておくことが好まし
い。
Further, the metal powder contained in the wiring conductor 2 and the average particle diameter increases the contact resistance of the resistor is increased wiring conductors 2 between happens when metal powders less than 0.5 [mu] m, also the 10μm ultra El and the insulating substrate 1 tends to be difficult to form the wiring conductors 2 of a predetermined pattern. Therefore, the metal powder contained in the wiring conductor 2 has a particle size of 0.1. 5 it is preferred that乃 keep a range of optimal 10 [mu] m.

【0022】更に前記配線導体2に含有される導電性樹
脂は導電性ポリピロール樹脂、ポリパラフェニレン樹
脂、ポリアニリン樹脂等が好適に使用される。
The conductive resin contained in the wiring conductor 2 is preferably a conductive polypyrrole resin, polyparaphenylene resin, polyaniline resin or the like.

【0023】また更に前記配線導体2はその露出する表
面にニッケル、金等の耐蝕性に優れ、且つ良導電性の金
属をメッキ法により1乃至20μmの厚みに層着させて
おくと配線導体2の酸化腐食を有効に防止することがで
きるとともに配線導体2にボンディングワイヤ4を強固
に電気的接続させることができる。従って、前記配線導
体2の露出する表面にはニッケルや金等の耐蝕性に優
れ、且つ良導電性の金属をメッキ法により1乃至20μ
mの厚みに層着させておくことが好ましい。
Further, the wiring conductor 2 may be formed by plating a metal having excellent corrosion resistance such as nickel and gold and having good conductivity on the exposed surface to a thickness of 1 to 20 μm by plating. And the bonding wire 4 can be firmly and electrically connected to the wiring conductor 2. Accordingly, the exposed surface of the wiring conductor 2 is coated with a metal having excellent corrosion resistance such as nickel or gold and a good conductivity by 1 to 20 μm by plating.
It is preferable to coat the layer with a thickness of m.

【0024】かくして上述の配線基板によれば、絶縁基
体1の凹部1d底面に半導体素子3を樹脂等の接着剤を
介して接着固定するとともに半導体素子3の各電極をボ
ンディングワイヤ4を介して配線導体2に電気的に接続
し、しかる後、絶縁基体1の上面に蓋体5を樹脂等から
成る封止材を介して接合させ、絶縁基体1と蓋体5とか
ら成る容器内部に半導体素子3を気密に収容することに
よって製品としての半導体装置が完成する。
Thus, according to the above-described wiring board, the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1d of the insulating base 1 via an adhesive such as a resin, and each electrode of the semiconductor element 3 is wired via the bonding wire 4. After being electrically connected to the conductor 2, the lid 5 is bonded to the upper surface of the insulating base 1 via a sealing material made of resin or the like, and the semiconductor element is placed inside the container formed of the insulating base 1 and the lid 5. The semiconductor device as a product is completed by housing 3 in an airtight manner.

【0025】次に前記半導体素子収納用パッケージに使
用される配線基板の製造方法について説明する。
Next, a method of manufacturing a wiring board used in the package for housing a semiconductor element will be described.

【0026】まず図2(a)に示すように3枚の前駆体
シート11a、11b、11cを準備する。前記3枚の
前駆体シート11a、11b、11cは無機絶縁物粉末
を熱硬化性樹脂前駆体で結合することによって形成され
ており、例えば粒径が0.1〜100μmの酸化珪素粉
末に、ビスフェノールA型エポキシ樹脂、ノボラック型
エポキシ樹脂、グリシジルエステル型エポキシ樹脂等の
エポキシ樹脂及びアミン系硬化剤、イミダゾール系硬化
剤、酸無水物系硬化剤等の硬化剤を添加混合してペース
ト状となし、しかる後、このペーストをシート状になす
とともに約25〜100℃の温度で1〜60分間加熱し
半硬化させることによって製作される。
First, as shown in FIG. 2A, three precursor sheets 11a, 11b and 11c are prepared. The three precursor sheets 11a, 11b, and 11c are formed by bonding inorganic insulating powder with a thermosetting resin precursor. For example, silicon oxide powder having a particle size of 0.1 to 100 μm is added to bisphenol A type epoxy resin, novolak type epoxy resin, epoxy resin such as glycidyl ester type epoxy resin and amine type curing agent, imidazole type curing agent, curing agent such as acid anhydride type curing agent are added and mixed to form a paste, Thereafter, the paste is formed into a sheet, and is semi-cured by heating at a temperature of about 25 to 100 ° C. for 1 to 60 minutes.

【0027】次に図2(b)に示すように前記3枚の前
駆体シート11a、11b、11cのうち2枚の前駆体
シート11a、11bに半導体素子3を収容する凹部1
dとなる開口A、A’を、2枚の前駆体シート11b、
11cに配線導体2を引き回すための貫通孔B、B’を
各々形成する。
Next, as shown in FIG. 2 (b), two of the three precursor sheets 11a, 11b, 11c have the recess 1 for accommodating the semiconductor element 3 in the two precursor sheets 11a, 11b.
The openings A and A ′ serving as d are formed by two precursor sheets 11b,
11c, through holes B and B 'for routing the wiring conductor 2 are respectively formed.

【0028】前記開口A、A’及び貫通孔B、B’は前
駆体シート11a、11b、11cに従来周知のパンチ
ング加工法を施し、前駆体シート11a、11b、11
cの各々に所定形状の孔を穿孔することによって形成さ
れる。
The openings A and A 'and the through holes B and B' are formed by subjecting the precursor sheets 11a, 11b and 11c to a conventionally well-known punching method.
c is formed by piercing a hole of a predetermined shape in each of c.

【0029】次に図2(c)に示すように、前記前駆体
シート11b、11cの上下面及び貫通孔B、B’内に
配線導体2と成る金属ペースト12を従来周知のスリー
ン印刷法により所定パターンに印刷塗布するとともにこ
れを約25〜100℃の温度で1〜60分間加熱し半硬
化させることによって製作される。
Next, as shown in FIG. 2C, a metal paste 12 to be the wiring conductor 2 is formed on the upper and lower surfaces of the precursor sheets 11b and 11c and in the through holes B and B 'by a conventionally well-known screen printing method. It is manufactured by printing and applying a predetermined pattern and heating it at a temperature of about 25 to 100 ° C. for 1 to 60 minutes to be semi-cured.

【0030】前記金属ペースト12としては例えば、金
属粉末として粒径が0.1〜20μm程度の銅粉末に、
導電性ポリピール樹脂と、ビスフェノールA型エポキ
シ樹脂、ノボラック型エポキシ樹脂、グリシジルエステ
ル型エポキシ樹脂等のエポキシ樹脂及びアミン系硬化
剤、イミダゾール系硬化剤、酸無水物系硬化剤等の硬化
剤を添加混合しペースト状としたものが使用される。
As the metal paste 12, for example, a copper powder having a particle size of about 0.1 to 20 μm as a metal powder may be used.
A conductive Poripi b Lumpur resin, bisphenol A type epoxy resin, novolak type epoxy resins, epoxy resins and amine curing agents such as glycidyl ester type epoxy resin, imidazole curing agents, acid anhydride curing agents such as curing agent Is added and mixed to form a paste.

【0031】そして最後に前記3枚の前駆体シート11
a、11b、11cを上下に積層するとともにこれを約
80〜300℃の温度で約10秒〜24時間加熱し、前
記前駆体シート11a、11b、11cと、前駆体シー
ト11b、11cに所定パターンに印刷塗布された金属
ペースト12とを完全に熱硬化させることによって図1
に示すような絶縁基体1に配線導体2を被着させた半導
体素子収納用パッケージに使用される配線基板が完成す
る。この場合、前記前駆体シート11a、11b、11
c及び金属ペースト12は熱硬化時に収縮することは殆
どなく、従って、得られる配線基板に変形や寸法にバラ
ツキが発生することは皆無で、配線導体に断線が招来す
ることはなく、配線導体を介して半導体素子等の電極を
外部電気回路に確実に電気的接続することが可能とな
る。
Finally, the three precursor sheets 11
a, 11b, and 11c are vertically stacked and heated at a temperature of about 80 to 300 ° C. for about 10 seconds to 24 hours to form a predetermined pattern on the precursor sheets 11a, 11b, and 11c and the precursor sheets 11b and 11c. By completely thermosetting the metal paste 12 printed and applied to
A wiring board used for a semiconductor element storage package in which a wiring conductor 2 is adhered to an insulating base 1 as shown in FIG. In this case, the precursor sheets 11a, 11b, 11
c and the metal paste 12 hardly shrink during thermosetting, so that there is no deformation or variation in dimensions of the obtained wiring board, no breakage of the wiring conductor is caused, and Through this, electrodes such as semiconductor elements can be reliably electrically connected to an external electric circuit.

【0032】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば上述の実施例では本願発
明の配線基板を半導体素子を収容する半導体素子収納用
パッケージに適用した場合を例に採って説明したがこれ
を混成集積回路基板等に適用してもよい。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. Is applied to a semiconductor element housing package for housing a semiconductor element, but this may be applied to a hybrid integrated circuit board or the like.

【0033】また上述の実施例では3枚の前駆体シート
を積層することによって配線基板を製作したが、1枚や
2枚、あるいは4枚以上の前駆体シートを使用して配線
基板を製作してもよい。
In the above embodiment, a wiring board is manufactured by laminating three precursor sheets. However, a wiring board is manufactured by using one, two, or four or more precursor sheets. You may.

【0034】[0034]

【発明の効果】本発明の配線基板によれば、絶縁基体が
無機絶縁物粉末を靱性に優れる熱硬化性樹脂で結合する
ことによって形成されていることから配線基板同士ある
いは配線基板と半導体装置製作自動ラインの一部とが激
しく衝突しても絶縁基体に欠けや割れ、クラック等が発
生することはない。
According to the wiring board of the present invention, since the insulating base is formed by bonding the inorganic insulating powder with a thermosetting resin having excellent toughness, the wiring boards are mutually connected or the wiring board and the semiconductor device are manufactured. Even if a part of the automatic line collides violently, the insulating substrate will not be chipped, cracked or cracked.

【0035】また本発明の配線基板によれば配線導体
が金属粉末と導電性樹脂を熱硬化性樹脂で結合すること
によって形成されており、金属粉末間の電気的接続が導
電性樹脂で助長されているため配線導体の電気抵抗が低
抵抗となる。
[0035] According to the wiring board of the present invention, the wiring conductor is formed by combining the metal powder and conductive resin in thermosetting resins, the electrical connection between the metal powder in the conductive resin As a result, the electrical resistance of the wiring conductor is reduced.

【0036】更に本発明の配線基板の製造方法によれ
ば、熱硬化性樹脂前駆体と無機絶縁物粉末とを混合して
成る前駆体シート、及び熱硬化性樹脂前駆体と金属粉末
と導電性樹脂前駆体とを混合して成る金属ペーストを熱
硬化させることによって製作され、焼成工程がないこと
から不均一な焼成収縮に起因する変形や寸法のバラツキ
は発生せず、その結果、配線導体に断線が招来すること
もなく、配線導体を介して半導体素子等の電極を外部電
気回路に確実に電気的接続することが可能となる。
Further , according to the method for manufacturing a wiring board of the present invention,
For example, a precursor sheet formed by mixing a thermosetting resin precursor and an inorganic insulating powder, and a metal paste formed by mixing a thermosetting resin precursor, a metal powder, and a conductive resin precursor are thermoset. Since there is no firing step, there is no deformation or dimensional variation due to uneven firing shrinkage. Electrodes such as elements can be reliably electrically connected to an external electric circuit.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の配線基板を半導体素子収納用パッケー
ジに適用した場合の一実施例を示す断面図である。
FIG. 1 is a sectional view showing an embodiment in which a wiring board of the present invention is applied to a package for housing a semiconductor element.

【図2】(a)乃至(c)は本発明の配線基板の製造方
法を説明するための各工程毎の断面図である。
FIGS. 2A to 2C are cross-sectional views for explaining steps of a method for manufacturing a wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・・・・・・・・・絶縁基体 1a、1b、1c・・・・・・絶縁基板 2・・・・・・・・・・・・・配線導体 11a、11b、11c・・・前駆体シート 12・・・・・・・・・・・・金属ペースト 1 ... Insulating base 1a, 1b, 1c ... Insulating substrate 2 ... Wiring conductors 11a, 11b, 11c ... Precursor sheet 12 ... Metal paste

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H05K 1/02,1/03,1/09 H05K 3/12,3/46 H01L 23/12,23/14 H01B 1/00 - 1/24 ────────────────────────────────────────────────── ─── Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H05K 1 / 02,1 / 03,1 / 09 H05K 3 / 12,3 / 46 H01L 23 / 12,23 / 14 H01B 1/00-1/24

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】60乃至95重量%の無機絶縁物粉末と5
乃至40重量%の熱硬化性樹脂とから成り、前記無機絶
縁物粉末を前記熱硬化性樹脂の前駆体で結合して成る前
駆体シートを半硬化させてその複数枚を積層して熱硬化
させた、前記無機絶縁物粉末を前記熱硬化性樹脂により
結合した複数枚の絶縁基板を積層して成る絶縁基体の前
記絶縁基板に、半硬化の前記前駆体シートとともに熱硬
化させた、金属粉末と導電性樹脂を熱硬化性樹脂により
結合した配線導体を被着させて成ることを特徴とする
線基板。
An inorganic insulating powder of 60 to 95% by weight and 5
Or consists of a 40 wt% of a thermosetting resin, wherein the inorganic insulation
Before bonding the edge powder with the thermosetting resin precursor
Semi-cured precursor sheets, laminating multiple sheets and heat curing
In front of an insulating substrate formed by laminating a plurality of insulating substrates obtained by bonding the inorganic insulating powder with the thermosetting resin.
The insulating substrate is thermoset together with the semi-cured precursor sheet.
It was of, distribution <br/> line substrate, characterized by comprising a metal powder and a conductive resin is applied more bound wiring conductor thermosetting resins.
【請求項2】熱硬化性樹脂前駆体と無機絶縁物粉末とを
混合して成る前駆体シートを準備する工程と、前記前駆
体シートに、熱硬化性樹脂前駆体と金属粉末と導電性樹
脂前駆体とを混合して成る金属ペーストを所定パターン
に印刷する工程と、前記前駆体シートを加熱して半硬化
させる工程と、前記金属ペーストが印刷された半硬化の
前記前駆体シートを複数枚上下に積層するとともにこれ
を加熱して前記前駆体シート及び所定パターンに印刷さ
れた前記金属ペーストを熱硬化させる工程とから成る
とを特徴とする配線基板の製造方法。
2. A step of preparing a precursor sheet obtained by mixing a thermosetting resin precursor and an inorganic insulating powder; and forming a thermosetting resin precursor, a metal powder, and a conductive resin on the precursor sheet. Printing a metal paste formed by mixing the precursor with a predetermined pattern, and heating the precursor sheet to semi-curing
And the semi-cured printed metal paste
While laminating a plurality of the precursor sheets up and down,
Heated to this comprising a step of thermally curing the printed the metal paste to the precursor sheet and a predetermined pattern
And a method of manufacturing a wiring board.
JP11294395A 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same Expired - Fee Related JP3292623B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11294395A JP3292623B2 (en) 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11294395A JP3292623B2 (en) 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH08307024A JPH08307024A (en) 1996-11-22
JP3292623B2 true JP3292623B2 (en) 2002-06-17

Family

ID=14599398

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11294395A Expired - Fee Related JP3292623B2 (en) 1995-05-11 1995-05-11 Wiring board and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3292623B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10163583A (en) * 1996-11-27 1998-06-19 Kyocera Corp Wiring board
JP3398291B2 (en) * 1996-11-28 2003-04-21 京セラ株式会社 Wiring board

Also Published As

Publication number Publication date
JPH08307024A (en) 1996-11-22

Similar Documents

Publication Publication Date Title
JP3152852B2 (en) Wiring board and manufacturing method thereof
JP3292623B2 (en) Wiring board and method of manufacturing the same
JPH1074858A (en) Wiring board and production thereof
JP3292624B2 (en) Wiring board and method of manufacturing the same
JP3292620B2 (en) Wiring board and method of manufacturing the same
JP3292644B2 (en) Wiring board and method of manufacturing the same
JP3145621B2 (en) Wiring board and manufacturing method thereof
JP3297574B2 (en) Wiring board and method of manufacturing the same
JP3301907B2 (en) Manufacturing method of wiring board
JP3292646B2 (en) Wiring board and method of manufacturing the same
JP3292645B2 (en) Wiring board and method of manufacturing the same
JP3305574B2 (en) Wiring board
JP3297575B2 (en) Wiring board and method of manufacturing the same
JP3301908B2 (en) Wiring board and method of manufacturing the same
JP3393768B2 (en) Wiring board and method of manufacturing the same
JP3297576B2 (en) Wiring board and method of manufacturing the same
JP3297573B2 (en) Wiring board and method of manufacturing the same
JP3393760B2 (en) Wiring board and method of manufacturing the same
JP3323060B2 (en) Wiring board
JP3301909B2 (en) Wiring board and method of manufacturing the same
JP3393747B2 (en) Wiring board and method of manufacturing the same
JP3266508B2 (en) Wiring board and method of manufacturing the same
JP3145619B2 (en) Wiring board and manufacturing method thereof
JP3605235B2 (en) Manufacturing method of wiring board
JP3181019B2 (en) Wiring board manufacturing method

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 7

Free format text: PAYMENT UNTIL: 20090329

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090329

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100329

Year of fee payment: 8

LAPS Cancellation because of no payment of annual fees