JP3292521B2 - 位相ロックループ及び復号回路 - Google Patents
位相ロックループ及び復号回路Info
- Publication number
- JP3292521B2 JP3292521B2 JP31354292A JP31354292A JP3292521B2 JP 3292521 B2 JP3292521 B2 JP 3292521B2 JP 31354292 A JP31354292 A JP 31354292A JP 31354292 A JP31354292 A JP 31354292A JP 3292521 B2 JP3292521 B2 JP 3292521B2
- Authority
- JP
- Japan
- Prior art keywords
- length
- signal
- pulse
- locked loop
- detector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 claims description 4
- 230000003213 activating effect Effects 0.000 claims 1
- 229920000729 poly(L-lysine) polymer Polymers 0.000 description 35
- 230000001360 synchronised effect Effects 0.000 description 11
- 238000005259 measurement Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000012937 correction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 230000009897 systematic effect Effects 0.000 description 2
- 241000630486 Robertus Species 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013479 data entry Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 239000013642 negative control Substances 0.000 description 1
- 239000013641 positive control Substances 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL91203073:1 | 1991-11-25 | ||
EP91203073 | 1991-11-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05243991A JPH05243991A (ja) | 1993-09-21 |
JP3292521B2 true JP3292521B2 (ja) | 2002-06-17 |
Family
ID=8208030
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31354292A Expired - Fee Related JP3292521B2 (ja) | 1991-11-25 | 1992-11-24 | 位相ロックループ及び復号回路 |
Country Status (6)
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69415378T2 (de) * | 1993-04-05 | 1999-06-17 | Koninklijke Philips Electronics N.V., Eindhoven | Digitaler Phasenregelkreis |
US5612981A (en) * | 1994-02-15 | 1997-03-18 | Philips Electronics North America Corporation | Apparatus and methods for improving timing recovery of a system clock |
US5692023A (en) * | 1994-11-04 | 1997-11-25 | Lsi Logic Corporation | Phase locked loop including distributed phase correction pulses for reducing output ripple |
US5477177A (en) * | 1995-01-11 | 1995-12-19 | National Semiconductor Corporation | Phase error processor circuit with a comparator input swapping technique |
US5808691A (en) * | 1995-12-12 | 1998-09-15 | Cirrus Logic, Inc. | Digital carrier synthesis synchronized to a reference signal that is asynchronous with respect to a digital sampling clock |
DE19546632A1 (de) * | 1995-12-14 | 1997-06-19 | Thomson Brandt Gmbh | Digitale Detektorschaltung zur Rückgewinnung des Bittaktes aus einem Datenstrom |
FR2746232B1 (fr) * | 1996-03-12 | 1998-05-29 | Procede de reduction autonome des seuils d'acquisition et de poursuite des porteuses recues en orbites | |
JPH09246965A (ja) * | 1996-03-14 | 1997-09-19 | Nec Corp | Pll周波数シンセサイザ |
US5867533A (en) * | 1996-08-14 | 1999-02-02 | International Business Machines Corporation | Digital delta mode carrier sense for a wireless LAN |
US5727038A (en) * | 1996-09-06 | 1998-03-10 | Motorola, Inc. | Phase locked loop using digital loop filter and digitally controlled oscillator |
KR100213261B1 (ko) * | 1996-10-31 | 1999-08-02 | 윤종용 | 위상동기루프의 주파수검출기 |
GB2321142B (en) * | 1997-01-13 | 2001-03-28 | Plessey Semiconductors Ltd | Frequency control arrangement |
US6330034B1 (en) * | 1997-10-31 | 2001-12-11 | Texas Instruments Incorporated | Color phase-locked loop for video decoder |
JP3094976B2 (ja) * | 1997-11-19 | 2000-10-03 | 日本電気株式会社 | 同期回路 |
KR100318842B1 (ko) * | 1998-11-26 | 2002-04-22 | 윤종용 | 디지털위상제어루프에서의주파수검출방법 |
US6389548B1 (en) * | 1999-04-12 | 2002-05-14 | Liam Bowles | Pulse run-length measurement for HF data signal by dividing accumulated phase difference between first and second zero-crossings by single-cycle range using multiple cycle range sawtooth waveform |
DE10033109C2 (de) * | 2000-07-07 | 2002-06-20 | Infineon Technologies Ag | Taktsignalgenerator |
US6987817B1 (en) * | 2000-07-17 | 2006-01-17 | Lsi Logic Corporation | Digital clock recovery PLL |
US7093151B1 (en) * | 2000-09-22 | 2006-08-15 | Cypress Semiconductor Corp. | Circuit and method for providing a precise clock for data communications |
US6785354B1 (en) * | 2000-11-28 | 2004-08-31 | Intel Corporation | Lock detection system for use in high speed communication systems |
US6609781B2 (en) * | 2000-12-13 | 2003-08-26 | Lexmark International, Inc. | Printer system with encoder filtering arrangement and method for high frequency error reduction |
CN100417025C (zh) | 2001-11-30 | 2008-09-03 | 皇家飞利浦电子股份有限公司 | 比特检测装置和用于重现信息的设备 |
FR2833795B1 (fr) * | 2001-12-18 | 2004-04-02 | St Microelectronics Sa | Procede et dispositif pour evaluer des longueurs de symboles sur un support d'enregistrement |
US20030165208A1 (en) * | 2002-03-04 | 2003-09-04 | Andrew Carter | Non-linear decision feedback phase locked loop filter |
TW577992B (en) * | 2002-05-20 | 2004-03-01 | Mediatek Inc | Jitter measuring method and apparatus |
TWI239718B (en) * | 2004-01-29 | 2005-09-11 | Mediatek Inc | Phase lock loop with higher resolution |
US6944099B1 (en) | 2004-06-10 | 2005-09-13 | International Business Machines Corporation | Precise time period measurement |
US7809973B2 (en) * | 2005-11-16 | 2010-10-05 | Cypress Semiconductor Corporation | Spread spectrum clock for USB |
TW200727591A (en) * | 2006-01-06 | 2007-07-16 | Realtek Semiconductor Corp | Phase lock loop (PLL) for rapid lock-in |
US7658114B1 (en) | 2008-11-17 | 2010-02-09 | General Electric Company | Ultrasonic flow meter |
US8422340B2 (en) * | 2008-12-08 | 2013-04-16 | General Electric Company | Methods for determining the frequency or period of a signal |
US20120051478A1 (en) * | 2009-05-29 | 2012-03-01 | Dirk Schmitt | Fast cycle slip detection and correction |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4590602A (en) * | 1983-08-18 | 1986-05-20 | General Signal | Wide range clock recovery circuit |
NL8303561A (nl) * | 1983-10-17 | 1985-05-17 | Philips Nv | Geregelde oscillatorschakeling. |
CA1284361C (en) * | 1986-08-29 | 1991-05-21 | Mitel Corporation | Analog phase locked loop |
FR2605162B1 (fr) * | 1986-10-08 | 1988-12-02 | Cit Alcatel | Procede et dispositif d'aide a l'acquisition d'une boucle a verrouillage de phase |
US4855683A (en) * | 1987-11-18 | 1989-08-08 | Bell Communications Research, Inc. | Digital phase locked loop with bounded jitter |
US4912729A (en) * | 1988-05-16 | 1990-03-27 | U.S. Philips Corporation | Phase-locked-loop circuit and bit detection arrangement comprising such a phase-locked-loop circuit |
JPH02124637A (ja) * | 1988-11-02 | 1990-05-11 | Nec Corp | 同期検出回路 |
GB2235839B (en) * | 1989-08-22 | 1993-06-16 | Plessey Co Plc | Phase detector |
-
1992
- 1992-11-18 EP EP92203546A patent/EP0544358B1/en not_active Expired - Lifetime
- 1992-11-18 DE DE69204144T patent/DE69204144T2/de not_active Expired - Fee Related
- 1992-11-19 KR KR1019920021696A patent/KR100243622B1/ko not_active Expired - Fee Related
- 1992-11-23 US US07/979,951 patent/US5337335A/en not_active Expired - Lifetime
- 1992-11-24 JP JP31354292A patent/JP3292521B2/ja not_active Expired - Fee Related
- 1992-12-30 TW TW081110499A patent/TW225065B/zh active
Also Published As
Publication number | Publication date |
---|---|
KR930011444A (ko) | 1993-06-24 |
DE69204144D1 (de) | 1995-09-21 |
JPH05243991A (ja) | 1993-09-21 |
EP0544358A1 (en) | 1993-06-02 |
US5337335A (en) | 1994-08-09 |
KR100243622B1 (ko) | 2000-02-01 |
DE69204144T2 (de) | 1996-03-21 |
EP0544358B1 (en) | 1995-08-16 |
TW225065B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1994-06-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |