JP3281159B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix type liquid crystal display device provided with a switching element for each pixel.

[0002]

2. Description of the Related Art In general, in a liquid crystal display (LCD) in which pixel electrodes are formed at intersections of signal lines and scanning lines via switching elements and the pixel electrodes are arranged in a matrix, thin film transistors (LCDs) are used as switching elements. TF
T) is widely used. The TFT used in this type of TFT-LCD is a three-terminal element composed of a drain, a gate, and a source electrode. Each of the drains has a signal line for supplying a display signal, and the gate has a scanning line for supplying a scanning signal. However, the source is connected to a pixel electrode forming a pixel. Therefore, in order to write a display signal to each pixel electrode arranged in a matrix, writing is performed by applying a display signal to the drain, applying a scanning signal to the gate, and conducting between the drain and the gate of the TFT. . Also, in order to hold a display signal in each pixel electrode,
This is performed by minimizing the conduction between the drain and the gate without applying a scanning signal to the gate.

Conventionally, a circuit (display signal drive circuit, scan signal drive circuit) for supplying a display signal, a scan signal, and the like to be applied to a TFT employs a dedicated circuit configuration and is integrated (integrated into an IC). A drive circuit is used. Since a dedicated driving IC is used in this way, the withstand voltage characteristics due to the IC manufacturing process are limited, and sufficient driving characteristics cannot be obtained for all TFT-LCDs. For example, T
When the time required to scan each pixel is shortened due to the high definition of the FT-LCD, sufficient conduction characteristics of the TFT cannot be obtained, or when the scanning cycle is lengthened or the TFT-L
If the environment in which the CD is used is severe, sufficient holding characteristics cannot be obtained, which may cause deterioration of a displayed image or TFT-LCD itself.

[0004] This problem will be briefly described with reference to FIGS. 18 and 19. In a TFT-LCD, an AC drive is performed so that a used liquid crystal is not deteriorated by a DC component. FIG.
Shows potential waveforms of the respective electrodes in frame inversion driving generally used for performing AC driving. In FIG. 18A, + Vsig indicates the positive potential of the AC-converted display signal, -Vsig indicates the same negative potential, Vsc indicates the center potential when the display signal is AC-converted, and Vg indicates the scanning signal waveform. FIG. 18B is a waveform showing a pixel potential Vp which is a display signal held in the pixel, and FIG. 18C is a waveform showing a potential difference Vg-Vsig between the pixel potential and the scanning signal waveform Vg.

FIG. 19 shows general characteristics of a TFT used as a switching element of a TFT-LCD. The horizontal axis Vgs in FIG. 19 indicates the source-gate voltage of the TFT, that is, the potential difference between the pixel potential Vp and the scanning signal Vg. The vertical axis Id in FIG. 19 indicates the drain current of the TFT, that is, the amount of current flowing between the pixel electrode and the display electrode. As shown in FIG. 19, when Vgs is higher than 0 [V] at the time of writing a display signal, Id flows more, so that the conduction of the TFT is better.
Also, it can be seen that when Vgs is lower than 0 [V] when the display signal is held, Id decreases and the holding characteristic of the TFT improves.

However, as shown in FIG. 18C, in an actual TFT-LCD, when a positive display signal is written, Vgh-Vsig corresponding to + Vgs in FIG. 19 is reduced to around 0 [V], and the conduction characteristics of the TFT are reduced. to degrade. FIG.
As shown in FIG. 8C, when the display signal of the negative polarity is held, Vgl-Vsig corresponding to -Vgs in FIG. 6 decreases to around 0 [V], and the holding characteristics of the TFT deteriorate.

As is apparent from the examples shown in FIGS. 18 and 19, the deterioration of the conduction characteristics and the deterioration of the holding characteristics of the TFT are as follows: the voltage range of the scanning signal Vg which greatly affects the conduction characteristics and the holding characteristics. This is due to the narrow dynamic range. Also, as described above, the scanning signal drive circuit is an IC
The dynamic range is determined by the breakdown voltage characteristics of the IC process. Therefore, if the scanning signal driving IC is used as it is as in the prior art, not only does the TFT's conduction characteristics, that is, the writing characteristics and the holding characteristics deteriorate, deteriorating the image quality of the displayed image, but also completely changing the liquid crystal. Since driving cannot be performed, a DC voltage is applied to the liquid crystal, which has the disadvantage of deteriorating the TFT-LCD itself.

On the other hand, the driving frequency has been increased with the recent increase in the resolution of LCDs (increase in the number of pixels), and in such a situation, the object is to reduce the voltage of the driving IC to support high-speed signals. A common inversion drive that swings the common electrode in the opposite direction of the image polarity (Japanese Patent Application Laid-Open No. 55-28649) and a power level shift drive that shifts the power supply voltage in synchronization with the image polarity (Japanese Patent Application No. 4-48313) Has been proposed. However, the common inversion drive uses a large-capacity common for the horizontal drive cycle (15
(Up to 30 microseconds), power consumption increases. In addition, power supply level shift drive must drive a large power supply capacity, so a powerful drive circuit is newly required, and it is applicable to drive that must drive the power supply at high speed such as dot inversion. It is difficult, and at present, only the signal line inversion drive is performed. The signal line inversion drive is characterized in that horizontal crosstalk is unlikely to occur due to an increase in common resistance when the screen is enlarged, but a vertical stroke is likely to occur due to TFT leakage. Becomes severe.

As a method of solving such a problem,
There has been proposed a method in which a switch is provided inside a drive IC with a constant power supply to switch a signal line to be driven for each field (Japanese Patent Application Laid-Open No. 3-51887, Japanese Patent Application No. 1-188299). However, even if such a method is used, when the dot inversion drive capable of improving the image quality is realized by combining the signal line inversion and the line inversion, the power consumption increases because the polarity must be inverted for each line. .

Recently, a driving method (MF driving method) for lowering the driving frequency by dividing one field image into an odd number of subfields has been proposed (Japanese Patent Application No. 2-69706). This MF driving method is effective for reducing power consumption and is also very effective for surface flicker.
The flicker component for each pixel increases. Therefore, there is a problem that the horizontal stripes generated in each field are visually recognized and the image quality of a still image is deteriorated. Further, in the MF driving method, since the response of the liquid crystal is poor when displaying a moving image, and the interval for driving one pixel is longer than one field, the interlacing disturbs the image in a comb shape, and the image quality of the moving image is reduced. Has deteriorated.

[0011]

As described above, in an active matrix type LCD using a switching element such as a TFT, the dynamic range of the scanning signal driving IC determined by the manufacturing process of the scanning signal driving IC remains unchanged. If used, the conduction characteristics and the retention characteristics of the TFT are degraded, which not only degrades the image quality of the displayed image, but also makes it impossible to completely drive the liquid crystal into an alternating current, so that a DC voltage is applied to the liquid crystal. There was a drawback that it deteriorated itself.

Further, as the driving frequency for higher resolution is increased, power consumption is increased, and image quality is degraded due to horizontal crosstalk, vertical crosstalk, and the like. Furthermore, the MF driving method that can reduce power consumption has a problem that line flicker increases due to a long holding time in a still image and causes line disturbance, and in a moving image, the image of the previous field remains in a comb shape, and thus the image quality deteriorates. .

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object the writing characteristics due to the narrow dynamic range of a scanning signal driving IC determined by the manufacturing process of the scanning signal driving IC. It is an object of the present invention to provide a liquid crystal display device having high image quality and long life, which can prevent the deterioration of the liquid crystal and the holding characteristics and the liquid crystal itself.

Another object of the present invention is to provide a liquid crystal display device which can reproduce high-quality images with low power consumption even for moving images and still images.

[0015]

In order to solve the above problems, the present invention employs the following configuration.

That is, according to the present invention, there are provided a plurality of signal lines and scanning lines arranged in a direction intersecting with each other, pixel electrodes provided at the intersections of these lines and arranged in a matrix, Switching elements connected between the signal lines and controlled by the scanning lines, respectively .
A liquid crystal display device, wherein a display signal is written to the pixel electrode.
During the writing operation, the first potential is supplied to the scanning line.
With this, the switching element is made conductive, and the pixel electrode is
During the holding operation of the written display signal, the scanning line
By supplying a second potential lower than the first potential,
Driving means for cutting off the switching element, and the first potential and the second potential both
The first potential and the second potential are both shifted in the minus direction during the holding operation of the display signal while shifting in the plus direction.
Characterized in that a scanning signal control means for shifting.

Here, preferred embodiments of the present invention include the following. (1) The switching element is a TFT, the source is connected to the pixel electrode, the drain is connected to the signal line, and the gate is connected to the scanning line. (2) The scanning signal control means sets the maximum value of the potential that can be taken on the positive side of the withstand voltage characteristic with respect to the ground potential of the scan electrode driving circuit that supplies the scanning signal during the display signal writing operation, and the maximum value with respect to the ground potential during the display signal holding operation Control must be performed so as to output the maximum value of the potential that can be taken on the negative side of the withstand voltage characteristics. (3) The scanning signal control means controls the plurality of scanning electrode driving circuits, and sets the ground potential of each scanning electrode driving circuit and the operating potential of the scanning electrode driving circuit at the time of display signal writing operation and display signal holding operation. Perform variable control. (4) The scan signal control means controls a plurality of scan electrode drive circuits, and performs control for varying the operating potential of the scan electrode drive circuit for each scan electrode drive circuit.

The present invention also provides a plurality of signal lines and scanning lines arranged in a direction intersecting with each other, a pixel electrode provided at each intersection of these lines and arranged in a matrix, A thin film transistor provided between the signal line and a gate, the gate being connected to a scanning line, and serving as a switch for writing a pixel signal to a pixel electrode;
In one scan of the gate of these thin film transistors,
The down time, and characterized by being provided with a gate signal varying means displaying image variable to each scanning line in accordance with a still image or moving image of the detection signal. In addition, the present invention
Signal lines and scanning lines arranged in multiple directions
Are arranged at the intersection of each line
Between the pixel electrode and each pixel electrode and signal line
The gate is connected to the scanning line and the pixel signal is
Thin-film transistor acting as a switch for writing to electrodes
And the gate jump of these thin film transistors
The ON period in scanning is determined by whether the displayed image is a still image or a moving image.
Gate signal variable means that varies for each scanning line according to the detection signal
And a step.

Here, preferred embodiments of the present invention include the following. (1) The gate signal changing means changes an output from a still / moving detection circuit for determining whether an input image is a still image or a moving image as a control signal. (2) The gate signal is controlled so that the number of lines to be driven differs between when the input image is a still image and when it is a moving image. (3) The gate signal changing means includes at least a circuit for changing a power supply voltage of the gate drive circuit. (4) The period during which the gate signal is changed is a period during which no image signal is output to the signal line. (5) The off-level of the gate must deviate from the minimum value of flicker.

[0020]

According to the present invention, during the display signal writing operation, the withstand voltage characteristic of the scanning signal drive circuit and the like is shifted to the positive side to enhance the conduction characteristics of the switching element provided for each pixel, and the display signal holding operation is performed. Sometimes, the dynamic range of the scanning signal driving circuit and the like is equivalently controlled by shifting the withstand voltage characteristic of the scanning signal driving circuit and the like to the negative side and controlling the scanning signal so as to enhance the cutoff characteristic of the switching element for each pixel. Can be expanded. And, by preventing the deterioration of the writing characteristic and the holding characteristic of the switching element TFT due to the narrow dynamic range inherent in the scanning signal driving IC, the deterioration of the image quality of the displayed image and the deterioration of the liquid crystal itself are prevented. A liquid crystal display device with high image quality and long life can be realized.

Further , according to the present invention, the characteristic of low power consumption can be maintained because the leak current characteristic and the on-current characteristic of the TFT which causes crosstalk and flicker can be optimally controlled according to the driving time and the holding time. In addition, vertical crosstalk and the like can be reduced, and high image quality can be achieved.

[0022]

Embodiments of the present invention will be described below with reference to the drawings. First, an embodiment according to the first aspect of the present invention will be described. Embodiment 1 FIG. 1 is a block diagram illustrating a basic configuration of a liquid crystal display device according to a first embodiment of the present invention. This device uses TFT
An LCD panel 1, an upper display signal electrode drive circuit 2 for driving the display signal electrodes of the TFT-LCD panel 1 from the upper side of the panel, and a lower display signal electrode drive circuit 3 for driving the display signal electrodes from the lower side of the panel. , A scan electrode drive circuit 4 for driving the scan electrodes of the TFT-LCD panel 1, and a scan electrode control circuit 5 for controlling the dynamic range of the scan electrode drive circuit 4.

In the example of FIG. 1, the display signal Vsig (U) is supplied to the upper display signal electrode drive circuit 2 and the upper display signal V
Upper horizontal pulse CPH (U) sampling sig (U)
And the upper sampling pulse STH (U) for controlling the timing of sampling the display signal, the upper display signal electrode drive circuit 2 is controlled to send the display signal Vsig () of the upper display signal electrode drive circuit 2 to the TFT-LCD panel 1. U) is supplied. Similarly, the lower display signal Vsig (D) is supplied to the lower display signal electrode drive circuit 3, and the lower display signal is sent to the TFT-LCD panel 1 by the lower control pulse composed of CPH (D) and STH (D). The display signal Vsig (D) of the electrode drive circuit 3 is supplied.

The respective display signals Vsig (U), Vs from the upper display signal electrode drive circuit 2 and the lower display signal electrode drive circuit 3
sig (D) is set to T by the scanning signal from the scanning electrode driving circuit 4.
Writing is performed on the FT-LCD panel 1, and a holding operation is performed, so that a display signal is displayed on the TFT-LCD panel 1. As shown in FIG. 1, the scan electrode drive circuit 4 includes a plurality of scan electrode drive ICs, and the dynamic range of each scan electrode drive IC is controlled by a scan electrode control circuit 5 corresponding to each IC. .

FIG. 2 shows an example of the scan electrode control circuit 5 used in this embodiment. The scan electrode control circuit 5 includes a scan electrode control circuit 51 corresponding to the scan electrode drive ICs 41 to 44.
To 54. Each scan electrode control circuit 5
1 to 54 detect whether or not the scan electrode driving ICs 41 to 44 are outputting a scan signal based on the scan electrode control pulses STV and SO1 to SO4 input and output to the scan electrode drive ICs 41 to 44, respectively. YM4 is output to control the operation mode of the corresponding scan electrode driving ICs 41-44.

Hereinafter, the operation of scan electrode control circuit 5 will be described in detail with reference to FIGS. First, TFT-LCD
The first scan electrode Y1 to the n-th scan electrode Y of the panel 1
The scan electrode drive IC 41 that drives n is controlled by the scan electrode control circuit 51. The pulse STV indicating the start of scanning is
At the same time as being input to the scan electrode drive IC 41, it is also supplied to the scan electrode control circuit 51 to inform the scan electrode control circuit 51 that the scan electrode drive IC 41 has entered the write mode. As a result, the scan electrode control circuit 51 sets the mode signal supplied to the scan electrode drive IC 41 to the H level, and simultaneously sets the Vss potential supplied to the scan electrode drive IC 41 to the ground potential GND level to select the scan electrode drive IC 41.
Supply to By doing so, the scan electrode driving IC 4
1 is the ground potential GND of the same IC with respect to the ground potential GND level
A scanning signal can be supplied to the TFT-LCD with the maximum potential on the plus side with respect to the level as the scanning electrode drive level (writing level).

For example, when TMC57466 manufactured by Texas Instruments is used as the scan electrode driving IC, the maximum potential + on the plus side with respect to the ground potential GND level.
It can output 30 [V] (Reference: Texas Instruments Japan, Inc., TFT gate driver user's manual TMC57466).

The scanning electrode driving IC 41 is connected to the scanning electrode Y.
n, the scanning electrode driving IC 42 of the next stage is completed.
When the pulse SO1 indicating the start of scanning is output, the pulse SO
1 is input to the next-stage scan electrode drive IC 42 and simultaneously to the next-stage scan electrode control circuit 52, and is also input to the scan electrode control circuit 51 at the same time to set the scan mode of the scan electrode control circuit 51 to the hold mode. I do. Scan electrode control circuit 51
Becomes the holding mode, the mode signal supplied to the scanning electrode driving IC 41 becomes L level, and at the same time, the Vss potential supplied to the scanning electrode driving IC 41 is selected by supplying a negative holding potential (−10 [V]). I do.

Therefore, when the writing operation of the IC itself is completed, the scanning electrode driving IC 41 outputs a holding potential to be supplied to the scanning electrode of the TFT-LCD and a minus holding potential (−10 [V]) from the ground potential GND level. . That is, the scanning electrode driving IC can output the plus potential maximum potential +30 [V] as the writing potential during the writing operation, and can output the negative holding potential −10 [V] during the holding operation. , A dynamic range of an output voltage of 40 [V] exceeding 30 [V], which is the maximum value of the withstand voltage characteristic, can be realized.

By repeating the same mode control for the subsequent scan electrode driving ICs, the dynamic range of the withstand voltage characteristic of the scan electrode driving IC is expanded, and the writing and holding operation can be realized. FIGS. 3A and 3B show examples of scan signals when the scan electrode drive circuit 4 of FIG. 1 and the scan electrode control circuit 5 of FIG. 2 are used.

FIG. 4 shows a TFT-LCD panel 1 when the output dynamic range of the scan electrode driving circuit 4 is expanded.
Shows the potential of each electrode. In FIG. 4A, + Vsig indicates the positive potential of the AC-converted display signal, -Vsig indicates the same negative potential, Vsc indicates the center potential when the display signal is AC-converted, and Vg indicates the scanning signal waveform. FIG. 4B is a waveform showing a pixel potential Vp which is a display signal held in the pixel, and FIG. 4C is a waveform showing a potential difference Vg-Vsig between the pixel potential and the scanning signal waveform Vg.

In this embodiment, unlike FIG. 18 (c), as shown in FIG. 4 (c), at the time of writing, the potential difference Vgs between the gate and the pixel electrode is shifted to the plus side as compared with the normal case. The conduction characteristics of the TFT are improved. Further, during the holding operation, the potential difference Vgs between the gate and the pixel electrode is shifted to the minus side as compared with the normal case, and the holding operation of the TFT is improved. Therefore, the TFT-LCD panel 1
The writing / holding characteristics of the liquid crystal display are improved, high-quality display is realized, and deterioration of the liquid crystal can be prevented. (Embodiment 2) FIG. 5 is a diagram showing a configuration example of a scan electrode control circuit 5 used in a second embodiment of the present invention. This is an embodiment in which both the operating potential of the scan electrode drive circuit 4 and the ground potential are variable.

In the case of this embodiment, the operation of scan electrode control circuit 5 is performed in the same manner. First, when the scan electrode drive IC 41 starts scanning, the corresponding scan electrode control circuit 51 enters the scan mode, and the plus potential VDDh of the scan mode is selected from the scan electrode control circuit 51, and the scan electrode drive IC 41 On the plus side of the scanning potential, the minus potential Vssh of the scanning mode is supplied to the ground potential of the scanning electrode driving IC 41. Next, at the same time when the scan of the scan electrode drive IC 41 is completed, the scan electrode control circuit 51 enters the hold mode, and the plus potential VDD1 of the hold mode is selected to be on the plus side of the ground potential of the scan electrode drive IC 41. The negative potential Vss1 is supplied to the ground potential of the scan electrode driving IC 41.

Therefore, by using the embodiment shown in FIG. 5, the scan electrode driving circuit 4 can control the potential 35 in the scan mode.
[V] and the potential of −10 [V] in the holding mode can be output, and the output dynamic range of the scan electrode drive circuit can be further expanded as compared with the embodiment of FIG.

Further, by forming a level shift circuit using the ground potential Vss (n) of the scan electrode drive circuit 4 selected in FIG. 5, the scan pulse applied to the scan electrode drive circuit 4 is switched between the scan mode and the scan mode. Since the potential can be shifted between the holding mode and the holding mode, a wider output dynamic range can be obtained.

FIG. 6 shows a configuration example of the level shift circuit in the present embodiment. In the configuration of FIG. 6, the scan electrode driving circuit 4
L level (logic 0) of the scan pulse applied to
Since ss (n) can be clamped, the scan pulse potential applied to the scan electrode drive circuit 4 can be changed no matter how the power supply potential applied to the scan electrode drive circuit 4 changes.
Can be suppressed within the withstand voltage characteristic of FIG.

Therefore, by combining the level shift circuit as shown in FIG. 6 and the scan electrode control circuit as shown in FIG. 5, even in the scan electrode drive circuit of the single power supply operation, Vss (n) is used in the scan mode. Is set to a plus potential, and in the holding mode, Vss (n) is set to a minus potential to shift the level of the scanning pulse to the same potential, thereby enabling both plus and minus power supply operations. (Embodiment 3) FIG. 7 is a diagram showing a configuration example of a scan electrode control circuit 5 used in a third embodiment of the present invention. This corresponds to the scan mode potential VDD (n) applied to the scan electrode drive circuit 4.
And the holding mode potential Vss (n) are composed of a plurality of potentials, which can be sequentially applied. In FIG. 7, the range between the high voltage side potential VDDh in the scanning mode and the high voltage side potential VDD1 in the holding mode is divided into four, and similarly, the low voltage side potential Vssh in the scanning mode is shifted from the high voltage side potential Vss1 in the holding mode. The interval is divided into four and the scanning electrode driving circuit 4 is sequentially divided.
2 shows an example of a case where voltage is applied to a.

In the embodiment shown in FIG.
However, the scan electrode driving IC corresponding to the scan electrode control circuit starts operation several lines before scanning starts, and sequentially starts from the holding potentials VDD1 and Vss1 for each certain scanning line and starts at the scanning potential VDDh.
And the potentials of VDD (n) and Vss (n) are applied to the scan electrode driving circuit 4 while selecting the potentials on the Vssh side. Then, when the scan electrode driving IC completes the scanning, the holding potentials Vss1 and VDD1 are sequentially applied from the scanning potentials VDDh and Vssh for each fixed scanning line.
This circuit applies the potentials of VDD (n) and Vss (n) to the scan electrode drive circuit 4 while selecting the potential.

In this case, VDD (n) is the VDD (n) selection circuit 5
11, and Vss (n) is selected by the Vss (n) selection circuit 5.
The selection circuit 511 and the selection circuit 512 are controlled by the same counter circuit 513. Therefore, Vss selected simultaneously from the selection circuits 511 and 512
The potential difference between (n) and Vss (n) needs to be within the withstand voltage characteristics of the scan electrode drive circuit 4, but can be set arbitrarily as long as it is within the withstand voltage characteristics. Therefore, by adopting the configuration as shown in FIG. 7, the electrical stress applied to the scan electrode driving circuit 4 can be reduced, and the electrical stress applied to the TFT-LCD panel 1 can be reduced.

As described above, by using the scanning electrode control circuit as shown in each embodiment of the present invention, the writing and holding characteristics of the TFT-LCD panel are improved and the TFT-L of high image quality is improved.
The CD can be realized and the deterioration of the liquid crystal can be prevented.
The above-described embodiment shows that the writing and holding characteristics of the TFT-LCD panel are improved by the scanning electrode and the scanning electrode control circuit. Therefore, the present invention is not limited by the configuration of the display signal electrode, the AC conversion method of the display signal applied to the TFT-LCD panel, and the content of the display signal.

Next, an embodiment according to the second aspect of the present invention will be described.

First, what factors determine the power consumption of the drive circuit (module circuit) will be examined. Here, power consumption does not include power consumption due to a bias current flowing in a DC manner. The drive circuit is basically divided into a signal line drive circuit, a buffer circuit, a control signal generation circuit, a common drive circuit, and a gate line drive circuit. Each is described in detail below. (1) Signal line drive circuit This is a drive IC for driving a signal line, which is divided into a digital system and an analog system. Since the OA image is digital, the power consumption of a digital system with good consistency is reduced. consider.

A digital driving IC basically includes a shift register for determining a signal sampling time, a latch circuit for latching a digital signal, a D / A conversion circuit for converting a digital signal to an analog signal, and an output for driving a signal line. It consists of a buffer. Here, since the factors that determine the power consumption are the latch circuit and the output buffer, only these two factors are considered.

The maximum power consumption P ₁ of the latch circuit, C ₁ input equivalent capacitance to an image signal, the input equivalent capacitance regarding sampling clock C _ck, the sampling frequency of the image when the _{f s, P 1 = (C} 1 + 2C _ck) represented by _{× (f s / 2) ×} V 1 2 ... (1).

The maximum power consumption P _ob of the output buffer is represented by P _oh = N _h × C _s × f _h × V, where C _s is the signal line capacity, f _{h is the} horizontal drive frequency, and N _h is the number of horizontal pixels. _s represented by the ^2/2 ... (2). (2) Buffer circuit The buffer circuit receives the input digital signal, removes noise and shapes the waveform, and supplies a stable signal to the signal line driving circuit. In some cases, the buffer circuit is omitted. Therefore, it should be considered. Maximum power consumption P of buffer circuit
_b, when the input equivalent capacitance of the circuit to a clock f _s C _bc, the input equivalent capacitance of the circuit relating to image signals and _{C bp, P b = (2C} bc + C bp) × (f s / 2) × V b 2 … Expressed by (3). (3) control signal generating circuit which is basically gate arrayed, because although the interior of the frequencies are different by a signal, power consumption mainly related to the sampling clock f _s of the image is considered to be an important factor, maximum power consumption P _ga of the entire gate array clock f _s the equivalent internal capacitance of the circuit relating to C _gac, the input equivalent capacitance of the circuit relating to image signals when the _{C ga p, P ga = (} 2C gac + C gap) × ( f _s / 2) × V _ga ² (4) (4) common drive circuit which is for driving the common capacitance C _c, the maximum power P _c of the common drive circuit, when the driving frequency of the common and f _c of (common inversion, f _c is (Half the horizontal drive frequency f _h ), P _c = C _c × f _c × V _c ² (5) (5) a gate line driver circuit which is for driving a capacitive C _g of the gate line,
The maximum power consumption P _g of the gate line driving circuit is P _g = C _g × f _h × V _g ² , where f _{g is} the driving frequency of the gate line (normally, the horizontal driving frequency f _h ).
… Expressed by (6). (6) the power consumption of the entire circuit from the consumption or power P _all of the whole circuit P _all the _{P all = P l + P ob} + P b + P ga + P c + P g = (C l + 2C ck) × (f s / 2) × ^{_{V l 2 + N h × C}} s × f h × V s 2/2 + (2C bc + C bp) × (f s / 2) × V b 2 + (2C gac + C gap) × (f s / 2) × in ^{_{V ga 2 + C c × f}} c × V c 2 + C g × f h × V g 2 where the common is the N ^h × C _s >> C _g at a constant _{voltage, P all = (C l +} 2C ck + 2C _{bc + C bp + 2C gac +} C gap) × (f s / 2) × V 2 + N h × C s × (f h / 2) × V 2 = P all (C, f, V) ... (7) , and the capacitance It is a function of C, drive frequency f (horizontal frequency and image clock frequency), and voltage V.

Here, the capacitance C is determined by the device structure, the voltage V is determined by the IC and the liquid crystal panel structure such as the process and the VT characteristics of the liquid crystal, but the frequency f is determined by the system and image quality such as the horizontal scanning frequency and flicker characteristics of the image. It can be lowered by the driving method. However, when the normal driving frequency is reduced, even if the off-leak current of the TFT is the same, the holding time is long, so that the drop in the pixel potential becomes large, and the flicker component increases, and the frequency of the flicker component also decreases. It becomes easier to see and causes significant image quality degradation.

Therefore, a driving method (MF driving method) for lowering the driving frequency by dividing one field image into an odd number of subfields has recently been proposed (Japanese Patent Application No. 2-69706).

FIG. 14 is a conceptual diagram of the MF driving method. First, a driving method at the time of displaying the m-th frame will be described. First T
_{During the f} / 3 period, as shown in FIG.
, N, N + 3, N + 6,... Lines are driven, and signal line inversion driving is performed such that a positive polarity image signal is applied to odd-numbered signal lines and a negative polarity image signal is applied to even-numbered signal lines. The following T _f / 3 period, as shown in FIG. 14 (b) 2,5, ..., N + 1, N + 4, N + 7, ... lines, the next T _f / 3 period as shown in FIG. 14 (c) 3,6
.., N + 2, N + 5, N + 8,. In the next T _f / 3 period, the driving line returns to its original state, and FIG.
, N, N + 3, N +
6,..., But the polarity is opposite to that of FIG. After that,
Since (b) and (c) have only reversed polarities, the description is omitted.

When the above-described driving is performed, the state of the flicker component is analyzed. First, as causes of flicker, (1) shortage of ON current, (2) TFT penetration voltage, and (3) TFT OFF current can be considered, but (1) and (2) can be dealt with by array structure and penetration correction drive. However, regarding (3),
Considering that the MF driving in principle makes the holding time of the TFT longer than that of the normal driving, this characteristic is larger than usual and affects the flicker characteristics unless the OFF characteristics including the light leakage of the TFT are perfect. It is thought to give. Therefore, the analysis mainly focuses on the factor (3).

The potential fluctuation waveform of the pixel is approximated as shown in FIG. That is, since when driving in a positive polarity hold good variation of V _p, occurs a potential change only between one field Vn (> Vp) the holding is poor when driving with a negative polarity And At this time, the potential i (t)
I (t) = Vs + Vn− (2Vnt / π) (0 ≦ t ≦ π) i (t) = Vs + Vp− (2Vpt / π) (−π ≦ t <0) (8) Actual transmission The rate change requires multiplying the above response by the response characteristic of the liquid crystal on the frequency axis. However, since the response characteristic is a complicated characteristic depending on the potential level, only the potential variation of the pixel is analyzed as a luminance change. .

When this is expanded by Foué, Here, a fundamental wave component (30 Hz) important as flicker
Considering only k = 1, F ₃₀ = (4 / π ² ) (Vn−Vp) (10) That is, each pixel has a spectrum of F ₃₀ as shown in FIG. 15B as a flicker component. Will be. As a method of removing this flicker component, (1) the luminance change i (t) itself is set to a high frequency.

(2) Compensation is performed using adjacent pixels.

Usually, the method (1) is not often used because the speed of the pixel signal is increased. The line inversion (common inversion) and the signal line inversion are compensated by two pixels in the method (2). This case will be described in detail.

First, since signals of opposite polarities are inputted to adjacent pixels in any method, the average luminance i _a (t) of two pixels is obtained.
Is represented by the following equation.

I _a (t) = i (t) + i (t−π / ω ₀ ) (11) ω ₀ = π / T _f This is Fourier-transformed and I _a (ω) = I (ω) {1-exp (jωπ / ω ₀ )} (12) Therefore, I _a (W _O ) = 0, and the flicker component can be completely removed.

The above is the case where the number of compensation pixels is two,
In the MF drive proposed by the present inventors, the compensation pixels are expanded to N pixels.
_a (t) and the Fourier transform I _a (W) are It is.

The case where the flicker component is compensated by three pixels will be described below as an example. FIG. 16 shows the transmittance change i (t) of each of the three pixels obtained from the equation (8) by a solid line, a dashed line, and a dotted line.
_a (t). FIG. 1 shows the frequency spectrum.
FIG. As is clear from FIG. 16, if the transmittance changes i (t) of the pixels compensated for each other are the same, the flicker component which was originally 2T _f (T _f : field period = 1/60 second) is reduced by 3 Since 2T _f / 3, that is, 1/90 second, which is 1/3 cycle, can be obtained by pixel compensation.
It will not be seen as flicker. This means that, as seen from the frequency spectrum, the phases of the spectra of the respective pixels are shifted by 120 degrees, as is apparent from Expression (13), so that the components are added in a vector manner, and the components disappear. Using this principle, 3,5,7, ..., 2N
+1... Pixels, that is, odd-numbered pixels can be similarly compensated. The driving frequency can be reduced as the number of pixels that can be compensated is increased, so that power consumption can be reduced.

- 0058] In general, MF power P _MF driving the relational expression for determining power consumption than _{(7), P MF = (} C l + 2C ck + 2C bc + C bp + 2C gac + C gap) × {f s / 2 (2N + 1 )｝ × V ² + N _h × C _s × {f _h / 2 (2N + 1)} × V ² = P _all / (2N + 1) (15) As is apparent from this equation, it depends on the driving frequency of the module circuit. Since power consumption can be reduced to 1 / (2N + 1), power consumption can be significantly reduced.

Based on the analysis results of the MF drive, an experiment was conducted on the flicker reduction effect using an actual panel. This time, because it is a basic experiment, N = 1, that is, the number of subfields is 3.
1) Normal drive (60 Hz) 2) When the drive frequency is simply lowered (20 Hz drive) 3) For MF drive (N = 1), a gray level with a transmittance of 50% is displayed, and the time change of the transmittance with a photodetector Is detected. The detected time change is converted into a frequency component by an FFT analyzer, and the degree of the fundamental wave component of 20, 40, 60 Hz is analyzed and evaluated.

Normal drive, 20 Hz drive, MF drive (N =
The results of measuring the relative level of the flicker component with respect to the average luminance for 1) are shown in the following (Table 1). Table 1 shows the following.

[0061]

[Table 1] (1) When the drive frequency is lowered to 20 Hz, 20, 40, 60, 80,... Occur as expected as flicker components.

(2) As expected, the 20 Hz component has disappeared due to the MF drive, and has been converted into a triple 60 Hz component.

(3) For the 60 Hz component, the normal drive and the MF drive are at the same level, and the image quality deterioration due to flicker is almost the same as that of the normal drive.

As described above, the MF driving method is a very effective method for surface flicker. However, since the holding time is greatly increased, as shown in (Table 1), each pixel ( Usually, the flicker component of each line becomes large. For this reason, horizontal stripes generated in each field are visually recognized, and aliasing distortion caused by a difference between positive and negative holding characteristics causes deterioration in image quality of a still image. These are all called line disturbances. In addition, in the MF driving method, since the response of the liquid crystal is poor when displaying a moving image, and the interval at which one pixel is driven is longer than one field, the interlace causes disturbance in which the image is disturbed in a comb shape. Image quality has deteriorated.

In order to solve this problem, the present invention is characterized in that there is provided a gate voltage varying means for changing a gate voltage of a thin film transistor acting as a switch for writing an image signal in accordance with a writing time or a holding time.
Hereinafter, embodiments of the present invention will be described. (Embodiment 4) FIG. 8 shows a circuit configuration in a fourth embodiment of the present invention, and FIG. 9 shows a signal waveform at this time. In the figure, reference numeral 81 denotes a liquid crystal panel, 82 denotes a signal line driver, 83 denotes a gate driver, 84 denotes a control signal generator, 85 denotes a control amount detection circuit, 86 denotes a scanning method variable circuit, and 87 denotes an image selection circuit. In this embodiment, a still image / moving image detecting circuit that detects whether a signal of one scanning line or one pixel of an image is changing is used as the control amount detecting circuit 85 in FIG. There are various methods for detecting a still image and a moving image, and examples thereof will be described below.

(1) If one pixel of one scanning line changes by at least one threshold Sth1 in one field period, the scanning line changes, that is, is detected as a moving image.

(2) Among the pixels constituting one scanning line, if there is a pixel which has changed by more than a threshold Sth2 in one field period, the scanning line changes if there is a second threshold Sth3 or more. Detect as a movie.

(3) If a pixel constituting one scanning line is weighted and added to the amount changed during one field period, the scanning line changes, that is, is detected as a moving image if the scanning line changes by a threshold Sth4 or more. .

(4) When displaying a moving image in a window, the file itself may have a moving image or a still image (or a text file) as an identifier from the beginning, and in that case, the information is sent. Or, once it is sent, it can be held in memory until it changes or only that part can be switched without having a detection circuit.

In addition to the examples described above, the detection method can be changed in consideration of the combination and the frequency of the change, and the weight can be changed by the visual characteristics of the eyes.

Based on the detection result, a gate is applied to the video signal, and a gate driver of the TFT is controlled.
That is, scanning signals (N, N + 3,... In this embodiment) that scan in the field are scanned, but scanning signals that are not scanned are scanned only when the scanning line is a moving image. (Usually a gate driver clear signal or output enable signal). This example shows a case where scanning is performed at a high level and scanning is not performed at a low level. In this embodiment, the gate is gated so as not to be input to the signal line driver when the image signal is not scanned, but when the signal line driver does not scan, the clock is stopped. And can be omitted.

In this embodiment, the scanning method is controlled by detecting a still image and a moving image. In addition, the ON / OFF characteristics of the TFT, such as the temperature, the amount of incident light, and the polarity of the display image signal, are controlled. Signals that affect power consumption, such as signals that affect power, remaining battery power, time you want to use, and remaining time of software,
The scanning method including the gate scanning time, the holding time, the number of interlaced scans, and the like can be changed. In other words, when used in portable equipment, power consumption is more important than image quality. Therefore, by setting a low power consumption mode, this still / moving image detection circuit may not be operated.

Similarly, in order to further reduce the power consumption, a signal for detecting the remaining amount of the battery and a power consumption mode switching signal (a method of reducing the amount of light of the backlight to reduce the power consumption) has been put to practical use. However, since the light leakage of the TFT is reduced by reducing the amount of light, the holding time can be prolonged, which is also included in this case).
What was line by line, 5 lines, 7 lines and 2N +
Increasing the scanning interval at intervals satisfying 1 (N is an integer) can also be applied without departing from the scope of the claims. Although an analog signal is used as a video signal for easy explanation, a digital signal can be considered in the same manner. (Embodiment 5) FIG. 10 shows a circuit configuration in a fifth embodiment of the present invention, and FIG. 11 shows a signal waveform at this time. In the fourth embodiment, when the scanning signal is thinned out by the MF driving and scanning is performed, the driving is performed in the same driving time as the normal driving, and when the other lines are still images, the remaining time is rested. On the other hand, the present embodiment is characterized in that the ON time of the TFT is improved by increasing the driving time for a still image. This seems to be a problem with the ON characteristics in the case of moving images, but in the case of moving images, the human eye characteristics are worse than for still images at high spatial frequencies. It doesn't get worse.

In this case, since time axis conversion must be performed, one line memory or frame memory is used.
This can be realized by reading out the line later in one or more lines. Further, by detecting the ratio between the moving image and the still image, the driving time can be evenly allocated. That is, assuming that the number n of all the scanning lines scanned in the field is the number m of moving images among the scanning lines excluding the scanning lines scanned in the field, and that one field period Tf, Ts = Tf / (n + m). If the drive period Ts is determined in advance, the drive time can be ensured regardless of the moving image / still image. At this time, a method of simplifying a circuit system such as making Ts an integer multiple of Tf / n is also conceivable.

FIG. 10 shows a case where one out of three scanning lines is normally scanned, and in the case of a moving image, the scanning lines are also scanned. .. Are scanned in the order of lines N, N + 3, N + 6,... Since the N + 1 and N + 2 lines are still images, the scanning time is tripled. That is, the horizontal clock frequency is controlled to be 1/3 and the gate scanning period is tripled. Next scan N + 3
In this case, since N + 4 is a moving image, two lines must be driven.

In this embodiment, since the image quality is not deteriorated even if the resolution of the moving image is low, the horizontal clock frequency of the still image is doubled by setting the scanning period of the still image to 2 times and the moving image to 1 time. The control is performed so that the gate scanning period is doubled and the moving image is doubled for both. However, as described above, the horizontal clock frequency can be increased to 2/3 and the gate scanning period can be increased 1.5 times in the same manner for both still images and moving images, and can be changed depending on the drive polarity.
When the speed of the moving image is low, a method of processing the moving image as a still image is also conceivable.

Further, when a moving image is displayed in a window, the resolution of the moving image is lower than that of a still image outside the window, the still image is displayed on the entire display, and the moving image is displayed. This is an example of a case where it is desired to reduce the display speed by utilizing the fact that the visual characteristics deteriorate with respect to the resolution. In the fifth embodiment, non-interlaced driving is performed during moving images. In this case, a large number of scanning lines are simultaneously driven during moving images, so that the driving frequency for display can be reduced and power consumption can be reduced. For example, this corresponds to a case where a moving image of about NTSC is displayed on a screen of a workstation, and at this time, two lines or four lines are driven simultaneously. (Embodiment 6) FIG. 12 shows a gate drive voltage and a timing chart in a sixth embodiment of the present invention.

In the above example, the gate driving time is controlled. However, in this embodiment, when the driving time decreases in the case of a moving image and the image holding time increases in the case of a still image, the gate ON level and the OFF state are controlled. Controlling the level will be important. That is, when displaying a moving image, the time (O
When N time is short, the gate voltage is increased, and for a still image (that is, when the holding time is long), the OFF level is decreased. This can be easily performed by controlling the voltage when the withstand voltage of the driving IC is high, but when the withstand voltage exceeds the withstand voltage, it is necessary to turn on the power supply of the IC. It is preferable that the timing of these changes be changed to a period during which no image signal is output so as not to affect the image signal. In FIG. 12, the fifth
N and N + 3 lines of a still image and N +
Assuming that the breakdown voltage is sufficiently large between the four lines, the ON and OFF levels are changed without changing the amplitude. If the withstand voltage of the drive IC is not large enough,
The power supply voltage of the drive IC must be changed. In that case, even if the power supply voltage is changed for each line, all the ICs that are changing the power supply voltage have the same power supply voltage. Need to be sacrificed. However, if the control is carried out completely in one-screen still image and moving image modes, the power supply voltage will fluctuate in each field or more, so that there is a sufficient effect when still images and moving images are displayed continuously.

Next, how the gate voltage should be controlled will be described. We confirmed a phenomenon in which line-shaped interference fringes flow when MF driving is actually performed based on the amount of flicker in normal driving (the minimum frequency spectrum when the field frequency is simply lowered). However, it has been found that this interference fringe is not optimal when the flicker amount during normal driving is the lowest, and that it is harder to see if it is somewhat bad.

In the above embodiment, the gate voltage is controlled in a still image or a moving image. However, even in a still image, when the driving time is varied in accordance with the amount of light leakage or the like, the present invention is not deviated from the scope of the present invention. Can be changed.

FIG. 13 shows the relationship between the amount of flicker and whether or not a line-shaped interference fringe has been detected. From this figure, it can be seen that the optimal value of flicker is that the flicker amount with respect to the average luminance is -30.
It turned out that it was a time of dB or more. That is, if the line flicker is large to some extent, it becomes noise and the line stripe cannot be recognized, but if the line flicker is small, the line stripe can be seen clearly, which makes it easy to recognize. However, if the size is further reduced to -40 dB or less, the fringes themselves become invisible. Therefore, if the OFF characteristics of the TFT and the diode are greatly improved, the gate voltage is increased so as to improve the OFF characteristics rather than increasing the flicker. A lowering method is considered effective.

In the above embodiment, the ON / OFF level of the gate is made variable by automatically generating a certain control amount. In this embodiment, the control terminal is arranged outside the apparatus and can be made manually variable. It is. The gate voltage level cannot be moved from outside by normal driving, but in MF driving, whether or not line-shaped stripes are visible depends on individual differences, the number of scanning lines scanned in one field period, and temperature. It changes depending on the external environment such as. Therefore, a structure that can be manually changed from the outside is desirable. Further, with the structure in which the number of scanning lines can be manually changed, the gate signal can be changed in conjunction therewith. Since the present invention has means for changing the gate signal, there is almost no additional circuit due to this structure. In addition, in the case of a display device that is used only for a still image, it is preferable that the off-state voltage be lower than the optimal off-level of the gate voltage for a moving image.

[0083]

As described above , according to the present invention, the dynamic range of the scanning signal drive circuit is expanded equivalently, and the write characteristics of the switching element due to the narrow dynamic range inherent to the scan signal drive IC are reduced. By preventing the deterioration and the deterioration of the holding characteristics, it is possible to prevent the deterioration of the image quality such as the burn-in of the displayed image and the flicker, and also prevent the deterioration of the liquid crystal, thereby realizing a liquid crystal display device with high image quality and long life. Further, the present invention is not limited by the configuration of the display signal electrode, the AC conversion method of the display signal to be applied, and the content of the display signal, and any TFT-LCD using a scan electrode driving IC can be applied.

Further , according to the present invention, it is possible to suppress an increase in flicker, burn-in, line disturbance, aliasing, and the like due to an off-leak current when the retention time of a pixel switch such as a TFT becomes long. Since the characteristics can be changed, it is possible to compensate for individual differences in the appearance of line disturbance and changes in characteristics due to time, temperature, and the like, thereby realizing a high-quality liquid crystal display device. .

Further, by providing a means for changing the holding time depending on the amount of light leakage, the driving frequency can be optimally reduced, so that power consumption can be reduced. Furthermore, in the case of still images, lowering the gate off-level eliminates image quality degradation even if the holding time is extended, thereby reducing power consumption. Can be

[Brief description of the drawings]

FIG. 1 is a block diagram showing a basic configuration of a liquid crystal display device according to a first embodiment.

FIG. 2 is a diagram illustrating an example of a scan electrode control circuit used in the first embodiment.

FIG. 3 is a diagram illustrating an example of a scan signal when a scan electrode drive circuit and a scan electrode control circuit according to the first embodiment are used.

FIG. 4 shows a TFT-LCD according to the first embodiment in which the output dynamic range of the scan electrode drive circuit is expanded.
The figure which shows the electric potential of each electrode of a panel.

FIG. 5 is a diagram showing a configuration example of a scan electrode control circuit 5 used in the second embodiment.

FIG. 6 is a diagram illustrating a configuration example of a level shift circuit according to a second embodiment.

FIG. 7 is a diagram illustrating a configuration example of a scan electrode control circuit used in a third embodiment.

FIG. 8 is a diagram illustrating a circuit configuration according to a fourth embodiment.

FIG. 9 is a diagram showing a gate driving voltage and a timing chart in a fourth embodiment.

FIG. 10 is a diagram illustrating a circuit configuration according to a fifth embodiment.

FIG. 11 is a diagram showing a gate drive voltage and a timing chart in a fifth embodiment.

FIG. 12 is a diagram showing a gate drive voltage and a timing chart in a sixth embodiment.

FIG. 13 is a diagram showing the relationship between the amount of flicker and whether a line-shaped interference fringe has been detected.

FIG. 14 is a view showing the concept of the MF driving method.

FIG. 15 is a diagram showing a potential fluctuation waveform and a flicker component of a pixel.

FIG. 16 is a diagram illustrating a flicker component during MF driving.

FIG. 17 is a diagram showing a frequency spectrum of a luminance change.

FIG. 18 is a diagram showing a potential waveform of each electrode in frame inversion driving generally used for performing AC driving.

FIG. 19 shows a TF used as a switching element
The figure which shows the general characteristic of T.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 TFT-LCD panel 2 Upper display signal electrode drive circuit 3 Lower display signal electrode drive circuit 4 Scan electrode drive circuit 41-44 Scan electrode drive IC 5, 51-54 Scan electrode control circuit 511 VDD (n) Selection circuit 512 ... Vss (n) Selection circuit 513 ... Counter circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-204331 (JP, A) JP-A-5-341738 (JP, A) JP-A-7-36016 (JP, A) JP-A-1- 140198 (JP, A) JP-A-4-271391 (JP, A) JP-A-4-80790 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G02F 1/133 550 G02F 1/1368 G09G 3/36

Claims (3)

(57) [Claims] A plurality of signal lines and scanning lines arranged in a direction intersecting with each other; pixel electrodes provided in a matrix at each intersection of these lines; And a switching element controlled by a scanning line between the liquid crystal display devices.
Te, the run is in the write operation of the display signal to the pixel electrode
By supplying a first potential to the scanning line, the switching element
The display signal written to the pixel electrode.
During the holding operation, a second potential lower than the first potential is applied to the scanning line.
The switching element is cut off by supplying the potential of
Driving means for driving the first potential and the second potential during the writing operation of the display signal .
Are both shifted in the plus direction, and both the first potential and the second potential are mapped during the holding operation of the display signal .
A liquid crystal display device characterized in that a scanning signal control means for shifting the Inasu direction. 2. A method according to claim 1, wherein a plurality of signal lines and scanning lines are arranged in a direction intersecting with each other, pixel electrodes are arranged at intersections of these lines and arranged in a matrix. A thin film transistor provided between the gates and connected to a scanning line to serve as a switch for writing a pixel signal to a pixel electrode, and an on-time in one scan of the gate of the thin film transistor , indicating whether a displayed image is a still image or a moving image. And a gate signal varying means for varying each scanning line in accordance with the detection signal of (1). 3. A plurality of signals arranged in a direction crossing each other.
No. and scanning lines, and are provided at each intersection of these lines.
Pixel electrodes arranged in a matrix, and each pixel electrode
And the signal line, and the gate is connected to the scanning line.
Connected to write a pixel signal to the pixel electrode.
Thin film transistors that act as switches
The on-period of the interlace scanning of the gate of the
For each scanning line according to the detection signal of whether the display image is a still image or a moving image
Japanese to become comprises a variable gate signal varying means
Liquid crystal display device.