JP3305931B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device which performs display by using pixels arranged in a matrix, and more particularly, to a pixel writing mechanism in which a pixel selecting operation and a pixel writing operation or a pixel signal storing operation are performed. The present invention relates to a liquid crystal display device that is configured to be divided into pixel writing operations so that a plurality of pixels can be written at the same time.

[0002]

2. Description of the Related Art Liquid crystal display devices are widely used in wristwatches, calculators, word processors, personal computers, small game machines, etc., because they are thin and lightweight and can be driven at low voltage. Recently, the need for a pen-input electronic notebook has increased, and the demand for a portable terminal (PDA) has been increasing.

On the other hand, when a plurality of displays are to be displayed on the same screen as multimedia becomes more advanced, it is necessary to increase the screen size and increase the definition. And the driving frequency of the display device must be increased. Furthermore, when a moving image display that moves at a high speed such as a television image and a still image display that requires little rewriting such as an OA image are displayed on the same screen, a liquid crystal material having a high response speed is required. In addition, a display method for reducing power consumption is required.

As liquid crystal materials capable of high-speed response, there are ferroelectric liquid crystals, reverberant dielectric liquid crystals, and the like, and a method of driving by simple matrix driving is widely used. However, in order to drive the ferroelectric liquid crystal, in a simple matrix drive, there is a gap between a row electrode line and a column electrode line.
[V] or higher voltage must be applied.

In practice, a row voltage is set around a threshold voltage, and a signal indicating whether or not the threshold voltage is exceeded is applied to each pixel by a column voltage. Controlling voltage. However, since the signal amplitude indicating whether or not the threshold level is exceeded is large, a high withstand voltage driver and a driver that can operate at high speed are used. Therefore, not only the driver development but also the power consumption increases.

On the other hand, twisted nematic liquid crystal (hereinafter referred to as T
N), it is necessary to invert the polarity of the liquid crystal for each frame, and since the holding characteristics of the pixel electrodes are different between the upper and lower parts of the screen, problems such as crosstalk occur.

[0007] In addition, in a display in which a TFT and a ferroelectric liquid crystal are combined, polarization is generated by accumulating charges generated by spontaneous polarization of the ferroelectric liquid crystal in an alignment film or the like. This causes image quality deterioration such as a decrease in contrast and a residual previous signal.

[0008] Further, Polymer Stabiliz
When a liquid crystal material having a low response speed such as ed Cholesteric Texture (hereinafter, referred to as PSCT) is used, the writing characteristics are different between the upper and lower portions of the screen, and the writing time to the pixel electrode is restricted, and the vertical pixels are restricted. The number will be limited.

Since the driving is performed line-sequentially, there is no distinction between a portion having a high driving frequency such as a moving image and a portion having a low driving frequency such as a still image. Since the power consumption is required every time, the power consumption increases as the number of pixels increases.

As for still images, a multi-field driving method for reducing power consumption by lowering the driving frequency (for example, Japanese Patent Application No. 2-69706) has been proposed, but an afterimage phenomenon occurs in moving images. And other problems.

[0011]

With the spread of multimedia, a display device for displaying an image is required to have a large screen and high definition, and the amount of information for image display also increases accordingly. However, the driving frequency of the display device must be increased. Furthermore, when a moving image display such as a television image that moves at a high speed and a still image display such as an OA image that requires little rewriting are displayed on the same screen,
While a liquid crystal material having a high response speed is required, a display method for reducing power consumption is required.

As a liquid crystal material capable of high-speed response, there are a ferroelectric liquid crystal, an echo dielectric liquid crystal and the like, and a method of driving by a simple matrix drive is widely used. However, in order to drive the ferroelectric liquid crystal, a voltage of 20 [V] or more is applied between a row electrode line (row scan line) and a column electrode line (column drive line) in simple matrix driving. Must be applied.

In practice, a row voltage (row scan line applied voltage) is set around a threshold voltage, and a signal as to whether or not the threshold voltage is exceeded by a column voltage (column drive line applied voltage) is provided for each pixel. To control the voltage between the electrodes sandwiching the liquid crystal layer.

However, even if this method is used, the signal amplitude for determining whether or not the voltage exceeds the threshold voltage is large.
A driver capable of operating at high speed with a high withstand voltage is used. Therefore, power consumption increases, and from the viewpoint of energy saving, development of a technology that can save power is desired.

On the other hand, in a TFT-LCD using TN, it is necessary to invert the polarity of the liquid crystal for each frame.
The retention characteristics of the pixel electrodes will be different at the top and bottom of the screen,
Problems such as crosstalk occur.

In addition, in a display in which a TFT and a ferroelectric liquid crystal are combined, polarization occurs when electric charges generated by spontaneous polarization of the ferroelectric liquid crystal are accumulated in an alignment film or the like, and the effect is a reversal current. This causes image quality deterioration such as a decrease in contrast and a residual previous signal.

Further, when a liquid crystal material having a low response speed such as PSCT is used, the writing characteristics are different between the upper and lower portions of the screen, and the writing time to the pixel electrode is restricted, so that the number of pixels in the vertical direction is limited. The Rukoto.

Further, since the driving is performed in a line-sequential manner, there is no distinction between a portion having a high driving frequency such as a moving image and a portion having a low driving frequency such as a still image. Since power is required for each frame, power consumption increases as the number of pixels increases.

For a still image, a multi-field driving method for reducing power consumption by lowering the driving frequency has been proposed. However, a problem such as an afterimage phenomenon occurs in a moving image.

Accordingly, it is an object of the present invention to firstly provide a liquid crystal display device using a liquid crystal material having a high driving voltage, a liquid crystal material having a large capacity, a liquid crystal material having a low response speed, and a liquid crystal display with an inversion current. It is an object of the present invention to enable a writing period for a pixel to be significantly extended.

A second object of the present invention is to significantly reduce power consumption by stopping image signals to pixels that do not need to be written, among pixels arranged in a matrix.

A third object of the present invention is to simultaneously write the writing characteristics and the holding characteristics to different pixels in the upper and lower parts of the screen over the entire screen, thereby providing a uniform display in the screen and greatly improving the image quality. To improve.

[0023]

In order to achieve the above object, the present invention is configured as follows. That is, a plurality of pixels are arranged in a matrix, and a pixel display is driven by row scanning and column signal application, so that a liquid crystal display device for displaying an image is provided for each of the pixels, and a self-correspondence is provided by a row scanning signal. When a row is scanned,
A first switching element operating, the receive signals of the row of the self corresponding through the first switch <br/> switch ring element, a signal holding means for holding a signal of the column, the signal the driven by holding signal holding means second switch Ngumoto applying a voltage for driving pixels to self corresponding pixel
And the writing of the signal holding means is performed in units of rows via the corresponding first switching elements, and the driving of the second switch means by the holding signal of the signal holding means is performed. , to the pixel group of multiple row where the writing is performed, characterized in that it is configured to perform at the same time.

Further, each of the pixels is provided with a third switch means, and the driving of the pixels is simultaneously performed for all the pixels by simultaneously controlling the driving of the third switch means. Features.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a plurality of pixels arranged in a matrix in a display area, a plurality of signal lines for transmitting an image signal to the pixels, and a plurality of signal lines and pixel electrodes are provided. A first switching element interposed therebetween;
At least one pixel selection memory for controlling the switching element, and a memory group provided for the scanning line via a second switching element provided for each of the memories for writing to the memory. The basic configuration is such that writing to the pixel electrode is simultaneously performed for the pixel group for which writing to the memory has been performed.

It is conceivable that the aperture ratio of a pixel is reduced due to an increase in the switching element and the memory capacity for pixel selection. However, the memory capacity for pixel selection is constituted by a parasitic capacitance existing between two switching elements. Or reflective type L
By using a pixel electrode as a reflection surface and using a switching element and a memory capacitance for pixel selection on the back side by using the pixel electrode in a CD (liquid crystal display element), a decrease in the aperture ratio due to an increase in the switching element and the capacitance can be solved.

According to a first aspect of the present invention, of a plurality of pixels arranged in a matrix, image information is written only for a pixel whose pixel selection memory is in an ON state. Even in the case of performing simultaneously over the scanning lines, among the pixel groups provided in the scanning lines,
It is characterized in that pixels to be written and pixels not to be written are selectively driven.

According to a second aspect of the present invention, in a liquid crystal material whose response characteristic to liquid crystal voltage does not show hysteresis, image information is written to a pixel whose pixel selection memory is in an ON state by a third switching element. Are performed simultaneously. Also, in a liquid crystal material having a response characteristic of hysteresis, for a material that can take three stable states, such as an echo dielectric liquid crystal material, even if one end of the pixel electrode is in one voltage state, Can be put into a high impedance state, so that writing to pixels can be controlled.

According to a third aspect of the present invention, in the plurality of pixel groups arranged in a matrix, an image signal is authenticated by a pixel signal holding means which does not require polarity inversion, and a writing operation is performed over a plurality of scanning lines. Since they are performed simultaneously, the writing condition and the holding condition for the pixel potential due to the polarity inversion do not differ between the upper and lower portions of the screen. In this case, the aperture ratio may be reduced due to an increase in the number of switching elements and write wirings. However, the write wiring can be solved by using an adjacent signal line or using a reflective LCD.

In driving the liquid crystal material, the polarity is generally inverted so that no DC component is applied. In this case, the image quality may be degraded due to flicker due to polarity reversal.However, in this method as well, the problem can be solved by driving the compensation between adjacent pixels or the polarity reversal cycle so that it does not apply to the area visually recognized by the visual characteristics. it can.

According to the first aspect of the present invention, it is possible to selectively drive individual pixels arranged in a matrix. For liquid crystal materials with high driving voltage,
Since power for driving the liquid crystal is not applied from the signal line, it is not necessary to apply a high voltage from the signal line driver.
In addition, since a writing period to a pixel can be significantly lengthened for a liquid crystal material having a large liquid crystal capacity, a sufficient writing operation can be performed.

For example, when a ferroelectric liquid crystal material is used,
Although it is necessary to perform high voltage driving, the capacity for pixel selection
A selection signal indicating whether to apply a voltage to the pixel or not is once written, so that the writing voltage to the pixel selecting capacitor can be reduced, and the signal line voltage and the gate line voltage for driving the capacitor are reduced. By using the voltage, a driver with a low withstand voltage can be used.

In this case, the on-resistance of the switching element interposed between the pixel selecting capacitor and the pixel electrode is considered to be high. However, since the pixel writing period can be greatly lengthened,
Writing to the pixel can be sufficiently performed.

Similarly, when a liquid crystal material having a large liquid crystal capacity and a liquid crystal material having a low response speed are driven, the writing period to the pixel can be greatly extended, so that writing to the pixel can be sufficiently performed.

Also, when a reversal current occurs,
Since the writing time can be made much longer, the charge due to the image signal is compensated, and the desired image signal can be written continuously.

According to the second aspect of the present invention, since the third switching element for controlling the batch writing to all the pixels is provided, even if the switching element for selecting the pixel is in the ON state, the third switching element is connected to the pixel electrode. Is not performed,
Pixel rewriting is not performed. Therefore, even if the switching element for pixel selection is in the ON state, since the actual writing is performed collectively, the luminance difference at the screen position due to the different writing start time can be improved.

According to a third aspect of the present invention, a pixel signal memory capacity is provided for each pixel electrode with a switching element interposed therebetween, and the writing operation to the pixel electrode is controlled by the third switching element. Therefore, a collective writing operation can be performed on pixels included in a plurality of scanning lines, and a luminance difference depending on a screen position can be improved.

For example, when a white window is displayed at the center of the screen on a black background, the brightness difference between the black at the top of the window or the black at the bottom of the screen and the black on the signal line without window display ( (Hereinafter referred to as crosstalk) does not occur, so that the image quality can be significantly improved.

Since it is not necessary to invert the polarity for writing to the pixel signal memory capacity, the signal line driver can be configured at a lower voltage and easily.

In this case, since the writing period of the pixels is performed collectively, the occurrence of flicker due to the polarity inversion can be considered. However, multi-field driving (Japanese Patent Application No. 2-69706) is also possible.
As is well known in US Pat. No. 6,064,098, by dividing all the scanning lines into a plurality of subfields and making a configuration capable of compensating with the scanning line group, the image quality can be sufficiently maintained.

Alternatively, the rewriting frequency (usually 60 Hz × 2) at which the writing operation of one frame is not visually recognized by visual characteristics
By doing so, the image quality can be sufficiently maintained. In this case, an increase in power consumption can be considered, but this can be solved by reducing the signal line capacitance.

Hereinafter, specific examples of the present invention will be described in detail with reference to the drawings.

(First Specific Example) In a first specific example, in a plurality of pixels arranged in a matrix, selective writing to a plurality of pixels included in the scanning lines is performed simultaneously over a plurality of scanning lines. It is.

FIG. 1A is a block diagram showing a configuration of a main part of a liquid crystal display device according to a first specific example of the present invention. As shown in FIG. 1A, the liquid crystal display device of this specific example includes a liquid crystal display panel 10, a pixel selection signal output driver 11,
It includes a gate line drive circuit 12, an n counter circuit 13, and a liquid crystal drive voltage generator 14.

As shown in FIG. 1 (b), the liquid crystal display panel 10 has a plurality of fine liquid crystal display cells CLC arranged in a matrix. The lines L _a1 , L _{a2 to} L _am , and the pixel selection lines L _b1 , L _{b2 to} L _bn are arranged in units of columns. Each of the liquid crystal display cells _CLC is connected to a common power supply V via a switch SW1. _{In this configuration, COM} and liquid crystal drive power supply V _LC (not necessarily direct current) are applied. Common power supply (common power supply) V _COM
Is a power supply of a common potential, and a liquid crystal driving power supply _VLC is a power supply for supplying a voltage of a voltage value capable of sufficiently driving the liquid crystal.
These are generated by the liquid crystal drive voltage generator 14.

Each of the switches SW1 is a TFT (thin film transistor), and a gate terminal, which is a terminal for controlling the gate, is connected to a pixel selection memory C _sp by a capacitor.
There have been connected, given the potential between V _COM -V _LC switch SW1 is gated to the liquid crystal display cell C _LC corresponding in accordance with the potential of the pixel selection memory C _sp, a configuration that can be driven is there.

Further, in correspondence to the respective liquid crystal display cell C _LC, Yes the switch SW2 respectively provided, the switch SW
2 are each constituted by a TFT (thin film transistor), and the gate terminal thereof is connected to a row scanning line _La1 (~
L _{a2 to} L _am ), and on / off controlled by a signal of the row scanning line. Source between the pixel selected memory C _sp each switch SW2 corresponding column of pixel selection line _{L b1 (~L b2 ~L bn)} - pixel selected by connecting the drain signal output driver 11 outputs pixel The configuration is such that it can be given to and held in the selection memory _Csp .

The gate line driving circuit 12 sequentially operates the row scanning lines L
_a1, L _a2 ~L line by line supplies a drive signal to the _am is for controlling the operations of the switch SW2 of each liquid crystal display cell, n counter circuit 13 match the sequence composition of the liquid crystal display cell of the liquid crystal panel 10 Te a counter capable of performing counting of number of lines, a vertical row scanning lines arranged in (Y-direction) L _a1, L _a2 ~L _am every time to scan the entire base, a start pulse S2 It is a configuration to output.

In such a configuration, the gate line drive circuit 12 is driven and controlled by the application of the gate line selection signal S1, and is generated by the n counter circuit 13 every time when all the gate lines arranged in the vertical direction are scanned. The gate line drive signals are synchronized with G1 and G in synchronization with the start pulse S2.
2, G3 to Gm. Gate line drive signal G
1, G2, G3,..., Gm are connected to the corresponding row scanning lines L _a1 , L _{a2 to} L _am corresponding to the respective rows, and therefore, in the row scanning line where the gate line driving signal is generated. , Each switch SW of the liquid crystal cell connected to the row
2 is on / off controlled.

In this way, each row scanning line is sequentially scanned by the gate line driving circuit 12.

On the other hand, in response to the scanning of the row scanning line, the pixel selection signal output driver 11 applies a display signal of each pixel of the scanning row to control the state of each pixel of the scanning row. together pixel selection signals (binary) is output to each pixel corresponding, the pixel selection signal is output to each pixel position corresponding to the arranged pixel selection line L _b1, L _b2 ~L _bn.

A memory is provided in the pixel selection signal output driver 11, and information on each pixel in the row being scanned is held in the memory in correspondence with row scanning. As a result, a selection signal for controlling writing is output in synchronization with the rising of the row scanning line for pixels arranged in the horizontal direction (X direction).

As shown in FIG. 1 (b), in the liquid crystal panel according to this example, by turning on the signal of the row scanning line during the pixel selection period, each S of the liquid crystal cell corresponding to that row is turned on.
When W2 is turned on, the pixel selection signal output driver 11
The above-described control from, the pixel selection memory C _sp of each pixel corresponding row in the scan, the pixel selection signal content corresponding display image through the pixel selection line L _b1, L _b2 ~L _bn Will be entered and retained.

Here, at this time, the signal level held in the pixel selection memory _Csp is, for example, the switching element SW.
It is assumed that the signal has a level that turns 1 on. In this case, since the switching element SW1 is turned on,
The voltage input from the liquid crystal drive voltage generator 14, the liquid crystal drive voltage _VLC , and the common voltage _Vcom are applied to the pixel electrodes at both ends of the liquid crystal cell _CLC and the auxiliary capacitance Cs.

On the other hand, it is assumed that the signal level held in the pixel selection memory _Csp is a signal level for turning off the switch SW1. Then, in this case, the switch SW1
There Since one end of the liquid crystal cell C _LC becomes high impedance state off, the voltage applied to the liquid crystal cell will hold the voltage state at the previous field.

Here, the voltage output from the liquid crystal drive voltage generator 14 is a voltage that can sufficiently drive the liquid crystal. For example, the voltage shown in Figure 2 - the panel structure using a ferroelectric liquid crystal material exhibiting a transmitted light quantity characteristics, in the write period of the pixel selected memory C _{sp is, V th +> V 1c -V} com> V th- Is applied to the liquid crystal material.

In the writing period to the liquid crystal, when "state 1" is selected, V _sat- > V _1c -V _{com When} "state 2" is selected, V _{sat +} <V _1c -V _com Input from the voltage generator 14.

FIG. 3 shows the signal waveform of each part.

[0059] In the selected memory writing period is a writing period of the pixel selected memory C _sp (duration of "circled number 1" in FIG. 3 ( "1" of the circled number)), the gate lines, i.e. the row scanning line La1~ In synchronization with the selection of Lam line-sequentially, for a pixel to be written, a voltage that turns on the switch SW1 is applied to the pixel selection memory _Csp corresponding to that pixel and held, and For a pixel to which writing is not performed, a voltage that turns off the switch SW1 is applied to the pixel selection memory _Csp and held.

Next, during the pixel voltage application period (the period of “circled number 2” in FIG. 3 (the number “2” enclosed in a circle)), the image display state is changed to “state 2”. Voltage V
By applying _{sat +,} only the pixels for which the SW1 is turned ON display the image in the state of “state 2”.

Next, in the selected memory writing period again (the period of “circled number 3” in FIG. 3 (the number “3” enclosed in a circle)), writing to each pixel selection memory _Csp via the row scanning line is performed. Selection signal (signal for turning on SW2; row scanning signal)
Is entered. Then, during the pixel voltage application period (the period of “circled number 4” in FIG. 3 (the number “4” enclosed in a circle)), the voltage V _sat− for displaying “state 1” from the pixel selection signal driver 11 is changed. State 1 will be displayed only for the selected and applied pixels. In this case, the selected memory writing period (the period of “circled number 1” and “circled number 3” in FIG. 3)
Holds the display contents written in the previous field, and holds the display contents for the pixels not selected in the period of "circled numeral 1" and "circled numeral 3" in FIG. Become.

Several methods can be considered for the pixel selection signal.

For example, a frame memory is provided in the pixel selection signal output driver 11, and an "H" signal is sent to a memory position corresponding to a pixel for displaying "state 2".
An “L” signal is recorded in a memory location corresponding to a pixel for displaying “state 1”. Here, “H” means outputting a voltage at which the switch SW1 is turned on.
“L” means that a voltage at which the switch SW1 is turned off is output. In addition, since the frame memory only needs to be 1 bit for each pixel, the amount of memory does not increase.

In the selection memory writing period (period of "circled number 1"), the ON / OFF selection signal is stored in each pixel selection memory _{Csp in} accordance with the signal, and "STATE 2" is subsequently displayed. Next, in the selection memory writing period (the period of “circled number 2”), the above signal is inverted and the selection signal is input from the pixel selection signal output driver 11 to each corresponding pixel selection memory _Csp . For this reason, "state 1" is displayed in all the remaining pixels that do not display "state 2". FIG. 4 shows a waveform diagram.

In addition, a method of inputting a pixel selection signal only to a pixel to be written can be considered. FIG. 5 shows a waveform diagram of each part when this method is applied. Here, a period for resetting recording in the pixel selection memory _Csp is required.

In the reset period (the period of “circled number 3” (the number “3” in a circle) and the period of “circled number 6” (the number “6” in a circle) in FIG. 5), The gate line, that is, all the scanning lines are turned on, and an OFF selection signal is input to the pixel selection memory _Csp . Therefore, the gate line driving circuit includes a switching configuration in which all the gate lines can be turned on.

As a main configuration of the liquid crystal display device, an image signal collating unit 21 having a frame memory having a capacity of at least one frame is provided for performing collation for correlating a previous field and a next field. The image signal matching unit 21 compares the image of the previous field with the image of the next field on a pixel-by-pixel basis. According to the result of the comparison, the pixels whose image is switched from “state 1” to “state 2” in the display state are selected by the selection memory. Write period (period of "circle number 1")
For the pixels which output the “H” signal to “state 2” from “state 2”, data such that the “H” signal is output during the selected memory writing period (the period of “circled number 4”) is output. The configuration is provided to the pixel selection signal output driver 11.

FIG. 6 is a configuration diagram of a main part of the present system.

In such a configuration, the image signal collating unit 21 compares the image of the previous field and the image of the next field on a pixel-by-pixel basis, and changes the display state from “state 1” to “state 2” based on the result of the comparison. For the pixel to be switched to, the "H" signal is output during the selected memory writing period (the period of "circled number 1"), and for the pixel to be switched from "state 2" to "state 1," the selected memory writing period (" Data such that an “H” signal is output during the period of “number 4”) is given to the pixel selection signal output driver 11.

Then, in response to this, the pixel selection signal output driver 11 changes the display state from “state 1” to “state 2”.
For the pixel to be switched to, the "H" signal is output during the selected memory writing period (the period of "circled number 1"), and for the pixel to be switched from "state 2" to "state 1," the selected memory writing period (" The “H” signal is output during the period of “number 4”.

As a result, an image corresponding to the image data can be displayed only by inputting the pixel selection signal for the pixel to be written.

Although the reset period is provided in this specific example, the time constant at which the switch SW1 is turned on is determined by the OFF resistance of the switch SW2 and the holding characteristic relating to the capacitance of the pixel selection memory _Csp . When the switch SW1 is turned off due to the leak during the reset period, the operation during the reset period can be omitted (FIG. 7).

Here, the required output voltage from the pixel selection signal driver 11 and the gate line drive circuit 12 and the required capacity of the pixel selection memory _Csp will be described.

In a conventional liquid crystal display device, the ratio between the ON resistance and the OFF resistance of the switching element (hereinafter referred to as O
N-OFF ratio).
[V], a voltage of about 0 [V] is applied when OFF, and a signal of about ± 5 [V] with respect to the common voltage is input from the signal line driver to drive the liquid crystal.

The gate voltage in this case is determined by the specifications of the panel, and as the number of pixels in the vertical direction increases, the writing time becomes shorter and the holding period becomes longer. Therefore, it is necessary to increase the ON / OFF ratio. No. Further, these are also determined by a capacitance component (for example, a liquid crystal capacitance or an auxiliary capacitance) provided in the switching element.

In this system, switching for driving the liquid crystal is performed by the pixel selection memory _Csp and the switch SW2 which is a switching element. _Therefore , the capacitance of the pixel selection memory _Csp and the switch which is a switching element are used. It is controlled by the time constant of SW2.

Here, the voltage of the pixel selection memory _{Csp only needs to be} a voltage at which the switch SW1 is ON at the time of pixel selection. Therefore, the ON characteristic of the switch SW2 may be any characteristic that enables writing to all pixel selection memories during the selected memory writing period, and the OFF characteristic may be from the time of selecting a gate line (when selecting a column scanning line). It suffices that the voltage at which the switch SW1 is ON is maintained until the pixel voltage application period.

However, since the pixel voltage application period is a period until the writing operation to the liquid crystal is completed, the switch SW1 is turned off by the leak of the pixel selection memory _Csp.
Even if it is in the FF state, there is no problem. That is,
In FIG. 5, the switch SW1 is turned off during the reset period.
It is the same as going into a state.

From these, the TFT structure of the switch SW2,
Gate voltage, pixel selection signal voltage and pixel selection memory C _sp
Capacity can be determined.

For example, polysilicon can be considered as the TFT structure. Polysilicon has two orders of magnitude higher in ON characteristics and OFF characteristics than amorphous silicon.

That is, both the ON operation and the OFF operation can be made short and fast. Therefore, when the gate line is selected, the pixel selection memory is written in a short period of time, and subsequently, the gate potential of the transistor forming the first switch SW1 is lowered, and the reset operation can be performed.

Further, as an effect of polysilicon, a gate driver and an array can be integrally formed on a glass substrate.

The above is an example of a liquid crystal display device including a plurality of liquid crystal cells arranged in a matrix, in which the display state of each pixel is changed sequentially on a row-by-row basis.

Next, the display state of each pixel can be changed at the same time when the selective writing of the selection signal to the pixel selection memory _Csp corresponding to each pixel in all rows of the screen is completed. Will be described as a second specific example.

(Second Specific Example) In a second specific example, in a plurality of pixels arranged in a matrix, selective writing to a plurality of pixels included in the scanning lines over a plurality of scanning lines is performed by a third method. The switching is performed at the same time by controlling the switching elements.

FIG. 8 shows a cell configuration of a liquid crystal panel according to this example. As shown in FIG. 8, in this configuration, as the gate line driving circuit 12A, in addition to the terminals G1 to Gm that output the row scanning signal (that is, the gate control signal for turning on the switch SW2), Gm
Next, a _switch having a G _SW terminal which is turned ON is used.

Further, a switch SW3, which is a switch for controlling the application of voltage, is connected in series with a switch SW1 provided for each liquid crystal cell, and the switch SW3 is turned on even if the switch SW1 is turned on. Unless turned on, the voltage _VLC1 is not applied to the liquid crystal cell. The switch SW3 also uses a TFT, and the gate terminal of the switch SW3 is connected to the _GSW terminal of the gate line driving circuit 12A so that the switch SW3 can be turned on and off by the output of the _GSW terminal.

In such a configuration, first, during the selected memory writing period, when the output of the terminal G1 of the gate line driving circuit 12A is turned on over the pixel selection period, the row scanning line connected to the terminal G1 is turned on. This output is output to La1, the switches SW2 of the liquid crystal cells connected to the row scanning line La1 are turned on, and a selection signal is input to the pixel selection memory _Csp of the liquid crystal cell.

Here, unlike the first specific example, the pixel electrode of the liquid crystal cell is turned off by the switch SW3, so that the pixel potential in the previous field is held.
Similarly, when the terminals up to Gm are turned on and the pixel selection information is written into the respective pixel selection memories, the pixel voltage application period starts, and the third switching element (switch SW)
Since 3) is turned on by a signal from G _SW , a liquid crystal driving voltage is supplied.

Also in this case, the supply of voltage to each pixel electrode of each liquid crystal cell is controlled by the voltage applied to each pixel selection memory _Csp . FIG. 9 shows a voltage waveform diagram of each part. Also, a reset period may be provided as in the first specific example.

In this example, the scanning line for turning on the third switching element is output from the gate line driving circuit. However, the gate voltage of the third switching element may be changed by providing another stage. .

As described above, in the liquid crystal display device composed of a plurality of liquid crystal cells arranged in a matrix, the display state of each pixel is changed by scanning a plurality of rows and changing the pixel corresponding to each pixel in each scan row. after completing the selective writing of the selection signal to the selected memory C _sp, by controlling the third switching element, a liquid crystal display device which can be performed simultaneously can be realized.

FIG. 10 shows another example of the cell configuration of the liquid crystal panel that can be employed in the second specific example. FIG.
0 (a) is the pixel selection memory C _sp via the switch SW3.
10B is supplied to the switch SW1 to perform on / off control. FIG. 10B illustrates a configuration in which the liquid crystal cell CLC is supplied to the liquid crystal cell _CLC with V _COM -V through a series circuit of the switch SW1 and the switch SW3.
A configuration for applying the _LC, FIG. 10 (c) a liquid crystal cell C _LC
The liquid crystal cell C to the V _COM applied side by passing through the switch SW3
_This is a configuration in which a circuit for applying V _COM -V _LC to the _LC can be opened and closed.

As described above, the third switching element (S
It relates W3), with the configuration that can be applied) to control the liquid crystal drive voltage applied in the liquid crystal drive voltage (the liquid crystal cell C _LC of the pixel electrode may, but is not limited to this embodiment.

The liquid crystal material used in this example is, for example, one having a voltage-transmitted light amount response characteristic showing no hysteresis as shown in FIG. 11 and one having a hysteresis but having a plurality of states as shown in FIG. Applicable.

[0096] anti-ferroelectric liquid crystal is considered et <br/> are examples of FIG. As a characteristic of the antiferroelectric liquid crystal, since positive and negative voltages are possible in the state where the transmitted light amount is the same (“state 2” and “state 3”), the polarity is not biased and the polarization due to the DC component does not occur. Can be driven. In this specific example, the liquid crystal drive voltage _V1c is inverted every plural fields. FIG. 13 shows a waveform diagram of each part.

As described above, the display state of each pixel can be changed at the same time when the selective writing of the selection signal to the pixel selection memory _Csp corresponding to each pixel in all rows of the screen is completed. Has been described.

The first and second specific examples have both been based on the selection signal for selecting the display state of the pixel. However, a liquid crystal display device that can perform the operation with the image signal itself is also required. is there. Therefore, next, a liquid crystal display device that enables the display state of each pixel to be changed corresponding to an image signal will be described as a third specific example.

(Third Specific Example) In a third specific example, the display state of each pixel can be changed in accordance with an image signal. A signal memory for recording; and a third switch element for enabling simultaneous writing operation over a plurality of scanning lines. The third switching element is turned on, and the potential of the signal memory is applied to the pixel electrode. Is applied.

FIG. 14 shows a configuration of a main part of a liquid crystal display device according to a third specific example of the present invention, and FIG. 15 shows a cell configuration of a liquid crystal panel according to this specific example. As shown in FIG. 14, the liquid crystal display device of this example includes a liquid crystal display panel 140 in which a plurality of liquid crystal cells are arranged in a matrix, a signal line driver 141 of the liquid crystal display panel 140, a gate line driving circuit 142, , N counter circuit 143, and a liquid crystal drive voltage generator 144.

The gate line drive circuit 142 is the same as the gate line drive circuit 12A shown in the second specific example, and includes n
The counter circuit 143 is the same as the n counter circuit 13 shown in the second specific example.
4 is the same as the liquid crystal drive voltage generator 14. FIG.
As shown in FIG. 5, the configuration of the liquid crystal display panel 140 is basically the same as that shown in FIG.

The signal line driver 141 receives the image signal, and the connection relationship between them may be the same as that shown in the second specific example according to the signal correspondence.

The gate line drive circuit 142 outputs a start pulse S2 from the n counter circuit 143 every time scanning is performed on all the gate lines arranged in the vertical direction. Without the gate line driving circuit, scanning of each gate line is performed under the control of the gate line selection signal S1.

FIG. 15 shows a cell configuration of a liquid crystal panel according to this example. First, when the gate line is turned on during the signal memory writing period, the switch SW2 is turned on, and the signal line driver 141 outputs the signal memory C _sig of the pixel (liquid crystal cell) for each pixel (each liquid crystal cell). , An image signal is stored in the signal memory C _sig corresponding to each pixel. In this specific example, after the image signal is input to each pixel (after writing), the switches SW3 are simultaneously turned on during the drive voltage application period,
Charges are simultaneously supplied to the pixel electrodes over a plurality of rows of pixels (liquid crystal cells).

As a result, in the liquid crystal cell, a plurality of cells are supplied with electric charge to the pixel electrode of the cell at the same time. Therefore, the timing of applying the electric charge to the pixel electrode of each cell is the same. Unlike the conventional method in which the signals are sequentially written to the signal memory C _sig while being supplied to the image display while being sequentially written to the signal memory C _sig , the image signal is sequentially written to each signal memory C _sig and the writing is completed. In this specific example in which the display is simultaneously performed at the stage, the application time of the electric charge is the same for the pixel at the upper position and the pixel at the lower position.

FIG. 18 shows a conventional cell configuration.
For example, when a black window is displayed on a halftone background, the signal line potentials during the holding period are significantly different between the upper and lower portions of the screen, so the holding characteristics of the switching elements are different, and the crosstalk due to the leak deteriorates the image quality. ing.

FIG. 19 shows the window display "Yes" at that time.
FIG. 20 shows signal line potentials and pixel potentials in the case of “No” and “None”, and FIG. 20 shows crosstalk resulting therefrom.

However, in the third specific example, the writing of the pixel signals to the signal memory C _sig of the pixels is performed simultaneously on a row basis. The pixel signal is image information and has no polarity. Further, after the writing operation of the pixel signal is completed, the display is performed simultaneously and simultaneously, so that the writing condition for each pixel and the voltage application time condition for the pixel display become substantially equal.

Therefore, the positive write and the negative write depend on the potential relationship between _VLC and _VCOM , have the same polarity for all the pixels to be written, and have the same condition for the subsequent holding. Therefore, the above-mentioned crosstalk does not occur.

In addition, the retention period of the pixel in the present method is a signal memory writing period, so that the retention period can be shortened as compared with the related art. As a result, flicker due to a luminance difference between positive writing and negative writing can be reduced, so that the auxiliary capacitance may be reduced and the aperture ratio may be increased.

The flicker can be solved by setting the reversal period higher than before so that the flicker does not apply to the area visually recognized by the visual characteristics.

In this case, the write operation to the signal memory can be changed between a positive case and a negative case. However, if the ON resistance of the third switching element is sufficiently smaller than the ON resistance of the first switching element. Since the voltage applied to the liquid crystal is the ratio of the ON resistance of the first switching element to the resistance of the liquid crystal itself, it is necessary to increase the flicker frequency simply by inverting the polarity of V _1c without rewriting the signal memory. Can also.

(Fourth Specific Example) The fourth specific example is an application of the above specific example. Here, a group of pixels to be simultaneously written in the liquid crystal panel is divided into blocks, and the optimum use of display is determined for each block. As a result, it becomes possible to perform driving suitable for the display method in each block for each block, and it is intended to further reduce power consumption by performing display by optimal drive control for each block.

For example, when displaying a moving image and a still image on the same screen, the moving image must be controlled at high speed in accordance with the image data. However, since the still image does not move, high-speed display control is unnecessary. In addition, it is necessary to change the driving frequency in each image area.

In this case, if the area in which the moving image can be displayed is fixed in advance, the moving area cannot be displayed in other areas. However, the area to which the liquid crystal drive voltage is applied is divided into blocks corresponding to different driving frequencies for each block. To perform display control.

FIG. 16A shows a screen configuration according to this specific example, and FIG. 16B shows a drive area block configuration according to the display method. When the moving image area and the still image area are divided into blocks as shown in FIG. 16A, liquid crystal driving voltage generators 1 and 2 are provided for each block as shown in FIG. A drive voltage is supplied by the voltage generator 1 and, in the still image area, by the liquid crystal drive voltage generator 2.

FIG. 16B shows V in the first specific example.
This corresponds to the case where _LC is divided into blocks, and accordingly, a scanning frequency, which is a frequency at which the row scanning lines La1 to Lam are sequentially turned on, and a signal for performing pixel display corresponding to a pixel position are output. The signal output frequency of the selected pixel driver changes.

Normally, since a moving image has a higher screen rewriting frequency than a still image, the frequency of the gate line of the block displaying the moving image is high, and the signal output frequency of the pixel selection signal output driver is also high. Therefore, in the still image block, the writing operation can be performed at a lower speed, so that the power supply of the liquid crystal drive voltage generator 2 can be turned off until the next writing operation.

[0119] In addition, with respect to the moving image display unit, a low-frequency drive can be performed at the same time, so that a front still image can be displayed.

In FIG. 16B, the common voltages are provided separately, but they can be made common.

In the second and third embodiments, the G _SW terminal for driving the third switching element, which is the output signal of the gate line driving circuit, is provided for each block. By giving the corresponding _GSW terminal output to each block, the display method of this specific example can be implemented.

Also, in the case of performing polarity inversion, flicker can be compensated by dividing a scanning line group for simultaneous scanning into blocks. For example, FIG.
As an apparatus for generating a liquid crystal driving voltage as shown in, the DC voltage V _LC1 and VL 2 two odd scan lines scanning period of the output terminals provided interlaced _LC2, in the former in accordance with the even scan lines scanning period a DC voltage V _LC1 In the latter case, a liquid crystal drive voltage generator 144A having a function of switching to generate VL _LC2 is prepared.

[0123] Then, of the row scanning lines La1～Lam, connecting the source terminal of the switch SW3 of the odd scan lines corresponding liquid crystal cells of the V _LC1 lines of the liquid crystal driving voltage generator 144A, the even scan lines corresponding liquid crystal cell switches The source terminal of SW3 is connected to the _VLC2 line of the liquid crystal drive voltage generator 144A.

In this manner, _VLC1 is output during the display period of the odd-numbered scanning line, and only the liquid crystal cell corresponding to the odd-numbered scanning line is used for image display in accordance with the scanning method of scanning and displaying by interlacing. In the display period of the even-numbered scanning line, _VLC2 is output, and only the liquid crystal cell corresponding to the even-numbered scanning line is used for image display.

As described above, by dividing the scanning line group into odd-numbered scanning lines and even-numbered scanning lines in accordance with the scanning method in which scanning and display are performed by interlacing, image display can be performed in field units. The operation of the liquid crystal cell corresponding to the scanning line in the non-display field can be stopped, and the frequency of the polarity inversion can be reduced. This is a significant reduction effect as compared with the conventional horizontal reversal method.

This block group can be divided into vertical pixel groups in addition to this example, or the block group can be divided so that dot inversion can be performed.

Although the present invention has been described with reference to the specific examples shown in the drawings, the present invention is not limited to the specific examples, and various modifications can be made without departing from the scope of the invention. is there.

[0128]

According to the present invention, a pixel selection memory is provided, and a voltage for driving a liquid crystal can be simultaneously applied from a liquid crystal driving voltage generating unit. Therefore, a liquid crystal material having a high driving voltage can be driven. A sufficient voltage can be supplied. This lowers the voltage to the pixel selection memory, enables the operation of the high-voltage driving liquid crystal material by the driver with a low withstand voltage, and also obtains a low power consumption effect.

Further, according to the present invention, the writing operation can be simultaneously performed over a plurality of pixel groups, so that the writing time to the pixel electrode can be lengthened and the liquid crystal material having a large capacity can be obtained.
Sufficient writing operation can be performed on a liquid crystal material having a slow response speed and an LCD with an inversion transmission.

Further, according to the present invention, a switching element capable of simultaneously performing a signal memory capacity and a pixel writing operation is provided, and by controlling the switching element,
Since writing operations to a plurality of pixels can be performed simultaneously, crosstalk can be solved.

Further, according to the present invention, since the driving frequency of the still image portion and the driving frequency of the moving image portion can be changed for the simultaneous video and still image display system compatible with multimedia, the power consumption can be reduced. .

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the present invention, in which (a)
1 is a block diagram showing a main configuration of a liquid crystal display device according to a first specific example of the present invention, and FIG. 2B is a block diagram showing a cell configuration of a liquid crystal panel of the specific example.

FIG. 2 is a voltage-transmitted light amount curve diagram of a liquid crystal material exhibiting hysteresis characteristics.

FIG. 3 is a signal waveform diagram of each unit according to the specific example.

FIG. 4 is an output signal waveform diagram by signal conversion of the specific example.

FIG. 5 is a signal waveform diagram of each section when the specific example has a reset period.

FIG. 6 is a block diagram illustrating a main configuration of a liquid crystal display device in a specific example of performing image signal matching.

FIG. 7 is a signal waveform diagram of each unit when a pixel selection memory OFF due to a natural leak is used.

FIG. 8 is a diagram showing a cell configuration of a liquid crystal panel according to a second specific example of the present invention.

FIG. 9 is a signal waveform diagram of each unit according to the specific example.

FIG. 10 is a diagram showing a cell configuration of another liquid crystal panel according to the specific example.

FIG. 11 is a voltage-transmitted light amount curve diagram of a liquid crystal material that does not exhibit hysteresis characteristics.

FIG. 12 is a voltage-transmission light amount curve diagram of a liquid crystal material showing two hysteresis characteristics.

FIG. 13 is a signal waveform diagram of each unit when the polarity is inverted according to the specific example.

FIG. 14 is a block diagram showing a main configuration of a liquid crystal display device according to a third specific example of the present invention.

FIG. 15 is a diagram showing a cell configuration of a liquid crystal panel according to a third specific example of the present invention.

FIG. 16 is a diagram showing an example of a panel configuration for displaying a moving image and a still image on the same panel, and a main part of a cell configuration according to a fourth specific example.

FIG. 17 is a diagram showing a cell configuration of a liquid crystal panel according to a fourth specific example of the present invention.

FIG. 18 is a diagram showing a cell configuration of a conventional liquid crystal panel.

FIG. 19 is a diagram showing pixel potential fluctuations during window display in a conventional liquid crystal.

FIG. 20 is a diagram showing crosstalk.

[Explanation of symbols]

10 ... liquid crystal display panel 11 ... pixel selection signal output drivers 12, 12A ... gate line drive circuit 13 ... n counter circuit 14 ... liquid crystal driving voltage generator 21 ... image signal matching unit C _LC ... liquid crystal display cell L _a1, L _a2 ~ L _am ... row scanning line L _b1, L _b2 ~L _bn ... pixel selection line SW1, SW2, SW3 ... switch V _COM ... common power supply (common _{voltage) V LC, V LC1, V} LC2 ... DC power source C _sp ... pixel selection memory.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-119352 (JP, A) JP-A-56-42281 (JP, A) JP-A-58-75194 (JP, A) 18892 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G02F 1/133 550 G09G 3/36

Claims (3)

(57) [Claims] (1)Depends on liquid crystal cellMatrix multiple pixels
And by applying row scanning and column signals
Liquid crystal display device that displays images by driving pixel display
A row corresponding to the self-corresponding row provided by the row scanning signal.
First switch that operates when is scannedElement
And this first switchElementSelf-corresponding through the column
Signal holding that holds the signal in this column
Holding means,A voltage for driving display of the liquid crystal cell is set to a predetermined pixel.
Liquid crystal drive voltage generation means generated over the voltage application period
When, At the time of the voltage generation by the liquid crystal drive voltage generation means, The said
Driven by the holding signal of the signal holding meansdisplayFor driving
Switch for applying the voltage ofNing
Element and The writing of each of the signal holding means corresponds to the corresponding one of the
Performed on a row-by-row basis via a first switching element;Picture
The elementary display driving is performed on the pixels in a plurality of rows in which the writing is performed.
For the group, during the pixel voltage application periodRow at the same timeI
ToA liquid crystal display device having a configuration. 2. A liquid crystal cell comprising a plurality of pixels arranged in a matrix.
And by applying row scanning and column signals
Liquid crystal display device that displays images by driving pixel display
Provided for each pixel , and a corresponding row is provided by a row scanning signal.
First switching element that operates when is scanned
And the self-corresponding column through the first switching element.
Signal holding that holds the signal in this column
Holding means, and a liquid for generating a voltage for driving the liquid crystal cell for display.
Crystal driving voltage generating means, and the liquid crystal driven by a holding signal of the signal holding means.
The pixel driving voltage generated by the driving voltage generating means
A second switching element applied to a corresponding pixel, and a liquid crystal drive voltage generator provided in each of the pixels.
The pixel display driving voltage generated by the step is self-corresponding to the
A third signal applied to the second switching element in the pixel;
And switching elements, the third over a predetermined pixel voltage application period of the switching
Generating a driving signal for the switching element to generate the third switching signal.
Means for applying the signal to each of the signal holding means.
1 is performed on a row-by-row basis through the switching element 1
Liquid crystal display device you characterized in that the display driving a entire field Motodo at line dividing arrangement in the pixel voltage application period. 3. The first switching element writes data to the signal holding means, writes data to a pixel according to the holding signal, and changes the holding signal via the first switching element after writing. The second
By off the switching element, one of claims 1 or 2, characterized in that finished writing to the pixel
2. The liquid crystal display device according to claim 1.