JP3055620B2 - Liquid crystal display device and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a liquid crystal display device, and more particularly to a method for driving a liquid crystal display device in which polarity is inverted every two horizontal synchronization periods.

[0002]

2. Description of the Related Art In a liquid crystal display device, the display quality deteriorates when a DC voltage is continuously applied to the liquid crystal. However, if the absolute value of the applied voltage is the same, the light transmittance of the liquid crystal becomes the same even if the polarity is different. In some cases, the polarity of the voltage applied to the liquid crystal is inverted at a certain cycle. FIG. 4 is a conceptual diagram of an example in which the polarity of the voltage applied to the liquid crystal pixels of the liquid crystal panel is inverted.

Since power is consumed every time the polarity of a voltage is inverted, power consumption is reduced, instead of the method of FIG. 4 in which polarity is inverted every one horizontal display period, which has been conventionally used. Recently, a 2H dot inversion driving method in which the inversion cycle is doubled every two horizontal synchronization periods has been used.
FIG. 5 shows that the polarity of the voltage applied to the liquid crystal pixels of the liquid crystal panel is 2
It is a conceptual diagram of an example of the 2H dot inversion drive method which inverted every horizontal synchronizing period. FIG. 6 is a schematic block diagram showing the configuration of a liquid crystal display device using the conventional 2H dot inversion driving method, and FIG. 7 is a timing chart showing the drive timing of the liquid crystal display device of FIG. In the liquid crystal panel 61 of the liquid crystal display device, a large number of scanning lines 67 and a large number of signal lines 68 are wired so as to intersect with each other.
A TFT (thin film transistor) 65 in which the scanning line 67 is connected to the gate, the signal line 68 is connected to the drain, and the electrode of a liquid crystal capacitor 66 forming a liquid crystal pixel is connected to the source at a position where the signal line 7 intersects with the signal line 68. The opposite electrode of the capacitor 66 forms a transparent electrode, each scanning line 67 is connected to a gate driver 63, each signal line 68 is connected to a source driver 64, and the gate driver 63 and the source driver 64 are controlled by a control circuit 62. Controlled by signals. The TFT 6 opened when the scanning line 67 becomes high level
When a voltage is applied to 5 through the signal line 68, the voltage of the liquid crystal capacitor 66 changes and the liquid crystal element changes to a density corresponding to the applied voltage, and display is performed.

[0004] In Figure 7 the voltage V _D of the signal line 68 in a plurality of TFT65 to be connected to one signal line 68 scanning lines 6
7, the voltages _VG2N-4 , _VG2N-3 , _VG2N-2 , _VG2N-1 , V
_G2N , V _{G2N + 1,} and the voltages V _LC2N , V
_{LC2N + 1} and the line numbers 2n-4 to 2n + 1 of the scanning lines 67 selected for writing at that timing are displayed. 2n As shown in this case signal line V _D
The line and the 2n + 1 line have the same polarity, and the 2n line and the 2n-1 line have the opposite polarities.

Next, the prior art disclosed in Japanese Patent Application Laid-Open No. 2-168229 will be described. FIG.
FIG. 9 is a schematic configuration diagram of a conventional liquid crystal display device disclosed in Japanese Patent Publication No. 168229, and FIG. 9 is a timing chart showing drive timing of the liquid crystal display device of FIG. FIG.
Reference numeral 81 denotes an amplifier, reference numerals 82 and 83 denote sample and hold circuits, reference numeral 84 denotes a selection switch, reference numeral 85 denotes a T
FT and 86 are liquid crystal pixels. Here, two circuits for sampling and holding for 1H period are shifted by half pitch according to the horizontal position of the pixel of each line, and these are switched to a blanking period, and two lines are written in 1H period.

In FIG. 9, HBLK is a signal representing a horizontal blanking period, Vsm is a voltage input from an m-system signal line, Vg2n is a gate input voltage of a 2n line,
V _D is the voltage waveform of the pixel surrounded by the m systems 2n lines. Here, the gate voltage Vg2n of the 2n line is set to 2n
Precharge (preliminary scanning) is performed from the time when the output of the -2 line is output, and the voltage is written when the actual value of the 2n line is set. As a result, the pixel voltage V _D
Can reach a value close to the actual voltage in about one horizontal scanning period despite the shortage of the ON current, and can follow this if there is a slight change from the previous value. That is, in the technique of this publication, preliminary scanning is performed for the purpose of reducing flicker due to insufficient on-current of the TFT.

[0007]

In the 2H dot inversion driving method in which the polarity of the voltage applied to the liquid crystal pixels of the above-mentioned conventional example is inverted every two horizontal synchronization periods, the polarity of the voltage of the signal line 68 is 2n. Since the liquid crystal capacitance and the signal line parasitic capacitance need to be charged and discharged with opposite polarities, the charge and discharge of the signal line parasitic capacitance with the opposite polarity in the 2n + 1 line requires the inversion of the polarity of the voltage of the signal line 68. In addition, since the charge / discharge of the reverse polarity to the signal line parasitic capacitance has been completed in the previous line, only the charge / discharge of the reverse polarity to the liquid crystal capacitance is performed. Strictly speaking, it is necessary to charge and discharge the signal line capacitance with the same polarity, but it is negligible compared to the opposite polarity. Therefore, as shown in FIG. 7, a difference occurs in the write voltage between the 2n line and the 2n + 1 line by the amount of charge / discharge to the signal line parasitic capacitance (ΔV _{C in the} figure).

[0008] This voltage difference becomes a difference between light and dark on a display and is visually recognized as a horizontal streak, causing a problem that the image quality is deteriorated.

In the prior art disclosed in Japanese Patent Application Laid-Open No. 2-168229, pre-scanning is performed to reduce insufficient writing due to an increase in the number of pixels, but driving for writing two lines during one horizontal synchronization period is performed. This method cannot be directly applied to a driving method for writing one line in one horizontal synchronization period as in the conventional example. SUMMARY OF THE INVENTION An object of the present invention is to provide a driving method and a liquid crystal display device which solve the above problems and prevent the deterioration of image quality of a liquid crystal display device using a 2H dot inversion driving method.

[0010]

According to a method of driving a liquid crystal display device of the present invention, a plurality of signal lines and a plurality of scanning lines are arranged on a liquid crystal panel of a liquid crystal display device so as to intersect with each other, and the signal lines and the scanning lines are scanned. A thin film transistor is connected to the signal line and the scanning line at an intersection of the lines, and a liquid crystal forming a liquid crystal element is arranged between an electrode connected to the thin film transistor and a transparent electrode facing the electrode, and A source driver for driving the line, a gate driver for driving the scanning line, and a control circuit for controlling the driving of the source driver and the gate driver. The gate driver controlled by the control circuit sequentially writes the scanning line for writing. By setting it to a high level, the thin film transistor connected to the scanning line is turned on during one horizontal synchronization period, and the source driver controlled by the control circuit controls the thin film transistor. A predetermined voltage is sequentially output to a plurality of signal lines so as to make a round of the plurality of signal lines during one horizontal synchronization period, and a predetermined voltage is sequentially applied from a signal line to a liquid crystal pixel connected to a high-level scanning line. A predetermined voltage output to the signal line corresponds to the video signal input to the control circuit, and the polarity is inverted in a predetermined order during one horizontal synchronization period. During the subsequent one horizontal synchronization period, the polarity is inverted in the same order, and during the next two horizontal synchronization periods, the operation of inverting the polarity with the previous two horizontal synchronization periods is continued. Repeat the inversion of all polarities with respect to the frame, and further, the scanning line for writing for image display is set to a high level for pre-scanning even before a predetermined horizontal synchronization period. It was in writing A high level
The scanning line that is an integral multiple of 4 before the scanning line to be set is also set to the high level for the preliminary scanning.

The scanning lines which are set to the high level for the pre-scanning are four of the scanning lines which are set to the high level for writing.
The previous scanning line may be used . In another aspect, a scanning line which is set to a high level for pre-scanning is a scanning line which is set to a high level for writing in two horizontal synchronization periods in which a voltage is applied from a signal line with the same polarity. first integer multiple previous scanline der four scanning lines for scanning the inner is, it may be a four previous scan line.

According to the liquid crystal display device of the present invention, there are provided a plurality of signal lines and a large number of scanning lines arranged on a substrate so as to intersect each other, and the signal lines arranged at intersections of the signal lines and the scanning lines. A thin film transistor connected to the scanning line, a liquid crystal arranged between an electrode connected to the thin film transistor and a transparent electrode facing the electrode, a source driver for driving a signal line, and a gate for driving the scanning line A driver, and a control circuit for controlling the driving of the source driver and the gate driver. The source driver inverts the polarity every two horizontal synchronization periods, and the gate driver switches the four lines of each scanning line to a high level for writing. The scanning circuit before the integral multiple is also controlled by the control circuit so as to be at the high level.

According to another aspect of the present invention, there is provided a liquid crystal display device comprising: a plurality of signal lines and a plurality of scanning lines arranged so as to intersect with each other on a substrate; and a plurality of signal lines arranged at intersections of the signal lines and the scanning lines. Line, a thin film transistor connected to the scan line, a liquid crystal disposed between an electrode connected to the thin film transistor and a transparent electrode facing the electrode, a source driver for driving a signal line, and a scan line A source driver, and a control circuit for controlling the driving of the gate driver. The source driver performs polarity inversion every two horizontal synchronization periods, and the gate driver sets a high level for each scanning line for writing. An integer of 4 of the scanning line that scans first in two horizontal synchronization periods in which a voltage is applied from the signal line with the same polarity among the scanning lines that are set to a high level for writing. Previous scanline is also controlled by the control circuit to a high level. According to the present invention, in a liquid crystal display device using a 2H dot inversion driving method in which polarity inversion is performed every two horizontal synchronization periods, scanning for writing an arbitrary line is performed, and at the same time, a writing voltage of another line having the same polarity is applied. A prescan is performed.

[0014]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic block diagram showing the configuration of the liquid crystal display device according to the first embodiment of the present invention. The liquid crystal panel 11 includes a signal line 18 and a scanning line 17.
Have a TFT (thin film transistor) 15 as a switching element at the intersection of
However, the signal line 18 is connected to the drain, and the electrode of the liquid crystal capacitor 16 forming a liquid crystal pixel is connected to the source. The opposite electrode of the liquid crystal capacitor 16 is a transparent electrode, and the scanning line 17 is opened by the high level. By writing a predetermined voltage to the liquid crystal capacitor 16 connected to the TFT 15 via the signal line 18, the liquid crystal is changed to obtain an image display.

The control circuit 12 generates signals for controlling the source driver 14 and the gate driver 13 from horizontal and vertical synchronization signals and video signals input from the outside. The source driver 14 and the gate driver 13 display an image on the liquid crystal panel 11 according to a control signal and a video signal from the control circuit 12. The source driver 14 inverts the polarity every two horizontal synchronization periods, and the gate driver 13 performs the scanning lines 17 for pre-scanning four horizontal synchronization periods before the timing when each scanning line 17 is set to a high level for writing. Is controlled by the control circuit 12 so that

As described above, the display quality of the liquid crystal of the liquid crystal display device is deteriorated when a DC voltage is continuously applied. Therefore, it is necessary to invert the polarity of the voltage applied to the liquid crystal at a certain period. One of the polarity inversion methods is dot inversion drive. In this method, as shown in FIG. 4 described above, polarity inversion is performed so that dots vertically and horizontally adjacent to each other have opposite polarities. In the dot inversion drive, uniform display is obtained, but the charge / discharge current to the liquid crystal increases due to the high frequency of polarity inversion. For the purpose of reducing power consumption, there is 2H dot inversion drive in which polarity inversion is performed every two horizontal synchronization periods and the charge / discharge frequency is halved. This is a method of inverting the polarity every two scanning lines as shown in FIG. 5, but has a problem as described in the problem to be solved by the invention. FIG. 5
Is an example of 2H dot inversion driving. For example, during the two horizontal synchronization periods, all may have the same polarity, and during the next two horizontal synchronization periods, all may have the opposite polarity.

The operation of the liquid crystal display device according to the first embodiment of the present invention will be described with reference to FIG. FIG. 2 is a timing chart showing the drive timing of the first embodiment of the liquid crystal display device of the present invention.

[0018] In Figure 2 the voltage V _D of the signal line 18 in a plurality of TFT15 to be connected to one signal line 18 scanning lines 1
7, the voltages _VG2N-4 , _VG2N-3 , _VG2N-2 , _VG2N-1 , V
_G2N , V _{G2N + 1,} and the voltage V _LC2N applied to the liquid crystal capacitor 16,
V _{LC2N + 1} and the line numbers 2n-4 to 2n + 1 of the scanning lines 17 selected for writing at that timing are displayed. 2 As shown in this case signal line V _D
The n line and the 2n + 1 line have the same polarity, and the 2n line and the 2n-1 line have the opposite polarities.

Here, a case where a voltage of ± V _D1 is written to the liquid crystal panel is shown. The signal line voltage V _D is
It is driven by alternating with ± V _D1 with respect to a certain reference voltage.
The scanning line voltages V _{G2n−4 to} V _{G2n + 1} become high level when writing to each line, turn on the TFT 15 and write the voltage of the signal line 18 to the liquid crystal capacitance 16.

In the above-mentioned prior art, as shown in FIG. 7, the scanning line 17 is set to the high level only once at the timing of writing the line once for each frame. In the embodiment of FIG. 2, V _{G2n of} FIG.
As shown by _{VG2n + 1} , the scanning line 17 is also at the high level at the timing four lines before the timing of writing to that line.

In the case of 2H dot inversion in which the polarity of the voltage applied to the liquid crystal is inverted every two horizontal synchronization periods, the polarity of the current line is the same as that of the line four horizontal synchronization periods ago. Therefore, by setting the scanning line 17 to the high level four horizontal synchronization periods before the writing timing to the line, the liquid crystal capacitor 16 can be preliminarily charged with the same polarity as the actual writing.

_Writing to the 2n line will be described with reference to the waveform of _VLC2n in FIG. The original writing timing to the liquid crystal capacitor 16 connected to the 2n line is the line 2n, but the scanning line _VG2n is _set to the high level at the timing of writing to the 2n-4 lines four horizontal synchronization periods before the pre-scanning. As a result, the liquid crystal capacitance 16 connected to the line 2n-4 becomes high level by _VLC2n-4 .
At the same time, writing is performed by the voltage + V _D1 of the signal line 18 through 5, and at the same time, the voltage + V _D1 of the signal line 18 is applied to the liquid crystal capacitor 16 connected to the 2n-th line to be preliminarily charged. At this time, since -V _D1 was applied to the liquid crystal capacitor 16 connected to the 2n line in the previous frame, the liquid crystal capacitor 16 having the opposite polarity +
To write to the V _D1 is required Many charge and discharge the liquid crystal capacitance 16. At this time, the signal line 18 is also changed from -V _{D1 of the} previous line to + V _{D1 of the} opposite polarity, so that it is necessary to charge and discharge the parasitic capacitance of the signal line. Therefore, as can be seen at line 2n-4 of V _LC2N , the desired voltage V
_A voltage V _D1 −ΔV _C smaller than _D1 by ΔV _C is written. At the actual writing timing 2n, the liquid crystal capacitance 1
Since 6 has already been charged to the same polarity, the amount of charge and discharge of the liquid crystal capacitance 16 and the parasitic capacitance of the signal line 18 can be reduced, and the target voltage V _D1 can be accurately written.

On the other hand, for the 2n + 1 line, 4 lines
During pre-charge and actual writing by pre-scan before scanning
In both cases, charging and discharging of the parasitic capacitance of the signal line 18 is performed on the previous line.
(2n line), so charging and discharging
No need for any _D1Is written exactly
You. As shown in FIG. 2, in the 2n + 1 line, the previous 2n
The charge and discharge of the parasitic capacitance of the signal line 18 has been completed on the line.
Therefore, there is a possibility that the battery will be charged to the same voltage as the 2n-3 line.
is there. Normally, the shading of the screen between adjacent lines has no correlation.
There is a pre-charge to the same voltage as 4 lines ago
Is also charged and discharged to the correct voltage by regular writing.
There is no title.

In the first embodiment, the pre-scanning timing is performed four horizontal synchronization periods before the scanning for writing the line, but may be performed in a horizontal synchronization period that is an integer multiple of four before. Since the polarity of the current line is the same as the polarity of the current line, the liquid crystal capacitor 15 is precharged and the purpose can be achieved.

Next, a second embodiment of the liquid crystal display device of the present invention will be described. FIG. 3 is a timing chart showing the drive timing of the liquid crystal display device according to the second embodiment of the present invention.

In the first embodiment, the pre-scan is performed for two lines in the two horizontal synchronization periods in which the voltage is applied from the signal line with the same polarity. In the second embodiment, the scan is performed first. The preliminary scanning is performed only on the line on which the scanning is performed, and the preliminary scanning is not performed on the line after the scanning. Since the configuration of the liquid crystal display device is the same as that of the first embodiment, the description is omitted, but the source driver 14 inverts the polarity every two horizontal synchronization periods, and the gate driver 13 applies a voltage from the signal line with the same polarity. The control circuit 12 controls the scanning line 17 to be at a high level four horizontal synchronization periods before the timing at which each scanning line 17 is set to a high level for writing only for the first line to be scanned in two horizontal synchronization periods. Is controlled from.

That is, as shown in FIG. 3, the pre-scanning is performed only on the 2n line, and the pre-scanning is not performed on the 2n + 1 line. The same effect can be obtained for the 2n + 1 line by ordinary driving without pre-scanning. The reason is that in the 2n + 1 line, the charging and discharging of the parasitic capacitance of the signal line 18 has been completed in the previous 2n line, so that the required charging and discharging amount is small, and the target voltage V _D1 can be accurately obtained even without preliminary scanning. Is likely to be written to Therefore, a uniform screen can be obtained with a small number of preliminary scans.

Also in the second embodiment, the pre-scanning timing is performed four horizontal synchronization periods before the scanning for writing the line, but the pre-scanning timing may be performed in a horizontal synchronization period that is an integral multiple of four before. Since the polarity of the current line is the same as the polarity of the current line, the liquid crystal capacitor 15 is precharged and the purpose can be achieved.

[0029]

As described above, the effect of the present invention is 2
This means that the deterioration of the image quality of the liquid crystal display device using the H dot inversion driving method can be prevented.

The reason is that the liquid crystal is charged to the same polarity before the writing operation by the pre-scan, so that there is no difference between the liquid crystal and the predetermined voltage due to the shortage of the charge / discharge capacity.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram illustrating a configuration of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing the drive timing of the liquid crystal display device according to the first embodiment of the present invention.

FIG. 3 is a timing chart showing drive timing of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 4 is a conceptual diagram of an example in which the polarity of a voltage applied to a liquid crystal pixel of a liquid crystal panel is inverted.

FIG. 5 is a conceptual diagram of an example of a 2H dot inversion driving method in which the polarity of a voltage applied to a liquid crystal pixel of a liquid crystal panel is inverted every two horizontal synchronization periods.

FIG. 6 is a schematic block diagram showing a configuration of a liquid crystal display device using a conventional 2H dot inversion driving method.

FIG. 7 is a timing chart showing drive timings of the liquid crystal display device of FIG.

FIG. 8 is a schematic configuration diagram of a conventional liquid crystal display device disclosed in JP-A-2-168229.

FIG. 9 is a timing chart showing drive timings of the liquid crystal display device of FIG.

[Explanation of symbols]

 11, 61 Liquid crystal panel 12, 62 Control circuit 13, 63 Gate driver 14, 64 Source driver 15, 65 TFT 16, 66 Liquid crystal capacitance 17, 67 Scan line 18, 68 Signal line 81 Amplifier 82, 83 Sample hold circuit 85 TFT 86 LCD pixel

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/133 550 G09G 3/36

Claims (6)

(57) [Claims] A plurality of signal lines and a plurality of scanning lines are arranged on a liquid crystal panel of a liquid crystal display device so as to intersect with each other, and a thin film transistor is disposed at an intersection between the signal lines and the scanning lines. A source driver for driving the signal line, wherein the liquid crystal constituting a liquid crystal pixel is disposed between an electrode connected to the thin film transistor and a transparent electrode opposed to the electrode, the source driver being connected to a scanning line; A gate driver that drives a line; and a control circuit that controls the driving of the source driver and the gate driver. The gate driver controlled by the control circuit sequentially sets the scan line to a high level for writing. To turn on the thin film transistor connected to the scanning line during one horizontal synchronization period, and to turn on the thin film transistor by the source driver controlled by the control circuit. A predetermined voltage is sequentially output to the plurality of signal lines so as to make a round of the plurality of signal lines during a normal synchronization period, and the liquid crystal pixels connected to the high-level scanning line are sequentially output from the signal lines to the predetermined level. And a predetermined voltage output to the signal line corresponds to a video signal input to the control circuit, and a predetermined voltage is output during one horizontal synchronization period. , The polarity is inverted in the same order during the subsequent one horizontal synchronization period, and the operation of inverting the polarity with the previous two horizontal synchronization periods during the next two horizontal synchronization periods is continued. In the next frame, repetition of inverting all the polarities with respect to the previous frame is repeated, and the scanning line for writing for image display is set high for pre-scanning even before a predetermined horizontal synchronization period. Level Therefore, in order of writing for image display
A driving method for a liquid crystal display device, wherein a scanning line which is an integer multiple of 4 before the scanning line set to a high level is also set to a high level for preliminary scanning. 2. The driving method of a liquid crystal display device according to claim 1 , wherein the scanning line which is set to a high level for preliminary scanning is the scanning line four lines before. 3. A plurality of signal lines and a plurality of scanning lines are arranged on a liquid crystal panel of a liquid crystal display device so as to intersect with each other, and a thin film transistor is disposed at an intersection between the signal lines and the scanning lines. A source driver for driving the signal line, wherein the liquid crystal constituting a liquid crystal pixel is disposed between an electrode connected to the thin film transistor and a transparent electrode opposed to the electrode, the source driver being connected to a scanning line; A gate driver that drives a line; and a control circuit that controls the driving of the source driver and the gate driver. The gate driver controlled by the control circuit sequentially sets the scan line to a high level for writing. To turn on the thin film transistor connected to the scanning line during one horizontal synchronization period, and to turn on the thin film transistor by the source driver controlled by the control circuit. A predetermined voltage is sequentially output to the plurality of signal lines so as to make a round of the plurality of signal lines during a normal synchronization period, and the liquid crystal pixels connected to the high-level scanning line are sequentially output from the signal lines to the predetermined level. And writing is performed for image display. The predetermined voltage output to the signal line corresponds to a video signal input to the control circuit, and is a predetermined voltage during one horizontal synchronization period. , The polarity is inverted in the same order during the subsequent one horizontal synchronization period, and the operation of inverting the polarity with the preceding two horizontal synchronization periods during the next two horizontal synchronization periods is continued. In the next frame, repetition of inverting all polarities with respect to the previous frame is repeated, and the scanning line for writing for image display is set high for a pre-scan before a predetermined horizontal synchronization period. Level Therefore, in order of writing for image display
Of the scanning lines that are at a high level,
The first of two horizontal synchronization periods when voltage is applied
A driving method for a liquid crystal display device, wherein a scanning line which is an integral multiple of 4 before the scanning line to be scanned is also set to a high level for preliminary scanning. 4. A two-horizontal synchronization mode in which a voltage is applied from the signal line with the same polarity among the scanning lines set to a high level for pre-scanning among the scanning lines set to a high level for writing. 4. The driving method for a liquid crystal display device according to claim 3 , wherein the scan line is four scan lines before the scan line to be scanned first in a period. 5. A plurality of signal lines and a plurality of scanning lines arranged on a substrate so as to intersect with each other, and the signal lines and the scanning lines arranged at intersections between the signal lines and the scanning lines. , A liquid crystal disposed between an electrode connected to the thin film transistor and a transparent electrode facing the electrode, a source driver for driving the signal line, and a gate driver for driving the scanning line And a control circuit for controlling the driving of the source driver and the gate driver. The source driver performs polarity inversion every two horizontal synchronization periods, and the gate driver sets each of the scans to a high level for writing. 2. The liquid crystal display device according to claim 1, wherein the control circuit controls the scanning line, which is an integral multiple of 4 lines before, to a high level. 6. A large number of signal lines and a large number of scanning lines which are arranged on a substrate so as to intersect with each other, and a plurality of signal lines and a large number of scanning lines which are arranged at intersections of the signal lines and the scanning lines. A connected thin film transistor, a liquid crystal disposed between an electrode connected to the thin film transistor and a transparent electrode facing the electrode, a source driver for driving the signal line, and a gate driver for driving the scanning line. A control circuit for controlling driving of the source driver and the gate driver, wherein the source driver performs polarity inversion every two horizontal synchronization periods, and the gate driver sets each of the scanning lines to a high level for writing. Out of the scanning lines which are set to a high level for writing data, the scanning is performed first during two horizontal synchronization periods in which a voltage is applied from the signal line with the same polarity. A liquid crystal display device wherein the scanning circuit is controlled by the control circuit so that the scanning line, which is an integer multiple of 4 before the scanning line, also has a high level.