JP2002328654A - Driving method for liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driving method for liquid crystal display and a liquid crystal display using an OCB(Optically self-Compensated Birefringence) cell by which occurrence of a reverse transition is suppressed and a satisfactory video can be displayed. SOLUTION: In the driving method in which an image signal and a non-image signal for suppressing a reverse transition phenomenon are alternately written in the pixel, a polarity to the prescribed reference electrical potential of the non-image signal image written in the pixel in the state where the image signal is held by the pixel is unified to all the pixels on a panel, and the polarity to the reference potential of the image signal written in the pixel in the state where the non-image signal is held by the pixel is also unified to all the pixels on the panel.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving an active matrix type liquid crystal display device and a liquid crystal display device, and more particularly to an OCB (Opt) having a wide viewing angle and high-speed response.
ially self-Compensated B
The present invention relates to a method for driving a liquid crystal display device using a liquid crystal mode and a liquid crystal display device.

[0002]

2. Description of the Related Art As is well known, liquid crystal display devices are widely used as screen display devices for computer devices and the like, but their use in TV applications is expected to expand in the future. However, the currently widely used TN (Twi
In the case of the “sted nematic” mode, the viewing angle is narrow, the response speed is insufficient, and the contrast is reduced due to parallax.
There is a major problem in display performance when used as a TV, such as blurring of a moving image.

In recent years, research on OCB mode has been advanced in place of TN mode. OCB has characteristics such as a wide viewing angle and high-speed response compared to TN, and can be said to be a display mode more suitable for displaying a natural moving image.

Hereinafter, a conventional driving method of a liquid crystal display device and a liquid crystal display device will be described. In FIG. 2, X
, Xn are gate lines, Y1, Y2, ..., Ym
Denotes a source line, 207 denotes a thin film transistor (hereinafter, referred to as TFT) as a switching element, and each drain electrode of each TFT is connected to a pixel electrode in the pixel 206. Each pixel 206 is composed of a pixel electrode, a counter electrode, and liquid crystal held between both electrodes. The counter electrode is driven by a voltage supplied by the counter drive unit 205.

[0005] Reference numeral 204 denotes a gate driver for applying a voltage for turning on the TFT or a voltage for turning off the TFT to the gate lines Y1, Y2, ..., Ym. The gate driver 204 synchronizes with the supply of data to the source line,
An ON potential is sequentially applied to the gate lines Y1, Y2,..., Ym.

Reference numeral 203 denotes a source driver which outputs a voltage to be supplied to the pixel 206 to the source lines X1, X2,..., Xn. The phase of the supplied voltage is opposite to the phase of the voltage supplied to the common electrode. Become. The difference between the voltage supplied to the counter electrode and the voltage supplied to the source lines X1, X2,..., Xn and applied to each pixel 206 is the voltage applied to both ends of the liquid crystal in the pixel 206. Is determined.

[0007] Such a driving method is the same whether the OCB cell is used or the TN type cell is used. However,
The OCB cell sets T
It requires a unique drive not found in N-type cells.

The OCB cell has a bend orientation in which an image can be displayed and a splay orientation in which an image cannot be displayed. In order to shift from the splay alignment to the bend alignment (hereinafter referred to as transition), unique driving such as application of a high voltage for a certain period of time is required. However, the drive relating to this transition is not directly related to the present invention, and will not be described further.

[0009] Even if the OCB cell once transitions to the bend orientation due to the unique driving described above, if the voltage of a predetermined level or more is not applied for a certain period of time, the bend orientation cannot be maintained and the OCB cell returns to the splay orientation. (Hereinafter, this phenomenon is called reverse transition).

[0010] To suppress the occurrence of reverse transition, refer to
No. -109211 and the Japanese Liquid Crystal Society's April 25, 1999 issue (Vol. 3. No. 2) P99 (17) to P99
It is known that a high voltage may be applied periodically, as described in 106 (24). Hereinafter, the drive for periodically applying a high potential and suppressing the reverse transition will be referred to as CR drive.

FIG. 3 shows a potential-transmittance curve of a general OCB.

In FIG. 3, reference numeral 301 denotes a potential-transmittance curve when a predetermined potential for preventing reverse transition is not inserted;
Is a potential-transmittance curve in the case of CR driving in which a predetermined potential for preventing reverse transition is inserted, 303 is a critical potential Vth at which reverse transition from bend orientation to splay orientation occurs without reverse transition prevention, and 304 is most important. Potential at the time of high transmittance (white potential), 305 is the potential at the lowest transmittance (black potential)
It is. If the reverse transition is not prevented, the film returns to the splay alignment below Vth, so that an appropriate transmittance cannot be obtained.
Therefore, it must be driven at a potential equal to or higher than Vth.
As shown in the figure, in that case, sufficient luminance cannot be obtained.
The liquid crystal represented by OCB and TN needs to be driven by so-called AC, but the above-mentioned Japanese Patent Application Laid-Open No. 11-109921 and the above-mentioned Journal of the Liquid Crystal Society of Japan do not describe the specific configuration. It is not possible to specify whether or not to carry out an AC reversal. Therefore, a description will be given of a conventional example of CR driving, which is the most common driving, in which a combination of inversion per line and inversion per frame is performed. FIG. 19 is a diagram showing a configuration of a conventional liquid crystal display device, and FIG. 20 is a diagram showing timings of an image signal and each driver drive pulse. Hereinafter, the driving will be described with reference to FIGS. In FIG. 19, reference numeral 1901 denotes a signal conversion unit which doubles an input image signal for each line and converts the input image signal into a double speed image signal and a double speed non-image signal, and 1902 generates a pulse for driving each source / gate driver. 1903 is a source driver, 1904 is a gate driver, and 1905 is a liquid crystal panel. For convenience, in the description, the number of source lines and the number of gate lines of the liquid crystal panel 1905 are ten and ten, and similarly, one frame period is composed of ten horizontal periods.

Next, the operation of the conventional CR drive will be described. First, the input image signal is doubled for each line in the double speed signal conversion unit 1901, and the source driver 1903
Is input to FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation. The input image signal is written into the line memory 602 in synchronization with a clock (hereinafter, referred to as a write clock) generated from a synchronization signal synchronized with the image signal in the control signal generation unit 601. On the other hand, the line memory 6
02 is read out from the control signal generator 6 so that the frequency of the image signal is twice the frequency of the write clock.
01, a clock generated from the synchronization signal (hereinafter referred to as
1 at the time of writing in synchronization with the read clock).
The data is read from the line memory 602 during the period of / 2. While the image signal is being read from the line memory 602, the output signal selection unit 604 selects this image signal as an output. In the remaining period, the output signal selection unit 604
Selects a non-image signal output from the non-image signal generation unit 603 as an output. As described above, the non-image signal and the image signal that have been doubled in speed are output in one horizontal period in the input signal. The source driver supplies the input double speed signal to the source line of the panel while inverting the AC. FIG. 20 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion. The polarity control signal for switching the AC polarity is a signal obtained by performing an exclusive OR operation of the line inversion signal (A) and the frame inversion signal (B), and is generated by the control pulse generation unit 1902. FIG. 24 shows the input / output characteristics of the source driver 1903.
Shown in In the figure, the signal output on the higher side with respect to the reference potential is expressed as positive polarity, and the signal output on the lower side is expressed as negative polarity. Further, in FIG. 20, this polarity is set to "
As shown in the figure, the source driver 1903 supplies a positive voltage when the polarity control signal is HI and a negative voltage when the polarity control signal is LOW.
0, the gate pulses P1 to P10 are pulses for respectively selecting ten gate lines on the panel 1905 during the HI period, and are driven as follows in accordance with the timing of the double speed signal input to the source driver. Is done. In the period T0_1 shown in FIG. 20, the gate pulse P1
Becomes HI, and the pixel on the gate line G1 is supplied with the image signal S1.
Is written with a positive polarity. In the subsequent period T0_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a negative polarity. In the period T0_3,
The gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a negative polarity. Subsequent period T0_
4, the gate pulse P8 becomes HI, and the gate line G8
, A non-image signal is written with a positive polarity. Hereinafter, signals are sequentially written according to the polarity of the polarity control signal (G). In this manner, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once. In T1_1 of the next second frame, the gate pulse P1 becomes HI,
The image signal S′1 is written to the pixel on the gate line G1 with a negative polarity opposite to that of the first frame. Subsequent period T1
_2, the gate pulse P7 becomes HI and the gate line G
7, a non-image signal is written with a polarity opposite to that of the first frame. Thereafter, similarly, signals of the opposite polarity to the first frame are sequentially written. With the above operation, the image signal and the non-image signal can be written periodically, and the reverse transition can be prevented by appropriately applying the voltage of the non-image signal.

[0014]

However, in the above-mentioned driving, attention is paid to the relationship between the polarity of the image signal written to the pixel and the polarity of the non-image signal to be written. The polarity of the image signal is opposite to the polarity of the non-image signal to be written,
Hereinafter, the polarity is similarly reversed up to 5 lines, but 6 lines to 1 line.
The zero line has the same polarity, and the phase relationship is broken.

Conversely, the polarity of the non-image signal written to the pixel and the polarity of the image signal to be written are the same for lines 1 to 5, and opposite for lines 6 to 10. If the line breaks at a line having a polarity inversion relationship as described above, it affects the charging of the liquid crystal and causes a loss of image quality uniformity.

In particular, recent liquid crystal panels have become larger and have higher definition, and accordingly, the wiring resistance in the glass substrate has increased, and the charging time of the pixels has tended to be shorter.

For this reason, the influence of the collapse of the phase relationship on the charging of the pixel cannot be ignored, despite the performance improvement technology of the pixel transistor. That is, in the above example, the luminance difference is recognized at the boundary between the fifth and sixth lines on the screen.

Further, in the above example, the driving frequency is doubled as compared with the normal driving in which non-pixel signals are not inserted, and the writing time of the pixel signal to each pixel is reduced to half. Therefore, there may be a case where data cannot be sufficiently written to the pixel. Therefore, an object of the present invention is to solve the above problems and provide a driving method of a liquid crystal display device and a liquid crystal display device capable of displaying a good image.

[0019]

According to a first aspect of the present invention, a plurality of source lines to which a pixel signal is supplied, a plurality of gate lines to which a scanning signal is supplied, and a plurality of source lines are provided. A method for driving a liquid crystal display device having a liquid crystal panel composed of pixel cells arranged in a matrix corresponding to the intersections of the gate lines, the display period of one image (hereinafter referred to as
Within a frame period), a pixel signal (hereinafter, referred to as an image signal) corresponding to the one image and a pixel signal (hereinafter, a non-image signal) different from the pixel signal are provided to all the pixel cells on the liquid crystal panel. In the driving method for writing, the image signal and the non-image signal are written in the pixel cells with their polarities inverted in synchronization with a frame period with reference to a predetermined level of potential. It is characterized by.

As a result, the degree of writing of each pixel is made uniform, and there is an effect that uniform image display quality can be obtained over the entire screen.

According to a second aspect of the present invention, in the first aspect, the polarity of the non-image signal with respect to the reference potential is equal to the reference potential of the image signal held by the pixel cell at the time of writing to the pixel cell. And the polarity of the image signal with respect to the reference potential is opposite to the polarity with respect to the reference potential of the non-image signal held by the pixel cell at the time of writing to the pixel cell. It is controlled so that This has the effect of making writing of non-image signals easier.

In a third aspect based on the first aspect, the polarity of the non-image signal with respect to the reference potential is equal to the reference potential of the image signal held by the pixel cell at the time of writing to the pixel cell. The polarity of the image signal with respect to the reference potential is the same as the polarity of the non-image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. It is controlled so that This has the effect of making writing of image signals easier.

The fourth invention is different from the second invention in that, in writing the non-image signal to the pixel cell, two
By selecting one of the gate lines, the selected 2
The same non-image signal is simultaneously written to the pixel cells on the scanning lines, and then one of the gate lines selected at the same time is selected, and the image signal is applied to the pixel cells on the selected gate line. Is written. Thus, the fourth aspect of the invention has an effect of making it easier to write an image signal than the second aspect of the invention.

The fifth invention is different from the third invention in that, in writing the image data to the pixel cells, two times
By selecting one of the gate lines, the selected 2
The same image data is simultaneously written to the pixel cells on the scanning lines, and then one of the gate lines selected at the same time is selected, and the non-image data is written to the pixel cells on the selected gate line. Is written.
Thus, the fifth aspect of the invention has an effect of making it easier to write a non-image signal than the third aspect of the invention.

A sixth invention is different from the second invention in that, when writing the non-image data to the pixel cells, a plurality of the gate lines are selected at the same time, so that the same gate line is selected on different scanning lines. The same non-image data is simultaneously written to a plurality of pixel cells. This has the effect of avoiding a reduction in the writing time of each pixel due to non-image signal writing, and eliminating image degradation due to a reduction in the writing time.

According to a seventh aspect, in the third aspect, in writing the image data to the pixel cells, a plurality of the gate lines are selected at the same time, so that a plurality of the gate lines are selected on different scanning lines. The same image data is simultaneously written to the pixel cells. This allows
This has the effect of avoiding a reduction in the writing time of each pixel due to non-image signal writing and eliminating image degradation due to a reduction in the writing time.

The eighth invention is characterized in that, in the sixth and seventh inventions, the simultaneously selected gate lines are two or more even gate lines adjacent to each other on the liquid crystal panel. .

According to a ninth aspect, in the sixth and eighth aspects, in writing the non-image data to the pixel cells, another one gate line (hereinafter, referred to as a precharge line) is provided. At the same time, the same non-image data is simultaneously written to the pixel cells on all the selected gate lines including this pre-charge line, and then the pre-charge line is selected, and the pixel cells on this pre-charge line are It is characterized by writing image data. This has the effect of avoiding a reduction in the writing time of each pixel due to non-image signal writing, eliminating image degradation due to a reduction in the writing time, and facilitating the writing of image signals.

A tenth aspect of the present invention is the liquid crystal display device according to the seventh and eighth aspects, wherein the image data is written in a pixel cell.
A gate line for writing image data and a plurality of the gate lines for simultaneously writing non-image data are simultaneously selected, and the same image data is simultaneously written to pixel cells on all the selected gate lines. Preferably, among the selected gate lines, a plurality of gate lines for simultaneously writing non-image data are selected, and non-image data is written to pixel cells on the plurality of gate lines. This has the effect of avoiding a reduction in the writing time of each pixel due to non-image signal writing, eliminating image degradation due to the reduction in writing time, and facilitating writing of non-image signals.

According to an eleventh aspect of the present invention, in any one of the fourth to tenth aspects, when the number of simultaneously selected gate lines excluding the precharge line is N, the number of scan lines included in the frame period is Is adjusted in advance to be (2M + 1) × N. As a result, it is possible to eliminate a discontinuity in the timing at the time of driving which may depend on the input image signal, and to display a good image independent of the input image signal.

A twelfth invention is characterized in that, in any one of the first to eleventh inventions, the liquid crystal cell is an OCB cell.

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 7 is a diagram showing a configuration of a liquid crystal display device according to a first embodiment of the present invention. FIG. 1 shows the timing of an image signal and each driver drive pulse. FIG.

Hereinafter, the driving will be described with reference to FIGS.

The configuration of the liquid crystal display device according to the first embodiment is the same as that of the above-described conventional liquid crystal display device except that the driving pulse generator 1902 is replaced by 702. The other components are the same, and the same components are denoted by the same reference numerals and description thereof is omitted. For convenience, in the description, the number of source lines of the liquid crystal panel 1905 is 10
It is assumed that the number of lines and gate lines is ten, and similarly, one frame period is composed of ten horizontal periods. Next, the operation of the CR drive according to the first embodiment will be described. First, the input image signal is doubled for each line in the double-speed signal conversion unit 1901 and input to the source driver 1903. FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation. The double-speed conversion operation is the same as that of the conventional example, and a description thereof is omitted. However, the double-speed signal conversion unit outputs a non-image signal doubled in one horizontal period of the input signal and an image signal. The source driver supplies the input double speed signal to the source line of the panel while inverting the AC. FIG. 1 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion. The polarity control signal for switching the AC polarity is generated in the control pulse generator 702 by the following method, for example, as shown in FIG. An image period signal (A) indicating HI during the image signal period, a frame inversion signal (B) synchronized with the writing of the image signal, a frame inversion signal (C) synchronized with the writing of the non-image signal, and a line-by-line inversion. Using the signal (D), (E) is the exclusive OR of (D) and (B), (F)
Generates an exclusive OR signal of (D) and (C), and further generates a signal (G) which becomes (F) when (A) is HI and (F) when it is LOW, and outputs this signal to the source. The signal polarity control signal (G) is used. In the present embodiment, the relationship between the frame inversion signal (B) synchronized with the writing of the image signal and the frame inversion signal (C) synchronized with the writing of the non-image signal is as shown in FIG. ) Must be such that they fall earlier. Using the polarity control signal (G) generated as described above, the source driver supplies a positive voltage when the control signal is HI and a negative voltage when the control signal is LOW. The input / output characteristics of the source driver 1903 are shown in FIG. In FIG. 1, the relationship between the positive polarity and the negative polarity is shown as “+” and “−” during the selection period of each gate. In FIG. 1, gate pulses P1 to P10
Are pulses that respectively select ten gate lines on the panel 1905 during the HI period, and are driven as follows in accordance with the timing of the double-speed signal input to the source driver. In the period T0_1 shown in FIG. 1, the gate pulse P1 becomes HI, and the pixels on the gate line G1
The image signal S1 is written with a negative polarity. In the subsequent period T0_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a positive polarity. Period T0
_3, the gate pulse P2 becomes HI, and the gate line G
2, the image signal S2 is written with a positive polarity. In the subsequent period T0_4, the gate pulse P8 becomes HI, and the non-image signal is written to the gate line G8 with a negative polarity. Hereinafter, signals are sequentially written according to the polarity of the polarity control signal (G). Further, in the period T0_10, the gate pulse P1 becomes HI again, and the pixel on the gate line G1 is
A non-image signal is written with a negative polarity. In this manner, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once. In T1_1 of the next second frame, the gate pulse P1 becomes HI, and the image signal S′1 is written to the pixel on the gate line G1 with the polarity opposite to that of the first frame. In the subsequent period T1_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G6 with a negative polarity opposite to that of the first frame. Thereafter, similarly, signals of the opposite polarity to the first frame are sequentially written.
As described above, according to the driving method of the liquid crystal display device according to the first embodiment of the present invention, the image signal and the non-image signal are alternately written to each pixel, and all pixels are written to the pixels. The polarity of the non-image signal is the same as the polarity of the image signal to be written, which facilitates writing of the image signal. Therefore, the degree of writing of the image signal to each pixel is made uniform, and more uniform display image quality can be obtained. In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Second Embodiment) FIG. 7 shows a second embodiment of the present invention.
FIG. 8 is a diagram showing the configuration of the liquid crystal display device according to the embodiment, and FIG. 8 is a diagram showing the timing of an image signal and each driver drive pulse. Hereinafter, the driving will be described with reference to FIGS. Note that the configuration of the liquid crystal display device according to the second embodiment is a configuration in which the drive pulse generation unit 1902 in the liquid crystal display device according to the above-described conventional embodiment is replaced with 702. The other components are the same, and the same components are denoted by the same reference numerals and description thereof is omitted.

For convenience, in the description, the number of source lines and the number of gate lines of the liquid crystal panel 1905 are ten and ten, and similarly, one frame period is composed of ten horizontal periods. Next, the operation of the CR drive according to the second embodiment will be described. First, an input image signal is converted into a double-speed signal
, The speed is doubled for each line, and the source driver 19
03 is input. FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation. The double-speed conversion operation is the same as that of the first embodiment, and a description thereof will not be repeated. However, the double-speed signal conversion unit converts the double-speed non-image signal and the image signal in time series in one horizontal period of the input signal. Is output to The source driver supplies the input double speed signal to the source line of the panel while inverting the AC.

FIG. 8 shows a configuration in which a combination of the line-by-line inversion and the frame-by-frame inversion is performed as an example of performing the AC inversion. The polarity control signal for switching the AC polarity is generated in the control pulse generator 702 by the following method, for example, as shown in FIG. An image period signal (A) indicating positive during the image signal period, a frame inversion signal (B) synchronized with the writing of the image signal, a frame inversion signal (C) synchronized with the writing of the non-image signal, and a line-by-line inversion. Using the signal (D), (E) is (D) and (B)
(F) generates an exclusive OR signal of (D) and (C). Further, when (A) is HI (E), L
A signal (G) which becomes (F) at the time of OW is generated and is used as a polarity control signal (G) of the source signal. In the present embodiment, the relationship between the frame inversion signal (B) synchronized with the writing of the image signal and the frame inversion signal (C) synchronized with the writing of the non-image signal is as shown in FIG. )
The phase relationship must fall earlier. When the polarity control signal (G) is HI, the positive polarity voltage, LO
At the time of W, a negative voltage is supplied by the source driver. The input / output characteristics of the source driver 1903 are shown in FIG. The relationship between the positive polarity and the negative polarity is shown as “+” and “−” in the selection period of each gate in FIG. In FIG. 8, gate pulses P1 to P10 are pulses for respectively selecting ten gate lines on panel 1905 during the HI period. In a period T0_1 shown in the figure, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a negative polarity. Subsequent period T0_
2, the gate pulse P7 becomes HI, and the gate line G7
, A non-image signal is written with a negative polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a positive polarity. Subsequent period T
In 0_4, the gate pulse P8 becomes HI, and the non-image signal is written to the gate line G8 with a positive polarity. Hereinafter, signals are sequentially written according to the polarity of the polarity control signal (G). Further, in the period T0_10, the gate pulse P
1 becomes HI again, and the non-image signal is written with a positive polarity to the pixel on the gate line G1. . As described above, all the gate lines on the panel are selected twice in one frame period, and the pixels on each gate line receive one image signal and one non-image signal.
Written each time. In T1_1 of the next second frame, the gate pulse P1 becomes HI, and the image signal S′1 is written to the pixel on the gate line G1 with the polarity opposite to that of the first frame. In the subsequent period T1_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a polarity opposite to that of the first frame. Thereafter, similarly, signals of the opposite polarity to the first frame are sequentially written.
As described above, according to the driving method of the liquid crystal display device according to the second embodiment of the present invention, the image signal and the non-image signal are alternately written to each pixel, and all the pixels are written to the pixels. The polarity of the image signal is the same as the polarity of the non-image signal to be written, which facilitates writing of the non-image signal. Therefore, the degree of writing of the non-image signal to each pixel is made uniform, and a more uniform display image quality can be obtained. In addition,
In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this, and writing is performed to adjacent pixels on each line. The same applies to a so-called column inversion drive in which the polarities of signals to be inverted are mutually inverted.

(Third Embodiment) In the first embodiment, that is, in the CR driving, the driving frequency is twice that of the normal driving, and the writing time of the pixel signal to each pixel is reduced to half. Be shorter. Therefore, data writing to pixels may not be sufficiently performed due to the increase in size and definition of the liquid crystal panel. Therefore, in the third embodiment of the present invention, a pixel signal having the same polarity is written to each pixel immediately before a normal pixel signal writing timing, in contrast to the driving method of the first embodiment. That is, a so-called precharge drive for improving the writing of data is introduced.

FIG. 9 is a diagram showing a configuration of a liquid crystal display device according to a third embodiment of the present invention, and FIG. 10 is a diagram showing timings of an image signal and each driver drive pulse. Hereinafter, the driving will be described with reference to FIGS. Note that the configuration of the liquid crystal display device according to the third embodiment is a configuration in which the drive pulse generation unit 1902 in the liquid crystal display device according to the above-described conventional embodiment is replaced with 902. The other components are the same, and the same components are denoted by the same reference numerals and description thereof is omitted. For convenience, in the description,
The number of source lines and the number of gate lines of the liquid crystal panel 1905 are ten and eleven, and similarly, one frame period is composed of eleven horizontal periods. Next, the operation of the CR drive according to the third embodiment will be described. First, the input image signal is doubled for each line in the double-speed signal conversion unit 1901 and input to the source driver 1903. FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation. The double-speed conversion operation is the same as that of the first embodiment, and a description thereof will not be repeated. However, the double-speed signal conversion unit converts the double-speed non-image signal and the image signal in time series in one horizontal period of the input signal. Is output to The source driver supplies the input double-speed signal to the source line of the panel while inverting the AC. FIG. 10 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion. The polarity control signal for switching the AC polarity is generated by the control pulse generator 902 in the same manner as in the first embodiment. When the polarity control signal is HI, a positive polarity voltage, LOW
At this time, a negative voltage is supplied by the source driver.
The input / output characteristics of the source driver 1903 are shown in FIG.
The relationship between the positive polarity and the negative polarity is shown as “+” and “−” in the selection period of each gate in FIG. In FIG. 10, gate pulses P1 to P10 are pulses for respectively selecting 11 gate lines on panel 1905 during the HI period. In a period T0_1 shown in the figure, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a positive polarity. Subsequent period T0_
In 2, the gate pulses P2 and P5 become HI, and a non-image signal is written to the gate lines G2 and G5 with a negative polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a negative polarity. In the subsequent period T0_4, the gate pulses P3 and P6 are at H level.
I, and a non-image signal is written to the gate lines G3 and G6 with a positive polarity. Hereinafter, signals are sequentially written as shown in the figure. As described above, all the gate lines on the panel are selected three times in one frame period, and the image signal is written once and the non-image signal is written twice to the pixels on each gate line. In T1_1 of the next second frame, the gate pulse P
1 becomes HI, and the image signal S′1 is written to the pixel on the gate line G1 with the negative polarity opposite to that of the first frame.
In the subsequent period T1_2, the gate pulses P2 and P5
Becomes HI, and the non-image signal is written to the gate lines G2 and G5 with the negative polarity opposite to that of the first frame. The same applies to 1
Signals of the opposite polarity to the frame are sequentially written. As described above, according to the driving method of the liquid crystal display device and the liquid crystal display device according to the third embodiment of the present invention, the non-image signal of the same polarity immediately before the image signal is preliminarily written, so that the Charging can be performed more sufficiently, and shortage of writing due to shortening of writing time can be improved. As a result, more desirable display image quality can be obtained. In FIG. 10, since the non-image signal is written 7.5 horizontal periods after the writing of the image signal, the non-image signal precharged immediately before the image signal is adjacent to the non-image signal of 0.5.
The phase relationship is before the horizontal period. As shown in FIG.
In a configuration in which the non-image signal is written after 6.5 horizontal periods after writing the image signal, the non-image signal to be precharged before writing the image signal has a phase relationship of 1.5 horizontal periods before. As described above, the phase of the precharge signal is appropriately determined according to the phase relationship between the image signal and the non-image signal. When the selection period of the precharge signal is adjacent to the selection period of the image signal as shown in FIG.
Since it is not necessary to insert a non-selection period between the selection periods, it is possible to eliminate the influence of the dull transmission of the gate pulse, so that a more desirable configuration is obtained. Further, in the above embodiment, it is preferable that one frame period is an odd-numbered horizontal period, and a rate conversion unit using memory or the like is provided so that one frame period is always an odd-numbered horizontal period. If the signal rate conversion is performed, a more desirable configuration is obtained. In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Fourth Embodiment) In the second embodiment, that is, in the CR driving, the driving frequency is twice that of the normal driving, and the writing time for each pixel is one.
/ 2. Therefore, in a fourth embodiment of the present invention,
In contrast to the driving method according to the second embodiment, a so-called dual charge method in which writing of non-pixel signals is improved by writing non-pixel signals of the same polarity immediately after normal non-pixel signal writing timing for each pixel. Drive is introduced. FIG. 12 is a diagram illustrating a configuration of a liquid crystal display device according to a fourth embodiment of the present invention, and FIG. 13 is a diagram illustrating timings of an image signal and each driver driving pulse. Less than,
The driving will be described with reference to FIGS. In addition,
The configuration of the liquid crystal display device according to the fourth embodiment is the same as the liquid crystal display device according to the above-described conventional embodiment except that the drive pulse generation unit 1902 is replaced with 1202. The other components are the same, and the same components are denoted by the same reference numerals and description thereof is omitted. For convenience, in the description, it is assumed that the number of source lines of the liquid crystal panel 1905 is 10, the number of gate lines is 11, and one frame period is composed of 11 horizontal periods. Next, the operation of the CR drive according to the fourth embodiment will be described. First, the input image signal is doubled for each line in the double-speed signal conversion unit 1901,
Input to the source driver 1903. FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation. The double-speed conversion operation is the same as that of the first embodiment, and a description thereof will not be repeated. However, the double-speed signal conversion unit converts the double-speed non-image signal and the image signal in time series in one horizontal period of the input signal. Is output to The source driver supplies the input double-speed signal to the source line of the panel while inverting the AC. FIG. 13 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion. The polarity control signal for switching the AC polarity is generated by the control pulse generator 1202 in the same manner as in the second embodiment. A positive voltage is supplied by the source driver when the polarity control signal is HI, and a negative voltage is supplied by the source driver when the polarity control signal is LOW. The input / output characteristics of the source driver 1903 are shown in FIG. In FIG. 13, the relationship between the positive polarity and the negative polarity is shown as “+” and “−” during the selection period of each gate. In FIG. 13, gate pulses P1 to P10 are pulses for respectively selecting 11 gate lines on panel 1905 during the HI period. In a period T0_1 shown in the figure, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a positive polarity. Subsequent period T0_2
, The gate pulses P5 and P7 become HI, and the non-image signal is written to the gate lines G5 and G7 with a positive polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a negative polarity. In the subsequent period T0_4, the gate pulses P6 and P8 are set to HI.
, And a non-image signal is written to the gate lines G6 and G8 with a negative polarity. Hereinafter, signals are sequentially written as shown in the figure. As described above, all the gate lines on the panel are selected three times in one frame period, and the image signal is written once and the non-image signal is written twice to the pixels on each gate line.
In T1_1 of the next second frame, the gate pulse P1 becomes HI, and the image signal S′1 is applied to the pixel on the gate line G1.
Is written with a negative polarity opposite to that of the first frame. In the subsequent period T1_2, the gate pulses P5 and P7 are set to HI.
, And the non-image signal is written to the gate lines G5 and G7 with the negative polarity opposite to that of the first frame. Thereafter, similarly, signals of the opposite polarity to the first frame are sequentially written. As described above, according to the driving method of the liquid crystal display device and the liquid crystal display device according to the fourth embodiment of the present invention, after writing the non-image signal, the non-image signal of the same polarity is prognostically written, so that the pixel Charging can be performed more sufficiently, and shortage of writing due to shortening of writing time can be improved. As a result, more desirable display image quality can be obtained. So far, after writing the non-image signal,
Although the case where a non-image signal of the same polarity is prognostically written has been described as an example, as shown in FIG. 4, it is similarly possible to precharge with an image signal of the same polarity immediately before writing of the non-image signal. In the above embodiment, it is preferable that one frame period is an odd-numbered horizontal period. A rate conversion unit using a memory or the like is provided, and a signal is appropriately changed so that one frame period is always an odd-numbered horizontal period. It is more desirable to perform rate conversion. Further, in the present embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line, but the effect of the present invention is not limited to this, and adjacent pixels on each line are not limited thereto. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Fifth Embodiment) FIG. 14 is a diagram showing a configuration of a liquid crystal display device according to a fifth embodiment of the present invention. The configuration of the liquid crystal display according to the fifth embodiment is the same as that of the liquid crystal display according to the above-described conventional embodiment.
The drive pulse generation unit 1902 is changed to 1402, and the signal conversion unit 1
901 is replaced by 1401. The other components are the same, and the same components are denoted by the same reference numerals and description thereof is omitted. However, in this embodiment, for convenience, the number of source lines of the liquid crystal panel 1905 is 10 and the number of gate lines is 12 in. Similarly, one frame period includes 12 periods. Hereinafter, a driving method of the liquid crystal display device according to the fifth embodiment of the present invention will be described with reference to FIGS.
6 and FIG. FIG. 15 is a diagram illustrating an internal configuration of the signal conversion unit 1401. FIG.
FIG. 4 is a timing chart showing an operation of the signal conversion unit 1401.
FIG. 17 is a diagram showing the timing of the input image signal, the output image signal of the signal conversion unit 1401, and the gate driver drive pulse. FIG. 24 is a diagram showing input / output characteristics of the source driver 1903. According to the driving method of the liquid crystal display device of the present invention, for each pixel on the liquid crystal panel, an input image signal and a non-image signal required to suppress the reverse transition phenomenon of the OCB liquid crystal independently of the image signal. Are written once per frame period, and the signal conversion unit 1401 converts the driving frequency for that. In the present embodiment, an example of 1.25 times frequency conversion in which a total of five lines including one line of a non-image signal are transferred to a source driver in four horizontal periods of an input image signal. The 1.25 times frequency conversion will be described. The input image signal is output to the control signal generation unit 15.
At 01, the data is written to the line memory 602 in synchronization with a clock (hereinafter referred to as a write clock) generated from a synchronization signal synchronized with the image signal. On the other hand, reading of the image signal from the line memory 602 is performed so that the frequency becomes 1.25 times the writing clock.
In synchronization with a clock (hereinafter, referred to as a read clock) generated from the synchronization signal in the control signal generation unit 1501, the line memory 60 is used for 4/5 of the write time.
2 is read. While the image signal is being read from the line memory 602, the output signal selection unit 604 selects this image signal as an output. In the remaining period, the output signal selection unit 604 selects a non-image signal output from the non-image signal generation unit 603 as an output. As described above, the non-image signal of 1.25 times the speed of the input signal in one horizontal period and the image signal of 1
They are output in chronological order at a ratio of 4: 4. Source driver 19
FIG. 24 shows the input / output characteristics of No. 03. Source driver 19
Numeral 03 inputs the output signal of the signal conversion unit 1501, inverts the polarity of the signal for each line, and outputs the inverted signal. The relationship between the positive polarity and the negative polarity is shown in FIG. 17 during the selection period of each gate.
The polarity is switched by a polarity control signal generated by the control pulse generator 1402. In FIG.
P12 is a pulse for selecting each of the twelve gate lines on the panel 1905 during the HI period. In the period T0_0 shown in FIG. 17, the gate pulses P5 to P8 become HI at the same time, and the non-image signal is written with a positive polarity to the pixels on the gate lines G5 to G8. In the subsequent periods T0_1 to T0_4, the gate pulses P1 to P4 are sequentially set to HI.
And the image signal S is applied to the gate lines G1, G2, G3, G4.
1, S2, S3, and S4 are sequentially written with positive polarity. In the period T0_5, the gate pulses P9 to P12 are simultaneously H
I, and a non-image signal is written to the gate lines G9 to G12 with a negative polarity. Subsequent periods T0_6 to T0_9
In this case, the gate pulses P5 to P8 sequentially become HI, and the image signals S5, S6, and G5 are applied to the gate lines G5, G6, G7, and G8.
S7 and S8 are sequentially written with negative polarity. Here, each pixel on the gate lines G5, G6, G7, G8 is T
0_0 to T0_5, T0_0 to T0_6, T0_0 to T
The non-image signal is held during a period of 0_7 and T0_0 to T0_8. In this manner, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once. In the period T1_0 of the next frame period, the gate pulses P5 to P8 become HI at the same time, and the gate lines G5 to G8
, A non-image signal is written with a negative polarity, contrary to the previous frame. Similarly, the subsequent periods T1_1 to T1
_4, the gate pulses P1 to P4 sequentially become HI, and the image signals S ′ are applied to the gate lines G1, G2, G3, and G4.
1, S'2, S'3, and S'4 are sequentially written with the negative polarity opposite to that of the previous frame. As described above, according to the driving method of the liquid crystal display device according to the fifth embodiment of the present invention, the image signal and the non-image signal are alternately written to each pixel, and the image signal is applied to the pixels for all the pixels. When a non-image signal is written in the written state, the polarity of the image signal written to the pixel is the same as the polarity of the non-image signal to be written, which facilitates writing of the non-image signal. Conversely, when an image signal is written in a state where a non-image signal is written to a pixel, the polarity of the non-image signal written to the pixel and the polarity of the written image signal with respect to the reference potential are opposite. Writing an image signal is disadvantageous. Thereby, the degree of writing of the image signal to each pixel is made uniform, and the display quality is improved. In addition,
In this embodiment, the basic drive method is so-called line inversion drive in which the polarity of a signal is inverted on a line basis, but the effect of the present invention is not limited to this, and writing is performed to adjacent pixels on each line. The same applies to a so-called column inversion drive in which the polarities of signals to be inverted are mutually inverted. In the present embodiment, the drive frequency is converted to 1.25 times. For example, the number of gate lines for simultaneously writing non-image signals is set to n.
When the (n + 1) / (n) double-speed conversion is performed in the case of (n = 2, 3, 4,...), The effect of the present invention can be similarly obtained.

(Sixth Embodiment) In the fifth embodiment, the driving frequency is 1.25 times that of the normal driving, and the writing time of the pixel signal to each pixel is one time.
/1.25. Therefore, in the sixth embodiment of the present invention, the pixel signals of the same polarity are written to the respective pixels just before the normal pixel signal writing timing with respect to the driving method of the fifth embodiment. This is to introduce a so-called precharge drive for improving writing. FIG. 18 is a diagram illustrating a configuration of a liquid crystal display device according to the sixth embodiment of the present invention. The configuration of the liquid crystal display device according to the sixth embodiment is the same as that of the liquid crystal display device according to the fifth embodiment except that the drive pulse
02. The other components are the same, and the same components are denoted by the same reference numerals and description thereof is omitted. Hereinafter, a driving method of the liquid crystal display device according to the sixth embodiment of the present invention will be described, focusing on parts different from the fifth embodiment. FIG. 21 is a diagram illustrating an input image signal, an output image signal of the signal conversion unit 1401, and a timing of a gate driver drive pulse in the liquid crystal display device driving method according to the sixth embodiment of the present invention. As in the fifth embodiment, the signal conversion unit 1401 converts the driving frequency of the input image signal to 1.25 times, and outputs the non-image signal to the source driver for one horizontal period during four horizontal periods of the input signal. Transfer of 5 lines including lines is performed. In addition, the source driver 1903 receives the output signal of the signal conversion unit 1401, inverts the polarity of the signal for each line, and outputs the inverted signal. In a period T0_0 shown in FIG. 21, the gate pulse P1
And P5 to P8 become HI at the same time, and the gate lines G1, G5
A non-image signal of positive polarity is written to the pixels on G8. In the subsequent period T0_1, the gate pulse P1 and further P2 become HI, and the positive polarity image signal S
1 is written to each pixel on the gate lines G1 and G2. At this time, the non-image signal of the positive polarity is written to each pixel on the gate line G1 immediately before, so that the writing of the image signal S1 of the positive polarity becomes easy. In the next period T0_2, the gate pulses P2 and P3 become HI at the same time, and the positive image signal S2 is similarly written to each pixel on the gate line G2 where the positive image signal S1 has already been written. It will be easier. Similarly, in the period T0_3, the gate pulses P3 and P4 become HI at the same time, and the writing of the positive image signal S3 is performed on each pixel on the gate line G3 where the writing of the positive image signal S2 is already performed. It will be easier. Further, in the subsequent period T0_4, only the gate pulse P4 becomes HI, and it is easy to write the positive polarity image signal S4 to each pixel on the gate line G4 where the positive polarity image signal S3 has already been written. Become. In the next period T0_5, the gate pulses P5 and P9 to P12
Becomes HI at the same time, and a non-image signal is written to the pixels on the gate lines G5 and G9 to G12 with a negative polarity. In the subsequent period T0_6, the gate pulse P5 and further P6 become HI, and the image signal S5 is written to each pixel on the gate lines G5 and G6 with negative polarity. A negative non-image signal has already been written to each pixel on the gate line G5, and similarly, writing of the negative image signal S5 is facilitated. Further, each pixel on the gate line G5 has T0_
The non-image signal is held for a period of 0 to T0_5,
Other periods in the frame period are image signal holding periods. Hereinafter, the period T0_1 is inverted while the polarity is inverted.
At 0, five gate lines are simultaneously selected and non-image signals are written, and in other periods, two gate lines are sequentially selected and image signals are written. In the period T0_10, the gate pulses P1 to P4 and P9 simultaneously become HI of the gate line, and a positive non-image signal is written to the pixels on the gate lines G1 to G4 and G9. The gate lines G1 to G1
Regarding the writing of the non-image signal to G4, the period T0_
Since the positive polarity image signals S1 to S4 are written in 1 to T0_4, writing is easy. Further, driving in the next frame will be described. In the first period T1_0 of the next frame, the gate pulses P1 and P5
P8 becomes the HI of the gate line at the same time, and the gate lines G1, G
A non-image signal of negative polarity opposite to that of the previous frame is written to the pixels on 5-G8. In the subsequent period T1_1,
Subsequently, the gate pulse P1 and further the signal P2 become HI, and the image signal S'1 having a negative polarity opposite to that of the previous frame is written to each pixel on the gate lines G1 and G2. Here, the polarity of the image signal is reversed from that of the previous frame in order to avoid a burn-in phenomenon of the liquid crystal display that occurs when a signal of the same polarity is kept held for a long time as in a general liquid crystal drive. It is. At this time, the non-image signal of the negative polarity is written to each pixel on the gate line G1 immediately before, so that the writing of the image signal S'1 of the negative polarity becomes easy. Next period T1_2
, The gate pulses P2 and P3 become HI at the same time, and the negative image signal S ′ is supplied to each pixel on the gate line G2 to which the negative image signal S′1 has already been written.
2 can be easily written. As described above, in the sixth embodiment of the present invention, in the driving for writing the pixel signal twice to each pixel in one frame period, the image signal and the pixel signal shown in the fifth embodiment of the present invention are used. By precharging each pixel while maintaining the polarity control of the non-image signal, it becomes possible to improve insufficient writing due to shortened writing time. In this embodiment, the basic driving method is such that the polarity of the signal is inverted for each line,
Although the so-called line inversion drive is used, the effect of the present invention is not limited to this. The same applies to so-called column inversion drive in which the polarities of signals written to adjacent pixels on each line are inverted. In the present embodiment, the drive frequency is converted to 1.25 times. For example, the number of gate lines for simultaneously writing non-image signals is n (n = 2, 3,
4,...), The effect of the present invention can be similarly obtained.

(Seventh Embodiment) In order to perform the writing to each gate line in consideration of the polarities of the video and non-image signals without deteriorating the image quality as shown in the fifth and sixth embodiments, the following is required. The number of lines in the frame period is restricted. In the driving method described in the fifth embodiment, when the number of gate lines for simultaneously writing a non-image signal is N lines, the total number of lines Y in one frame period is N ×
It must be a (2M + 1) line (M is an integer of 1 or more). In the driving method described in the sixth embodiment, when the number of gate lines for simultaneously writing non-image signals is N, the total number of lines Y in one frame period is (N
-1) × (2M + 1) lines (M is an integer of 1 or more). FIG. 22 shows a drive timing when Y = 13 as an example when the above Y is not (N−1) × (2M + 1) in the drive method shown in the sixth embodiment. As is apparent from this figure, the gate lines G5, G6,
The periods during which the pixels on G7 and G8 hold the image signal are T0_6 to T0_14, T0_7 to T0_14,
T0_8 to T0_14 and T0_9 to T0_14.
The period during which each pixel on the gate line G5 holds an image signal is the same as the period when each pixel on the gate line G1 holds an image signal, and similarly, the gate lines G6, G7, G
The period in which each pixel on 8 holds an image signal is the same as the period in which each pixel on gate lines G2, G3, and G4 holds an image signal. On the other hand, the gate lines G9, G
The periods during which the pixels on G10, G11, and G12 hold image signals are T0_11 to T1_4 and T0_12 to T0_12, respectively.
T1_4, T0_13 to T1_4, T0_14 to T1_
4, which is different from the period in which each pixel on another gate line holds an image signal. As a result, a difference in brightness occurs between the display portion for the gate lines G1 to G4 and the display portion for the gate lines G5 to G13. Therefore, in a seventh embodiment of the present invention, a means for adjusting the number of gate lines to be scanned in one frame period is newly provided, and one of the input image signals is adjusted.
The total number of scanning lines Y in the frame period is (N−1) × (2M +
1) If it is not a line, this is expressed as (N-1) × (2M +
1) The line is adjusted. FIG.
FIG. 14 is a diagram illustrating a configuration of a liquid crystal display device according to a seventh embodiment of the present invention. 23, the liquid crystal display device according to the seventh embodiment is different from the liquid crystal display device according to the sixth embodiment shown in FIG. 18 in that a new line number adjusting unit 2306 and a frame memory 2307 are provided. is there. Less than,
A driving method of the liquid crystal display device according to the seventh embodiment of the present invention will be described focusing on parts different from the sixth embodiment.
FIG. 22 is a diagram illustrating a driving method of a liquid crystal display device according to the seventh embodiment of the present invention. And the frame memory 230
FIG. 7 is a diagram for explaining the timing of input / output signals between the seven. The writing and reading of the image signal to and from the frame memory are performed in synchronization with the reference timing of the predetermined image signal. At this time, the frequency of the clock used for reading the image signal from the frame memory is set lower than the frequency of the clock used for writing the image signal from the frame memory.
Here, while maintaining the number of image signals in the horizontal period to extend the horizontal period, the number of lines in one frame period is adjusted by maintaining one frame period. As described above, when the number of lines Y in one frame period of an input image signal is not (N−1) × (2M + 1) lines,
By adjusting this to (N-1) × (2M + 1) lines, the polarity of the image signal and the non-image signal written to all the pixels on the liquid crystal panel is unified, and the variation in the retention period of the image signal is suppressed. Thus, high-quality display is possible.

In this embodiment, the operation in the case where the total number of lines Y 'in one frame period after conversion is set to Y or less has been described. This is because an image signal generally includes a blanking period irrelevant to a display image, and even if the total number of lines in one frame period is reduced, a part of the displayed image is not lost and the number of lines is not reduced. This is because it is more advantageous to perform the adjustment in the direction of reducing the operating frequency, which leads to a reduction in the operating frequency. If Y is equal to or less than the number of lines of the image signal to be displayed, the frequency of the clock used for reading the image signal to the frame memory is set higher than the frequency of the clock used for writing the image signal from the frame memory. By doing so, it is also possible to make an adjustment such that Y ′> Y. Further, in the present embodiment, the drive for performing the precharge has been described as an example, but it is not always necessary to perform the precharge drive together.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 illustrates a configuration of a liquid crystal panel.

FIG. 3 is a diagram showing a potential-transmittance curve of OCB.

FIG. 4 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 5 is a timing chart illustrating an operation of a double speed signal conversion operation.

FIG. 6 is a diagram showing an internal configuration of a signal conversion unit of a conventional liquid crystal display device.

FIG. 7 is a diagram illustrating a configuration of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 8 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 9 is a diagram showing a configuration of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 10 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 11 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 12 is a diagram showing a configuration of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 13 is a view for explaining control performed by a driving method of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 14 is a diagram showing a configuration of a liquid crystal display device according to a fifth embodiment of the present invention.

FIG. 15 is a diagram showing an internal configuration of a signal converter of a liquid crystal display device according to a fifth embodiment of the present invention.

FIG. 16 is a timing chart illustrating the operation of a signal conversion unit of a liquid crystal display device according to a fifth embodiment of the present invention.

FIG. 17 is a view for explaining control performed by a driving method of a liquid crystal display device according to a fifth embodiment of the present invention.

FIG. 18 is a diagram showing a configuration of a liquid crystal display device according to a sixth embodiment of the present invention.

FIG. 19 is a diagram showing a configuration of a conventional liquid crystal display device.

FIG. 20 illustrates control performed by a conventional method of driving a liquid crystal display device.

FIG. 21 is a view for explaining control performed by a driving method of a liquid crystal display device according to a sixth embodiment of the present invention.

FIG. 22 is a view for explaining control performed by a driving method of the liquid crystal display device according to the seventh embodiment of the present invention.

FIG. 23 is a diagram illustrating a configuration of a liquid crystal display device according to a seventh embodiment of the present invention.

FIG. 24 is a diagram showing input / output characteristics of a source driver.

[Explanation of symbols]

203, 1903 Source driver 204, 1904 Gate driver 205 Opposite drive unit 206 Pixel 207 TFT 301 Potential-transmittance curve in the case where a predetermined potential for preventing reverse transition is not inserted 302 CR in which predetermined potential for preventing reverse transition is inserted Potential-Transmittance Curve in Case of Driving 303 Critical potential 304 Potential at the highest transmittance 305 Potential at the lowest transmittance 702, 902, 1202, 1402, 1802, 19
02, 2302 Drive pulse generator 601, 1501 Control signal generator 602 Line memory 603 Non-image signal generator 604 Output signal selector 1401, 1901 Signal converter 1905 Liquid crystal panel 2306 Line number adjuster 2307 Frame memory

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H04N 5/66 102 H04N 5/66 102B (72) Inventor Takahiro Kobayashi 1006 Odakadoma, Kadoma, Osaka Matsushita Electric Within Sangyo Co., Ltd. (72) Inventor Yoshinori Furubayashi 1006 Kadoma, Kazuma, Osaka Pref. Matsushita Electric Industrial Co., Ltd.F-term (reference) BB05 DD05 EE28 FF11 JJ02 JJ04

Claims (12)

[Claims] A plurality of source lines to which a pixel signal is supplied;
A driving method of a liquid crystal display device including a liquid crystal panel including a plurality of gate lines to which a scanning signal is supplied and pixel cells arranged in a matrix corresponding to intersections of the source lines and the gate lines. In one frame period which is a display cycle of one image, all pixel cells on the liquid crystal panel are provided with an image signal which is a pixel signal corresponding to the one image and a pixel signal different from the image signal. When writing a certain non-image signal, the image signal and the non-image signal are written in the pixel cell by inverting the polarity in synchronization with a frame period with reference to a reference potential which is a predetermined level of potential. For driving a liquid crystal display device. And controlling the polarity of the non-image signal with respect to the reference potential to be the same as the polarity of the image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. 2. The method according to claim 1, wherein the polarity with respect to the reference potential is controlled to be opposite to the polarity with respect to the reference potential of the non-image signal held by the pixel cell at the time of writing to the pixel cell. A method for driving a liquid crystal display device. 3. The non-image signal is controlled so that the polarity of the image signal with respect to the reference potential is opposite to the polarity of the image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. 2. The control circuit according to claim 1, wherein the polarity with respect to the reference potential is controlled to be the same as the polarity with respect to the reference potential of the non-image signal held by the pixel cell at the time of writing to the pixel cell. Driving method of a liquid crystal display device. 4. When writing a non-image signal to a pixel cell, by simultaneously selecting two gate lines, the same non-image signal is simultaneously written to pixel cells on the selected two scanning lines. 3. The liquid crystal display device according to claim 2, wherein one of the gate lines selected at the same time is selected, and an image signal is written to a pixel cell on the selected gate line. Method. 5. When writing image data into a pixel cell, by simultaneously selecting two gate lines,
The same image data is simultaneously written to the pixel cells on the selected two scanning lines, and then one of the gate lines selected at the same time is selected, and the pixel cell on the selected gate line is selected. 4. The method according to claim 3, wherein non-image data is written. 6. When writing non-image data to a pixel cell, the same non-image data is simultaneously written to a plurality of pixel cells on the same data line on different scanning lines by simultaneously selecting a plurality of the gate lines. 3. The method of driving a liquid crystal display device according to claim 2, wherein: 7. In writing image data to a pixel cell, by selecting a plurality of said gate lines at the same time,
4. The method according to claim 3, wherein the same image data is simultaneously written to a plurality of pixel cells on the same data line on different scanning lines. 8. The driving method for a liquid crystal display device according to claim 6, wherein the gate lines selected at the same time are two or more even gate lines adjacent to each other on the liquid crystal panel. 9. When writing non-image data into a pixel cell, a precharge line, which is another gate line, is simultaneously selected, and pixel cells on all the selected gate lines including the precharge line are selected. 9. The liquid crystal display device according to claim 6, wherein the same non-image data is simultaneously written to the memory cells, and then the precharge line is selected, and the image data is written to the pixel cells on the precharge line. Drive method. 10. When writing image data to a pixel cell, a gate line for writing image data and a plurality of gate lines for simultaneously writing non-image data are simultaneously selected. Writing the same image data to the pixel cells on the gate line at the same time, and then, among the selected gate lines, selecting a plurality of the gate lines for simultaneously writing non-image data, and selecting pixels on the plurality of gate lines 9. The driving method of a liquid crystal display device according to claim 7, wherein non-image data is written in the cell. 11. When the number of simultaneously selected gate lines excluding a precharge line is N, the number of scanning lines included in a frame period is (2M + 1) ×
11. The driving method for a liquid crystal display device according to claim 4, wherein adjustment is made in advance so as to be N. 12. A driving method for a liquid crystal display device according to claim 1, wherein said liquid crystal cell is an OCB cell.