JPH04218023A - Ferroelectrric liquid crystal display device and driving method thereof - Google Patents

Ferroelectrric liquid crystal display device and driving method thereof

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Publication number
JPH04218023A
JPH04218023A JP3074205A JP7420591A JPH04218023A JP H04218023 A JPH04218023 A JP H04218023A JP 3074205 A JP3074205 A JP 3074205A JP 7420591 A JP7420591 A JP 7420591A JP H04218023 A JPH04218023 A JP H04218023A
Authority
JP
Japan
Prior art keywords
liquid crystal
voltage
reset
ferroelectric liquid
signal voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3074205A
Other languages
Japanese (ja)
Other versions
JP2805253B2 (en
Inventor
Yutaka Inaba
豊 稲葉
Katsumi Kurematsu
克巳 榑松
Shuzo Kaneko
金子 修三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP3074205A priority Critical patent/JP2805253B2/en
Priority to AT91104222T priority patent/ATE140097T1/en
Priority to DE69120564T priority patent/DE69120564T2/en
Priority to EP91104222A priority patent/EP0448032B1/en
Publication of JPH04218023A publication Critical patent/JPH04218023A/en
Application granted granted Critical
Publication of JP2805253B2 publication Critical patent/JP2805253B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • G09G3/3651Control of matrices with row and column drivers using an active matrix using multistable liquid crystals, e.g. ferroelectric liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/367Control of matrices with row and column drivers with a nonlinear element in series with the liquid crystal cell, e.g. a diode, or M.I.M. element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0251Precharge or discharge of pixel before applying new pixel voltage
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/061Details of flat display driving waveforms for resetting or blanking
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2011Display of intermediate tones by amplitude modulation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/207Display of intermediate tones by domain size control
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PURPOSE:To provide the ferroelectric liquid crystal element which does not deteriorate a liquid crystal material and does not lose bistability and the driving method thereof. CONSTITUTION:The ferroelectric liquid crystal is so driven that the polarity of a reset voltage and the polarity of a gradation signal voltage invert at every specified period Tf and that the gradation signal voltage V1 after negative polarity resetting and the gradation signal voltage -V2 after positive polarity resetting corresponding thereto attain T(V1)+T(V2)=100 where the state inversion rate of the ferroelectric liquid crystal when the gradation signal voltage is V is designated as T(V)%. In addition, the electric element formed by using the ferroelectric liquid crystal is driven in the above-mentioned manner.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、表示装置等に搭載され
る液晶素子、特に、強誘電性液晶素子およびその駆動方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal element mounted on a display device or the like, and more particularly to a ferroelectric liquid crystal element and a method for driving the same.

【0002】0002

【従来技術の説明】強誘電性液晶(以下FLCと呼ぶ)
を用いた電気光学素子は、電界に対して高速に応答する
ことと、双安定性を示すことの特徴を生かして主に単純
マトリクス表示素子に応用されてきたが、近年、アクテ
ィブマトリクス表示素子への応用も検討されるようにな
った。アクティブマトリクスFLC素子の特徴は、第1
に、一画面の走査時間(フレーム周期)がFLCの応答
速度によらず決めることができることである。単純マト
リクスFLC素子では1走査線の選択時間内に液晶が応
答する必要があるので、フレーム周期は(液晶の応答速
度)×(走査線本数)以下に下げることはできず、走査
線の本数が増すにつれてフレーム周期が長くなるという
欠点があった。これに対してアクティブマトリクスFL
C素子では、1走査線選択時間内にその走査線上の画素
の充放電だけが行なわれればよく、選択期間後は画素の
スイッチング素子がオフ状態になって液晶への印加電圧
を保持するので、液晶の応答はこの保持時間内に行なわ
れる。したがって、フレーム周期は液晶の応答速度に依
らず、走査線本数が増えてもテレビジョンで使われてい
る33msで動作させることが可能である。
[Description of prior art] Ferroelectric liquid crystal (hereinafter referred to as FLC)
Electro-optical devices using 3D have been mainly applied to simple matrix display devices, taking advantage of their characteristics of rapid response to electric fields and bistability, but in recent years, they have been applied to active matrix display devices. Applications of this technology are also being considered. The characteristics of active matrix FLC elements are the first
Another advantage is that the scanning time (frame period) for one screen can be determined without depending on the response speed of the FLC. In a simple matrix FLC element, the liquid crystal must respond within the selection time of one scanning line, so the frame period cannot be lowered below (response speed of liquid crystal) x (number of scanning lines), and the number of scanning lines is There was a drawback that the frame period became longer as the number increased. On the other hand, active matrix FL
In the C element, it is only necessary to charge and discharge the pixels on the scanning line within one scanning line selection time, and after the selection period, the switching element of the pixel is turned off and the voltage applied to the liquid crystal is maintained. The response of the liquid crystal occurs within this holding time. Therefore, the frame period does not depend on the response speed of the liquid crystal, and even if the number of scanning lines increases, it is possible to operate at the 33 ms used in televisions.

【0003】アクティブマトリクスFLC素子の第2の
特徴は階調表示が容易なことである。アクティブマトリ
クスFLC素子の階調表示法の1つはEP284134
で述べられているもので、その原理は画素を予め一方の
安定状態にリセットしておき、次いで能動素子を通じて
画素電極に電荷量Qを与え、これによって一画素内にお
いて部分的にFLCの第2の安定状態へのスイッチング
を生じさせるというものである。この原理を利用した場
合、第2の安定状態へのスイッチングが生じた部分の面
積をa、FLCの自発分極の大きさをPSとすると、ス
イッチングによって2PS・aの電荷が移動し、これが
初めに与えた電荷Qを打消すまで第2の安定状態へのス
イッチングが続く。そして最終的に a=Q/2PS の面積が第2の安定状態になる。Qを変えることでaの
制御すなわち面積階調が実現される。
A second feature of active matrix FLC elements is that they can easily display gradations. One of the gradation display methods for active matrix FLC elements is EP284134
The principle is that the pixel is reset to one stable state in advance, and then a charge amount Q is applied to the pixel electrode through the active element. The idea is to cause a switch to a stable state. When using this principle, if the area of the part where switching to the second stable state occurs is a, and the magnitude of the spontaneous polarization of the FLC is PS, then a charge of 2PS·a moves due to switching, and this is initially Switching to the second stable state continues until the applied charge Q is canceled out. Finally, the area of a=Q/2PS becomes the second stable state. By changing Q, control of a, that is, area gradation is realized.

【0004】図7は、このような強誘電性液晶素子を構
成する強誘電性液晶セルの一具体例の断面図を示す。こ
の液晶セルは、TFT(薄膜トランジスタ)を用いたも
のである。
FIG. 7 shows a sectional view of a specific example of a ferroelectric liquid crystal cell constituting such a ferroelectric liquid crystal element. This liquid crystal cell uses a TFT (thin film transistor).

【0005】図7において、ガラスやプラスチック等の
基板70aの上にゲート電極71や絶縁膜(水素原子を
ドーピングした窒化シリコン膜など)72を介して形成
した半導体膜(水素原子をドーピングしたアモルファス
シリコン膜等)73とこの半導体膜73に接する2つの
端子74,75とで構成したTFTと、TFTの端子7
5に接続した画素電極(ITO:Indium  Ti
n  Oxideなど)76aが形成されている。
In FIG. 7, a semiconductor film (amorphous silicon doped with hydrogen atoms, etc.) is formed on a substrate 70a made of glass or plastic with a gate electrode 71 and an insulating film (such as a silicon nitride film doped with hydrogen atoms) 72 interposed therebetween. 73 (film, etc.) and two terminals 74 and 75 in contact with this semiconductor film 73, and the terminal 7 of the TFT.
The pixel electrode (ITO: Indium Ti
n Oxide, etc.) 76a is formed.

【0006】さらに、この上に、絶縁層(ポリイミド、
ポリアミド、ポリビニルアルコール、ポリパラキシリレ
ン、SiO2、またはTiO2)77aとアルミニウム
やクロムなどからなる光遮蔽膜78が設けられている。 対向基板となる基板70bの上には対向電極(ITO:
Indium  Tin  Oxide)76bと絶縁
膜77bが形成されている。
Furthermore, an insulating layer (polyimide,
A light shielding film 78 made of polyamide, polyvinyl alcohol, polyparaxylylene, SiO2, or TiO2) 77a and aluminum, chromium, or the like is provided. A counter electrode (ITO:
Indium Tin Oxide) 76b and an insulating film 77b are formed.

【0007】基板70aと70bの間には、強誘電性液
晶80が挟持されている。また、基板70aと70bの
周囲部には強誘電性液晶80を封止するためのシール材
81が設けられている。
A ferroelectric liquid crystal 80 is sandwiched between substrates 70a and 70b. Further, a sealing material 81 for sealing the ferroelectric liquid crystal 80 is provided around the substrates 70a and 70b.

【0008】このようなセル構造の液晶素子の両側には
クロスニコル状態の偏光子82aと82bが配置され、
偏光子82bの背後には観察者Aが入射光I0よりの反
射光I1によって液晶素子の表示状態を見ることができ
るように反射板(乱反射性アルミニウムのシートまたは
板)83が設けられている。
Polarizers 82a and 82b in a crossed Nicol state are arranged on both sides of the liquid crystal element having such a cell structure.
Behind the polarizer 82b, a reflector plate (sheet or plate of diffused aluminum) 83 is provided so that the viewer A can see the display state of the liquid crystal element by the reflected light I1 from the incident light I0.

【0009】なお、図7のTFTにおいて、端子74と
75に対応するソース電極およびドレイン電極という命
名は、電流が流れる向きを一方向に限定した場合のもの
である。FETは、一般に、ソースとドレインを入れ替
えた場合も同様に働かせることが可能である。
In the TFT shown in FIG. 7, the names ``source electrode'' and ``drain electrode'' corresponding to the terminals 74 and 75 refer to the case where the direction in which current flows is limited to one direction. FETs can generally function similarly if the source and drain are interchanged.

【0010】0010

【発明が解決しようとする課題】ところで、本発明者ら
の実験によると、上記電荷変調による面積階調法には1
つ欠点がある。それは第1の安定状態から第2の安定状
態への移行が上記のように電荷を完全に打消すまでは進
行せず、途中で止まってしまうことである。この様子を
図8に示す。図8は、通常のテレビジョンで用いられて
いるのと同様に33ms周期でリセットと階調表示を繰
り返す場合の画素電極間電圧(図8(a))と透過光強
度(図8(b))の時間変化をプロットしたものである
。電圧は能動素子(例えばTFT)がオフになった直後
は急な減衰を示すが、やがて減衰が極めて緩やかになる
。同様に能動素子がオフになった直後は急激に変化する
透過光強度もやがてその変化が緩慢になってくる。すな
わち、電極間には電界が存在するにもかかわらず状態間
の反転が極めてゆっくりとしか進行しないか、または停
止してしまっていることがわかる。
[Problems to be Solved by the Invention] According to experiments conducted by the present inventors, the above-mentioned area gradation method using charge modulation has 1
There are one drawback. This is because the transition from the first stable state to the second stable state does not proceed until the charge is completely canceled as described above, and stops midway. This situation is shown in FIG. Figure 8 shows the voltage between pixel electrodes (Figure 8(a)) and the transmitted light intensity (Figure 8(b)) when resetting and gradation display are repeated at a 33ms cycle, similar to those used in ordinary televisions. ) is plotted over time. The voltage exhibits a rapid attenuation immediately after the active element (eg, TFT) is turned off, but the attenuation eventually becomes extremely gradual. Similarly, the transmitted light intensity changes rapidly immediately after the active element is turned off, but the change eventually becomes slow. In other words, it can be seen that although an electric field exists between the electrodes, the reversal between states progresses extremely slowly or has stopped.

【0011】この現象があるために、液晶には常に残留
DC電界が掛かり続け、やがて液晶材の劣化を引き起こ
す。あるいは、図7に示すように電極と液晶との間に絶
縁層をおく構成の液晶素子においては、液晶中の不純物
イオンがDC電界によって絶縁層界面に付着し、前記D
C電界とは逆向きの電界を発生させるため、FLCの双
安定性を損なう方向に働く。
Due to this phenomenon, a residual DC electric field continues to be applied to the liquid crystal, eventually causing deterioration of the liquid crystal material. Alternatively, in a liquid crystal element having an insulating layer between an electrode and a liquid crystal as shown in FIG. 7, impurity ions in the liquid crystal adhere to the insulating layer interface due to the DC electric field, and
Since it generates an electric field in the opposite direction to the C electric field, it acts in a direction that impairs the bistability of the FLC.

【0012】本発明は、強誘電性液晶素子の液晶材料が
劣化したり、双安定性が失われない強誘電性液晶素子お
よびそ駆動方法を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a ferroelectric liquid crystal element in which the liquid crystal material of the ferroelectric liquid crystal element does not deteriorate or lose its bistability, and a method for driving the same.

【0013】[0013]

【課題を解決するための手段】上記目的を達成するため
本発明の一態様では、マトリクス状に配置された画素電
極ごとにスイッチング素子を設け、対向電極との間に強
誘電性液晶を挟持した強誘電性液晶素子において、両電
極間に画素全体を強誘電性液晶の第一の安定状態にリセ
ットするリセット電圧と、前記リセット電圧とは逆極性
の、画素を部分的に第二の安定状態に遷移させる階調信
号電圧とを交互に切り替えて印加する電圧印加手段と、
一定周期ごとに該リセット電圧を反転させる手段と、一
定周期ごとに該階調信号電圧を反転させる手段とを設け
、階調信号電圧がVの時の強誘電性液晶の状態反転率を
T(V)%とすると、負極性リセット後の階調信号電圧
V1とそれに対応する正極性リセット後の階調信号電圧
−V2とがT(V1)+T(V2)=100の関係を満
たすようにしている。
[Means for Solving the Problems] In order to achieve the above object, in one aspect of the present invention, a switching element is provided for each pixel electrode arranged in a matrix, and a ferroelectric liquid crystal is sandwiched between the switching element and the opposing electrode. In a ferroelectric liquid crystal element, there is a reset voltage between both electrodes that resets the entire pixel to a first stable state of ferroelectric liquid crystal, and a reset voltage that partially resets the pixel to a second stable state with a polarity opposite to the reset voltage. Voltage application means that alternately switches and applies a grayscale signal voltage that causes a transition to;
Means for inverting the reset voltage at regular intervals and means for inverting the gray scale signal voltage at regular intervals are provided, and the state reversal rate of the ferroelectric liquid crystal when the gray scale signal voltage is V is expressed as T( V)%, the gray scale signal voltage V1 after negative polarity reset and the corresponding gray scale signal voltage -V2 after positive polarity reset satisfy the relationship T(V1)+T(V2)=100. There is.

【0014】また、本発明の他の態様では、FLCを用
いた電気光学素子の駆動方法において、一定周期ごとに
リセット電圧の極性および階調信号電圧の極性を反転さ
せ、かつ階調信号電圧がVの時の強誘電性液晶の状態反
転率をT(V)%として、負極性リセット後の階調信号
電圧V1とそれに対応する正極性リセット後の階調信号
電圧−V2とがT(V1)+T(V2)=100となる
ように駆動することを特徴としている。
In another aspect of the present invention, in a method for driving an electro-optical element using an FLC, the polarity of the reset voltage and the polarity of the grayscale signal voltage are inverted at regular intervals, and the grayscale signal voltage is Assuming that the state reversal rate of the ferroelectric liquid crystal at V is T(V)%, the grayscale signal voltage V1 after negative polarity reset and the corresponding grayscale signal voltage -V2 after positive polarity reset are T(V1 )+T(V2)=100.

【0015】[0015]

【作用】本発明によれば、一定周期ごとにリセット電圧
の極性および階調信号電圧の極性を反転させるため、液
晶に対して常にDC電界が掛かり続けるという事態を防
止することができる。
According to the present invention, since the polarity of the reset voltage and the polarity of the grayscale signal voltage are reversed at regular intervals, it is possible to prevent a situation in which a DC electric field is constantly applied to the liquid crystal.

【0016】したがって、液晶材料の劣化およびFLC
の双安定性の低下を防止することができる。[実施例]
本発明の強誘電性液晶素子の駆動方法で用いる強誘電性
液晶としては、加えられる電界に応じて第1の光学的安
定状態と第2の光学的安定状態のいずれかを取る、すな
わち電界に対する双安定状態を有する物質、特にこのよ
うな性質を有する液晶が用いられる。
Therefore, deterioration of liquid crystal materials and FLC
can prevent a decrease in bistability. [Example]
The ferroelectric liquid crystal used in the method for driving a ferroelectric liquid crystal element of the present invention takes either a first optically stable state or a second optically stable state depending on the applied electric field. A substance having a bistable state, in particular a liquid crystal having such properties, is used.

【0017】本発明の駆動方法で用いることができる双
安定性を有する強誘電性液晶としては、強誘電性を有す
るカイラルスメクチック液晶が最も好ましく、そのうち
カイラルスメクチックC相(SmC*)、H相(SmH
*)、I相(SmI*)、J相(SmJ*)、K相(S
mK*)、G相(SmG*)またはF相(SmF*)の
液晶が適している。この強誘電性液晶については、“L
E  JOURNAL  DEPHYSIQUE  L
ETTERS”36(L−69)1975,「Ferr
oelectric  Liquid  Crysta
ls」;“Applied  Physics  Le
tters  ”36(11)1980「Submic
roSecond  Bistable  Elect
rooptic  Switching  in  L
iquid  Crystals」;“固体物理”16
(141)1981「液晶」等に記載されており、本発
明ではこれらに開示された強誘電性液晶を用いることが
できる。
As the ferroelectric liquid crystal having bistability that can be used in the driving method of the present invention, chiral smectic liquid crystal having ferroelectricity is most preferable, and chiral smectic C phase (SmC*), H phase ( SmH
*), I phase (SmI*), J phase (SmJ*), K phase (S
mK*), G-phase (SmG*) or F-phase (SmF*) liquid crystals are suitable. Regarding this ferroelectric liquid crystal, “L
E JOURNAL DEPHYSIQUE L
ETTERS” 36 (L-69) 1975, “Ferr
oelectric Liquid Crysta
ls";"Applied Physics Le
tters” 36 (11) 1980 “Submic
roSecond Bistable Elect
rooptic Switching in L
iquid Crystals”; “Solid State Physics” 16
(141) 1981 "Liquid Crystal", etc., and the ferroelectric liquid crystal disclosed therein can be used in the present invention.

【0018】本発明で用いられる強誘電性液晶化合物の
具体例としては、デシロキシベンジリデン−p’−アミ
ノ−2−メチルブチルシンナメート(DOBAMBC)
、ヘキシルオキシベンジリデン−p’−アミノ−2−ク
ロロプロピルシンナメート(HOBACPC)、4−o
−(2−メチル)ブチルレゾルシリデン−4’−オクチ
ルアニリン(MBRA8)等が挙げられる。
A specific example of the ferroelectric liquid crystal compound used in the present invention is decyloxybenzylidene-p'-amino-2-methylbutylcinnamate (DOBAMBC).
, hexyloxybenzylidene-p'-amino-2-chloropropylcinnamate (HOBACPC), 4-o
-(2-methyl)butyl resol cylidene-4'-octylaniline (MBRA8) and the like.

【0019】これらの材料を用いて液晶を構成する場合
、液晶化合物がSmC相C*やSmHC*相などのカイ
ラルスメクチック相となるような温度状態に保持するた
め、必要に応じて素子をヒータが埋め込まれた銅ブロッ
ク等により支持することができる。
When constructing a liquid crystal using these materials, the element may be heated with a heater as necessary in order to maintain the liquid crystal compound at a temperature such that it becomes a chiral smectic phase such as SmC phase C* or SmHC* phase. It can be supported by embedded copper blocks or the like.

【0020】図9は、強誘電性液晶セルの例を模式的に
描いたものである。91aと91b、In2O3、Sn
O2あるいはITO(Indium  Tin  Ox
ide)等の薄膜からなる透明電極で被覆された基板(
ガラス板)であり、その間に液晶分子層92がガラス面
に垂直になるように配向したSmC*またはSmH*等
のカイラルスメクチック相の液晶が封入されている。太
線で示した線93が液晶分子を表わしており、この液晶
分子93はその分子に直交した方向に双極子モーメント
(P⊥)94を有している。基板91aと91b上の電
極間に一定の閾値以上の電圧を印加すると、液晶分子9
3のらせん構造がほどけ、双極子モーメント(P⊥)9
4がすべて電界方向に向くよう、液晶分子93は配向方
向を変えることができる。液晶分子93は細長い形状を
有しており、その長軸方向と短軸方向で屈折率異方性を
示し、したがって、例えばガラス面の上下に互いにクロ
スニコルの偏光子を置けば、電圧印加極性によって光学
特性が変わる液晶光学変調素子となることは、容易に理
解される。さらに液晶セルの厚さを充分に薄く(例えば
1μm)した場合には、図10に示すように電界を印加
していない状態でも液晶分子はらせん構造がほどけて非
らせん構造となり、その双極子モーメントPaまたはP
bは上向き(矢印104a)または下向き(矢印104
b)のどちらかの状態をとる。このようなセルに、図1
0に示す如く一定の閾値以上の極性の異なる電界Eaま
たはEbを不図示の電圧印加手段により付与すると、双
極子モーメントは、電界EaまたはEbの電界ベクトル
に対応して上向き104aまたは下向き104bと向き
を変え、それに応じて液晶分子は、第1の安定状態10
5aかあるいは第2の安定状態105bの何れか一方に
配向する。
FIG. 9 schematically depicts an example of a ferroelectric liquid crystal cell. 91a and 91b, In2O3, Sn
O2 or ITO (Indium Tin Ox)
A substrate coated with a transparent electrode made of a thin film such as
A liquid crystal of a chiral smectic phase such as SmC* or SmH* with a liquid crystal molecular layer 92 oriented perpendicular to the glass surface is sealed therebetween. A thick line 93 represents a liquid crystal molecule, and this liquid crystal molecule 93 has a dipole moment (P⊥) 94 in a direction perpendicular to the molecule. When a voltage higher than a certain threshold is applied between the electrodes on the substrates 91a and 91b, the liquid crystal molecules 9
The helical structure of 3 unravels and the dipole moment (P⊥)9
The alignment direction of the liquid crystal molecules 93 can be changed so that all of the liquid crystal molecules 93 are oriented in the direction of the electric field. The liquid crystal molecules 93 have an elongated shape and exhibit refractive index anisotropy in the long axis direction and short axis direction. Therefore, for example, if crossed Nicol polarizers are placed above and below the glass surface, the polarity of voltage application can be changed. It is easily understood that the liquid crystal optical modulation element has optical characteristics that change depending on the amount of the liquid crystal. Furthermore, when the thickness of the liquid crystal cell is made sufficiently thin (for example, 1 μm), the helical structure of the liquid crystal molecules unwinds and becomes a non-helical structure even when no electric field is applied, as shown in Figure 10, and its dipole moment Pa or P
b points upward (arrow 104a) or downward (arrow 104
Either state b) is taken. In such a cell, Figure 1
When an electric field Ea or Eb with a different polarity, which is equal to or higher than a certain threshold as shown in FIG. , and the liquid crystal molecules change accordingly to the first stable state 10
5a or the second stable state 105b.

【0021】このような強誘電性液晶を光学変調素子と
して用いることの利点は2つある。
There are two advantages to using such a ferroelectric liquid crystal as an optical modulation element.

【0022】第1に、応答速度が極めて速いこと、第2
に液晶分子の配向が双安定性を有することである。第2
の点を、例えば図10によってさらに説明すると、電界
Eaを印加すると液晶分子は第1の安定状態105aに
配向するが、この状態は電界を切っても安定である。ま
た、逆向きの電界Ebを印加すると、液晶分子は第2の
安定状態105bに配向してその分子の向きを変えるが
、やはり電界を切ってもこの状態に留っている。また、
与える電界EaまたはEbが一定の閾値を越えない限り
、それぞれの配向状態にやはり維持されている。このよ
うな応答速度の速さと、双安定性が有効に実現されるに
はセルとしては出来るだけ薄い方が好ましく、一般的に
は0.5μm〜20μm、特に1μm〜5μmが適して
いる。この種の強誘電性液晶を用いたマトリクス電極構
造を有する液晶−電気光学装置は、例えばクラークとラ
ガバルにより米国特許第4367924号明細書で提案
されている。
Firstly, the response speed is extremely fast, and secondly,
The second reason is that the orientation of liquid crystal molecules has bistability. Second
To further explain this point with reference to FIG. 10, for example, when the electric field Ea is applied, the liquid crystal molecules are aligned in a first stable state 105a, and this state remains stable even when the electric field is turned off. Furthermore, when an electric field Eb in the opposite direction is applied, the liquid crystal molecules are oriented to a second stable state 105b and change their orientation, but they remain in this state even after the electric field is turned off. Also,
As long as the applied electric field Ea or Eb does not exceed a certain threshold value, each orientation state is maintained. In order to effectively realize such fast response speed and bistability, it is preferable that the cell be as thin as possible, and generally 0.5 μm to 20 μm, particularly 1 μm to 5 μm is suitable. A liquid crystal-electro-optical device having a matrix electrode structure using this type of ferroelectric liquid crystal has been proposed by Clark and Ragabal, for example, in US Pat. No. 4,367,924.

【0023】本発明は、アクティブマトリックスを構成
するTFT等のFET(電界効果トランジスタ)構造の
素子がドレイン電極とソース電極との間に印加される電
圧を逆にすると、ドレインおよびソースとしてのそれぞ
れの電極の役割が逆転した状態のFETとして正常に動
作することに基づいている。アクティブマトリックスを
構成する素子としては、FET構造の素子であればアモ
ルファスシリコンTFT、多結晶シリコンTFT等のい
ずれであっても使用し得る。またFET構造以外のスイ
ッチング素子であっても、正負いずれの印加電圧に対し
ても動作し得る素子、例えばバイポーラトランジスタも
同様に使用し得る。さらには、MIM(Metal−I
nsulator−Metal)やダイオード等の2端
子のスイッチング素子を用いることも可能である。
According to the present invention, when the voltages applied between the drain electrode and the source electrode of an element having an FET (field effect transistor) structure such as a TFT constituting the active matrix are reversed, the respective drain and source electrodes are activated. This is based on the fact that it operates normally as an FET with the roles of the electrodes reversed. As the elements constituting the active matrix, any element having an FET structure, such as an amorphous silicon TFT or a polycrystalline silicon TFT, can be used. Further, switching elements other than FET structures, such as bipolar transistors that can operate with either positive or negative applied voltages, can be used as well. Furthermore, MIM (Metal-I
It is also possible to use a two-terminal switching element such as a diode or a diode.

【0024】N型FETは、VDをドレイン電圧、VG
をゲート電圧、VSをソース電圧、VPをゲート・ソー
ス間の閾値電圧とすると、VD>VSで、VG>VS+
VPのとき導通状態となり、VG<VS+VPのとき非
導通状態となる。
[0024] In the N-type FET, VD is the drain voltage and VG is the drain voltage.
When is the gate voltage, VS is the source voltage, and VP is the threshold voltage between the gate and source, VD>VS and VG>VS+
It is in a conductive state when VP, and it is in a non-conductive state when VG<VS+VP.

【0025】P型FETにおいては、VD<VSとする
と、VG<VS+VPで導通状態となり、VG>VS+
VPで非導通状態となる。
In a P-type FET, when VD<VS, it becomes conductive when VG<VS+VP, and when VG>VS+
It becomes non-conductive at VP.

【0026】P型であってもN型であってもFETの端
子のいずれがドレインとして作用し、いずれがソースと
して作用するかは、電圧の印加の方向によって定まる。 すなわち、N型では電圧の低い方がソースとして作用し
、P型では電圧の高い方がソースとして作用する。
Whether the FET is P-type or N-type, which terminal of the FET acts as the drain and which acts as the source is determined by the direction of voltage application. That is, for N-type, the lower voltage serves as a source, and for P-type, higher voltage serves as a source.

【0027】強誘電性液晶素子においては、液晶セルに
印加する、正、負の電圧に対していずれを「明」状態と
し、いずれを「暗」状態とするかは、セルの上下に配置
するクロスニコル状態にした一対の偏光子の偏光軸と、
液晶分子長軸との向きにより自由に設定できる。
In a ferroelectric liquid crystal element, which of the positive and negative voltages applied to the liquid crystal cell will be in the "bright" state and which will be in the "dark" state is determined by the arrangement above and below the cell. The polarization axes of a pair of polarizers in a crossed nicol state,
It can be set freely depending on the direction with respect to the long axis of the liquid crystal molecules.

【0028】本発明は、液晶セルに印加される電界をア
クティブマトリックスの各素子の端子間電圧を制御する
ことによって制御し表示を行なうものであるから、各信
号の電圧レベルは以下の実施例にとらわれることなく、
各信号の電位差を相対的に維持すれば、実施することが
できる。
Since the present invention performs display by controlling the electric field applied to the liquid crystal cell by controlling the voltage between the terminals of each element of the active matrix, the voltage level of each signal is determined according to the following embodiment. Without being bound,
This can be implemented if the potential difference between each signal is maintained relatively.

【0029】実施例1図1は、本発明の一実施例に係る
FLCパネルおよびそれを駆動する駆動系の構成を示す
。同図において、1はTFTを能動素子とするアクティ
ブマトリクス駆動方式のFLCパネル、2はシフトレジ
スタおよびホールド回路等からなるXドライバ、3はシ
フトレジスタおよびラッチ等から成るYドライバ、4は
タイミングコントローラ、5はビデオ信号の極性反転回
路、6はリセット信号の極性反転回路、7はビデオ信号
とリセット信号との切換回路である。
Embodiment 1 FIG. 1 shows the configuration of an FLC panel and a drive system for driving it according to an embodiment of the present invention. In the figure, 1 is an active matrix drive type FLC panel using TFT as an active element, 2 is an X driver consisting of a shift register and a hold circuit, etc., 3 is a Y driver consisting of a shift register and a latch, etc., 4 is a timing controller, 5 is a polarity inversion circuit for a video signal, 6 is a polarity inversion circuit for a reset signal, and 7 is a switching circuit between a video signal and a reset signal.

【0030】本実施例では、タイミングコントローラお
よびYドライバにより、図2(b)に示したような、第
1のゲートパルス■とこれより若干(Tdだけ)タイミ
ングの遅れた第2のゲートパルス■を発生させ、これを
順次の水平周期で各ゲートライン9に印加している。一
つのラインまたは画素に注目すれば、次のゲートパルス
迄はフレーム周期Tfとなり、図2(b)のパルス■と
■はこれに対応している。そして,このゲートパルス■
,■,■,■,……の各タイミングに合わせて、Xドラ
イバへの入力信号ライン10への出力がそれぞれ負極性
リセット電圧、正極性階調信号電圧、正極性リセット電
圧、負極性階調信号電圧、……(この後は同様の繰り返
し)となるように極性反転回路5,6と切換回路7の動
作タイミングがコントロールされる。したがって前記注
目画素には図2(a)で示したような駆動信号がTFT
を通して印加される。さらに、この各信号の無印加時に
TFTはオフ状態となっていることと、前述したFLC
の自発分極PSによる電荷の打消し作用により、容量性
負荷としての注目画素における電極間電圧波形は図2(
c)の如くになる。
In this embodiment, the timing controller and Y driver generate the first gate pulse ■ and the second gate pulse ■ whose timing is slightly delayed (by Td) as shown in FIG. 2(b). is generated and applied to each gate line 9 in sequential horizontal cycles. If we focus on one line or pixel, the frame period up to the next gate pulse is Tf, and the pulses ■ and ■ in FIG. 2(b) correspond to this. And this gate pulse■
, ■, ■, ■, ..., the output to the input signal line 10 to the X driver is a negative reset voltage, a positive gray scale signal voltage, a positive reset voltage, and a negative gray scale, respectively. The operation timings of the polarity inversion circuits 5 and 6 and the switching circuit 7 are controlled so that the signal voltage becomes . . . (the same process is repeated thereafter). Therefore, the driving signal shown in FIG. 2(a) is applied to the pixel of interest through the TFT.
applied through. Furthermore, the TFT is in an off state when these signals are not applied, and the FLC described above
Due to the charge cancellation effect caused by the spontaneous polarization PS, the inter-electrode voltage waveform at the pixel of interest as a capacitive load becomes
c).

【0031】図2(c)において、■は負極性リセット
に対応し、この時画素内のFLCは全て第1の安定状態
に戻り、時間Tdの間に図3(a)の如き全面黒状態と
なる。その後、正極性階調信号の印加(■)により、電
荷Q(=CV1,C:画素の電極間容量、V1:階調信
号電圧)が画素に与えられると、前述した如くa=Q/
2PSに相当する面積(ドメイン)が白表示に反転し(
図3(b))、この時電荷QがFLCのPSにより打消
されるため、電圧の減衰12(図2(c))が発生する
。 この状態が(Tf−Td)なる時間続き(但しTf>>
Td)階調状態を表示する。この時の反転率をT(V1
)[%]とすればT(V1)=a/S(S:画素全体の
面積)となる、これは透過率にほぼ等しい。
In FIG. 2(c), ■ corresponds to negative polarity reset, and at this time, all FLCs in the pixel return to the first stable state, and the entire black state as shown in FIG. 3(a) occurs during time Td. becomes. Thereafter, when a charge Q (=CV1, C: interelectrode capacitance of the pixel, V1: gradation signal voltage) is given to the pixel by applying a positive polarity gradation signal (■), a=Q/
The area (domain) corresponding to 2PS is reversed to white (
3(b)), at this time, the charge Q is canceled by the PS of the FLC, so that voltage attenuation 12 (FIG. 2(c)) occurs. This state continues for a period of time (Tf - Td) (however, Tf >>
Td) Display the gradation state. The reversal rate at this time is T(V1
) [%], then T(V1)=a/S (S: area of the entire pixel), which is approximately equal to the transmittance.

【0032】次に、■の状態に移る。■は正極性リセッ
トに対応し、この時、画素内のFLCは全て第2の安定
状態に移り、図3(c)の如く、全面白状態となる。そ
して、負極性階調信号の印加(■)により、電荷Q(=
CV2)が画素に与えられ、a=Q/2PSに相当する
面積(ドメイン)が今度は図3(d)の如く黒表示に反
転する。14はこの時生じる電圧減衰を表わしている。 この時の反転率をa/S=T(V2)とすれば、透過率
は100−T(V2)となる。したがって、前述した正
極性階調信号時と負極性階調信号時とでは信号電圧に対
する透過率の関係が相補的となる。そこで、例えば所定
の透過率を出すための正極性階調信号V1と負極性階調
信号−V2との関係はT(V1)+T(V2)=100
となる。そしてこの■、■、■および■の過程が繰り返
されて、FLCパネルの表示が行なわれる。特に、■お
よび■のリセットに要する時間Tdと階調信号パルス印
加時間の和を水平走査時間内に抑えれば、■および■の
表示状態がフレーム周期分維持され、リセットによる画
素全面白または黒表示の影響はほとんど表われない。
Next, the process moves to state (2). 3 corresponds to a positive polarity reset, and at this time, all FLCs in the pixel shift to the second stable state, becoming completely white as shown in FIG. 3(c). Then, by applying the negative polarity gradation signal (■), the charge Q (=
CV2) is applied to the pixel, and the area (domain) corresponding to a=Q/2PS is inverted to display black as shown in FIG. 3(d). 14 represents the voltage attenuation that occurs at this time. If the reversal rate at this time is a/S=T(V2), the transmittance is 100-T(V2). Therefore, the relationship of the transmittance to the signal voltage is complementary between the positive polarity gray scale signal and the negative polarity gray scale signal described above. Therefore, for example, the relationship between the positive polarity gradation signal V1 and the negative polarity gradation signal -V2 for producing a predetermined transmittance is T(V1)+T(V2)=100.
becomes. Then, the processes of (1), (2), (2) and (2) are repeated to perform display on the FLC panel. In particular, if the sum of the time Td required for resetting ■ and ■ and the gradation signal pulse application time is kept within the horizontal scanning time, the display states of ■ and ■ will be maintained for the frame period, and the pixels will be completely white or black due to reset. There is almost no effect of display.

【0033】実際には階調信号電圧と透過率の関係は必
ずしも直線的ではなく図4に示すように非線形である。 図4は黒の状態にある画素に電圧V(電荷CV)を与え
たときの白状態への反転面積率をプロットしたものであ
る。白の状態にある画素に−Vの電圧を与えて黒に反転
させるときの面積率は白と黒の状態が対称なので図4の
曲線を反転させたものになる。いずれも反転は印加電圧
に直線的に比例していない。このようになる理由は必ず
しも明らかではないが、ドメインの反転が弱い電界に対
してほとんど進行しないことが関与していると思われる
。しかし、印加電圧Vと反転面積率T(V)の関係が直
線的でなくても、図4に示すようにV1とV2を選んで
やればT(V1)+T(V2)=100の関係が満足さ
れる。すなわ、例えば70%の中間調レベルを表示させ
たいときは、黒リセット白書き込みの電圧を図4のT1
=70%を与える電圧V1に設定し、反対側の白リセッ
ト黒書き込みの電圧をT2=30%を与える電圧V2(
ただし極性は負)に設定する。このように任意の反転特
性T(V)に対して本発明の方法が適用できることは明
らかである。
In reality, the relationship between the gray scale signal voltage and the transmittance is not necessarily linear, but is nonlinear as shown in FIG. FIG. 4 is a plot of the area ratio of reversal to a white state when a voltage V (charge CV) is applied to a pixel in a black state. Since the white and black states are symmetrical, the area ratio when a pixel in a white state is reversed to black by applying a voltage of -V is an inversion of the curve in FIG. 4. In both cases, the reversal is not linearly proportional to the applied voltage. The reason why this happens is not necessarily clear, but it seems to be related to the fact that domain inversion hardly progresses in response to a weak electric field. However, even if the relationship between the applied voltage V and the inversion area ratio T (V) is not linear, if V1 and V2 are selected as shown in Figure 4, the relationship T (V1) + T (V2) = 100 can be established. be satisfied. In other words, if you want to display a 70% halftone level, for example, set the voltage for black reset and white writing to T1 in Figure 4.
= 70%, and set the white reset black writing voltage on the opposite side to voltage V2 (which gives T2 = 30%).
However, the polarity is set to negative). As described above, it is clear that the method of the present invention can be applied to any inversion characteristic T(V).

【0034】また、このリセットおよび階調信号の正極
性、負極性の反転周期を水平走査周期とし、隣り合う走
査ラインのリセット電圧が逆極性になるように駆動すれ
ば、リセット時の全面白および黒表示が平均化され、フ
リッカ等がより目立たなくなる。
Furthermore, if this reset and the reversal period of the positive polarity and negative polarity of the gradation signal are set as the horizontal scanning period, and the reset voltages of adjacent scanning lines are driven so as to have opposite polarities, the entire white and Black display is averaged and flickers become less noticeable.

【0035】このような、駆動法を採ると、図2(c)
から判かるように、FLC層に掛かるDC電界が正また
は負の一方向に片寄らず平均化されるため、前述した不
純物イオンの付着および液晶材の劣化が防止され、長期
に亘り、安定した表示が行なえる。
When such a driving method is adopted, the image shown in FIG. 2(c)
As can be seen from the figure, the DC electric field applied to the FLC layer is averaged without being biased in either the positive or negative direction, which prevents the aforementioned impurity ions from attaching and deteriorating the liquid crystal material, resulting in stable display over a long period of time. can be done.

【0036】以上の書き込み方式において図2(a)の
各パルス幅を5μS、リセットパルス■、■の高さを7
v(ボルト)、図2(b)のTaを200μS、Tfを
33mSに設定し、階調信号パルスの高さを図4の特性
曲線から上で述べたように選んだところ、ほぼ0%から
100%までの中間調レベルが安定に表示できた。
In the above writing method, the width of each pulse in FIG. 2(a) is set to 5 μS, and the height of the reset pulses
v (volt), Ta in Fig. 2(b) is set to 200 μS, Tf is set to 33 mS, and the height of the gray scale signal pulse is selected as described above from the characteristic curve in Fig. 4. Halftone levels up to 100% could be displayed stably.

【0037】実施例2図5は本発明の別の実施例で、図
1と異なり2端子のスイッチング素子を用いたものであ
る。スイッチング素子としてはMIM素子、ダイオード
、それらを複数個組み合せたものなどが考えられるが、
以下ではMIMを例にとって説明する。MIMの一方の
端子は画素電極51に、他の端子は走査信号ライン59
につながれ、対向基板側にはストライプ状に情報信号電
極58がパターニングされている。本実施例で用いたM
IMは五酸化タンタルの薄膜をタンタルで挟んだ構成の
もので、約1vのしきい値を持っている。図6は本実施
例の駆動信号のタイミングを示すもので(a)は情報信
号電極58に与える電圧、(b)は走査信号ライン59
に与える電圧、(c)は画素の両端に現われる電圧波形
である。■のリセット時には走査ライン59に負の電圧
−7vが印加され情報電極に0vが与えられる。■の書
き込み時には走査信号ラインに正の選択電圧+7vが印
加され情報電極に階調レベルに応じて0vから+7vの
電圧が与えられる。反対の周期■、■では■、■と逆極
性のパルスが印加されるが、ただし階調信号レベルは■
と逆極性であるばかりでなく振幅も一般には違っていて
T(V1)+T(V2)=100%を満たすように選ば
れるのは実施例1と同じである。
Embodiment 2 FIG. 5 shows another embodiment of the present invention, in which, unlike FIG. 1, a two-terminal switching element is used. Possible switching elements include MIM elements, diodes, and combinations of multiple elements.
In the following, explanation will be given taking MIM as an example. One terminal of the MIM is connected to the pixel electrode 51, and the other terminal is connected to the scanning signal line 59.
Information signal electrodes 58 are patterned in stripes on the opposite substrate side. M used in this example
The IM has a structure in which a thin film of tantalum pentoxide is sandwiched between two tantalum layers, and has a threshold value of about 1V. FIG. 6 shows the timing of the drive signal in this embodiment, in which (a) shows the voltage applied to the information signal electrode 58, and (b) shows the voltage applied to the scanning signal line 59.
(c) is the voltage waveform appearing at both ends of the pixel. At the time of reset (2), a negative voltage of -7V is applied to the scanning line 59 and 0V is applied to the information electrode. At the time of writing (2), a positive selection voltage +7v is applied to the scanning signal line, and a voltage from 0v to +7v is applied to the information electrode according to the gradation level. In the opposite periods ■ and ■, pulses of opposite polarity to ■ and ■ are applied, but the gradation signal level is
Not only are the polarities reversed, but also the amplitudes are generally different, and are selected so as to satisfy T(V1)+T(V2)=100%, as in the first embodiment.

【0038】比較例1 図8に示す一方極性のリセット方式で駆動したところ、
2ないし3秒で表示が消えてしまった。この時のパルス
幅とフレーム周期は実施例1と同じであった。表示が消
えてしまったのは残留DC電圧のために液晶内でイオン
が移動して書き込み電界とは逆側に内蔵電界を作り、実
効的な書き込み電界が減少したためである。
Comparative Example 1 When driven by the one-polarity reset method shown in FIG.
The display disappeared after 2 or 3 seconds. The pulse width and frame period at this time were the same as in Example 1. The reason why the display disappeared is because ions moved within the liquid crystal due to the residual DC voltage, creating a built-in electric field on the opposite side of the writing electric field, reducing the effective writing electric field.

【0039】比較例2 実施例1と同じ図2の駆動波形を用い、ただし正側の反
転率T(V1)が70%、負側の反転率T(V2)が2
5%になるように書き込みもに電圧を設定したところ、
フリッカが目立ち表示品質が低下した。また、正側の反
転率T(V1)を70%、負側の反転率T(V2)を3
5%に設定してもフリッカが見えた。
Comparative Example 2 The same drive waveform shown in FIG. 2 as in Example 1 was used, except that the positive side inversion rate T (V1) was 70% and the negative side inversion rate T (V2) was 2.
When I set the voltage for writing so that it was 5%,
Flicker was noticeable and display quality deteriorated. In addition, the positive side reversal rate T (V1) is 70%, and the negative side reversal rate T (V2) is 3
Even when set to 5%, flicker was visible.

【0040】[0040]

【発明の効果】以上説明したように、一定周期毎にリセ
ット電圧の極性、および階調信号の極性を反転させるこ
とにより、液晶材の劣化および不純物イオンによるFL
Cの双安定性の低下を防止することが可能になる。
Effects of the Invention As explained above, by reversing the polarity of the reset voltage and the polarity of the gray scale signal at regular intervals, deterioration of the liquid crystal material and FL caused by impurity ions can be prevented.
This makes it possible to prevent the bistability of C from decreasing.

【0041】また、これら極性反転の周期を水平周期と
し、隣接する走査線のリセット電圧を互いに逆極性とな
るように駆動することにより、フリッカ等を防止するこ
とができる。
Furthermore, by setting the period of these polarity inversions as a horizontal period and driving the reset voltages of adjacent scanning lines so that they have opposite polarities, flickers and the like can be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の第1の実施例に係るFLCパネルおよ
び駆動系のブロック図である。
FIG. 1 is a block diagram of an FLC panel and a drive system according to a first embodiment of the present invention.

【図2】第1の実施例に係る駆動方法における諸信号波
形図である。
FIG. 2 is a diagram of various signal waveforms in the driving method according to the first embodiment.

【図3】第1の実施例における所定画素(注目画素)の
表示状態図である。
FIG. 3 is a display state diagram of a predetermined pixel (pixel of interest) in the first embodiment.

【図4】強誘電性液晶素子における諧調信号と透過率の
関係を示す図である。
FIG. 4 is a diagram showing the relationship between tone signals and transmittance in a ferroelectric liquid crystal element.

【図5】本発明の第2の実施例に係るFLCパネルおよ
び駆動系のブロック図である。
FIG. 5 is a block diagram of an FLC panel and drive system according to a second embodiment of the present invention.

【図6】第2の実施例に係る駆動方法における諸信号波
形図である。
FIG. 6 is a diagram of various signal waveforms in a driving method according to a second embodiment.

【図7】FLC素子の層構成図である。FIG. 7 is a layer configuration diagram of an FLC element.

【図8】電荷変調による面積階調法における特性図であ
る。
FIG. 8 is a characteristic diagram in an area gradation method using charge modulation.

【図9】強誘電性液晶セルの例を模式的に示した図であ
る。
FIG. 9 is a diagram schematically showing an example of a ferroelectric liquid crystal cell.

【図10】強誘電性液晶分子が非らせん構造をとってい
る場合の、強誘電性液晶セルの例を模式的に示した図で
ある。
FIG. 10 is a diagram schematically showing an example of a ferroelectric liquid crystal cell in which ferroelectric liquid crystal molecules have a non-helical structure.

【符号の説明】[Explanation of symbols]

1  FLCパネル 2  Xドライバ 3  Yドライバ 4  タイミングコントローラ 5,6  極性反転回路 7  切換回路 8  信号ライン 9  ゲートライン 10  信号線 12,14  電圧減衰曲線 51,76a  画素電極 58,76b  情報信号電極(対向電極)59  走
査信号ライン 70a,70b  基板 71  ゲート電極 72  絶縁膜 73  半導体膜 74  ソース(ドレイン)端子 75  ドレイン(ソース)端子 77a  絶縁層 77b  絶縁膜 78  光遮蔽膜 80  強誘電性液晶 81  シール材 82a,82b  偏光子 83  反射板 91a,91b  基板 92  液晶分子層
1 FLC panel 2 )59 Scanning signal lines 70a, 70b Substrate 71 Gate electrode 72 Insulating film 73 Semiconductor film 74 Source (drain) terminal 75 Drain (source) terminal 77a Insulating layer 77b Insulating film 78 Light shielding film 80 Ferroelectric liquid crystal 81 Sealing material 82a, 82b Polarizer 83 Reflector 91a, 91b Substrate 92 Liquid crystal molecule layer

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】  マトリクス状に配置された画素電極ご
とにスイッチング素子を設け、対向電極との間に強誘電
性液晶を挟持した強誘電性液晶素子であって、両電極間
に画素全体を強誘電性液晶の第一の安定状態にリセット
するリセット電圧と、前記リセット電圧とは逆極性の、
画素を部分的に第二の安定状態に遷移させる階調信号電
圧とを交互に切り替えて印加する電圧印加手段と、一定
周期ごとに該リセット電圧を反転させる手段と、一定周
期ごとに該階調信号電圧を反転させる手段とを有し、階
調信号電圧がVの時の強誘電性液晶の状態反転率をT(
V)%とすると、負極性リセット後の階調信号電圧V1
とそれに対応する正極性リセット後の階調信号電圧−V
2とが T(V1)+T(V2)=100 の関係を満たすことを特徴とする強誘電性液晶素子。
1. A ferroelectric liquid crystal element in which a switching element is provided for each pixel electrode arranged in a matrix, and a ferroelectric liquid crystal is sandwiched between the counter electrode and the entire pixel between the two electrodes. a reset voltage for resetting the dielectric liquid crystal to a first stable state, and a polarity opposite to that of the reset voltage;
voltage applying means for alternately switching and applying a grayscale signal voltage that partially transitions the pixel to a second stable state; means for inverting the reset voltage at regular intervals; and means for inverting the reset voltage at regular intervals; means for inverting the signal voltage, and the state inversion rate of the ferroelectric liquid crystal when the gray scale signal voltage is V is T(
V)%, the grayscale signal voltage V1 after negative polarity reset
and the corresponding gradation signal voltage after positive polarity reset -V
A ferroelectric liquid crystal element characterized in that 2 and 2 satisfy the relationship T(V1)+T(V2)=100.
【請求項2】  該周期が一画面の走査周期である請求
項1記載の強誘電性液晶素子。
2. A ferroelectric liquid crystal element according to claim 1, wherein the period is a scanning period of one screen.
【請求項3】  隣接する走査線のリセット電圧が逆極
性である請求項1記載の強誘電性液晶素子。
3. The ferroelectric liquid crystal device according to claim 1, wherein the reset voltages of adjacent scanning lines have opposite polarities.
【請求項4】  該第一の安定状態が黒状態に対応する
請求項1記載の強誘電性液晶素子。
4. A ferroelectric liquid crystal device according to claim 1, wherein the first stable state corresponds to a black state.
【請求項5】  マトリクス状に配置された画素電極ご
とにスイッチング素子を設け、対向電極との間に強誘電
性液晶を挟持した液晶表示素子を駆動する駆動方法であ
って、両電極間に画素全体を強誘電性液晶の第一の安定
状態にリセットするリセット電圧を印加するステップと
、前記リセット電圧とは逆極性の階調信号電圧によって
、画素を部分的に第二の安定状態に遷移させるステップ
とを含み、一定周期ごとに該リセット電圧の極性を反転
させ、階調信号電圧がVの時の強誘電性液晶の状態反転
率をT(V)%とすると、負極性リセット後の階調信号
電圧V1とそれに対応する正極性リセット後の階調信号
電圧−V2とが T(V1)+T(V2)=100 の関係を満たすことを特徴とする駆動方法。
5. A driving method for driving a liquid crystal display element in which a switching element is provided for each pixel electrode arranged in a matrix, and a ferroelectric liquid crystal is sandwiched between a counter electrode and a pixel electrode. Applying a reset voltage that resets the entire ferroelectric liquid crystal to the first stable state, and partially transitioning the pixel to the second stable state by using a gray scale signal voltage of opposite polarity to the reset voltage. If the polarity of the reset voltage is reversed at regular intervals, and the state reversal rate of the ferroelectric liquid crystal when the gray scale signal voltage is V is T(V)%, then the gray scale after negative polarity reset is A driving method characterized in that a tone signal voltage V1 and a corresponding tone signal voltage -V2 after positive polarity reset satisfy the following relationship: T(V1)+T(V2)=100.
【請求項6】  該周期が一画面の走査周期である請求
項5記載の駆動方法。
6. The driving method according to claim 5, wherein the period is a scanning period of one screen.
【請求項7】  隣接する走査線のリセット電圧が逆極
性である請求項5記載の駆動方法。
7. The driving method according to claim 5, wherein the reset voltages of adjacent scanning lines have opposite polarities.
【請求項8】  該第一の安定状態が黒状態に対応する
請求項5記載の駆動方法。
8. The driving method according to claim 5, wherein the first stable state corresponds to a black state.
JP3074205A 1990-03-20 1991-03-15 Ferroelectric liquid crystal device Expired - Fee Related JP2805253B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP3074205A JP2805253B2 (en) 1990-03-20 1991-03-15 Ferroelectric liquid crystal device
AT91104222T ATE140097T1 (en) 1990-03-20 1991-03-19 METHOD FOR CONTROLLING A FERROELECTRIC LIQUID CRYSTAL ELEMENT AND FERROELECTRIC LIQUID CRYSTAL DISPLAY
DE69120564T DE69120564T2 (en) 1990-03-20 1991-03-19 Method for driving a ferroelectric liquid crystal element and ferroelectric liquid crystal display
EP91104222A EP0448032B1 (en) 1990-03-20 1991-03-19 Method of driving ferroelectric liquid crystal element and ferroelectric liquid crystal display

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP7051190 1990-03-20
JP2-70511 1990-03-20
JP3074205A JP2805253B2 (en) 1990-03-20 1991-03-15 Ferroelectric liquid crystal device

Publications (2)

Publication Number Publication Date
JPH04218023A true JPH04218023A (en) 1992-08-07
JP2805253B2 JP2805253B2 (en) 1998-09-30

Family

ID=26411663

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JP3074205A Expired - Fee Related JP2805253B2 (en) 1990-03-20 1991-03-15 Ferroelectric liquid crystal device

Country Status (4)

Country Link
EP (1) EP0448032B1 (en)
JP (1) JP2805253B2 (en)
AT (1) ATE140097T1 (en)
DE (1) DE69120564T2 (en)

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Publication number Priority date Publication date Assignee Title
US5691783A (en) * 1993-06-30 1997-11-25 Sharp Kabushiki Kaisha Liquid crystal display device and method for driving the same
JP2002328654A (en) * 2001-04-27 2002-11-15 Matsushita Electric Ind Co Ltd Driving method for liquid crystal display
US6989812B2 (en) 2001-02-05 2006-01-24 Matsushita Electric Industrial Co., Ltd. Liquid crystal display unit and driving method therefor
JP2010217876A (en) * 2009-03-18 2010-09-30 Keiho Kagi Yugenkoshi Non-volatile display module and non-volatile display apparatus
US8564514B2 (en) 2001-04-18 2013-10-22 Fujitsu Limited Driving method of liquid crystal display device and liquid crystal display device

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JP2746486B2 (en) * 1991-08-20 1998-05-06 シャープ株式会社 Ferroelectric liquid crystal device
JP2806098B2 (en) * 1991-10-09 1998-09-30 松下電器産業株式会社 Driving method of display device
JPH05241138A (en) * 1991-12-06 1993-09-21 Canon Inc Liquid crystal optical element
JP2866518B2 (en) * 1992-01-17 1999-03-08 シャープ株式会社 Driving method of antiferroelectric liquid crystal device
EP0724759B1 (en) * 1994-08-23 2001-04-11 Koninklijke Philips Electronics N.V. Acive matrix liquid crystal display

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JPS63244021A (en) * 1987-03-31 1988-10-11 Canon Inc Driving device
JPS63249897A (en) * 1987-03-17 1988-10-17 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Display device and driving thereof

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GB2173336B (en) * 1985-04-03 1988-04-27 Stc Plc Addressing liquid crystal cells
NL8802436A (en) * 1988-10-05 1990-05-01 Philips Electronics Nv METHOD FOR CONTROLLING A DISPLAY DEVICE

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JPS63249897A (en) * 1987-03-17 1988-10-17 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Display device and driving thereof
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5691783A (en) * 1993-06-30 1997-11-25 Sharp Kabushiki Kaisha Liquid crystal display device and method for driving the same
US6989812B2 (en) 2001-02-05 2006-01-24 Matsushita Electric Industrial Co., Ltd. Liquid crystal display unit and driving method therefor
US7450101B2 (en) 2001-02-05 2008-11-11 Panasonic Corporation Liquid crystal display unit and driving method therefor
US8564514B2 (en) 2001-04-18 2013-10-22 Fujitsu Limited Driving method of liquid crystal display device and liquid crystal display device
JP2002328654A (en) * 2001-04-27 2002-11-15 Matsushita Electric Ind Co Ltd Driving method for liquid crystal display
JP2010217876A (en) * 2009-03-18 2010-09-30 Keiho Kagi Yugenkoshi Non-volatile display module and non-volatile display apparatus
US8643639B2 (en) 2009-03-18 2014-02-04 Pervasive Display Co., Ltd. Non-volatile display module and non-volatile display apparatus

Also Published As

Publication number Publication date
EP0448032B1 (en) 1996-07-03
DE69120564T2 (en) 1996-12-19
DE69120564D1 (en) 1996-08-08
JP2805253B2 (en) 1998-09-30
EP0448032A2 (en) 1991-09-25
ATE140097T1 (en) 1996-07-15
EP0448032A3 (en) 1992-11-19

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