JPH0453294B2 - - Google Patents

Info

Publication number
JPH0453294B2
JPH0453294B2 JP59130001A JP13000184A JPH0453294B2 JP H0453294 B2 JPH0453294 B2 JP H0453294B2 JP 59130001 A JP59130001 A JP 59130001A JP 13000184 A JP13000184 A JP 13000184A JP H0453294 B2 JPH0453294 B2 JP H0453294B2
Authority
JP
Japan
Prior art keywords
liquid crystal
electrode
electric field
fet
pixel electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59130001A
Other languages
Japanese (ja)
Other versions
JPS619625A (en
Inventor
Shinjiro Okada
Yasuyuki Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP59130001A priority Critical patent/JPS619625A/en
Priority to US06/724,828 priority patent/US4697887A/en
Publication of JPS619625A publication Critical patent/JPS619625A/en
Publication of JPH0453294B2 publication Critical patent/JPH0453294B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • G09G3/3651Control of matrices with row and column drivers using an active matrix using multistable liquid crystals, e.g. ferroelectric liquid crystals
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/137Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
    • G02F1/13781Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering using smectic liquid crystals
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/122Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode having a particular pattern
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • G09G3/3655Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は液晶を用いた光シヤツターアレイ、画
像表示装置等の駆動方法に関するものであり、さ
らに詳しくは双安定性液晶、特に強誘電性液晶を
アクテイブマトリツクス構成により駆動する方法
に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for driving optical shutter arrays, image display devices, etc. using liquid crystals, and more specifically relates to bistable liquid crystals, particularly ferroelectric liquid crystals. The present invention relates to a method of driving a liquid crystal using an active matrix configuration.

[従来の技術] 従来より、走査電極群と信号電極群をマトリク
ス状に構成し、その電極間に液晶化合物を充填
し、多数の画素を形成して画像或いは情報の表示
を行う液晶表示素子は、よく知られている。この
表示素子の駆動法としては、走査電極群に、順
次、周期的にアドレス信号を選択印加し、信号電
極群には所定の情報信号をアドレス信号と同期さ
せて並列的に選択印加する時分割駆動が採用され
ているが、この表示素子及びその駆動法は、以下
に述べる如き致命的とも言える大きな欠点を有し
ていた。
[Prior Art] Conventionally, liquid crystal display elements have been used to display images or information by configuring a group of scanning electrodes and a group of signal electrodes in a matrix, filling a liquid crystal compound between the electrodes, and forming a large number of pixels. ,well known. The driving method for this display element is a time-sharing method in which an address signal is selectively and periodically applied to a group of scanning electrodes, and a predetermined information signal is selectively applied in parallel to a group of signal electrodes in synchronization with the address signal. However, this display element and its driving method had major and fatal drawbacks as described below.

即ち、画素密度を高く、或いは画面を大きくす
るのが難しいことである。従来の液晶の中で応答
速度が比較的高く、しかも消費電力が小さいこと
から、表示素子として実用に供されているのは殆
どが、例えば、M.SchadtとW.Helfrich著、
“Applied physics Letters”、vol.18,No.4
(1971.2.15)、P.127〜128の“Voltage−
Dependent Optical Activity of a Twisted
Nematic Liquid Crystal”に示されたTN
(twisted nematic)型の液晶を用いたものであ
り、この型の液晶は、無電界状態で正の誘電異方
性をもつ、ネマチツク液晶の分子が、液晶層厚方
向で捩れた構造(ヘリカル構造)を形成し、両電
極面でこの液晶の分子が互いに平行に配列した構
造を形成している。一方、電界印加状態では、正
の誘電異方性をもつネマチツク液晶が電界方向に
配列し、この結果光調変調を起すことができる。
この型の液晶を用いてマトリクス電極構造によつ
て表示素子を構成した場合、走査電極と信号電極
が共に選択される領域(選択点)には、液晶分子
を電極面に垂直に配列させるに要する閾値以上の
電圧が印加され、走査電極と信号電極が共に選択
されない領域(非選択点)には電圧は印加され
ず、したがつて液晶分子は電極面に対して並行な
安定配列を保つている。このような液晶セルの上
下に、互いにクロスニコル関係にある直線偏光子
を配置することにより、選択点では光が透過せ
ず、非選択点では光が透過するため、画像素子と
することが可能となる。然し乍ら、マトリクス電
極構造を構成した場合には、走査電極が選択さ
れ、信号電極が選択されない領域或いは、走査電
極が選択されず、信号電極が選択される領域(所
謂“半選択点”)にも有限の電界がかかつてしま
う。選択点にかかる電圧と、半選択点にかかる電
圧の差が充分に大きく、液晶分子を電界に垂直に
配列させるに要する電圧閾値がこの中間の電圧値
に設定されるならば、表示素子は正常に動作する
わけである。しかし、この方式において、走査線
数(N)を増やして行つた場合、画面全体(1フ
レーム)を走査する間に一つの選択点に有効な電
界がかかつている時間(duty比)は1/Nの割
合で減少してしまう。このために、くり返し走査
を行つた場合の選択点と非選択点にかかる実効値
としての電圧差は、走査線数が増えれば増える程
小さくなり、結果的には画像コントラストの低下
やクロストークが避け難い欠点となつている。こ
のような現象は、双安定状態を有さない液晶(電
極面に対し、液晶分子が水平に配向しているのが
安定状態であり、電界が有効に印加されている間
のみ垂直に配向する)を、時間的蓄積効果を利用
して駆動する(即ち、繰り返し走査する)ときに
生じる本質的には避け難い問題点である。この点
を改良するために、電圧平均化法、2周波駆動法
や多重マトリクス法等が既に提案されているが、
いずれの方法でも不充分であり、表示素子の大画
面化や高密度化は、走査線数が充分に増やせない
ことによつて頭打ちになつているのが現状であ
る。
That is, it is difficult to increase the pixel density or enlarge the screen. Among conventional liquid crystals, most of them are in practical use as display elements because of their relatively high response speed and low power consumption.
“Applied physics Letters”, vol.18, No.4
(1971.2.15), P.127-128 “Voltage−
Dependent Optical Activity of a Twisted
TN shown in “Nematic Liquid Crystal”
This type of liquid crystal has a structure (helical structure) in which the molecules of the nematic liquid crystal, which have positive dielectric anisotropy in the absence of an electric field, are twisted in the thickness direction of the liquid crystal layer. ), forming a structure in which the molecules of this liquid crystal are aligned parallel to each other on both electrode surfaces. On the other hand, when an electric field is applied, nematic liquid crystals with positive dielectric anisotropy are aligned in the direction of the electric field, resulting in optical modulation.
When a display element is constructed using this type of liquid crystal with a matrix electrode structure, in the region where both the scanning electrode and the signal electrode are selected (selected point), there is a A voltage higher than the threshold is applied, and no voltage is applied to areas where neither the scanning electrode nor the signal electrode is selected (non-selected points), so the liquid crystal molecules maintain a stable alignment parallel to the electrode surface. . By arranging linear polarizers above and below such a liquid crystal cell in a cross Nicol relationship, light does not pass through selected points, but light passes through non-selected points, making it possible to use it as an image element. becomes. However, when a matrix electrode structure is configured, there may be an area where scanning electrodes are selected and signal electrodes are not selected, or an area where scanning electrodes are not selected and signal electrodes are selected (so-called "half-selected points"). The finite electric field becomes strong. If the difference between the voltage applied to the selected point and the voltage applied to the half-selected point is sufficiently large, and the voltage threshold required to align liquid crystal molecules perpendicular to the electric field is set to a voltage value in between, the display element will function normally. This is why it works. However, in this method, when the number of scanning lines (N) is increased, the time during which an effective electric field is applied to one selected point while scanning the entire screen (one frame) (duty ratio) is 1/ It decreases at a rate of N. For this reason, when repeated scanning is performed, the effective voltage difference between selected points and non-selected points becomes smaller as the number of scanning lines increases, resulting in a decrease in image contrast and crosstalk. It has become an unavoidable drawback. This phenomenon is caused by liquid crystals that do not have a bistable state (the stable state is when the liquid crystal molecules are aligned horizontally with respect to the electrode surface, and they are aligned vertically only while an electric field is effectively applied). ) is essentially an unavoidable problem that arises when driving (that is, repeatedly scanning) using the temporal accumulation effect. In order to improve this point, voltage averaging method, dual frequency drive method, multiple matrix method, etc. have already been proposed.
Either method is insufficient, and the current situation is that efforts to increase the screen size and density of display elements have reached a plateau due to the inability to sufficiently increase the number of scanning lines.

[発明が解決しようとする問題点] 本発明の目的は、前述したような従来の液晶表
示素子における問題点を悉く解決した新規な双安
定性液晶、特に強誘電性液晶素子の駆動法を提供
することにある。
[Problems to be Solved by the Invention] An object of the present invention is to provide a novel method for driving a bistable liquid crystal, particularly a ferroelectric liquid crystal element, which solves all the problems of conventional liquid crystal display elements as described above. It's about doing.

即ち、本発明は電圧応答速度が早く、状態記憶
性を有する強誘電性液晶をアクテイブマトリツク
スにより2方向の電界を印加して明、暗の2つの
状態に駆動することにより、画素数の多い大画面
の表示及び高速度で画像を表示する強誘電性液晶
の駆動方法を提供することを目的とするものであ
る。
That is, the present invention has a fast voltage response speed and a ferroelectric liquid crystal that has state memory by applying electric fields in two directions using an active matrix to drive it into two states, bright and dark. The object of the present invention is to provide a method for driving a ferroelectric liquid crystal that displays images on a large screen and at high speed.

[問題点を解決するための手段]及び[作用] 本発明の液晶素子の駆動法は、ゲート端子及び
チヤンネルの第一及び第二端子を有する電界効果
型トランジスタ(以下「FET」と記す)と、
FETの第一端子に接続された画素電極と、画素
電極に対向する対向電極と、画素電極と対向電極
の間に挟持され、画素電極と対向電極間に第一の
電界を印加することにより第一の安定な配向状態
を生じ、画素電極と対向電極間に第一の電界とは
逆極性の第二の電界を印加することにより第二の
安定な配向状態を生じる強誘電性液晶とからなる
液晶素子を複数の行及び列に沿つて配置し、対向
電極を行に沿つて配置した液晶素子の配列方向に
対して平行に該行毎に分割して複数の分割対向電
極を形成し走査信号線に接続し、複数の行及び列
に沿つて配置した液晶素子のFETの第二端子を
共通に接続し、ゲート端子を表示信号線に接続し
た液晶装置をアクテイブマトリクス駆動する駆動
法であつて、 FETの第二端子の電位を常に一定に保ち、 前記分割対向電極に、画素電極との電位差の絶
対値が前記液晶のしきい値を越える電位を付与す
る走査信号を印加して、該走査信号が印加された
対向電極上の液晶素子の画素電極と対向電極間に
第一の電界を形成して、前記液晶を第一の配向状
態に揃えるリフレツシユ操作を行なつた後、 前記走査信号が印加された対向電極上の選択さ
れた液晶素子のFETのゲート端子に、前記FET
の第二端子に対してゲートオン状態を取る電位を
付与する表示信号を印加し、選択されなかつた液
晶素子のFETのゲート端子に前記FETの第二端
子に対してゲートオフ状態を取る電位を付与する
表示信号を印加し、これら表示信号と同期して、
前記FETの第二端子との電位差が上記リフレツ
シユ操作における電位差とは逆極性で且つその絶
対値が前記液晶のしきい値を越える電位を付与す
る走査信号を前記走査信号が印加された対向電極
に印加して、第二の電界を形成する第二電界形成
操作を行ない、 該第二の電界形成操作と同期して、先行する他
の分割対向電極上の複数の液晶素子をリフレツシ
ユ操作することを特徴とするものである。
[Means for solving the problem] and [Operation] The method for driving a liquid crystal element of the present invention uses a field effect transistor (hereinafter referred to as "FET") having a gate terminal and first and second terminals of a channel. ,
A pixel electrode connected to the first terminal of the FET, a counter electrode opposite to the pixel electrode, and a first electric field sandwiched between the pixel electrode and the counter electrode, A ferroelectric liquid crystal that produces one stable alignment state and produces a second stable alignment state by applying a second electric field of opposite polarity to the first electric field between the pixel electrode and the counter electrode. Liquid crystal elements are arranged along a plurality of rows and columns, and counter electrodes are divided into rows in parallel to the arrangement direction of the liquid crystal elements arranged along the rows to form a plurality of divided counter electrodes, and scan signals are generated. A driving method for driving a liquid crystal device in an active matrix, in which the second terminals of FETs of liquid crystal elements arranged along a plurality of rows and columns are connected to a line, and the gate terminal is connected to a display signal line. , the potential of the second terminal of the FET is always kept constant, and a scanning signal is applied to the divided opposing electrodes to give a potential whose absolute value of the potential difference with the pixel electrode exceeds the threshold value of the liquid crystal. After performing a refresh operation in which a first electric field is formed between a pixel electrode of a liquid crystal element on a counter electrode to which a signal is applied and a counter electrode to align the liquid crystal in a first alignment state, the scanning signal is The FET is connected to the gate terminal of the FET of the selected liquid crystal element on the counter electrode to which the applied voltage is applied.
A display signal is applied to the second terminal of the liquid crystal element to apply a potential that makes the gate on, and a potential that makes the gate off is applied to the gate terminal of the FET of the unselected liquid crystal element. Apply display signals, synchronize with these display signals,
A scanning signal is applied to the opposite electrode to which the scanning signal is applied, the potential difference with the second terminal of the FET is opposite in polarity to the potential difference in the refresh operation, and the absolute value thereof exceeds the threshold of the liquid crystal. applying a second electric field to form a second electric field, and in synchronization with the second electric field forming operation, refreshing the plurality of liquid crystal elements on other preceding divided counter electrodes. This is a characteristic feature.

本発明の駆動法で用いる強誘電性液晶としては、
加えられる電界に応じて第一の光学的安定状態と
第二の光学的安定状態とのいずれかを取る、すな
わち電界に対する双安定状態を有する物質、特に
このような性質を有する液晶が用いられる。
The ferroelectric liquid crystal used in the driving method of the present invention includes:
A substance that takes either a first optically stable state or a second optically stable state depending on an applied electric field, that is, a bistable state with respect to an electric field, is used, particularly a liquid crystal having such a property.

本発明の駆動法で用いることができる双安定性
を有する強誘電性液晶としては、強誘電性を有す
るカイラルスメクテイツク液晶が最も好ましく、
そのうちカイラルスメクテイツクC相(SmC
又H相(SmH)の液晶が適している。この強
誘電性液晶については、“LE JOURNAL DE
PHYSIOUE LETTERS”36(L−69)1975,
「Ferroelectric Liquid Crystals」;“Applied
physics Letters”36(11)1980、「Submicro
Second BistabIe Electrooptic Switching in
Liquid Crystals」;“固体物理”16(141)1981
「液晶」等に記載されており、本発明ではこれら
に開示された強誘電性液晶を用いることができ
る。
As the ferroelectric liquid crystal having bistability that can be used in the driving method of the present invention, a chiral smectic liquid crystal having ferroelectricity is most preferable.
Of these, chiral smectate C phase (SmC * )
Also, H-phase (SmH * ) liquid crystal is suitable. For more information on this ferroelectric liquid crystal, please refer to “LE JOURNAL DE
PHYSIOUE LETTERS” 36 (L-69) 1975,
“Ferroelectric Liquid Crystals”; “Applied
physics Letters” 36 (11) 1980, “Submicro
Second BistabIe Electrooptic Switching in
Liquid Crystals”; “Solid State Physics” 16 (141) 1981
The ferroelectric liquid crystals disclosed in these documents can be used in the present invention.

より具体的には、本発明法に用いられる強誘電
性液晶化合物の例としては、デシロキシベンジリ
デン−P′−アミノ−2−メチルブチルシンナメー
ト(DOBAMBC)、ヘキシルオキシベンジリデ
ン−P′−アミノ−2−クロロプロピルシンナメー
ト(HOBACPC)および4−o−(2−メチル)
−ブチルレゾルシリデン−4′−オクチルアニリン
(MBRA8)等が挙げられる。
More specifically, examples of ferroelectric liquid crystal compounds used in the method of the present invention include decyloxybenzylidene-P'-amino-2-methylbutylcinnamate (DOBAMBC), hexyloxybenzylidene-P'-amino- 2-chloropropyl cinnamate (HOBACPC) and 4-o-(2-methyl)
-butylresolcylidene-4'-octylaniline (MBRA8) and the like.

これらの材料を用いて、素子を構成する場合、
液晶化合物がSmC相又はSmH相となるよう
な温度状態に保持する為、必要に応じて素子をヒ
ーターが埋め込まれた銅ブロツク等により支持す
ることができる。
When constructing an element using these materials,
In order to maintain the temperature state such that the liquid crystal compound becomes the SmC * phase or the SmH * phase, the element can be supported by a copper block or the like in which a heater is embedded, if necessary.

第1図は、強誘電性液晶セルの例を模式的に描
いたものである。1と1′は、In2O3、SnO2
ITO(Indium−Tin Oxide)等の透明電極がコー
トされた基板(ガラス板)であり、その間に液晶
分子層2がガラス面に垂直になるよう配向した
SmC相の液晶が封入されている。太線で示し
た線3が液晶分子を表わしており、この液晶分子
3は、その分子に直交した方向に双極子モーメン
ト(P⊥ 詣4を有している。基板1と1′上の電
極間に一定の閾値以上の電圧を印加すると、液晶
分子3のらせん構造がほどけ、双極子モーメント
(P⊥ )4はすべて電界方向に向くよう、液晶分
子3の配向方向を変えることができる。液晶分子
3は細長い形状を有しており、その長軸方向と短
軸方向で屈折率異方性を示し、従つて例えばガラ
ス面の上下に互いにクロスニコルの位置関係に配
置した偏光子を置けば、電圧印加極性によつて光
学特性が変わる液晶光学変調素子となることは、
容易に理解される。さらに液晶セルの厚さを充分
に薄くした場合(例えば1μ)には、第2図に示
すように電界を印加していない状態でも液晶分子
のらせん構造は、ほどけ(非せらん構造)、その
双極子モーメントP又はP′は上向き4a又は下向
4bのどちらかの状態をとる。このようなセルに
第2図に示す如く一定の閾値以上の極性の異なる
電界E又はE′を所定時間付与すると、双極子モー
メントは電界E又はE′の電界ベクトルに対応して
上向き4a又は、下向き4bと向きを変え、それ
に応じて液晶分子は第一の配向状態5かあるいは
第二の配向状態5′の何れか一方に配向する。
FIG. 1 schematically depicts an example of a ferroelectric liquid crystal cell. 1 and 1′ are In 2 O 3 , SnO 2 and
A substrate (glass plate) coated with a transparent electrode such as ITO (Indium-Tin Oxide), between which a liquid crystal molecular layer 2 is oriented perpendicular to the glass surface.
SmC * phase liquid crystal is sealed. A thick line 3 represents a liquid crystal molecule, and this liquid crystal molecule 3 has a dipole moment (P ⊥ 4) in a direction perpendicular to the molecule. When a voltage higher than a certain threshold is applied to the liquid crystal molecules 3, the helical structure of the liquid crystal molecules 3 is unraveled, and the orientation direction of the liquid crystal molecules 3 can be changed so that all dipole moments (P⊥) 4 are directed in the direction of the electric field.Liquid crystal molecules 3 has an elongated shape and exhibits refractive index anisotropy in its long and short axis directions. Therefore, for example, if polarizers are placed above and below the glass surface in a crossed nicol positional relationship, The liquid crystal optical modulation element whose optical properties change depending on the polarity of applied voltage is
easily understood. Furthermore, when the thickness of the liquid crystal cell is made sufficiently thin (for example, 1μ), the helical structure of the liquid crystal molecules unravels (non-helical structure) even when no electric field is applied, as shown in Figure 2. The dipole moment P or P' takes either an upward direction 4a or a downward direction 4b. As shown in FIG. 2, when an electric field E or E' with a different polarity above a certain threshold value is applied to such a cell for a predetermined time, the dipole moment will move upward 4a or The direction is changed from the downward direction 4b, and accordingly, the liquid crystal molecules are aligned in either the first alignment state 5 or the second alignment state 5'.

このような強誘電性液晶を光学変調素子として
用いることの利点は2つある。第1に、応答速度
が極めて速いこと、第2に液晶分子の配向が双安
定状態を有することである。第2の点を例えば第
2図によつて説明すると、電界Eを印加すると液
晶分子は第一の配向状態5に配向するが、この状
態は電界を切つても安定である。又、逆向きの電
界E′を印加すると、液晶分子は第二の配向状態
5′に配向して、その分子の向きを変えるが、や
はり電界を切つてもこの状態に留つている。又、
与える電界Eが一定の閾値を越えない限り、それ
ぞれの配向状態にやはり維持されている。このよ
うな応答速度の速さと、双安定性が有効に実現さ
れるには、セルとしては出来るだけ薄い方が好ま
しく、一般的には、0.5μ〜20μ、特に1μ〜5μが適
している。この種の強誘電性液晶を用いたマトリ
クス電極構造を有する液晶−電気光学装置は、例
えばクラークとラガバルにより、米国特許第
4367924号明細書で提案されている。
There are two advantages to using such a ferroelectric liquid crystal as an optical modulation element. Firstly, the response speed is extremely fast, and secondly, the alignment of liquid crystal molecules has a bistable state. The second point will be explained with reference to FIG. 2, for example. When the electric field E is applied, the liquid crystal molecules are aligned in the first alignment state 5, and this state remains stable even when the electric field is turned off. Furthermore, when an electric field E' in the opposite direction is applied, the liquid crystal molecules are aligned to the second alignment state 5' and the orientation of the molecules is changed, but they remain in this state even after the electric field is turned off. or,
As long as the applied electric field E does not exceed a certain threshold value, each orientation state is maintained. In order to effectively realize such a fast response speed and bistability, it is preferable that the cell be as thin as possible, and generally 0.5μ to 20μ, particularly 1μ to 5μ is suitable. A liquid crystal-electro-optical device having a matrix electrode structure using ferroelectric liquid crystals of this type is disclosed in US Pat.
It is proposed in the specification of No. 4367924.

本発明は、アクテイブマトリクスを構成する
TFT(薄膜トランジスタ)等のFET構造の素子
が、チヤネルの2端子に印加される電圧を逆にす
る事により、いずれをドレインとしていずれをソ
ースとしても使用しうるという事にもとづいてい
る。本発明においては、チヤネルの2端子の内、
画素電極に接続する端子を第一端子、もう一方の
走査信号線に接続する端子を第二端子として便宜
上区別した。本発明において、アクテイブマトリ
ツクスを構成する素子としてはFET構造の素子
であればアモルフアスシリコンTFT、多結晶シ
リコンTFT等のいずれであつても使用しうる。
又FET構造以外のバイポーラトランジスタであ
つても同様に行う事も可能である。
The present invention constitutes an active matrix.
It is based on the fact that an FET structure element such as a TFT (thin film transistor) can be used as either the drain or the source by reversing the voltages applied to the two terminals of the channel. In the present invention, among the two terminals of the channel,
For convenience, the terminal connected to the pixel electrode was referred to as a first terminal, and the terminal connected to the other scanning signal line was referred to as a second terminal. In the present invention, any element having an FET structure such as an amorphous silicon TFT or a polycrystalline silicon TFT may be used as the element constituting the active matrix.
Further, it is also possible to perform the same operation even when using a bipolar transistor other than the FET structure.

N型FETは、VDをドレイン電圧、VGをゲート
電圧、VSをソース電圧、VPをゲートソース間の
閾値電圧とするとVD>VSであり、VG>VS+VP
時導通状態となり、VG<VS+VPの時非導通状態
となる。
In an N-type FET, where V D is the drain voltage, V G is the gate voltage, V S is the source voltage, and V P is the threshold voltage between the gate and source, V D > V S , and V G > V S + V P. It becomes conductive when V G <V S +V P, and becomes non-conductive when V G <V S +V P.

P型FETにおいてはVD<VSとし、VG<VS
VPで導通状態となり、VG>VS+VPで非導通状態
となる。
For P-type FET, V D <V S and V G <V S +
It becomes conductive when V P and becomes non-conductive when V G > V S +V P.

P型であつてもN型であつてもFETの端子の
いずれがドレインとして作用し、いずれがソース
として作用するかは、電圧の印加の方向によつて
定まる。すなわちN型では電圧の低い方がソース
であり、P型では電圧の高い方がソースとし作用
する。
Whether the FET is P-type or N-type, which terminal of the FET acts as the drain and which acts as the source is determined by the direction of voltage application. That is, for N type, the lower voltage serves as the source, and for P type, the higher voltage serves as the source.

強誘電性液晶においては、液晶セルに印加す
る、正、負の電圧に対していずれを「明」状態と
し、いずれを「暗」状態とするかはセルの上下に
配置するクロスニコル状態にした一対の偏光子の
偏光軸と、液晶分子長軸との向きにより自由に設
定できる。
In the case of ferroelectric liquid crystals, the cross-Nicol state placed above and below the cell determines which is in the "bright" state and which is in the "dark" state in response to positive and negative voltages applied to the liquid crystal cell. It can be freely set depending on the direction of the polarization axes of the pair of polarizers and the long axis of the liquid crystal molecules.

本発明は液晶セルに印加される電界をアクテイ
ブマトリツクスの各素子の端子間電圧を制御する
事によつて制御し、表示を行なうものであるか
ら、各信号の電圧レベルは以下の実施例にとらわ
れる事なく、各信号の電位差を相対的に維持すれ
ば、実施する事が可能である。
Since the present invention controls the electric field applied to the liquid crystal cell by controlling the voltage between the terminals of each element of the active matrix to perform display, the voltage level of each signal is determined according to the following example. Regardless, it can be implemented as long as the potential difference between each signal is maintained relatively.

[実施例] 次に、本発明のアクテイブマトリツクスによる
強誘電性液晶の駆動方法の具体例を第3図〜第7
図に基づいて説明する。
[Example] Next, a specific example of a method for driving a ferroelectric liquid crystal using an active matrix of the present invention is shown in FIGS. 3 to 7.
This will be explained based on the diagram.

第3図はアクテイブマトリツクスの回路図、第
4図は対応画素の番地を示す説明図及び第5図は
対応画素の表示例を示す説明図である。
FIG. 3 is a circuit diagram of an active matrix, FIG. 4 is an explanatory diagram showing addresses of corresponding pixels, and FIG. 5 is an explanatory diagram showing an example of display of corresponding pixels.

6は走査電極群であり、7は表示電極群であ
る。
6 is a scanning electrode group, and 7 is a display electrode group.

第6図aは走査信号であつて、位相t1,t2…に
おいてそれぞれ選択された走査電極に印加される
電気信号とそれ以外の走査電極(選択されない走
査電極)に印加れされる電気信号を示している。
第6図bは、表示信号であつて位相t1,t2…にお
いてそれぞれ選択された表示電極と選択されない
表示電極に与えられる電極信号を示している。
FIG. 6a shows a scanning signal, which is an electrical signal applied to each selected scanning electrode and an electrical signal applied to other scanning electrodes (unselected scanning electrodes) at phases t 1 , t 2 . It shows.
FIG. 6b shows electrode signals which are display signals and are applied to selected display electrodes and unselected display electrodes in phases t 1 , t 2 . . . , respectively.

第6図においては、それぞれ横軸が時間を、縦
軸が電圧を表す。例えば、動画を表示するような
場合には、走査電極群6は逐次、周期的に選択さ
れる。まず選択された走査電極ら与えられる電気
信号は、第6図aに示される如く「明」リフレツ
シユ時には、−VCであり、「暗」書込み時には+
VCである。
In FIG. 6, the horizontal axis represents time and the vertical axis represents voltage. For example, when displaying a moving image, the scanning electrode groups 6 are sequentially and periodically selected. First, as shown in FIG. 6a, the electric signal applied to the selected scanning electrode is -V C during "bright" refresh, and +V C during "dark" writing.
V C.

また選択されない走査電極に与えられる電気信
号は第6図aに示す如くいずれも0である。一
方、選択された表示電極に与えられる電気信号
は、第6図bに示される如く走査電極−VCの時
には0あるいは+VGであり、走査電極+VCの時
は+VGである。また選択されない表示電極に与
えられる電気信号は走査電極0の時と同じく0で
ある。以上に於て各々の電圧値は、以下の関係を
満足する所望の値に設定される。
Further, the electrical signals applied to the unselected scanning electrodes are all 0 as shown in FIG. 6a. On the other hand, the electric signal applied to the selected display electrode is 0 or +V G when the scan electrode is -V C , and is +V G when the scan electrode is +V C , as shown in FIG. 6b. Further, the electric signal applied to the unselected display electrodes is 0 as in the case of scan electrode 0. In the above, each voltage value is set to a desired value that satisfies the following relationship.

走査電極m=qラインに表示電極n=lの信号
線で「暗」の書込むと同時に、走査電極m=q+
1ラインに、表示電極n=1〜M(Mは表示線数)
で、ライン全体を「明」にリフレツシユする場
合。
At the same time, "dark" is written on the scanning electrode m=q line with the signal line of the display electrode n=l, and at the same time, the scanning electrode m=q+
In one line, display electrode n=1 to M (M is the number of display lines)
If you want to refresh the entire line to "light".

VS+VLC<VCn (m=q) VGo−VP>VLC+VS (n=l) VS−VLC>VCn (m=q+1) VGo=0 (n=1〜M)(m=q,n≠l) VCn=0 (m≠q) 但し、各記号は下記の事項を表わす。 V S +V LC <V Cn (m=q) V Go −V P >V LC +V S (n=l) V S −V LC >V Cn (m=q+1) V Go =0 (n=1 to M ) (m=q, n≠l) V Cn =0 (m≠q) However, each symbol represents the following items.

VCn:対向電極(走査信号)電圧 VGo:ゲート電極(表示信号)電圧 VS:ソース又はドレイン電極(共通端子)電
圧 VLC:強誘電性液晶の閾値電圧の絶対値 VP:ゲート、ソース間の閾値 以上の動作をq=1〜Nまで繰返し書込みを行
う。
V Cn : Counter electrode (scanning signal) voltage V Go : Gate electrode (display signal) voltage V S : Source or drain electrode (common terminal) voltage V LC : Absolute value of threshold voltage of ferroelectric liquid crystal V P : Gate, The operation above the threshold between sources is repeatedly written from q=1 to N.

この様な電気信号が与えられたときの各画素の
うち、例えば第4図中の画素の書込み動作を第7
図に示す。第7図においてはそれぞれ横軸が時間
を縦軸がON(暗)上側、OFF(明)下側の各表示
状態を表わす。すなわち、第6図及び第7図より
明らかな如く、位相t1において選択された走査線
と表示線の交点にある画素PN,N,PN,N+1,PN,N+2
は閾値−VLCを越える−VLC>VC−VSが印加され、
第4図において画素PN,N,PN,N+1,PN,N+2は「明」
にリフレツシユされる。次いで、位相t2におい
て、選択された走査線と表示線の交点にある画素
PN,N,PN,N+2では、閾値VLSを越える電圧VLC<VC
−VS印加され、画素PN,N,PN,N+2は「暗」に転移
(スイツチ)する。この位相t2における「暗」の
書込みと同時に、位相t2においてやはり選択され
た走査線上にある画素にPN+1,N,PN+1,N+1
PN+1,N+2では、位相t1の場合と同じように、閾値
−VLCを越える電圧−VLC>VC−VSが印加され、
画素PN,N,PN+1,N+1′,PN+1,N+2は「明」にリフレ
ツシユされる。位相t3以降も、前記の各動作を繰
り返すことによつて各走査線上に順次所定の書込
みがなされていく。従つて、選択された走査電極
線上に於て、まず各画素の液晶素子は一方の配向
状態に配向を揃えて画素はOFF(明)となり、次
いで再び選択された同一走査線上に於て、表示電
極が選択されたか否かに応じて、選択された場合
には、液晶分子は他方の配向状態に配向を揃え、
画素はON(暗)となる。
Among the pixels when such an electric signal is applied, for example, the writing operation of the pixel in FIG.
As shown in the figure. In FIG. 7, the horizontal axis represents time, and the vertical axis represents display states of ON (dark) upper side and OFF (bright) lower side. That is, as is clear from FIGS. 6 and 7, pixels P N,N , P N,N+1 , P N,N+2 at the intersection of the scanning line and display line selected at phase t 1 exceeds the threshold −V LC −V LC >V C −V S is applied,
In Figure 4, pixels P N,N , P N,N+1 , P N,N+2 are "bright"
will be refreshed. Then, at phase t 2 , the pixel at the intersection of the selected scan line and the display line
For P N,N , P N,N+2 , the voltage exceeding the threshold V LS V LC <V C
-V S is applied, and the pixels P N,N and P N,N+2 switch to "dark". At the same time as this "dark" writing in phase t 2 , pixels on the scan line also selected in phase t 2 are written P N+1,N , P N+1,N+1 ,
At P N+1,N+2 , as in the case of phase t 1 , a voltage −V LC >V C −V S exceeding the threshold −V LC is applied,
Pixels P N,N , P N+1,N+1 ′, P N+1,N+2 are refreshed to "bright". After phase t3 , by repeating each of the above operations, predetermined writing is sequentially performed on each scanning line. Therefore, on the selected scanning electrode line, the liquid crystal elements of each pixel are first aligned to one alignment state, and the pixel is turned OFF (bright), and then on the same scanning line selected again, the display starts. Depending on whether an electrode is selected or not, if selected, the liquid crystal molecules align to the other alignment state;
The pixel becomes ON (dark).

一方、第7図に示される如く、選択されない走
査線上では、すべての画素に印加される電圧は、
いずれも値電圧を越えない。従つて、選択された
走査線上以外の各画素における液晶分子は配向状
態を変えることなく前回走査されたときの信号状
態(QN-1)に対応した配向を、そのまま保持し
ている。即ち、走査電極が選択されたときにその
1ライン分の信号の書き込みが行われ、1フレー
ムが終了して次回選択されるまでの間は、その信
号状態を保持し得るわけである。従つて、走査電
極数が増えても、実質的なデユーテイ比はかわら
ず、コントラストの低下は全て生じない。
On the other hand, as shown in FIG. 7, on unselected scanning lines, the voltages applied to all pixels are:
Neither voltage exceeds the value voltage. Therefore, the liquid crystal molecules in each pixel other than on the selected scanning line maintain the orientation corresponding to the signal state (Q N-1 ) at the time of the previous scan without changing the orientation state. That is, when a scanning electrode is selected, a signal for one line is written, and the signal state can be maintained until the next selection after one frame is completed. Therefore, even if the number of scanning electrodes increases, the actual duty ratio does not change and the contrast does not deteriorate at all.

第5図に於て、走査電極CN,CN+1,CN+2′,…
と表示電極GN,GN+1,GN+2′,…の交点で形成す
る画素のうち、斜線部の画素は「暗」状態に、白
地で示した画素は「明」状態に対応するものとす
る。今、第5図中の表示電極GN上の表示に注目
すると、走査電極CN,CN+2に対応する画素では
「暗」状態であり、それ以外の画素は「明」状態
である。前記位相t1〜t4の各動作によつて、第5
図の表示パターンが完成する。
In FIG. 5, scanning electrodes C N , C N+1 , C N+2 ',...
Among the pixels formed at the intersections of the display electrodes G N , G N+1 , G N+2 ′, ..., the pixels in the shaded areas correspond to the "dark" state, and the pixels shown in white correspond to the "bright" state. It shall be. Now, if we pay attention to the display on the display electrode G N in Figure 5, the pixels corresponding to the scanning electrodes C N and C N+2 are in the "dark" state, and the other pixels are in the "bright" state. . By each operation of the phases t 1 to t 4 , the fifth
The display pattern of the figure is completed.

本発明の強誘電性液晶の駆動方法において、走
査電極と信号電極の配置は任意であり、例えば第
8図a,bに示すように一列に画素を配置するこ
とも可能であり、この様に配置するとシヤツター
アレイとして利用することができる。
In the method for driving a ferroelectric liquid crystal of the present invention, the arrangement of the scanning electrode and the signal electrode is arbitrary. For example, it is also possible to arrange the pixels in a line as shown in FIG. 8a and b. When placed, it can be used as a shutter array.

次に、以上に説明した実施例において、強誘電
性液晶としてDOBAMBCを駆動するのに好まし
い具体的数値を示すと、例えば 入力周波数o=1×104〜1×106mm3 10<|VG|<60V(波高値) 0.3<|VS|<10V(波高値) が挙げられる。
Next, in the embodiment described above, preferred specific values for driving DOBAMBC as a ferroelectric liquid crystal are as follows: For example, input frequency o=1×10 4 to 1×10 6 mm 3 10<|V G |<60V (peak value) 0.3<|V S |<10V (peak value).

第9図は本発明において使用されるTFTにお
けるFETの構成を示す断面図、第10図はTFT
を用いた強誘電性液晶セルの断面図、第11図は
TFT基板の斜視図、第12図はTFT基板の平面
図、第13図は第12図のA−A′線で切断した
部分断面図、第14図は第12図のB−B′線で
切断した部分断面図であり、以上に示す各図はい
ずれも本発明の一実施態様を示すものである。
FIG. 9 is a cross-sectional view showing the structure of the FET in the TFT used in the present invention, and FIG.
Figure 11 is a cross-sectional view of a ferroelectric liquid crystal cell using
Figure 12 is a perspective view of the TFT substrate, Figure 12 is a plan view of the TFT substrate, Figure 13 is a partial cross-sectional view taken along line A-A' in Figure 12, and Figure 14 is a cross-sectional view taken along line B-B' in Figure 12. It is a partially cutaway sectional view, and each of the figures shown above shows one embodiment of the present invention.

第10図は、本発明の方法で用いうる液晶素子
の1つの具体例を表わしている。ガラス、プラス
チツク等の基板20の上にゲート電極24、絶縁
膜22(水素原子をドーピングした窒化シリコン
膜など)を介して形成した半導体膜16(水素原
子をドーピングしたアモルフアスシリコン)と、
この半導体膜16に接する2つ端子8と11で構
成したTFTと、TFTの端子11と接続した画素
電極12(ITO;Indnium Tin Oxide)が形成
されている。さらに、この上に絶縁層13(ポリ
イミド、ポリアミド、ポリビニルアルコール、ポ
リパラキシリレン、SiO、SiO2)とアルミニウム
やクロムなどからなる光遮蔽膜9が設けられてい
る。対向基板となる基板20′の上には対向電極
21(ITO;Indnium Tin Oxide)と絶縁膜2
2が形成されている。
FIG. 10 shows one specific example of a liquid crystal element that can be used in the method of the invention. A semiconductor film 16 (amorphous silicon doped with hydrogen atoms) formed on a substrate 20 of glass, plastic, etc. via a gate electrode 24 and an insulating film 22 (such as a silicon nitride film doped with hydrogen atoms);
A TFT composed of two terminals 8 and 11 in contact with this semiconductor film 16 and a pixel electrode 12 (ITO; Indnium Tin Oxide) connected to the terminal 11 of the TFT are formed. Furthermore, an insulating layer 13 (polyimide, polyamide, polyvinyl alcohol, polyparaxylylene, SiO, SiO 2 ) and a light shielding film 9 made of aluminum, chromium, or the like are provided on this. A counter electrode 21 (ITO; Indnium Tin Oxide) and an insulating film 2 are provided on the substrate 20', which is the counter substrate.
2 is formed.

この基板20と20′の間には、前述の強誘電
性液晶23が挟持されている。又、この基板20
と20′の周囲部には強誘電性液晶23を封止す
るためのシール材25が設けられている。
The aforementioned ferroelectric liquid crystal 23 is sandwiched between the substrates 20 and 20'. Also, this board 20
A sealing material 25 for sealing the ferroelectric liquid crystal 23 is provided around the ferroelectric liquid crystal 23 and 20'.

この様なセル構造の液晶素子の両側にはクロス
ニコル状態の偏光子19と19′が配置され、観
察者Aが入射光Ipよりの反射光I1によつて表示状
態を見ることができる様に偏光子19′の背後に
反射板18(乱反射性アルミニウムシート又は
板)が設けられている。
Polarizers 19 and 19' in a crossed Nicol state are arranged on both sides of a liquid crystal element having such a cell structure, and an observer A can see the display state by the reflected light I1 from the incident light Ip . Similarly, a reflective plate 18 (diffuse reflective aluminum sheet or plate) is provided behind the polarizer 19'.

又、上記の各図においてソース電極、ドレイン
電極とは、ドレインからソースへ電流が流れる場
合に限定した命名である。FETの働きではソー
スがドレインとして働く場合も可能である。
Further, in each of the above figures, the terms "source electrode" and "drain electrode" are used only when current flows from the drain to the source. In the function of FET, it is also possible for the source to function as the drain.

[発明の効果] 上記の構造よりなる本発明の強誘電性液晶の駆
動方法を用いることにより、アクテイブマトリツ
クスに画素数の多い大画面の表示及び高速度で鮮
明な画像を表示することができる。
[Effects of the Invention] By using the method for driving the ferroelectric liquid crystal of the present invention having the above structure, it is possible to display a large screen with a large number of pixels in the active matrix and to display clear images at high speed. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は、本発明の方法に用いる強
誘電性液晶を模式的に表わす斜視図、第3図は本
発明の方法に用いるマトリツクス電極の回路図、
第4図は対応画素の番地を示す説明図、第5図は
対応画素の表示例を示す説明図、第6図a及びb
は走査電極及び表示電極に印加する電気信号を表
わす説明図、第7図は各画素への書込み動作を表
わす説明図、第8図a及びbはアクテイブマトリ
ツクス回路と画素配置の例を示す配線図、第9図
はTFTにおけるFETの構成を示す断面図、第1
0図はTFTを用いた強誘電性液晶セルの断面図、
第11図はTFT基板の斜視図、第12図はTFT
基板の平面図、第13図はA−A′線部分断面図
及び第14図はB−B′部分断面図である。 1,1′……透明電極がコートされた基板、2
……液晶分子層、3……液晶分子、4……双極子
モーメント(P⊥ )、4a……上向き双極子モー
メント、4b……下向き双極子モーメント、5…
…第一の配向状態、5′……第二の配向状態、6
(CN,CN+1,CN+2)……走査電極群(走査電極)、
7(GN,GN+1,GN+2)……信号電極群(信号電
極)、8……ソース電極(ドレイン電極)、9……
光遮蔽膜、10……n+層、11……ドレイン電
極(ソース電極)、12……画素電極、13……
絶縁層、14……基板、15……半導体直下の光
遮蔽膜、16……半導体、17……ゲート配線部
の透明電極、18……反射板、19,19′……
偏光板、20,20′……ガラス、プラスチツク
等の透明基板、21……対向電極、22……絶縁
膜、23……強誘電性液晶層、24……ゲート電
極、25……シール材、26……薄膜半導体、2
7……ゲート配線、28……パネル基板、29…
…光遮断効果を有するゲート部、1′〜M′……走
査電極、1〜N……表示電極、L……共通電極、
LC……液晶、FET……電界効果トランジスタ。
1 and 2 are perspective views schematically showing a ferroelectric liquid crystal used in the method of the present invention, and FIG. 3 is a circuit diagram of a matrix electrode used in the method of the present invention.
FIG. 4 is an explanatory diagram showing addresses of corresponding pixels, FIG. 5 is an explanatory diagram showing display examples of corresponding pixels, and FIGS. 6 a and b.
7 is an explanatory diagram showing the electrical signals applied to the scanning electrode and display electrode, FIG. 7 is an explanatory diagram showing the write operation to each pixel, and FIGS. 8 a and b are wiring diagrams showing an example of the active matrix circuit and pixel arrangement. Figure 9 is a cross-sectional view showing the configuration of FET in TFT.
Figure 0 is a cross-sectional view of a ferroelectric liquid crystal cell using TFT.
Figure 11 is a perspective view of the TFT board, Figure 12 is the TFT
A plan view of the substrate, FIG. 13 is a partial sectional view taken along the line A-A', and FIG. 14 is a partial sectional view taken along the line B-B'. 1, 1'...Substrate coated with transparent electrode, 2
...Liquid crystal molecule layer, 3...Liquid crystal molecule, 4...Dipole moment (P⊥), 4a...Upward dipole moment, 4b...Downward dipole moment, 5...
...first orientation state, 5'...second orientation state, 6
(C N , C N+1 , C N+2 )...scan electrode group (scan electrode),
7 (G N , G N+1 , G N+2 )...Signal electrode group (signal electrode), 8... Source electrode (drain electrode), 9...
Light shielding film, 10... n + layer, 11... drain electrode (source electrode), 12... pixel electrode, 13...
Insulating layer, 14...Substrate, 15...Light shielding film directly under semiconductor, 16...Semiconductor, 17...Transparent electrode in gate wiring section, 18...Reflector, 19, 19'...
Polarizing plate, 20, 20'... Transparent substrate such as glass or plastic, 21... Counter electrode, 22... Insulating film, 23... Ferroelectric liquid crystal layer, 24... Gate electrode, 25... Sealing material, 26...Thin film semiconductor, 2
7... Gate wiring, 28... Panel board, 29...
...Gate portion having a light blocking effect, 1' to M'... Scanning electrode, 1 to N... Display electrode, L... Common electrode,
LC...Liquid crystal, FET...Field effect transistor.

Claims (1)

【特許請求の範囲】 1 ゲート端子及びチヤンネルの第一及び第二端
子を有する電界効果型トランジスタ(以下
「FET」と記す)と、FETの第一端子に接続され
た画素電極と、画素電極に対向する対向電極と、
画素電極と対向電極の間に挟持され、画素電極と
対向電極間に第一の電界を印加することにより第
一の安定な配向状態を生じ、画素電極と対向電極
間に第一の電界とは逆極性の第二の電界を印加す
ることにより第二の安定な配向状態を生じる強誘
電性液晶とからなる液晶素子を複数の行及び列に
沿つて配置し、対向電極を行に沿つて配置した液
晶素子の配列方向に対して平行に該行毎に分割し
て複数の分割対向電極を形成し走査信号線に接続
し、複数の行及び列に沿つて配置した液晶素子の
FETの第二端子を共通に接続し、ゲート端子を
表示信号線に接続した液晶装置をアクテイブマト
リクス駆動する駆動法であつて、 FETの第二端子の電位を常に一定に保ち、前
記分割対向電極に、画素電極との電位差の絶対値
が前記液晶のしきい値を越える電位を付与する走
査信号を印加して、該走査信号が印加された対向
電極上の液晶素子の画素電極と対向電極間に第一
の電界を形成して、前記液晶を第一の配向状態に
揃えるリフレツシユ操作を行なつた後、 前記走査信号が印加された対向電極上の選択さ
れた液晶素子のFETのゲート端子に、前記FET
の第二端子に対してゲートオン状態を取る電位を
付与する表示信号を印加し、選択されなかつた液
晶素子のFETのゲート端子に前記FETの第二端
子に対してゲートオフ状態を取る電位を付与する
表示信号を印加し、これら表示信号と同期して、
前記FETの第二端子との電位差が上記リフレツ
シユ操作における電位差とは逆極性で且つその絶
対値が前記液晶のしきい値を越える電位を付与す
る走査信号を前記走査信号が印加された対向電極
に印加して、第二の電界を形成する第二電界形成
操作を行ない、 該第二の電界形成操作と同期して、先行する他
の分割対向電極上の複数の液晶素子をリフレツシ
ユ操作することを特徴とする液晶装置の駆動法。
[Claims] 1. A field effect transistor (hereinafter referred to as "FET") having a gate terminal and first and second terminals of a channel, a pixel electrode connected to the first terminal of the FET, and a pixel electrode connected to the first terminal of the FET. Opposing counter electrodes;
A first stable alignment state is created by applying a first electric field between the pixel electrode and the counter electrode, which is sandwiched between the pixel electrode and the counter electrode, and the first electric field between the pixel electrode and the counter electrode is A liquid crystal element consisting of a ferroelectric liquid crystal that generates a second stable alignment state by applying a second electric field of opposite polarity is arranged along a plurality of rows and columns, and a counter electrode is arranged along the rows. The liquid crystal elements arranged along a plurality of rows and columns are divided into rows parallel to the arrangement direction of the liquid crystal elements, forming a plurality of divided counter electrodes, and connected to scanning signal lines.
A driving method in which the second terminals of the FETs are connected in common and the gate terminals are connected to the display signal line for active matrix driving of a liquid crystal device, in which the potential of the second terminals of the FETs is always kept constant, and A scanning signal that gives a potential whose absolute value of potential difference with the pixel electrode exceeds the threshold value of the liquid crystal is applied to the pixel electrode of the liquid crystal element on the counter electrode to which the scanning signal is applied and the gap between the counter electrode. After performing a refresh operation to align the liquid crystal to a first alignment state by forming a first electric field at , said FET
A display signal is applied to the second terminal of the liquid crystal element to apply a potential that makes the gate on, and a potential that makes the gate off is applied to the gate terminal of the FET of the unselected liquid crystal element. Apply display signals, synchronize with these display signals,
A scanning signal is applied to the opposite electrode to which the scanning signal is applied, the potential difference with the second terminal of the FET is opposite in polarity to the potential difference in the refresh operation, and the absolute value thereof exceeds the threshold of the liquid crystal. applying a second electric field to form a second electric field, and in synchronization with the second electric field forming operation, refreshing the plurality of liquid crystal elements on other preceding divided counter electrodes. Characteristic driving method of liquid crystal device.
JP59130001A 1984-04-28 1984-06-26 Driving method of liquid crystal element Granted JPS619625A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59130001A JPS619625A (en) 1984-06-26 1984-06-26 Driving method of liquid crystal element
US06/724,828 US4697887A (en) 1984-04-28 1985-04-18 Liquid crystal device and method for driving the same using ferroelectric liquid crystal and FET's

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59130001A JPS619625A (en) 1984-06-26 1984-06-26 Driving method of liquid crystal element

Publications (2)

Publication Number Publication Date
JPS619625A JPS619625A (en) 1986-01-17
JPH0453294B2 true JPH0453294B2 (en) 1992-08-26

Family

ID=15023691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59130001A Granted JPS619625A (en) 1984-04-28 1984-06-26 Driving method of liquid crystal element

Country Status (1)

Country Link
JP (1) JPS619625A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61204681A (en) * 1985-03-07 1986-09-10 キヤノン株式会社 Liquid crystal panel

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262135A (en) * 1984-06-11 1985-12-25 Canon Inc Driving method of liquid-crystal element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262135A (en) * 1984-06-11 1985-12-25 Canon Inc Driving method of liquid-crystal element

Also Published As

Publication number Publication date
JPS619625A (en) 1986-01-17

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