JP2004046236A - Driving method for liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driving method for a liquid crystal display device which is capable of suppressing reverse transition and displaying excellent video and uses an OCB cell and the liquid crystal display device. <P>SOLUTION: As for a driving system that writes an image signal and a non-image signal for reverse transition phenomenon suppression alternately to a pixel, the polarity of a non-image signal image written while the image signal is held in a pixel to a specified reference potential is standardized for all the pixels on a panel and the polarity of the image signal written while the non-image signal is held in the pixel to the reference potential is also standardized for all the pixels of the panel. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a method of driving an active matrix type liquid crystal display device and a liquid crystal display device, and more particularly to a method of driving a liquid crystal display device using an OCB (optically self-compensated birefringence) liquid crystal mode having a wide viewing angle and high-speed response. The present invention relates to a liquid crystal display device.

As is well known, liquid crystal display devices are widely used as screen display devices for computer devices and the like, but their use in TV applications is expected to expand in the future. However, the TN (Twisted Nematic) mode, which is currently widely used, has a narrow viewing angle and an insufficient response speed, and has a large display performance when used as a TV, such as a decrease in contrast due to parallax and blurring of a moving image. There are issues.

In recent years, research on the OCB mode has been advanced in place of the TN mode. OCB has characteristics such as a wide viewing angle and high-speed response compared to TN, and can be said to be a display mode more suitable for displaying a natural moving image.

Hereinafter, a conventional driving method of a liquid crystal display device and a liquid crystal display device will be described. 2, Xn, X2,..., Xn are gate lines, Y1, Y2,..., Ym are source lines, 207 is a thin film transistor (hereinafter referred to as TFT) as a switching element, and each of the drain electrodes of each TFT is a pixel. 206 is connected to the pixel electrode. Each pixel 206 is composed of a pixel electrode, a counter electrode, and liquid crystal held between both electrodes. The counter electrode is driven by a voltage supplied from the counter drive unit 205.

# 204 is a gate driver for applying a voltage for turning on the TFT or a voltage for turning off the TFT to the gate lines Y1, Y2,..., Ym.

The gate driver 204 sequentially applies an ON potential to the gate lines Y1, Y2,..., Ym in synchronization with the supply of data to the source lines.

# 203 is a source driver that outputs a voltage to be supplied to the pixel 206 to the source lines X1, X2,..., Xn. The phase of the supplied voltage has an opposite relationship to the phase of the voltage supplied to the counter electrode. The difference between the voltage supplied to the counter electrode and the voltage supplied to the source lines X1, X2,..., Xn and applied to each pixel 206 is the voltage applied to both ends of the liquid crystal in the pixel 206. Is determined.

Such a driving method is the same when the OCB cell is used and when the TN type cell is used. However, the OCB cell requires a unique drive that is not available in the TN cell at the start-up stage when video display is started.

The OCB cell has a bend orientation in which an image can be displayed and a splay orientation in which an image cannot be displayed. In order to shift from the splay alignment to the bend alignment (hereinafter, referred to as transition), a unique drive such as applying a high voltage for a certain period of time is required. However, the drive relating to this transition is not directly related to the present invention, and will not be described further.

Even if the OCB cell once transitions to the bend alignment by the above-described unique driving, if the voltage of a predetermined level or more is not applied for a certain period of time or more, the bend alignment cannot be maintained and the OCB cell returns to the splay alignment (hereinafter, referred to as splay alignment) This phenomenon is called a reverse transition).

In order to suppress the occurrence of the reverse transition, Japanese Patent Application Laid-Open No. H11-109921 and the Journal of the Liquid Crystal Society of Japan, April 25, 1999 (Vol. 3. No. 2) P99 (17) to P106 (24) As is known, it is known that a high voltage needs to be applied periodically.

(4) Hereinafter, the drive for periodically applying a high potential and suppressing the reverse transition will be referred to as CR drive.

FIG. 3 shows a potential-transmittance curve of a general OCB.

In FIG. 3, reference numeral 301 denotes a potential-transmittance curve when a predetermined potential for preventing reverse transition is not inserted, 302 denotes a potential-transmittance curve for CR driving in which a predetermined potential is inserted for preventing reverse transition, and 303 denotes a potential-transmittance curve. The critical potential Vth at which the reverse transition from the bend orientation to the splay orientation occurs when the reverse transition is not prevented, 304 is the potential at the highest transmittance (white potential), and 305 is the potential at the lowest transmittance (black potential). ). If the reverse transition is not prevented, the liquid crystal returns to the splay alignment below Vth, so that an appropriate transmittance cannot be obtained. Therefore, it is necessary to drive at a potential higher than Vth. No brightness is obtained.

The liquid crystal represented by OCB and TN needs to be driven by so-called alternating current. However, the above-mentioned Japanese Patent Application Laid-Open No. H11-109921 and the above-mentioned Journal of the Liquid Crystal Society of Japan do not describe the specific configuration. It is not possible to specify whether or not to perform a great AC reversal (for example, see Patent Document 1).

Therefore, a description will be given of a conventional example of CR driving, which is the most common driving, in which a combination of line-by-line inversion and frame-by-frame inversion is performed. FIG. 19 is a diagram illustrating a configuration of a conventional liquid crystal display device, and FIG. 20 is a diagram illustrating timings of an image signal and each driver driving pulse.

Hereinafter, the driving will be described with reference to FIGS.

In FIG. 19, reference numeral 1901 denotes a signal conversion unit which doubles an input image signal for each line and converts the input image signal into a double speed image signal and a double speed non-image signal, and 1902 generates a pulse for driving each source / gate driver. 1903 is a source driver, 1904 is a gate driver, and 1905 is a liquid crystal panel. For convenience, in the description, it is assumed that the number of source lines of the liquid crystal panel 1905 is 10, the number of gate lines is 10, and one frame period is composed of 10 horizontal periods.

Next, the operation of the conventional CR drive will be described.

First, the input image signal is doubled for each line in the double-speed signal converter 1901 and is input to the source driver 1903.

FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation.

The input image signal is written to the line memory 602 in synchronization with a clock (hereinafter, referred to as a write clock) generated from a synchronization signal synchronized with the image signal in the control signal generation unit 601. On the other hand, reading of the image signal from the line memory 602 is performed by using a clock (hereinafter, referred to as a read clock) generated from a synchronization signal in the control signal generation unit 601 so that the frequency becomes twice the frequency of the write clock. Synchronously, data is read from the line memory 602 during a half period of the writing. While the image signal is being read from the line memory 602, the output signal selection unit 604 selects this image signal as an output. In the remaining period, the output signal selection unit 604 selects a non-image signal output from the non-image signal generation unit 603 as an output.

Thus, during one horizontal period of the input signal, the non-image signal and the image signal that have been doubled in speed are output in time series.

The source driver supplies the input double-speed signal to the source line of the panel while inverting the AC.

FIG. 20 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion.

The polarity control signal for switching the AC polarity is a signal obtained by performing an exclusive OR operation of the line inversion signal (A) and the frame inversion signal (B), and is generated by the control pulse generation unit 1902.

FIG. 24 shows the input / output characteristics of the source driver 1903.

In the figure, the signal output on the higher side with respect to the reference potential is expressed as positive polarity, and the signal output on the lower side is expressed as negative polarity.

(2) In FIG. 20, the polarities are shown as “+” and “−” in the selection period of each gate.

As shown in the figure, the source driver 1903 supplies a positive voltage when the polarity control signal is HI and a negative voltage when the polarity control signal is LOW.

In FIG. 20, gate pulses P1 to P10 are pulses for respectively selecting ten gate lines on panel 1905 during the HI period. In accordance with the timing of the double speed signal input to the source driver, gate pulses P1 to P10 are as follows. Driven.

In the period T0_1 shown in FIG. 20, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a positive polarity. In the subsequent period T0_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a negative polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a negative polarity. In the subsequent period T0_4, the gate pulse P8 becomes HI, and the non-image signal is written to the gate line G8 with a positive polarity. Hereinafter, signals are sequentially written according to the polarity of the polarity control signal (G).

As described above, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once.

ＴAt T1_1 of the next second frame, the gate pulse P1 becomes HI, and the image signal S′1 is written to the pixel on the gate line G1 with the negative polarity opposite to that of the first frame. In a subsequent period T1_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a polarity opposite to that of the first frame. Similarly, signals of the opposite polarity to the first frame are sequentially written.

By the above operation, the image signal and the non-image signal can be written periodically, and the reverse transition can be prevented by appropriately applying the voltage of the non-image signal.
JP-A-11-109921

However, in the above driving, focusing on the relationship between the polarity of the image signal written to the pixel and the polarity of the non-image signal to be written, the polarity of the image signal written to the pixel in the first line and the The polarity of the image signal is opposite to that of the image signal, and the polarity is similarly reversed up to the following five lines. However, the relationship between the six lines and the tenth line is the same, and the phase relationship is broken.

Conversely, the polarity of the non-image signal written to the pixel and the polarity of the written image signal are the same for lines 1 to 5, and the opposite for lines 6 to 10. If the line breaks at a line having a polarity inversion relationship as described above, it affects the charging of the liquid crystal and causes a loss of uniformity of image quality.

In particular, liquid crystal panels in recent years have become larger and have higher definition, and accordingly, the wiring resistance in the glass substrate has increased, and the charging time of the pixels has tended to be shorter.

Therefore, despite the technology for improving the performance of the pixel transistor, etc., the influence of the collapse of the phase relationship on the charging of the pixel cannot be ignored.

That is, in the above example, the luminance difference is recognized at the boundary between the fifth and sixth lines on the screen.

(4) Further, in the above example, the driving frequency is doubled as compared with the normal driving in which the non-pixel signal is not inserted, and the writing time of the pixel signal to each pixel is reduced to half.

Therefore, there may be a case where data cannot be sufficiently written to the pixel.

Therefore, an object of the present invention is to solve the above problems and provide a driving method of a liquid crystal display device and a liquid crystal display device capable of displaying a good image.

In order to solve this problem, a first invention is directed to a plurality of source lines to which a pixel signal is supplied, a plurality of gate lines to which a scanning signal is supplied, and an intersection between the source line and the gate line. In a method for driving a liquid crystal display device having a liquid crystal panel including pixel cells arranged in a matrix, all pixel cells on the liquid crystal panel are displayed within a display period of one image (hereinafter, referred to as a frame period). A pixel signal corresponding to the one image (hereinafter referred to as an image signal) and a pixel signal different from the pixel signal (hereinafter referred to as a non-image signal). The non-image signal is written in the pixel cell with its polarity inverted in synchronization with a frame period based on a predetermined level of potential.

(4) Thereby, the degree of writing of each pixel is made uniform, and there is an effect that uniform image display quality can be obtained on the entire screen.

According to a second aspect, in the first aspect, the polarity of the non-image signal with respect to the reference potential is equal to the polarity of the image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. The image signal is controlled to have the same polarity, and the polarity of the image signal with respect to the reference potential is opposite to the polarity of the non-image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. It is characterized by being controlled.

This has the effect of making writing of non-image signals easier.

In a third aspect based on the first aspect, the polarity of the non-image signal with respect to the reference potential is equal to the polarity of the image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. The polarity of the image signal with respect to the reference potential is controlled to be the opposite polarity, and the polarity of the non-image signal held by the pixel cell at the time of writing to the pixel cell is the same as the polarity with respect to the reference potential. It is characterized by being controlled.

This has the effect of facilitating writing of image signals.

According to a fourth aspect, in the second aspect, the pixel cell on the selected two scanning lines is selected by simultaneously selecting the two gate lines in writing the non-image signal to the pixel cell. Writing the same non-image signal at the same time, then selecting one of the gate lines selected at the same time, and writing an image signal to a pixel cell on the selected gate line. .

Accordingly, the fourth aspect of the invention has an effect of making it easier to write an image signal than the second aspect of the invention.

According to a fifth aspect, in the third aspect, in writing the image data to the pixel cells, by simultaneously selecting the two gate lines, the pixel cells on the selected two scanning lines are selected. Writing the same image data at the same time, then selecting one of the gate lines selected at the same time, and writing the non-image data to the pixel cells on the selected gate line.

Accordingly, the fifth aspect of the invention has an effect of making it easier to write a non-image signal than the third aspect of the invention.

A sixth invention is different from the second invention in that, in writing the non-image data to the pixel cell, a plurality of the gate lines are selected at the same time, so that a plurality of pixels on the same data line are provided on different scanning lines. It is characterized in that the same non-image data is simultaneously written into cells.

(4) This has an effect of avoiding a reduction in the writing time of each pixel due to the non-image signal writing, and eliminating image deterioration due to the shortening of the writing time.

According to a seventh aspect, in the third aspect, in writing the image data to the pixel cells, a plurality of the gate lines are selected at the same time, so that a plurality of pixel cells on the same data line on different scanning lines are selected. And writing the same image data at the same time.

(4) This has an effect of avoiding a reduction in the writing time of each pixel due to the non-image signal writing, and eliminating image deterioration due to the shortening of the writing time.

The eighth invention is characterized in that, in the sixth and seventh inventions, the simultaneously selected gate lines are two or more even-numbered gate lines adjacent to each other on the liquid crystal panel.

According to a ninth aspect, in the sixth and eighth aspects, when writing the non-image data to the pixel cells, another one gate line (hereinafter, referred to as a precharge line) is simultaneously selected. The same non-image data is simultaneously written to the pixel cells on all the selected gate lines including the pre-charge line, and then the pre-charge line is selected, and the image data is written to the pixel cells on the pre-charge line. It is characterized by writing.

(4) As a result, the writing time of each pixel due to the non-image signal writing can be prevented from being shortened, the image deterioration due to the shortened writing time can be eliminated, and the writing of the image signal can be easily performed.

According to a tenth aspect, in the seventh and eighth aspects, in writing the image data to the pixel cells, a gate line for writing image data and a plurality of gates for simultaneously writing non-image data are provided. And simultaneously selecting the same line, and simultaneously writing the same image data to the pixel cells on all the selected gate lines, and then, among the selected gate lines, a plurality of the non-image data that are simultaneously written. A gate line is selected, and non-image data is written into pixel cells on the plurality of gate lines.

(4) As a result, the writing time of each pixel due to the non-image signal writing can be prevented from being shortened, the image deterioration due to the shortened writing time can be eliminated, and the writing of the non-image signal can be easily performed.

According to an eleventh aspect of the present invention, in any one of the fourth to tenth aspects, when the number of simultaneously selected gate lines excluding the pre-charge line is N, the number of scan lines included in the frame period is (2M + 1 ) × N.

(4) This makes it possible to display a good image that does not depend on the input image signal, by eliminating the discontinuity of the timing at the time of driving that depends on the input image signal.

The twelfth invention is characterized in that, in any one of the first to eleventh inventions, the liquid crystal cell is an OCB cell.

(4) Further, it is possible to display a good image which does not depend on the input image signal by eliminating the discontinuity of the timing at the time of driving which may depend on the input image signal.

According to the present invention, the degree of writing of each pixel is made uniform by the above configuration, uniform image display quality can be obtained over the entire screen, and a reduction in the writing time of each pixel is avoided, and image deterioration due to a reduction in the writing time is eliminated. Has the effect of doing

(1st Embodiment)
FIG. 7 is a diagram illustrating a configuration of the liquid crystal display device according to the first embodiment of the present invention, and FIG. 1 is a diagram illustrating timings of an image signal and each driver driving pulse.

Hereinafter, the driving will be described with reference to FIGS.

Note that the configuration of the liquid crystal display device according to the first embodiment is a configuration in which the driving pulse generation unit 1902 in the liquid crystal display device according to the above-described conventional embodiment is replaced with 702. The other configurations are the same, and the configurations are denoted by the same reference numerals and description thereof will be omitted.

For convenience, in the description, the number of source lines and the number of gate lines of the liquid crystal panel 1905 are ten and ten, and similarly, one frame period is composed of ten horizontal periods. Next, the operation of the CR drive according to the first embodiment will be described.

First, the input image signal is doubled for each line in the double-speed signal converter 1901 and is input to the source driver 1903.

FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation.

The double-speed conversion operation is the same as that of the conventional example, and a description thereof is omitted. However, the double-speed signal conversion unit outputs a non-image signal doubled in one horizontal period of the input signal and an image signal.

(4) The source driver supplies the input double-speed signal to the source line of the panel while inverting the AC.

FIG. 1 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion. The polarity control signal for switching the AC polarity is generated in the control pulse generator 702 by the following method, for example, as shown in FIG.

An image period signal (A) indicating HI during the image signal period, a frame inversion signal (B) synchronized with the writing of the image signal, a frame inversion signal (C) synchronized with the writing of the non-image signal, and a line-by-line inversion. Using the signal (D), (E) generates an exclusive OR signal of (D) and (B), (F) generates an exclusive OR signal of (D) and (C), and further generates (A) ) Is HI (E) and LOW (F) to generate a signal (G), which is used as the polarity control signal (G) of the source signal.

In the present embodiment, the relationship between the frame inversion signal (B) synchronized with the writing of the image signal and the frame inversion signal (C) synchronized with the writing of the non-image signal is as shown in FIG. ) Must be such that they fall earlier.

Using the polarity control signal (G) generated as described above, the source driver supplies a positive voltage when the control signal is HI and a negative voltage when the control signal is LOW.

FIG. 24 shows the input / output characteristics of the source driver 1903.

(1) The relationship between the positive polarity and the negative polarity is shown as “+” and “−” in the selection period of each gate in FIG.

In FIG. 1, gate pulses P1 to P10 are pulses for respectively selecting ten gate lines on panel 1905 during the HI period, and are synchronized with the timing of the double-speed signal input to the source driver as follows. Driven.

In the period T0_1 shown in FIG. 1, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a negative polarity. In the subsequent period T0_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a positive polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a positive polarity. In a subsequent period T0_4, the gate pulse P8 becomes HI, and a non-image signal is written to the gate line G8 with a negative polarity. Hereinafter, signals are sequentially written according to the polarity of the polarity control signal (G).

{Furthermore, in the period T0_10, the gate pulse P1 becomes HI again, and the non-image signal is written with a negative polarity to the pixel on the gate line G1.

As described above, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once.

ＴAt T1_1 in the next second frame, the gate pulse P1 becomes HI, and the image signal S′1 is written to the pixel on the gate line G1 with a polarity opposite to that of the first frame. In the subsequent period T1_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G6 with a negative polarity opposite to that of the first frame. Similarly, signals of the opposite polarity to the first frame are sequentially written.

As described above, according to the driving method of the liquid crystal display device according to the first embodiment of the present invention, the image signal and the non-image signal are alternately written to each pixel, and all the pixels are written to the pixel. The polarity of the non-image signal and the polarity of the image signal to be written become the same, and writing of the image signal becomes easy. Therefore, the degree of writing of the image signal to each pixel is made uniform, and more uniform display image quality can be obtained.

In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Second embodiment)
FIG. 7 is a diagram illustrating a configuration of a liquid crystal display device according to a second embodiment of the present invention, and FIG. 8 is a diagram illustrating timings of an image signal and each driver driving pulse.

Hereinafter, the driving will be described with reference to FIGS.

The configuration of the liquid crystal display device according to the second embodiment is a configuration in which the driving pulse generation unit 1902 in the liquid crystal display device according to the above-described conventional embodiment is replaced with 702. The other configurations are the same, and the configurations are denoted by the same reference numerals and description thereof will be omitted.

For convenience, in the description, the number of source lines and the number of gate lines of the liquid crystal panel 1905 are ten and ten, and similarly, one frame period is composed of ten horizontal periods.

Next, the operation of the CR drive according to the second embodiment will be described.

First, the input image signal is doubled for each line in the double-speed signal converter 1901 and is input to the source driver 1903.

FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation.

The double-speed conversion operation is the same as that of the first embodiment, and a description thereof will be omitted. However, from the double-speed signal conversion unit, a non-image signal and an image signal whose speed has been doubled are time-series Is output to

(4) The source driver supplies the input double-speed signal to the source line of the panel while inverting the AC.

FIG. 8 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion.

The polarity control signal for switching the AC polarity is generated in the control pulse generator 702 by the following method, for example, as shown in FIG.

An image period signal (A) indicating positive during the image signal period, a frame inversion signal (B) synchronized with the writing of the image signal, a frame inversion signal (C) synchronized with the writing of the non-image signal, and a line-by-line inversion. Using the signal (D), (E) generates an exclusive OR signal of (D) and (B), (F) generates an exclusive OR signal of (D) and (C), and further generates (A) ) Is HI (E) and LOW (F) to generate a signal (G), which is used as the polarity control signal (G) of the source signal.

In the present embodiment, the relationship between the frame inversion signal (B) synchronized with the writing of the image signal and the frame inversion signal (C) synchronized with the writing of the non-image signal is as shown in FIG. ) Must be such that they fall earlier.

(4) When the polarity control signal (G) is HI, a positive voltage is supplied by the source driver, and when the polarity control signal (G) is LOW, a negative voltage is supplied by the source driver.

FIG. 24 shows the input / output characteristics of the source driver 1903.

The relationship between the positive polarity and the negative polarity is shown as “+” and “−” in the selection period of each gate in FIG.

8, in FIG. 8, gate pulses P1 to P10 are pulses for respectively selecting ten gate lines on panel 1905 during the HI period.

In the period T0_1 shown in the figure, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a negative polarity. In the subsequent period T0_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a negative polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a positive polarity.

(4) In the subsequent period T0_4, the gate pulse P8 becomes HI, and the non-image signal is written to the gate line G8 with a positive polarity. Hereinafter, signals are sequentially written according to the polarity of the polarity control signal (G).

{Furthermore, in the period T0_10, the gate pulse P1 becomes HI again, and the non-image signal is written with a positive polarity to the pixel on the gate line G1. .

As described above, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once.

ＴAt T1_1 in the next second frame, the gate pulse P1 becomes HI, and the image signal S′1 is written to the pixel on the gate line G1 with a polarity opposite to that of the first frame. In a subsequent period T1_2, the gate pulse P7 becomes HI, and the non-image signal is written to the gate line G7 with a polarity opposite to that of the first frame. Similarly, signals of the opposite polarity to the first frame are sequentially written.

As described above, according to the driving method of the liquid crystal display device according to the second embodiment of the present invention, the image signal and the non-image signal are alternately written to each pixel, and all the pixels are written to the pixels. The polarity of the image signal is the same as the polarity of the non-image signal to be written, which facilitates writing of the non-image signal. Therefore, the degree of writing of the non-image signal to each pixel is made uniform, and more uniform display image quality can be obtained.

In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Third embodiment)
In the first embodiment, that is, in the CR driving, the driving frequency is twice as large as that of the normal driving, and the writing time of the pixel signal to each pixel is shortened to half. Therefore, with the increase in size and definition of a liquid crystal panel, data may not be sufficiently written to pixels in some cases.

Therefore, in the third embodiment of the present invention, a non-pixel signal of the same polarity is written to each pixel immediately before a normal pixel signal writing timing, in contrast to the driving method of the first embodiment, That is, a so-called precharge drive is introduced to improve writing of data.

FIG. 9 is a diagram illustrating a configuration of a liquid crystal display device according to a third embodiment of the present invention, and FIG. 10 is a diagram illustrating timings of an image signal and each driver driving pulse.

Hereinafter, the driving will be described with reference to FIGS.

The configuration of the liquid crystal display device according to the third embodiment is a configuration in which the drive pulse generation unit 1902 is replaced with 902 in the liquid crystal display device according to the above-described conventional embodiment. The other configurations are the same, and the configurations are denoted by the same reference numerals and description thereof will be omitted.

For convenience, in the description, the number of source lines of the liquid crystal panel 1905 is ten, the number of gate lines is eleven, and one frame period is similarly composed of eleven horizontal periods. Next, the operation of the CR drive according to the third embodiment will be described.

First, the input image signal is doubled for each line in the double-speed signal converter 1901 and is input to the source driver 1903.

FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation.

The double-speed conversion operation is the same as that of the first embodiment, and a description thereof will not be repeated. Is output to The source driver supplies the input double-speed signal to the source line of the panel while inverting the AC.

FIG. 10 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion.

The polarity control signal for switching the AC polarity is generated in the control pulse generator 902 in the same manner as in the first embodiment. A positive voltage is supplied by the source driver when the polarity control signal is HI, and a negative voltage is supplied by the source driver when the polarity control signal is LOW.

FIG. 24 shows the input / output characteristics of the source driver 1903.

(4) The relationship between the positive polarity and the negative polarity is shown as “+” and “−” in the selection period of each gate in FIG. In FIG. 10, gate pulses P1 to P10 are pulses for respectively selecting 11 gate lines on panel 1905 during the HI period.

In the period T0_1 shown in the figure, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a positive polarity. In the subsequent period T0_2, the gate pulses P2 and P5 become HI, and the non-image signal is written to the gate lines G2 and G5 with a negative polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a negative polarity. In the subsequent period T0_4, the gate pulses P3 and P6 become HI, and the non-image signal is written to the gate lines G3 and G6 with a positive polarity. Hereinafter, signals are sequentially written as shown in the figure.

As described above, all the gate lines on the panel are selected three times in one frame period, and the image signal is written once and the non-image signal is written twice to the pixels on each gate line. In T1_1 of the next second frame, the gate pulse P1 becomes HI, and the image signal S'1 is written to the pixel on the gate line G1 with the negative polarity opposite to that of the first frame. In the subsequent period T1_2, the gate pulses P2 and P5 become HI, and the non-image signal is written to the gate lines G2 and G5 with the negative polarity opposite to that of the first frame. Similarly, signals of the opposite polarity to the first frame are sequentially written.

As described above, according to the liquid crystal display device driving method and the liquid crystal display device according to the third embodiment of the present invention, the non-image signal of the same polarity immediately before the image signal is preliminarily written, so that the Charging can be performed more sufficiently, and shortage of writing due to shortening of writing time can be improved. As a result, a more desirable display quality can be obtained.

In FIG. 10, since the non-image signal is written 7.5 horizontal periods after the writing of the image signal, the non-image signal precharged immediately before the image signal has the same phase relationship as the adjacent 0.5 horizontal period before. Has become.

In a configuration as shown in FIG. 11 in which the non-image signal is written after 6.5 horizontal periods after writing the image signal, the non-image signal to be precharged before the image signal is written has a phase of 1.5 horizontal periods before. Relationship.

As described above, the phase of the precharge signal is appropriately determined according to the phase relationship between the image signal and the non-image signal.

When the selection period of the precharge signal and the selection period of the image signal are adjacent to each other as shown in FIG. 10, a non-selection period does not have to be inserted between the selection periods. Can be eliminated, and a more desirable configuration can be obtained.

Further, in the above-described embodiment, it is preferable that one frame period is an odd-numbered horizontal period, and a rate conversion unit using a memory or the like is provided so that one frame period is always an odd-numbered horizontal period. If a signal rate conversion is performed, a more desirable configuration is obtained.

In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Fourth embodiment)
In the second embodiment, that is, in the CR driving, the driving frequency is doubled as compared with the normal driving, and the writing time for each pixel is shortened by half.

Therefore, in the fourth embodiment of the present invention, the non-pixel signal of the same polarity is written to each pixel immediately after the normal non-pixel signal writing timing, as compared with the driving method of the second embodiment. This is to introduce a so-called dual charge drive for improving the writing of pixel signals.

FIG. 12 is a diagram showing a configuration of a liquid crystal display device according to a fourth embodiment of the present invention, and FIG. 13 is a diagram showing timings of an image signal and each driver drive pulse.

Hereinafter, the driving will be described with reference to FIGS.

The configuration of the liquid crystal display device according to the fourth embodiment is the same as the configuration of the liquid crystal display device according to the above-described conventional embodiment except that the drive pulse generation unit 1902 is replaced with 1202. The other configurations are the same, and the configurations are denoted by the same reference numerals and description thereof will be omitted.

For convenience, in the description, the number of source lines of the liquid crystal panel 1905 is ten, the number of gate lines is eleven, and one frame period is similarly composed of eleven horizontal periods. Next, the operation of the CR drive according to the fourth embodiment will be described.

First, the input image signal is doubled for each line in the double-speed signal converter 1901 and is input to the source driver 1903.

FIG. 6 shows the specific configuration of the double-speed signal conversion unit 1901, and FIG. 5 shows the timing of the double-speed signal conversion operation.

The double-speed conversion operation is the same as that of the first embodiment, and a description thereof will be omitted. However, from the double-speed signal conversion unit, a non-image signal and an image signal whose speed has been doubled are time-series Is output to

The source driver supplies the input double-speed signal to the source line of the panel while inverting the alternating current.

FIG. 13 shows a configuration in which a combination of line-by-line inversion and frame-by-frame inversion is performed as an example of performing AC inversion.

極性 The polarity control signal for switching the AC polarity is generated by the control pulse generator 1202 in the same manner as in the second embodiment.

(4) A positive polarity voltage is supplied by the source driver when the polarity control signal is HI, and a negative polarity voltage is supplied when the polarity control signal is LOW.

FIG. 24 shows the input / output characteristics of the source driver 1903. In FIG. 13, the relationship between the positive polarity and the negative polarity is shown as “+” and “−” during the selection period of each gate.

In FIG. 13, gate pulses P1 to P10 are pulses for selecting 11 gate lines on panel 1905 during the HI period.

In the period T0_1 shown in the figure, the gate pulse P1 becomes HI, and the image signal S1 is written to the pixel on the gate line G1 with a positive polarity. In the subsequent period T0_2, the gate pulses P5 and P7 become HI, and the non-image signal is written to the gate lines G5 and G7 with a positive polarity. In the period T0_3, the gate pulse P2 becomes HI, and the image signal S2 is written to the gate line G2 with a negative polarity. In the subsequent period T0_4, the gate pulses P6 and P8 become HI, and the non-image signal is written to the gate lines G6 and G8 with a negative polarity. Hereinafter, signals are sequentially written as shown in the figure.

As described above, all the gate lines on the panel are selected three times in one frame period, and the image signal is written once and the non-image signal is written twice to the pixels on each gate line. In T1_1 of the next second frame, the gate pulse P1 becomes HI, and the image signal S'1 is written to the pixel on the gate line G1 with the negative polarity opposite to that of the first frame. In the subsequent period T1_2, the gate pulses P5 and P7 become HI, and the non-image signal is written to the gate lines G5 and G7 with the negative polarity opposite to that of the first frame. Similarly, signals of the opposite polarity to the first frame are sequentially written.

As described above, according to the driving method of the liquid crystal display device and the liquid crystal display device according to the fourth embodiment of the present invention, after writing the non-image signal, the non-image signal of the same polarity is prognostically written, so that the pixel Can be more sufficiently charged, and shortage of writing due to shortening of writing time can be improved. As a result, a more desirable display quality can be obtained.

Up to this point, a case has been described in which a non-image signal of the same polarity is prognostically written after the writing of the non-image signal. However, as shown in FIG. Precharging is also possible.

In the above-described embodiment, it is preferable that one frame period is an odd-numbered horizontal period. A rate conversion unit using a memory or the like is provided, and a signal is appropriately changed so that one frame period is always an odd-numbered horizontal period. It is more desirable to perform rate conversion.

In the present embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

(Fifth embodiment)
FIG. 14 is a diagram illustrating a configuration of a liquid crystal display device according to a fifth embodiment of the present invention. The configuration of the liquid crystal display device according to the fifth embodiment is the same as that of the above-described conventional liquid crystal display device except that the driving pulse generation unit 1902 is replaced by 1402 and the signal conversion unit 1901 is replaced by 1401. The other configurations are the same, and the configurations are denoted by the same reference numerals and description thereof will be omitted.

However, in this embodiment, for the sake of convenience, the number of source lines of the liquid crystal panel 1905 is 10 and the number of gate lines is 12 in. Similarly, one frame period is composed of 12 periods.

Hereinafter, a driving method of the liquid crystal display device according to the fifth embodiment of the present invention will be described with reference to FIGS. 15, 16, and 17.

FIG. 15 is a diagram showing the internal configuration of the signal conversion unit 1401.

FIG. 16 is a timing chart showing the operation of the signal conversion unit 1401.

FIG. 17 is a diagram showing the timings of the input image signal, the output image signal of the signal conversion unit 1401, and the gate driver drive pulse.

FIG. 24 is a diagram showing input / output characteristics of the source driver 1903.

According to the driving method of the liquid crystal display device of the present invention, for each pixel on the liquid crystal panel, an input image signal and a non-image signal required to suppress the reverse transition phenomenon of the OCB liquid crystal independently of the image signal. Is written once per frame period, and the signal conversion unit 1401 performs a conversion of the driving frequency for that.

In this embodiment, 1.25 times frequency conversion, in which a total of five lines including one line including a non-image signal are transferred to the source driver in four horizontal periods of the input image signal, is shown as an example.

周波 数 This 1.25-fold frequency conversion will be described.

The input image signal is written into the line memory 602 in synchronization with a clock (hereinafter, referred to as a write clock) generated from a synchronization signal synchronized with the image signal in the control signal generation unit 1501.

On the other hand, when reading the image signal from the line memory 602, a clock generated from a synchronization signal in the control signal generation unit 1501 (hereinafter referred to as a read clock) so that the frequency becomes 1.25 times the frequency of the write clock. ), The data is read from the line memory 602 during a period of ４ of the writing.

は During the period when the image signal is read from the line memory 602, the output signal selection unit 604 selects this image signal as an output. In the remaining period, the output signal selection unit 604 selects a non-image signal output from the non-image signal generation unit 603 as an output.

As described above, from the double-speed signal conversion unit, the non-image signal of 1.25 times the speed of the input signal in one horizontal period and the image signal are output in a time series at a ratio of 1: 4.

FIG. 24 shows the input / output characteristics of the source driver 1903. The source driver 1903 receives the output signal of the signal converter 1501, inverts the polarity of the signal in line units, and outputs the inverted signal.

(4) The relationship between the positive polarity and the negative polarity is shown as "+" and "-" in the selection period of each gate in FIG.

The switching of the polarity is performed by a polarity control signal generated by the control pulse generation unit 1402.

In FIG. 17, gate pulses P1 to P12 are pulses for selecting twelve gate lines on panel 1905 during the HI period.

In the period T0_0 shown in FIG. 17, the gate pulses P5 to P8 become HI at the same time, and the non-image signal is written with a positive polarity to the pixels on the gate lines G5 to G8. In the subsequent periods T0_1 to T0_4, the gate pulses P1 to P4 sequentially become HI, and the image signals S1, S2, S3, and S4 are sequentially written to the gate lines G1, G2, G3, and G4 with positive polarity.

In the period T0_5, the gate pulses P9 to P12 become HI at the same time, and the non-image signal is written to the gate lines G9 to G12 with a negative polarity. In the subsequent periods T0_6 to T0_9, the gate pulses P5 to P8 sequentially become HI, and the image signals S5, S6, S7, and S8 are sequentially written to the gate lines G5, G6, G7, and G8 with a negative polarity.

Here, each pixel on the gate lines G5, G6, G7, and G8 holds a non-image signal during the periods of T0_0 to T0_5, T0_0 to T0_6, T0_0 to T0_7, and T0_0 to T0_8. As described above, all the gate lines on the panel are selected twice in one frame period, and the image signal and the non-image signal are written to the pixels on each gate line once.

(4) In the period T1_0 of the next frame period, the gate pulses P5 to P8 become HI at the same time, and the non-image signal is written to the gate lines G5 to G8 with a negative polarity contrary to the previous frame. Similarly, in the subsequent periods T1_1 to T1_4, the gate pulses P1 to P4 sequentially become HI, and the image signals S′1, S′2, S′3, and S′4 are applied to the gate lines G1, G2, G3, and G4, respectively. The data is sequentially written with the negative polarity opposite to that of the previous frame.

As described above, according to the driving method of the liquid crystal display device according to the fifth embodiment of the present invention, the image signal and the non-image signal are alternately written to each pixel, and the image signal is applied to the pixels for all the pixels. When a non-image signal is written in the written state, the polarity of the image signal written to the pixel is the same as the polarity of the non-image signal to be written, which facilitates writing of the non-image signal.

Conversely, when an image signal is written in a state where a non-image signal is written to a pixel, the polarity of the non-image signal written to the pixel is opposite to the polarity of the written image signal with respect to a reference potential, Writing an image signal is disadvantageous. As a result, the degree of writing of the image signal to each pixel is made uniform, and the display quality is improved.

In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted on a line-by-line basis. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

In the present embodiment, the drive frequency is converted to 1.25 times. For example, the number of gate lines for simultaneously writing non-image signals is set to n (n = 2, 3, 4,...) (N + 1) / (n) The effect of the present invention can be similarly obtained when the double-speed conversion is performed.

(Sixth embodiment)
In the fifth embodiment, the driving frequency is 1.25 times that of normal driving, and the writing time of the pixel signal for each pixel is reduced to 1 / 1.25. Therefore, in the sixth embodiment of the present invention, the pixel signals of the same polarity are written to the respective pixels just before the normal pixel signal writing timing with respect to the driving method of the fifth embodiment. This is to introduce a so-called precharge drive for improving writing.

FIG. 18 is a diagram showing a configuration of a liquid crystal display device according to the sixth embodiment of the present invention. Note that the configuration of the liquid crystal display device according to the sixth embodiment is the same as that of the liquid crystal display device according to the fifth embodiment except that the drive pulse generation unit 1402 is replaced with 1802. The other configurations are the same, and the configurations are denoted by the same reference numerals and description thereof will be omitted.

Hereinafter, a method of driving the liquid crystal display device according to the sixth embodiment of the present invention will be described, focusing on parts different from the fifth embodiment.

FIG. 21 is a diagram illustrating timings of an input image signal, an output image signal of the signal conversion unit 1401, and a gate driver drive pulse in the method of driving the liquid crystal display device according to the sixth embodiment of the present invention.

As in the fifth embodiment, the signal conversion unit 1401 converts the drive frequency of the input image signal to 1.25 times, and outputs the non-image signal to the source driver for one horizontal period during four horizontal periods of the input signal. Transfer of 5 lines including lines is performed.

{Circle around (4)} The source driver 1903 receives the output signal of the signal conversion unit 1401 and inverts the polarity of the signal for each line to output.

{During the period T0_0 shown in FIG. 21, the gate pulses P1 and P5 to P8 become HI at the same time, and a positive non-image signal is written to the pixels on the gate lines G1, G5 to G8. In the subsequent period T0_1, the gate pulse P1 and further the signal P2 become HI, and the positive image signal S1 is written to each pixel on the gate lines G1 and G2. At this time, the non-image signal of the positive polarity is written to each pixel on the gate line G1 immediately before, so that the writing of the image signal S1 of the positive polarity becomes easy.

In the next period T0_2, the gate pulses P2 and P3 become HI at the same time, and the positive polarity image signal S2 is also written to each pixel on the gate line G2 where the positive polarity image signal S1 has already been written. It will be easier.

Similarly, in the period T0_3, the gate pulses P3 and P4 become HI at the same time, and the writing of the positive image signal S3 is performed on each pixel on the gate line G3 where the writing of the positive image signal S2 is already performed. It will be easier. Further, in the subsequent period T0_4, only the gate pulse P4 becomes HI, and it is easy to write the positive polarity image signal S4 to each pixel on the gate line G4 where the positive polarity image signal S3 has already been written. Become.

(4) In the next period T0_5, the gate pulses P5 and P9 to P12 become HI at the same time, and the non-image signal is written to the pixels on the gate lines G5 and G9 to G12 with a negative polarity. In the subsequent period T0_6, the gate pulse P5 and further P6 become HI, and the image signal S5 is written to each pixel on the gate lines G5 and G6 with negative polarity. The non-image signal of the negative polarity has already been written to each pixel on the gate line G5, and similarly, the writing of the image signal S5 of the negative polarity becomes easy.

{Each pixel on the gate line G5 holds the non-image signal during the period T0_0 to T0_5, and the other period in the frame period is the image signal holding period.

{Circle around (5)} In the period T0_10, five gate lines are simultaneously selected and a non-image signal is written while the polarity is inverted, and in the other periods, two gate lines are sequentially selected and an image signal is written.

In the period T0_10, the gate pulses P1 to P4 and P9 are simultaneously set to the HI level of the gate line, and a positive non-image signal is written to the pixels on the gate lines G1 to G4 and G9. The writing of the non-image signal to the gate lines G1 to G4 is easy because the positive image signals S1 to S4 are written in the periods T0_1 to T0_4.

Further, the driving in the next frame will be described.

In the first period T1_0 of the next frame, the gate pulses P1 and P5 to P8 simultaneously become the HI of the gate line, and the pixels on the gate lines G1, G5 to G8 receive the non-image signal of the negative polarity opposite to that of the previous frame. Written. In the subsequent period T1_1, the gate pulse P1 and further P2 become HI, and the negative image signal S'1 opposite to the previous frame is written to each pixel on the gate lines G1 and G2.

Here, the polarity of the image signal is reversed from that of the previous frame in order to avoid the burn-in phenomenon of the liquid crystal display that occurs when the signal of the same polarity is maintained for a long time, as in the case of driving a general liquid crystal. It is.

At this time, a negative non-image signal is written to each pixel on the gate line G1 immediately before, so that writing of the negative image signal S'1 becomes easy. In the next period T1_2, the gate pulses P2 and P3 become HI at the same time, and the negative image signal S'2 is applied to each pixel on the gate line G2 to which the negative image signal S'1 has already been written. Can be easily written.

As described above, in the sixth embodiment of the present invention, in the driving of writing the pixel signal twice to each pixel in one frame period, the image signal and the pixel signal shown in the fifth embodiment of the present invention are used. By precharging each pixel while maintaining the polarity control of the non-image signal, shortage of writing due to shortening of writing time can be improved.

In this embodiment, the basic driving method is so-called line inversion driving in which the polarity of a signal is inverted for each line. However, the effect of the present invention is not limited to this. The same applies to the so-called column inversion drive in which the polarities of the signals written to are inverted.

In the present embodiment, the drive frequency is converted to 1.25 times. For example, the number of gate lines for simultaneously writing non-image signals is set to n (n = 2, 3, 4,...) (N + 1) / (n) The effect of the present invention can be similarly obtained when the double-speed conversion is performed.

(Seventh embodiment)
In order to perform the writing to each gate line in consideration of the polarities of the video and non-image signals without deteriorating the image quality shown in the fifth and sixth embodiments, the number of lines in one frame period is restricted.

In the driving method described in the fifth embodiment, when the number of gate lines for simultaneously writing non-image signals is N, the total number of lines Y in one frame period is N × (2M + 1) lines (M Is an integer of 1 or more). In the driving method described in the sixth embodiment, when the number of gate lines for simultaneously writing non-image signals is N, the total number of lines Y in one frame period is (N−1) × (2M + 1). ) Line (M is an integer of 1 or more).

FIG. 22 shows a drive timing when Y = 13 as an example in the case where Y is not (N−1) × (2M + 1) in the drive method shown in the sixth embodiment. As is clear from this figure, the periods in which the pixels on the gate lines G5, G6, G7, and G8 hold the image signal are T0_6 to T0_14, T0_7 to T0_14, T0_8 to T0_14, and T0_9 to T0_14, respectively.

The period in which each pixel on the gate line G5 holds the image signal is the same as the period in which each pixel on the gate line G1 holds the image signal, and similarly, each period on the gate lines G6, G7, G8. The period in which the pixel holds the image signal is the same as the period in which each pixel on the gate lines G2, G3, G4 holds the image signal.

On the other hand, the periods in which the pixels on the gate lines G9, G10, G11, and G12 hold the image signals are T0_11 to T1_4, T0_12 to T1_4, T0_13 to T1_4, and T0_14 to T1_4, respectively, and are on the other gate lines. This is different from the period in which each pixel holds an image signal. As a result, a difference in brightness occurs between the display portion for the gate lines G1 to G4 and the display portion for the gate lines G5 to G13.

Therefore, in the seventh embodiment of the present invention, a means for adjusting the number of gate lines to be scanned in one frame period is newly provided, and the total number of scanning lines Y of the input image signal in one frame period is (N−1) × ( If the line is not 2M + 1), this is adjusted to (N-1) × (2M + 1) lines.

FIG. 23 is a diagram showing a configuration of a liquid crystal display device according to the seventh embodiment of the present invention. 23, the liquid crystal display device according to the seventh embodiment is different from the liquid crystal display device according to the sixth embodiment shown in FIG. 18 in that a new line number adjusting unit 2306 and a frame memory 2307 are provided. is there.

Hereinafter, a method of driving the liquid crystal display device according to the seventh embodiment of the present invention will be described, focusing on parts different from the sixth embodiment.

FIG. 22 is a diagram illustrating a driving method of a liquid crystal display device according to the seventh embodiment of the present invention. In the driving method of the liquid crystal display device according to the seventh embodiment, when the total number of lines Y of one frame period of an input image signal is not N × (2M + 1) lines, FIG. 9 is a diagram for explaining timings of input / output signals between the frame memory 2307 and a frame memory 2307.

(4) Write and read image signals to and from the frame memory in synchronization with the reference timing of a predetermined image signal. At this time, the frequency of the clock used for reading the image signal from the frame memory is set lower than the frequency of the clock used for writing the image signal from the frame memory. Here, the number of lines in one frame period is adjusted by maintaining the number of image signals in the horizontal period to extend the horizontal period while maintaining one frame period.

As described above, if the number of lines Y of one frame period of the input image signal is not (N−1) × (2M + 1) lines, it is adjusted to (N−1) × (2M + 1) lines, By unifying the polarity of the image signal and the non-image signal written to all the pixels and suppressing variations in the retention period of the image signal, high-quality display can be achieved.

In the present embodiment, the operation in the case where the total number of lines Y 'in one frame period after conversion is set to Y or less has been described. This is because an image signal generally includes a blanking period irrelevant to a display image, and even if the total number of lines in one frame period is reduced, a part of a displayed image is not lost and the number of lines is not reduced. This is because it is more advantageous to perform the adjustment in a direction to reduce the operating frequency, which leads to a reduction in the operating frequency.

When Y is equal to or less than the number of lines of the image signal to be displayed, the frequency of the clock used for reading the image signal to the frame memory is set higher than the frequency of the clock used for writing the image signal from the frame memory. By doing so, it is also possible to make an adjustment such that Y ′> Y.

Also, in the present embodiment, the drive for performing the precharge has been described as an example, but it is not always necessary to perform the precharge drive.

INDUSTRIAL APPLICABILITY The liquid crystal display device according to the present invention is useful as a driving method and a liquid crystal display device of an active matrix type liquid crystal display device, and in particular, a driving method of a liquid crystal display device using an OCB liquid crystal mode having a wide viewing angle and high speed response. Suitable for liquid crystal display devices.

FIG. 4 is a diagram for explaining control performed by a driving method of the liquid crystal display device according to the first embodiment of the present invention. Diagram showing the configuration of the liquid crystal panel The figure which shows the electric potential-transmittance curve of OCB FIG. 7 is a diagram for explaining control performed by a driving method of a liquid crystal display device according to a third embodiment of the present invention. Timing diagram for explaining operation of double speed signal conversion operation The figure which shows the internal structure of the signal conversion part of the conventional liquid crystal display device FIG. 4 is a diagram illustrating a configuration of a liquid crystal display device according to a second embodiment of the present invention. FIG. 7 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a second embodiment of the present invention. FIG. 7 is a diagram illustrating a configuration of a liquid crystal display device according to a third embodiment of the present invention. FIG. 7 is a diagram for explaining control performed by a driving method of a liquid crystal display device according to a third embodiment of the present invention. FIG. 7 is a diagram for explaining control performed by a driving method of a liquid crystal display device according to a third embodiment of the present invention. FIG. 7 is a diagram illustrating a configuration of a liquid crystal display device according to a fourth embodiment of the present invention. FIG. 7 is a diagram for explaining control performed by a driving method of a liquid crystal display device according to a fourth embodiment of the present invention. The figure which shows the structure of the liquid crystal display device concerning 5th Embodiment of this invention. The figure which shows the internal structure of the signal conversion part of the liquid crystal display device concerning 5th Embodiment of this invention. A timing chart for explaining an operation of a signal converter of a liquid crystal display device according to a fifth embodiment of the present invention. FIG. 14 is a diagram for explaining control performed by a driving method of a liquid crystal display device according to a fifth embodiment of the present invention. The figure which shows the structure of the liquid crystal display device concerning 6th Embodiment of this invention. Diagram showing the configuration of a conventional liquid crystal display device FIG. 4 illustrates control performed by a conventional method of driving a liquid crystal display device. FIG. 14 is a diagram illustrating control performed by a driving method of a liquid crystal display device according to a sixth embodiment of the present invention. FIG. 14 is a diagram for explaining control performed by a driving method of a liquid crystal display device according to a seventh embodiment of the present invention. The figure which shows the structure of the liquid crystal display device concerning 7th Embodiment of this invention. Diagram showing input / output characteristics of source driver

Explanation of reference numerals

203, 1903 Source driver 204, 1904 Gate driver 205 Opposite driver 206 Pixel 207 TFT
301 Potential-transmittance curve when a predetermined potential for preventing reverse transition is not inserted 302 Potential-transmittance curve for CR driving in which a predetermined potential is inserted for preventing reverse transition 303 Critical potential 304 Highest transmittance Potential at the time 305 Potential at the time of the lowest transmittance 702, 902, 1202, 1402, 1802, 1902, 2302 Drive pulse generator 601, 1501 Control signal generator 602 Line memory 603 Non-image signal generator 604 Output signal selector 1401, 1901 Signal conversion unit 1905 Liquid crystal panel 2306 Line number adjustment unit 2307 Frame memory

Claims (12)

A plurality of source lines to which pixel signals are supplied, a plurality of gate lines to which scanning signals are supplied, and pixel cells arranged in a matrix corresponding to intersections of the source lines and the gate lines. A method of driving a liquid crystal display device having a liquid crystal panel,
Within one frame period, which is a display cycle of one image, an image signal that is a pixel signal corresponding to the one image and a non-image that is a pixel signal different from the image signal are provided to all the pixel cells on the liquid crystal panel. When writing signals,
A driving method of a liquid crystal display device, wherein the image signal and the non-image signal are written in the pixel cells with their polarities inverted in synchronization with a frame period with reference to a reference potential which is a predetermined level of potential. The polarity of the non-image signal with respect to the reference potential is controlled to be the same as the polarity with respect to the reference potential of the image signal held by the pixel cell at the time of writing to the pixel cell,
2. The method according to claim 1, wherein the polarity of the image signal with respect to the reference potential is controlled to be opposite to the polarity of the non-image signal held by the pixel cell at the time of writing to the pixel cell. 4. The method for driving a liquid crystal display device according to item 1. The polarity of the non-image signal with respect to the reference potential is controlled to be opposite to the polarity with respect to the reference potential of the image signal held by the pixel cell at the time of writing to the pixel cell,
The polarity of the image signal with respect to the reference potential is controlled to be the same as the polarity of the non-image signal held by the pixel cell at the time of writing to the pixel cell with respect to the reference potential. 2. The method for driving a liquid crystal display device according to item 1. In writing the non-image signal to the pixel cell, by simultaneously selecting two gate lines, the same non-image signal is simultaneously written to the pixel cells on the selected two scanning lines, and 3. The method according to claim 2, wherein one of the selected gate lines is selected, and an image signal is written to a pixel cell on the selected gate line. In writing the image data to the pixel cells, by selecting the two gate lines at the same time, the same image data is written to the pixel cells on the selected two scanning lines at the same time, 4. The method according to claim 3, wherein one of the gate lines is selected, and non-image data is written to a pixel cell on the selected gate line. In writing non-image data to a pixel cell, the same non-image data is simultaneously written to a plurality of pixel cells on the same data line on different scanning lines by simultaneously selecting a plurality of the gate lines. A method for driving a liquid crystal display device according to claim 2. The method according to claim 1, wherein in writing image data to a pixel cell, the same image data is simultaneously written to a plurality of pixel cells on the same data line on different scanning lines by simultaneously selecting a plurality of the gate lines. 4. The method for driving a liquid crystal display device according to item 3. 8. The driving method of a liquid crystal display device according to claim 6, wherein the gate lines selected at the same time are two or more even-numbered gate lines adjacent to each other on the liquid crystal panel. In writing the non-image data to the pixel cells, another precharge line, which is another gate line, is simultaneously selected, and the same non-image data is simultaneously supplied to the pixel cells on all the selected gate lines including the precharge line. 9. The method of driving a liquid crystal display device according to claim 6, wherein image data is written, and then the precharge line is selected, and image data is written in a pixel cell on the precharge line. In writing image data to pixel cells, a gate line for writing image data and a plurality of the gate lines for simultaneously writing non-image data are simultaneously selected, and pixel cells on all the selected gate lines are selected. Write the same image data to the plurality of gate lines at the same time, and then, among the selected gate lines, select a plurality of the gate lines for simultaneously writing the non-image data. 9. The method of driving a liquid crystal display device according to claim 7, wherein is written. When the number of simultaneously selected gate lines excluding the pre-charge line is N,
The number of scanning lines included in the frame period is adjusted in advance so as to be (2M + 1) × N.
A method for driving a liquid crystal display device according to claim 4. 12. The method according to claim 1, wherein the liquid crystal cell is an OCB cell.

Images