TW548625B - Display apparatus and its driving method - Google Patents

Abstract

The present invention discloses the circuit structure for the display apparatus that has digital memory (DM) storage cell for each pixel. In addition to using an inverter circuit structure to form the DM storage cell, a DM switch circuit for controlling the pixel electrode and the electric conduction between the DMs is disposed. During the general display, the DM switch circuit is used to cut-off the conducting path between DM storage cell and the pixel electrode; and the animation data provided to the signal line is used to conduct the colored image display. During the static picture display, the DM switch circuit is used to open the conducting path between DM storage cell and the pixel electrode; and the static picture data stored in the DM storage cell is used to conduct the colored image display.

Description

548625

V. Description of the invention (i 1 · Technical field to which the invention belongs The present invention relates to display devices used for the display of mobile phones and electronic books (electric bok), etc. The details are related to the built-in digital memory in the pixels The dynamic matrix display device for storing vibration and the driving method of the display device are related. 2 · The prior art liquid crystal display device is used for the display of a portable information terminal because of its advantages such as light weight, thinness, and low power consumption. Because such portable information terminals are generally driven by batteries, low power consumption is an important issue. Especially for mobile phones, it is required to have a low power consumption display during standby time. In order to achieve this goal, developed A dynamic matrix type liquid crystal display device (hereinafter referred to as a built-in liquid crystal display device with a built-in 0% cell) built in a digital memory cell (DM cell) capable of statically storing pixels of image materials. Published this built-in DM storage The literature of Lattice LCD display device is usp5,712,652. The image display device published here is in standby mode. When displaying a still picture), the binary data stored in the DM cell is used to make only the AC-driven liquid crystal circuit work, so as to stop other peripheral driving circuits to greatly reduce power consumption. However, the traditional built-in DM cell LCD display The device uses SRAM as a DM cell. This SRAM is usually composed of 5 transistors. Therefore, it is necessary to arrange the DM cell on the substrate, and a certain degree of field is not easy to be refined. SUMMARY OF THE INVENTION The present invention & lt The purpose is to realize a display device with a built-in 0 "storage cell, such as a paper size of -4- this paper. 5. Description of the invention (2) High-definition of the element. The display device related to the present invention is characterized by having A plurality of scanning lines and a plurality of signal lines arranged alternately with each other, a pixel electrode arranged at each of the six points of the two lines, and the first € 1 capacitive element juxtaposed with the aforementioned pixel electrode are used to supply the front riding line The column selection signal is used to implement the state / off control. When the signal is turned on, the signal line and the pixel electrode circuit are connected. The signal line is supplied to the signal line. The image data is written by the aforementioned pixel electrode: the first electrode substrate of the switching element, the second electrode substrate including the opposite electrode arranged opposite to the pixel electrode at an interval, the second electrode substrate sandwiched between the aforementioned electrode substrate, and A display layer between the second electrode substrates, a signal line driving circuit that supplies image data to the aforementioned plurality of signal lines during a horizontal scanning period, and supplies a scanning signal to the scanning lines according to a material selection signal during each horizontal scanning period Drive circuit 'The aforementioned first electrode substrate contains a digital memory image memory cell composed of an inverter circuit which can store image data supplied to the signal line, and controls the space between the pixel electrode and the digital memory cell. The digital memory switch circuit of the circuit. In addition, the driving method of the display device related to the present invention is characterized in that, during the first display period, the aforementioned digital switching circuit will close the path between the aforementioned pixel electrode and the digital memory memory cell. , And the aforementioned W-th element will be turned on during the “疋 cycle” before writing the approximate image data supplied to the aforementioned signal line = Pixel electrode and shirt; in the second display—the aforementioned digital memory switch t will turn on the aforementioned pixel electrode and the aforementioned number to remember the data, and the second image data supplied to the aforementioned signal line is staggered in the aforementioned digital memory. After the cell, the aforementioned element will be the aforementioned letter and the aforementioned image -5- 548625

The path of the elementary private gate ’writes the second scene image data stored in the aforementioned digital memory cell into the aforementioned pixel electrode and displays it. Detailed description of the invention The following describes the display device and the driving method of the display device related to the present invention with reference to a dynamic matrix liquid crystal display device and an embodiment using the driving method. FIG. 1 is a circuit configuration diagram of a liquid crystal display device 100 according to the embodiment. FIG. 2 is a schematic sectional view of FIG. 1. FIG. The liquid crystal display device 100 is composed of a display pixel section 110 forming a plurality of display pixels 10, a scanning line driving circuit 120, and a signal line driving circuit 13o. The scanning line driving circuit 120 and the signal line driving circuit 13 of this embodiment are integrally formed on the array substrate 101 with the signal lines u, the scanning lines 12, and the pixel electrodes 13 described later. The display pixel section 110 arranges the complex signal line u and the complex scanning lines 12 intersecting the complex signal line u on the array substrate 101 in a matrix manner through an insulating film not shown in the figure. A display pixel 10 is formed at each intersection of the two lines. The array substrate 101 is further provided with a memory control signal line 19 parallel to the scan line 12. An external driving circuit not shown in the figure supplies a memory control signal to the memory control signal line 19. In the embodiment described later, there is also a configuration example in which two memory control signal lines 19a and 19b are arranged. However, to simplify the description, FIG. 3 only indicates the memory control signal lines. The display pixel 1 is composed of a pixel electrode 13, a first switching element, 4, a counter electrode 1, 5, a liquid crystal layer 16, a DM switching circuit 1, 7, and a dm cell 18.-This paper is applicable to China Standard (CNS) A4 specification (210X 297 mm) 548625 A7 B7 5. Description of invention (4) Composition. In order to simplify the description, the i-th capacitive element (24) is omitted in FIG. 3. The source electrode of the first switching element 14 is connected to the signal line i 丨, the gate electrode is connected to the scan line 12, and the drain electrode is connected to the pixel electrode 13. In addition, the pixel electrode 13 is connected to the 〇1 ^ cell 18 through the DM switch circuit 17, the gate electrode of the kDM switch circuit 17 is connected to the memory control signal line 19, the source electrode is connected to the pixel electrode 13, and the drain electrode is connected to dm. Cells. 2 The pixel electrode 13 is formed on the array substrate 101, and the opposite electrode 15 opposite to the pixel electrode 13 is formed on the opposite substrate ι2. The external driving circuit not shown in the figure provides a certain counter electrode potential to the counter electrode 15. In addition, the pixel electrode 13 and the counter electrode 15 are sandwiched between the pixel electrode 13 and the counter electrode 15 as a display layer, and a liquid crystal capacitor is formed for each display pixel 10. The array substrate 101 and the opposite substrate 102 are sealed with a sealing material. The illustration of the alignment film, the polarizing plate, and the like is omitted in FIG. 2. And = = base: the base plate 102 is the & electrode base plate and the second slow-moving register 121 of this embodiment and the unmarked Chong Private Road Temple, and according to the unmarked =: Signal (vertical timepiece / start signal), select the number 俨 for the output line of the scanning line 12 every 4 in the order of up and down. Scanning line driving circuit 120 in the middle order (referred to as the general display for short) will be displayed every time (to output to scanning line 12. In the still writing: know: the column selection signal is traced during the period 12 select signal.…, At 777, it will stop scanning all paper sizes. Sg ^ 4 (2 ^: 297mm) 7- 548625 A7

k 5 tiger line drive thunder 1 q. θ I. Move the temporary register 131 and analog switch (including the request) to the temple. The external drive circuit not shown on the picture will provide the control 2 (Ping u time " ten / start signal) and the video bus 1 3 3 Provide video materials ^ I-line drive circuit 13 〇 According to the horizontal timepiece / start signal, move the temporary storage 13 1 to provide the ASW132 switch signal, and supply the video bus ~ image and material will be at a certain timing Sampling to the signal line 丨 i. In the following description, the color intermediate adjustment display / animation during the normal display period: the image data shown is called dynamic day data. The stationary daytime display period time = the image data displayed by the multi-color still picture is called the stationary daytime data. The image data that is more than once is the image data with binary information. The seven display pixels 10 shown in FIG. 1 are d pixels representing R (red), G (green), and 3 (solitary), respectively. Therefore, if three sub-pixels r, G, and B constitute one pixel of the display unit, multi-color display with a total of 8 (three powers of two) can be performed. :: 逑 = The normal display period and the still image display period are the first display period and the second display period of the implementation ^ ~, respectively. The animation data and still picture data are respectively the i-th image data and the second image data of this embodiment. The following is a simple operation for driving the liquid crystal display device as a dynamic matrix liquid crystal display device. Instructions. Vocabulary description, the spring drive circuit 12 will output the column selection signal during each horizontal scan, and select each scan line 12 in the order from top to bottom, which is connected to the selected scan. 1 Switching element} 4 Only during the single-horizontal scanning period will the same-period sampling of the animation data of the signal line n be sampled -8-This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm)

Binding

Line 548625

The animation data to the signal line 11 will be written into the pixel electrode 13 through the old gate element 14. At this time, the liquid crystal layer 16 responds according to the magnitude of the electric data written into the pixel electrode 13 ', and uses this to control the amount of transmitted light from the display pixel. This operation is performed on all the scanning lines 12 within the period of 1 frame, and a single image can be formed. The animation data written into the pixel electrode 3 will be retained until the next frame is written with the new animation data with reversed polarity. The following is a detailed description of the circuit configuration of the display pixel 10 with reference to FIG. 3. FIG. 3 is a circuit configuration diagram of the display pixels shown in FIG. 1. The drain electrode side of the i-th switching element 14 is connected to the pixel electrode 13 and a first capacitive element 24 connected in parallel with the pixel electrode 13. The second capacitor element 24 forms a storage capacitor Cs between the pixel electrode 13 and a storage capacitor line not shown in the figure. The external drive circuit not shown in the figure supplies a certain auxiliary capacitor voltage to the aforementioned auxiliary capacitor line. The first capacitor element 24 is connected in order to satisfactorily store the animation data and still picture data written in the pixel electrode 13. The animation data written into the pixel electrode 13 and the still screen display are stored with the charge of the liquid crystal capacitor Clc and the auxiliary capacitor Cs, respectively. The DM switching circuit 17 is composed of a second switching element 21 composed of an N-chTFT and a third switching element 22 composed of an N-chTFT. The DM switch circuit 17 is inserted between the input terminal 26 and the output terminal 27 of the DM cell 18, and the pixel electrode 13. In the D M switch circuit 17, the gate electrode of the second switching element 21 is connected to the memory control signal line 19a, and the gate electrode of the third switching element 22 is connected to the memory control signal line 19b. The external drive circuit not shown in the figure provides the memory control signal for turning on or off the memory control signal lines 1 9 a and 19 b. This memory control signal can be used for independent control. -9-This paper size is applicable to China National Standard (CNS) A4 (210X297 mm)

Binding

Line 548625 A7 B7 V. Description of the invention (7) The second switching element 21 and the third switching element 22 are turned on / off. In this embodiment, the first switching element 14 and the DM switching circuit 17 are each composed of a MOS transistor. The N-chTFTs constituting the second switching element 21 and the N-chTFTs constituting the third switching element 22 are the same conductivity type transistor in this embodiment. The DM cell 18 is composed of a single inverter circuit 23 and a second capacitor element 25. The stationary daytime data written in the DM cell 18 when the still picture is displayed can be stored in the inverter circuit 23 only. However, if the second capacitor element 25 is connected, the storage of the charge charges in the inverter circuit 23 can be made more stable. At the same time, when the DM cell 18 is constituted only by the inverter circuit 23, the still picture data will be stored according to the wiring capacitance and the capacitance component of the inverter itself. The positive and negative sides of the inverter circuit 23 are respectively connected to positive power wiring and negative power wiring not shown in the figure. Therefore, the power supply voltage generating circuits not shown in the figure will provide DC high power voltage and low power voltage respectively. In this embodiment, as shown in Fig. 3, the DM cell 18 is composed of a single inverter circuit 23 and a second capacitor element 25. Therefore, in the past, the DM storage cell required 5 transistors, which could be reduced to 2 transistors used for the inverter circuit and 1 transistor used for the capacitor element. If only one inverter circuit 23 is used to form the DM cell 18, the number of transistors in the DM cell can be reduced to two transistors used in the inverter circuit. Therefore, by adopting the aforementioned circuit configuration, the arrangement area of the DM memory cells 18 on the substrate can be reduced, and the high-definition picture can be realized. In addition, if the development process is refined, and the paper size is -10- pixels, this paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) for binding

Line 548625 V. Description of the invention (8 static images can also be gradated as a display unit of 1 pixel when displaying. And second: 2: only turn on the second switching element 21 and make the first capacitive element 2 4 When the material is cut dynamically, you can write one of the electrode 13 and “Shao Zhidian” stored in the second capacitor element 25. Therefore, if the capacitor of the first fork element 11 and the capacitor of the second capacitor element 25 are formed together Generally, if necessary, the capacitance of the first capacitance element 24 can reduce the capacitance added by the second capacitance: the element 25. Therefore, the circuit area on the substrate will be reduced, and this can increase refinement and improve waste. The following will describe the driving method of the general display and the still picture display with respect to the liquid crystal display device 100 configured as described above. First, during the general display, only the second switching element 2 丨 can be turned on to enable the memory control signal line. 19a is on and the memory control signal line 19b is off. Therefore, the scanning line driving circuit 12 and the signal line driving circuit 13 will be referred to as the timing signal, the start signal, and the animation data, because it is normal and tragic. The same driving method of the array liquid crystal display device can implement color high-quality intermediate adjustment / animation display. As shown in the description, in general display, if only the second switching element 21 is driven to drive, write pixels Part of the charge of the animation data of the electrode 13 will be stored in the second capacitive element 25. Therefore, the charged electric charge of the first! Capacitive element 24 can be stored more stably. In addition, during general display, the second switching element 21 and the first 3 The switching element 22 turns off the memory control signal lines 19a '19b at the same time. At this time, the charges of the animation data written in the pixel electrode 13 are stored in the liquid crystal layer 16 and the first capacitive element 2 4. -11-This paper scale Applicable to China National Standard (CNS) A4 specification (210X 297 mm) 548625 5. Invention description (9) A7 B7

Next, a timing chart of the signal waveform shown in FIG. 4 will be used to explain a method of driving a still picture from time to time. In this example, a high DC power supply voltage and a 10w power supply voltage will be provided to the power supply wirings 28a and 28b, respectively. In the still frame of the initial frame displayed on the stationary daylight surface, only the second switching element 21 can be turned on, the memory control signal line 9a can be turned on, and the memory control signal line 19b can be turned off. During the period when the first switching element 14 is turned on due to the column selection number, the stationary daytime data will be sampled to the signal line. This data will also pass from the first switching element through the second switching element 21 of the DM switching circuit 17 14 is the entry to DM 18. After the static daytime data is written into the DM cell 18, if the first switching element is switched to off, the still picture data will be stored in the second capacitive element 25 and inverter circuit 23 of the dM cell 18 (hereinafter abbreviated as "Still picture data is stored in the second capacitive element 25 of DM cell 18"). During the still picture display, if the still picture display data of ADM cell 18 is stored and written for a long time, the DC component will degrade the liquid crystal layer 16 and require It is driven by AC. In this embodiment, the memory control signal lines 19a and 19b are alternately provided with an open memory control signal at a certain period, so that the second switching element 21 and the third switching element 22 are turned on alternately, and at the same time, they are reversed. The potential of the counter electrode 15 is used for AC driving. That is, each frame during the still picture display period will first turn on the third switching element 2 2 in order to turn on the memory control signal line 1 9 b and store it in the second capacitor. The still picture data of the element 25 is written into the pixel electrode 13. Meanwhile, the memory control signal line 19a is turned off. Secondly, at the end of the i frame, the second switch is turned on to open the memory control signal line 19a. 21 cut to open, to write this paper as -12- scale applicable Chinese National Standard (CNS) A4 size (2i〇x297 Kimiyoshi)

Binding

Line 548625 A7

2. The still picture data of Bao Jibu is stored in the second capacitive element U again. Meanwhile, the memory control signal line 19b is turned off. This operation is repeated every frame ^ Implementation 'Each time the stationary daytime data is read from the second capacitive element 25, the reverse song circuit 23 performs polarity inversion and writes to the pixel electrode 13. Therefore, in accordance with the potential of the period inversion counter electrode 15, a polarity inversion driving can be performed. To achieve this, during the still picture display period, as shown in FIG. 4, the on time of the third switching element 22 is set to be longer than the on time of the second switching element 21. In this embodiment, the 'on time of the second switching element 21 is about 1/10 of the on time of the third switching element 22'. However, the turn-on time of the third switching element 22 can be appropriately determined according to the design conditions of the liquid crystal panel. No. As described above, the second switching element 21 and the third switching element. Each frame is turned on alternately, and the high power voltage and the low power are supplied to the pixel electrode 13. At this time, if the electric potential of the counter electrode 15 is changed, the potentials of the Hlgh power supply voltage and the Low power supply voltage are shifted, and the liquid crystal layer 16 of the display pixel 10 having the same polarity to the counter electrode 15 will not be subjected to a voltage, but reversed polarity The liquid crystal layer 16 of the display pixel 10 is subjected to a voltage. Therefore, the black and white image display can be implemented by correspondingly responding to a white image or a black image of the liquid crystal layer 16 with and without a voltage. At this time, the display pixel unit 110 only has a low-frequency memory control signal line 19 and an opposite electrode 15, so that the still image display can be performed with low power consumption. At this time, the potential is supplied from the DM cell 18 to the pixel electrode 13, and the potential of the auxiliary capacitor Cs formed between the auxiliary capacitor lines not shown on the it-capacitor element diagram and -13- ) A4 size (210 X 297 mm) '------

Binding

Line) 48625 A7

Show nothing. Therefore, it is possible to reduce the power consumption during the normal display. The potential provided to the aforementioned auxiliary capacitor line can be lower than the auxiliary capacitor potential provided by the capacitor element 24, and although it is not shown in FIG. 4, when switching from the static daytime display to the normal time, the final image will pass through the still image. The picture frame again closes the memory control signal line 9b (or /, closes 19b). It also provides timing signals, start signals, and moving book data to the scanning line drive circuit 120 and the signal line drive circuit 130, respectively. Then, another embodiment of the DM switch circuit 17 will be described. Fig. 5 is a circuit configuration diagram of another embodiment of the display pixel 1G shown in Fig. 3. The part corresponding to Fig. 3 in Fig. 5 is represented by the same symbol. The regrettable DM switch circuit 37 is a second switching element 31 composed of N-chTFT and a third switching element composed of 1 > ^ 111 ^ and a gate electrode of each switching element is connected to a common memory control signal Line 19 is turned on. The memory control signal provided by line 19 can be used to control the on / off of the second switching element 31 and the third switching element 32 at the same time. That is, the DM switching circuit 37 and the second switch in FIG. 5 When element 31 is turned on, the third switching element 32 is turned off, and when the second switching element 31 is turned off, the third switching element 3 2 is turned on. In the normal display, 'the second switching element 31 is turned on and the second It is not necessary to turn off the two switching elements at the same time when the capacitor element 25 charges the charge of the animation data. Because of the circuit configuration shown in FIG. 5, the number of memory control signal lines 19 can be reduced to half of the circuit configuration of FIG. In addition, 'N-ch TFT constituting the second switching element 3 1 and constituting the third switch -14-This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 548625

Description of the invention (12-element P-chTFT of 32 elements, in the main spare mode, is only a different conductive type electric effect transistor. In this implementation, Nenshi only complained about the second switch element 3 1 And the third switching element 32 is composed of a CMOS transistor. "The specific circuit configuration of the DM cell 18 will be described. Here, the circuit configuration of Fig. 5 is taken as an example to explain. In addition, it is also applied to the display of a still screen. Other driving methods are explained. FIG. 6 is a detailed circuit configuration diagram of the display pixel 10 shown in FIG. 5. The part corresponding to FIG. 5 in FIG. 6 is represented by the same symbol. The inverter included in the DM cell 18 The circuit 23 is composed of ρ_ ChTFT231 & N_chTFT232 connected in series. The ρ_ ChTFT231it on the positive side is connected to the power wiring 28a, and the heart on the negative side is connected to the power wiring 2 8 b. The still picture written into the reverse circuit 23 When the charged charge of the data cannot be stored stably in the second capacitive element 25, as shown in FIG. 7, a third capacitive element 233 and a fourth capacitive element 2 ^ 4 are added to the chTFT23i and N_chTFT232, respectively. In FIG. 7, the third Capacitive element 23 3 is connected to Bu (^ 1 ^ Between the gate electrode of Ding 231 and the power wiring 28a, the fourth capacitor element 234 is connected between the gate electrode of ^^ ch TFT 2 3 2 and the power wiring 2 8 b. With this circuit configuration, it can be stored and charged stably In the general display of this situation, only the second switching element 31 is turned on, and a path is formed between the first capacitive element 24, the second capacitive element 25, the third capacitive element 233, and the fourth capacitive element 234. Part of the charge of the animation data written into the pixel electrode 13 can be stored in the three capacitive elements (25, 233, 234) on the 18 side of the DM cell. Therefore, if the capacitance of the capacitive element 24 and the -15- Paper size applies to China National Standard (CNS) A4 (210X297 mm)

Binding

Line V. Description of the Invention (3) The capacitors of the three lightning y valley elements on the eighth side of the DM storage cell together form the necessary electric valley for general driving. Then the first capacitor element 24 7 丨, ^ 卞 卞 4 foot valley Can reduce the number of capacitors attached to the 18 sides of the DM cell. Therefore, the circuit area on the substrate will be reduced to increase the high material button to improve the waste rate. The following will use the circuit configuration shown in Fig. 6 to explain the driving method for general display and still screen display. Because the driving method during normal display is the same as the implementation method, only the driving method for still image display will be described here. Fig. 8 is a timing chart of signal waveforms of other driving methods when still images are displayed. In this example, 'will supply the high power voltage and the low power voltage of the direct current to the power wiring respectively. In the driving method of this embodiment, during the display of the still picture, the still picture data is written into every several frames. That is, when the still picture is nested in the frame, only the second switching element 21 'is turned on, and the memory control signal line 19 is turned on. During the period when the first switching element 14 is turned on due to the column selection signal, the still picture data will be sampled to the signal line 11, and this data will also be inserted from the i-th switching element 14 through the second switching element 2 of the aDM switching circuit 17. Go to DM cell ls. After cooking, the first switching element 14 will be turned off, and the still picture data will be stored in the second capacitive element 25 which should be the storage cell 18. After that, the still book display will be implemented according to the still picture data written in the DM cell 18, but a certain number of frames will be set according to a certain proportion to set the static frame = nested picture frame to write the still picture data. At this time, the embedded still picture data will have the opposite polarity to the still picture data written in the previous still picture writing frame, with the potential of the counter electrode 15 being reversed ^ -16- This paper scale Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 548625 A7 B7 5. The invention description (M) can implement the polarity inversion drive. In the still picture display period of this embodiment, since the still picture data of the same polarity is applied to the liquid crystal layer 16 during the period when the new still picture data is nested to a certain number of frames, the memory control signal is not driven during this period. Necessary for line 19. On the other hand, the scanning line driving circuit 120 and the signal line driving circuit 13 are driven for each fixed number of frames. However, according to the inventors &lt; simulation, it was confirmed that the still picture display period can be driven with lower power consumption than the driving method shown in FIG. According to the number of frames of the still image display 7F of the still image data, write the private position of the still image data of the ADM cell 18 as long as it can store the number of frames necessary for liquid crystal driving. FIG. 9 is a signal wave timing diagram of still other driving methods when a stationary day-to-day display is implemented. In this example, the power supply wirings 28a and 28b are supplied with another voltage (high level / low level crossing potential), respectively. The driving method of the seventh embodiment is the same as the embodiment shown in FIG. 8. During the still picture display period, the still picture data is written to every several frames. The difference is that the polarity inversion drive is implemented for each frame. That is, during the still picture display period using the still picture data written in the DM cell 18, in addition to reversing the potential of the power wiring 283 and 28b per frame, the period is also reversed to reverse the counter electrode 15 The potential. The following description uses FIG. 9 and FIG. During the display of the still picture, the second switching element ^ is turned off and the second switching element 22 is turned on, so that the memory control signal line 19 is turned off. On the other hand, closing the potential of the still picture data stored in the second capacitive element 25 reverses the -17- Zhang scale suitable financial standard (CI ^ _) Α4 size (21GX297 public love) binding 548625 • A7 B7 5 2. Description of the invention (15 2〇 <P-chTFT23l or N-chTFT232 will be turned on. The potential of this stationary i-plane shell material is the potential of the still picture data embedded in this display pixel 'is H igh level or L 〇 w-level binary information. If one of the P-chTFT23 1 or N_chTFT232 of the inverter circuit 23 is turned on, the potential of the still picture data written in the DM cell 18 will be transferred from the P-chTFT231 or N-chTFT232 via the output terminal. 27. The third switching element 22 is written to the pixel electrode 13. Therefore, when the potential of the still picture data of a certain frame is High, in order to turn on the N-chTFT232, the power wiring 2 8b will pass the third switching element 22 to the pixel. The electrode 13 provides a level potential of L0w. At this time, the counter electrode 15 is at the opposite potential, and the liquid crystal layer 16 will be subjected to a voltage. On the other hand, when the potential of the still picture data of the same frame is L0w, P-chTFT23 1, power wiring 28a will pass The third switching element 22 applies a high level potential to the pixel electrode 13. At this time, the counter electrode 1: is at the same potential, and the liquid crystal layer 6 will not be subjected to a voltage. Therefore, the liquid crystal layer 16 is subjected to a voltage state and The black and white image display can be implemented when the voltage-free status corresponds to the white or black image. Even when the polarity of the power supply voltage supplied to the power supply wiring 2 8 a and 2 8 b is reversed in the next frame, it is supplied to the pixel. The potential of the static picture of the electrode 13 and the potential of the counter electrode 15 have a reversed relationship, so the same result as above will be obtained. In this way, the potentials of the power wiring 28a and ㈣ of each frame i are reversed, and at the same time, Periodically, the potential of the counter electrode 15 is reversed, and the polarity inversion driving can be performed when the number of frames is fixed and the still screen is displayed. In addition, the power supply wiring and the reverse direction of the first capacitor element can be shared and supplied to the first capacitor element. Wiring of the power supply circuit 23. The circuit configuration at this time is as follows: -18-

Binding

Line 548625 A7 B7 V. Description of the invention (shown in 16 10 and FIG. 11. FIG. 10 corresponds to FIG. 6 and FIG. 1Ulj corresponds to FIG. 7. FIG. 10 and FIG. 11 are the power supply wiring of the first capacitor element 24 and an auxiliary capacitor line. 29 and the circuit configuration of the power supply wiring 28b. However, the circuit configuration of the shared auxiliary capacitor line 29 and the power supply wiring 28a may be adopted. As shown in FIGS. 10 and u, the power supply of the shared auxiliary capacitor line 29 and the inverter circuit 23 is shared. When wiring 28b (or 28 cores), it is not necessary to individually arrange power wiring on the substrate, which can reduce the number of wirings on the substrate. Therefore, the pixel pitch can be narrower than the traditional method, and the screen can be highly refined. In addition, because The number of wirings is small, which can reduce the short-circuit phenomenon between wirings, and the benefit of increasing the waste rate can be obtained. Second, the manufacturing method of the liquid crystal display device 100 of this embodiment will be described with reference to FIG. 2. FIGS. A schematic cross-sectional view of the manufacturing process of the display device. The right side of the figure is a pixel portion corresponding to the display pixel portion 110, and the left side is a driving circuit portion corresponding to the scanning line driving circuit 120 in FIG. 1. The following is divided into (1 ) To (6) steps to explain the manufacturing process. (1) Formation of polycrystalline stone film (see Figure i 2 A) On a transparent insulating substrate 50 such as glass, a non-crystalline layer with a thickness of 50 nm is deposited by a plasma cvd method. Dream (a_Sl) thin film 51. Then use the Xed EXCIMER LASER device not shown in the figure to calcinate this amorphous stone film 51 to make it polycrystalline. At this time, the aforementioned 乂 6 (: 1 excimer thunder) The laser light 52 emitted by the laser (ExciMER LASER) device is scanned in the direction of arrow a, and the area irradiated by the laser light 52 will be multi-crystallized to form a polycrystalline silicon film. The energy is irradiated multiple times because it can effectively eliminate the hydrogen in the amorphous silicon film and prevent the ablation during crystallization. In addition, the laser irradiation energy is preferably 200 ~ 500mJ / errf. -19- This paper size Applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 548625 A7 B7 V. Description of the invention (2) Patterning (please refer to Figure 12B) J Use the lithography method to implement the pattern of polycrystalline stone film 5 3 To form an active layer 5 4 of a thin film transistor. (J) Formation of a gate electrode (please Refer to figure 丨 2 c) After the gate insulating film 55 is formed by a silicon oxide film by a plasma C VD method, the molybdenum-tungsten alloy film is formed by a spraying method, and then the gate% pole 56 is formed in a pattern structure. In addition, in When the aforementioned pattern is formed, scanning lines are also formed at the same time. In addition, the gate insulating film 55 can also be a silicon nitride film or a silicon oxide film made by the Cv0 method at normal pressure. After the gate electrode 56 is formed, a gate is formed. The electrode 56 is a mask, and impurities are driven in by an ion doping method to form a source / drain region 5 4 a of the thin film transistor. In terms of killing shellfish, scales can be used for N-c h transistors, and rot can be used for p-c h transistors. In the transistor portion of the pixel portion, in order to suppress the leakage current at the time of shutdown, it is very effective to adopt a lightly doped drain (LDD) structure. After the source / drain region 5 4 a is driven into the impurity, the gate electrode D 6 is patterned again, and after taper to a certain degree, the low-concentration impurity is driven again. (4) Formation of a first interlayer insulating film (see FIG. 12D) A first interlayer insulating film 57 is formed on the gate electrode 56 by a plasma C V D method or a normal pressure C V D method with a stone evening oxide film. (5) Formation of source / drain electrodes (see FIG. 1 2E) After forming contact holes in the first interlayer insulating film 57 and the gate insulating film 55, an A1 film is formed by the spray method, and then formed by a pattern In this way, source / dead electrodes 59, 60 are formed. At this time, signal lines are also formed at the same time. -20- This paper size applies to China National Standard (CNS) A4 (210x 297 mm)

Line 548625 A7 B7

(6) Formation of pixel electrode (see FIG. 12F) A low-k dielectric constant insulating film (second interlayer insulating film) 61 is formed on the A1 film as described above. As the low-inductance insulating film 61, a low-inductive insulating film such as a silicon nitride film, a silicon oxide film, and an organic insulating film formed by a plasma CVD method can be used. In addition to the formation of a contact hole, the low-attractivity insulating film 61 also forms a thin film Q, and a pixel electrode is formed in a patterned manner. '' Using the above 6 steps, one of the pixel portion and the driving circuit portion can be formed on the transparent insulating substrate 50. Then, the transparent insulating substrate 50 and the counter substrate forming the counter electrode not shown on the drawing are opposed to each other, and the surroundings are sealed with a sealing material made of epoxy resin, and the liquid crystal composition is injected into the inner 9 portions. After sealing, the LCD device is completed (see Figure 2). In addition, because the electron mobility of ρ-Si (polysilicon) TFT is about 10% higher than that of a_SiTFT, the size of the TFT can be reduced, and the peripheral driving circuit can also be integrated on the substrate at the same time. In terms of this peripheral driving circuit, in order to pursue high speed and low power consumption, it is best to use a (1 ^ 〇8 structure. Therefore, the aforementioned impurity doping process uses a corrosion-resistant mask to divide into two types of impurity doping: P-type and N-type. In the present embodiment, when a light-reflective pixel electrode in which the pixel electrode 13 is composed of a metal thin film is used, the backlight is not required, and it can be driven with a lower power consumption than a transmissive structure using a backlight. At the same time, when the LCD panel with a diagonal of 3 cm and 250,000 pixels is displayed in a still picture with a frame frequency of 60 Hz, the power consumption is only 5 mw. The embodiment of Lishu is described with reference to an example of the liquid crystal display device using the present invention. However, the display layer constituting one of the requirements of the present invention is not limited to liquid-21-this paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 public love) 548625 A7 B7 V. Description of the invention (l9) Crystal layer, also It can be replaced by other material layers. For example, a phosphor light emitting layer can be used as a display layer. At this time, the present invention can also constitute an organic EL (Electro Luminescence) panel. The above is the present invention The description of the related embodiments of the display device and the driving method of the display device, the use of the present invention is not limited to the foregoing embodiment, as long as it can be variously modified without departing from the content thereof. In addition, the foregoing embodiment includes various Various inventions can be obtained as long as the composition of the published elements is moderately combined. For example, even if some of the published constituent elements are deleted, a certain effect can be regarded as an invention. Brief description Fig. 1 is a circuit configuration diagram of a liquid crystal display device related to the embodiment. Fig. 2 is a schematic configuration diagram of Fig. 1. Fig. 3 is a circuit configuration diagram of a display pixel shown in Fig. 1. Fig. 4 is a diagram illustrating the implementation of a still picture. Timing chart of the driving method during display. Figure 5 is a circuit configuration diagram of an embodiment other than the display pixel shown in Figure 3. Figure 6 is a detailed circuit configuration diagram of the display pixel shown in Figure 5. Figure 7 is a capacitor A circuit configuration diagram when components are added to the inverter circuit of Fig. 6. Fig. 8 is a letter explaining another driving method when implementing a still picture display. Waveform timing diagram. Fig. 9 is a timing diagram of signal waveforms illustrating other driving methods when implementing still picture display. -22- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) binding

Line 548625 five A7 B7, invention description (20)

Fig. 10 is a circuit configuration diagram when the power distribution of the auxiliary capacitor wiring and the inverter circuit of Fig. 6 is used for greening. Fig. 11 is a circuit configuration diagram when the auxiliary capacitor wiring of Fig. 7 and the power supply wiring of the inverter circuit are used in combination. ^ FIGS. 12A to 12F are schematic cross-sectional views illustrating a manufacturing process of a liquid crystal display device. [Explanation of element symbols] 10: Display pixel 11: Signal line 12: Scan line 13: Pixel electrode 14: First switching element 15: Counter electrode 16: Liquid crystal layer 17: DM switching circuit 18: DM cell 19: Memory control line 19a: Memory control line 19b: Memory control line 2 1: Second switching element 22: Third switching element 23: Inverter circuit 24: First capacitive element 25: Second capacitive element

Binding

Line-23- This paper size applies Chinese National Standard (CNS) A4 specification (210X 297mm) 548625 A7 B7 Five invention descriptions (21) 26: Input terminal (DM cell) 27 •• Output terminal (DM cell) 28a: power supply wiring 2 8b: power supply wiring 29: auxiliary capacitor line 3 1: second switching element 3 2: third switching element 37: DM switching circuit 50: transparent insulating substrate 5 1: amorphous silicon (a-Si) film 5 2: Laser light 53: Polycrystalline silicon film 54: Active layer 5 4a: Source / inverted area 5 5: Gate insulating film 56: Gate electrode 5 7: First interlayer insulating film 59: Source electrode 60: Drain Electrode electrode 6 1: Low dielectric constant insulating film (second interlayer insulating film) 62: A1 thin film 100: liquid crystal display device 10 1: array substrate 102: counter substrate-24-This paper applies Chinese national standards ( CNS) A4 size (210 X 297 mm)

Binding

Line 548625 A7 B7 Fifth invention description (22) 103: Sealing material 110: Display pixel portion 12 0: Select line drive circuit 12 1: Move register 130: Signal line drive circuit 13 1: Move register 132: Analog switch (ASW) 133: Video Bus

231: P-chTFT

232: N-chTFT 23 3: third capacitive element 234: fourth capacitive element C 1 c: liquid crystal capacitor

Cs: Auxiliary capacitor -25- This paper size applies to China National Standard (CNS) A4 specification (210X 297 mm)

Claims (1)

548625 Patent Application No. 090129299 Chinese Application for Patent Scope Replacement (May 1992) ABC 8 D Application for Patent Scope 1 · A display device characterized by having a first electrode substrate comprising: A plurality of scanning lines and a plurality of signal lines, a pixel electrode is arranged at each intersection of the two types of lines, and a capacitor element connected in parallel with the pixel electrode, and the supply is: At the time, a path is formed between the aforementioned signal line and the aforementioned pixel electrode, and the image data for the signal line is written to the first and second switch of the aforementioned pixel electrode ^ The second electrode substrate includes a pair of counter electrodes at a certain interval with respect to the aforementioned pixel electrode. A counter electrode disposed in a direction; a display layer sandwiched between the aforementioned electrode substrate and the second electrode substrate; a signal line driving circuit for providing image data to the aforementioned plurality of signal lines corresponding to a horizontal scanning period; and, The scanning line driving circuit provides a column selection signal to the scanning lines in sequence during each of the foregoing horizontal scanning periods. The first electrode substrate contains a digital memory cell, which is formed by using an inverter circuit that can store the image data provided by the signal; and a digital memory switch circuit, which controls the pixel electrode and the digital Memorize the pathways between the rooms. 2. The display device according to item 丨 in the scope of patent application, wherein the aforementioned digital memory cell includes an inverter circuit and a second capacitor element paper ruler S a ^ (CNS) A ^ 21QX297 The display device of item 丨, wherein the inverting circuit is composed of a CMOS circuit. For example, the display device of the scope of patent application, wherein the aforementioned pixel electrode is a metal thin film constituting a light reflective display device. The aforementioned digital m-top circuit M is composed of the second switch of the input terminal of the front panel and 70 points of the 7 and 2 switches, and the third switching element connected to the output terminal of the digital tablet storage cell. . For example, the display device in the scope of patent application No. 2, where = the digital memory switch circuit is a second switching element connected to the aforementioned digital memory input terminal and a third switching element connected to the output terminal of the front hidden cell. The second capacitor element is connected between the first gate element and the circuit. J For example, the display device under the scope of patent application No. 5 in which the second switch element and the third switch element are composed of the same conductive type electric control transistor, but are connected to different control k lines. . For example, the display device according to item 5 of the patent application, wherein the second switching element and the third switching element are composed of different conductive i-type electrical control transistors, but are connected to different control signal lines. 2. The display device according to item 3 of the scope of patent application, wherein the third and fourth capacitive elements are connected to the inverter circuit constituting the inverter circuit. Scope of patent application CMOS circuit. 10. The display device according to item 丨 of the scope of patent application, wherein the power supply wiring of the aforementioned digital memory cell, the first capacitor element provides a predetermined voltage power source, and the aforementioned 11 · 如 申 社 直 蜀 梦 阁 # The originalization of the original package and the spring. For example, the display device is called the patent yoke enclosing item, wherein the display layer is a liquid crystal layer. 12.—A driving method of a display device. The display device of item 1 is characterized in that: the first image range of the patent is closed by the digital memory switch circuit mentioned above, and the two-core memory M is cut off, and a certain period of time is required. Said first switching element 'writes an image of male material supplied to the aforementioned signal line to the pixel electrode and performs display, and during the display period', the pixel electrode and the digital memory cell are turned on by the aforementioned digital memory paste circuit. Channel, the second image data supplied to the k-line is stored in the digital memory cell, and the channel between the money line and the pixel electrode is closed by the first switching element, and then stored in the digital memory storage The second image data is written into the aforementioned pixel electrodes and displayed. 13. The driving method of the display device according to item 12 of the scope of patent application, wherein during the first display period, the digital memory switch circuit only opens the path between the second switching element and the pixel electrode. 1 4 · The driving method of the display device according to item 2 of the patent application scope, wherein during the aforementioned second display period, the second switch is turned on every 1 frame -3-This paper ruler CNS) Ai grid Uigx 297 mm) The scope of the patent application claims the element and the third switching element. The aforementioned pixel electrode provides each frame 1 and is composed of: the digital memory cell pair π, and the second element with different polarities. The shadow #times 15 = Shin = closing cycle reverses the potential of the aforementioned counter electrode. The driving method of the display device according to the patent No. 14 of the patent scope, in which the second display period is turned on at a higher time than before, and f # ο called the messenger 3, the path of the switch element is opened as 16: Straight &amp; Passages have longer access times. 2 The driving method of the display device according to item 12 of the patent scope, wherein the closed frame writing bit c during the display period 'uses the aforementioned number of grid cells to open the aforementioned pixel electrode and the aforementioned digital memory storage = 7 for a certain number of frames and will be provided to After the second image data of the aforementioned Xinlin is staggered in the digital memory cell, the path between the No. 5 switch line and the pixel electrode is used to store the second image data in the digital memory cell in the fixed picture j. The second image data is input into the aforementioned pixel electrode and is displayed. 17 'As claimed: The driving method of the display device of the 16th item of the patent scope, wherein during the aforementioned second display period, the number of __ fixed picture frames will have different polarities = 2 image data storage material, the aforementioned digital memory cell, And in accordance with the week and month, the potential of the aforementioned counter electrode is reversed. Among them, it is requested that the driving method of the display device according to item 14 of the patent range provide a DC power supply voltage to the aforementioned digital memory cell. Among them 9: If the method of driving a display device according to item 16 of the scope of patent application, the digital memory cell provides a DC power supply voltage. (Applicable to the method of driving a display device according to item 16 of the patent scope, in which an AC power supply voltage is provided to the aforementioned digital memory cell, and cooperates with the previous -4-297 mm) Scope of patent application: The AC cycle reverses the potential of the aforementioned counter electrode. -5- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm).