JP3251463B2 - メモリ・デバイスおよびその制御動作機能をプログラミングする方法 - Google Patents

メモリ・デバイスおよびその制御動作機能をプログラミングする方法

Info

Publication number
JP3251463B2
JP3251463B2 JP11511695A JP11511695A JP3251463B2 JP 3251463 B2 JP3251463 B2 JP 3251463B2 JP 11511695 A JP11511695 A JP 11511695A JP 11511695 A JP11511695 A JP 11511695A JP 3251463 B2 JP3251463 B2 JP 3251463B2
Authority
JP
Japan
Prior art keywords
signal
programming
control operation
memory device
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11511695A
Other languages
English (en)
Japanese (ja)
Other versions
JPH07296580A (ja
Inventor
ブレット・エル・ウィリアムズ
スコット・イー・シェーファー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/228,051 external-priority patent/US5896551A/en
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of JPH07296580A publication Critical patent/JPH07296580A/ja
Application granted granted Critical
Publication of JP3251463B2 publication Critical patent/JP3251463B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1042—Read-write modes for single port memories, i.e. having either a random port or a serial port using interleaving techniques, i.e. read-write of one part of the memory while preparing another part

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
JP11511695A 1994-04-15 1995-04-17 メモリ・デバイスおよびその制御動作機能をプログラミングする方法 Expired - Fee Related JP3251463B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US22854694A 1994-04-15 1994-04-15
US08/228546 1994-04-15
US08/228,051 US5896551A (en) 1994-04-15 1994-04-15 Initializing and reprogramming circuitry for state independent memory array burst operations control
US08/228051 1994-04-15

Publications (2)

Publication Number Publication Date
JPH07296580A JPH07296580A (ja) 1995-11-10
JP3251463B2 true JP3251463B2 (ja) 2002-01-28

Family

ID=26922009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11511695A Expired - Fee Related JP3251463B2 (ja) 1994-04-15 1995-04-17 メモリ・デバイスおよびその制御動作機能をプログラミングする方法

Country Status (2)

Country Link
JP (1) JP3251463B2 (de)
DE (1) DE19513587B4 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3566429B2 (ja) * 1995-12-19 2004-09-15 株式会社ルネサステクノロジ 同期型半導体記憶装置
JPH09167483A (ja) * 1995-12-19 1997-06-24 Mitsubishi Electric Corp 動作モード設定回路
US6094395A (en) * 1998-03-27 2000-07-25 Infineon Technologies North America Corp. Arrangement for controlling voltage generators in multi-voltage generator chips such as DRAMs
DE102004051958B4 (de) * 2004-10-26 2007-05-10 Infineon Technologies Ag Schaltungsanordnung und Verfahren zum Einstellen von Betriebsparametern in einem RAM-Baustein
DE102004053316A1 (de) * 2004-11-04 2006-05-18 Infineon Technologies Ag Verfahren zur Ein- und Ausgabe von Betriebsparametern eines integrierten Halbleiterspeichers

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3080520B2 (ja) * 1993-09-21 2000-08-28 富士通株式会社 シンクロナスｄｒａｍ

Also Published As

Publication number Publication date
DE19513587A1 (de) 1995-10-19
DE19513587B4 (de) 2007-02-08
JPH07296580A (ja) 1995-11-10

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