JP3246150B2 - Thin film transistor panel - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor panel used for an active matrix liquid crystal display device.

[0002]

2. Description of the Related Art A thin film transistor panel (hereinafter referred to as a TFT panel) used for an active matrix liquid crystal display device has the following structure.

FIG. 5 shows an equivalent circuit diagram of a conventional TFT panel. This TFT panel insulates, on a transparent insulating substrate 1 made of glass or the like, gate lines GL arranged in a plurality of rows and data lines DL arranged in a plurality of rows orthogonal to the gate lines GL. And the gate line GL and the data line DL
At the intersection with the gate line GL
And a thin film transistor (TFT) 2 whose drain electrode is connected to the data line DL is provided. The pixel electrode 7 is provided corresponding to each thin film transistor 2.

The thin film transistor 2 is of, for example, an inverted stagger type. The inverted staggered thin film transistor 2 includes a gate electrode formed on the substrate 1, a gate insulating film formed on the gate electrode,
An i-type semiconductor film formed on the gate insulating film so as to face the gate electrode; an n-type semiconductor film formed on the i-type semiconductor film with a channel region interposed therebetween; It comprises a drain electrode and a source electrode formed on the semiconductor film, and the gate electrode is formed integrally with a gate line GL wired on the substrate 1.

The gate insulating film of the thin film transistor 2 is formed on almost the entire surface of the substrate 1 so as to cover the gate line GL except for the terminal portion GLa, and the pixel electrode 7 is formed on the gate insulating film. One end is connected to the source electrode of the thin film transistor 2.

On the other hand, the data line DL is wired on the gate insulating film or the thin film transistor 2
TF which is wired on an interlayer insulating film formed over the gate insulating film and which forms the data line DL on the gate insulating film.
In the T panel, generally, the data line DL and the drain electrode of the thin film transistor 2 are integrally formed of the same metal film. In the TFT panel in which the data line DL is formed on the interlayer insulating film, a contact hole corresponding to the drain electrode of the thin film transistor 2 is provided in the interlayer insulating film, and the data line DL is connected to the drain electrode in this contact hole. are doing. In FIG. 5, DLa
Is a terminal portion of the data line DL.

[0007]

The above-mentioned TFT
The panel is provided with an alignment film on it, subjected to an alignment treatment by rubbing on the film surface of the alignment film, and then sent to a liquid crystal display element assembling process. Strong static electricity acts on the TFT panel during handling of the TFT panel, etc., between the drain electrode and the gate electrode of the thin film transistor 2 or between the gate line GL and the data line DL
In some cases, dielectric breakdown due to static electricity (hereinafter, referred to as electrostatic breakdown) may occur between them and short-circuit defects may occur.

[0008] This electrostatic destruction is caused by the charge of the static electricity being concentrated on the ends of the gate line GL and the data line DL.
In most cases, it occurs near the end of the gate line GL or data line DL. Then, the production yield is reduced due to the electrostatic breakdown.

The present invention has been made in view of such a point, and an object of the present invention is to provide an electrostatic breakdown between a drain electrode and a gate electrode of a thin film transistor or between a gate line and a data line. It is an object of the present invention to provide a thin film transistor panel which can prevent the occurrence of the problem and improve the yield.

[0010]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a gate line arranged in a plurality of rows on an insulating substrate and a data line arranged in a plurality of rows orthogonal to the gate lines. The gate electrode is connected to the gate line at the intersection of other gate lines except the gate line in the last column and other data lines except the data line in the last column. Provided thin film transistors connected to the data lines, and formed protruding electrodes near the intersections between the gate lines and the data lines on the first and last gate lines, respectively. Protruding electrodes are formed in the vicinity of the intersections between the data lines and the respective gate lines, and The protruding electrode and the protruding electrode of the data line are opposed to each other, and a dummy element on which at least an insulating film and a semiconductor film are deposited is provided between the protruding electrode and the data line, and the two protruding electrodes are brought into contact with the dummy element. is there.

[0011]

In the TFT panel thus constructed, an alignment film is formed thereon, an alignment process is performed on the film surface of the alignment film by rubbing, and then sent to a liquid crystal display element assembling process. During rubbing of the film surface of the alignment film or during handling of the TFT panel, static electricity may act on the TFT panel. The charge due to the static electricity is concentrated on both ends of the gate line and the data line. Here, the charge is applied between both ends of each gate line and the data line crossing this portion, and both ends of each data line and this portion. A dummy element having substantially the same structure as that of the thin film transistor is provided between the gate element and the gate line intersecting with the gate line. Therefore, electrostatic breakdown due to the action of static electricity occurs preferentially in the dummy element. The protruding electrode of the gate line and the protruding electrode of the data line are short-circuited by the dummy element that has caused the electrostatic breakdown, and the gate line and the data line have the same potential due to the short-circuit. Electrostatic breakdown between the drain electrode and the gate electrode of the thin film transistor and between the gate line and the data line is prevented.

Before finally assembling the TFT panel as a liquid crystal display element, the base of the protruding electrode of the gate line and the base of the protruding electrode of the data line connected to the dummy element are cut by a laser repair device or the like. By this disconnection, the short circuit between the gate line and the data line is released, and the gate line and the data line are separated from each other to have a normal configuration.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 shows an equivalent circuit diagram of a TFT panel. This TFT panel has a plurality of gate lines GL arranged in parallel in n columns on a transparent insulating substrate 1 made of glass or the like, and is arranged in parallel in n columns orthogonal to the gate lines GL. And a plurality of data lines DL are insulated from each other, and each gate line GL except the gate line GL of the final n-th column is connected to the final n
A thin film transistor 2 is provided at an intersection of each data line DL except for the data line DL in the column.
The pixel electrodes 7 are provided corresponding to the respective thin film transistors 2. Note that n is an arbitrary integer of 3 or more.

The thin film transistor 2 is, for example, an inverted staggered type. The inverted staggered type thin film transistor 2 has a gate electrode G formed on a substrate 1 and a gate electrode G, as shown in FIGS. Gate insulating film 3 made of SiN (silicon nitride) formed on electrode G
And an i-type semiconductor film 4 of a-Si (amorphous silicon) formed on the gate insulating film 3 so as to face the gate electrode G, and a channel region on the i-type semiconductor film 4. An n-type semiconductor film 5 made of a-Si doped with an n-type impurity and formed between the n-type semiconductor film 5 and a drain electrode D and a source electrode S formed on the n-type semiconductor film 5 are formed. Here, 6 is an i-type semiconductor film 4
Is a blocking insulating film made of SiN formed on the channel region of FIG.
It is provided to prevent the i-type semiconductor film 4 from being damaged at the time of etching for separating the n-type semiconductor film 5 in the channel region.

The gate electrode G of the thin film transistor 2
Are formed integrally with a gate line GL wired on the substrate 1, and this gate line GL is also covered with the gate insulating film 3. The pixel electrode 7 is formed on the gate insulating film (transparent film) 3. The pixel electrode 7 is formed of a transparent conductive film such as ITO, and has a source electrode of the thin film transistor 2 at one edge. Connected to S.

On the other hand, a data line DL connected to the drain electrode D of the thin film transistor 2 is wired on an interlayer insulating film 8 made of SiN formed over the thin film transistor 2, and the data line DL is In the contact hole provided in the film 8, the drain electrode D
It is connected to the. In FIG. 2, the gate insulating film 3 and the interlayer insulating film 8 are omitted. Also DL
a is a terminal portion of the data line DL.

As shown in FIG. 1, among the gate lines GL arranged in n columns, the gate lines GL arranged in the first column and the last n columns are provided with respective data lines DL.
In the vicinity of the intersection with the protruding electrodes, protruding electrodes 11 protruding to the outside thereof are integrally formed. Further, among the data lines DL arranged in n columns, the data lines DL arranged in the first column and the last n columns each protrude outward near the intersection with each gate line GL. Projecting electrode 12 is integrally formed.
The protruding electrode 11 of the gate line GL and the protruding electrode 12 of the data line DL oppose each other, and a dummy element 13 having substantially the same structure as the thin film transistor 2 is provided between the opposing electrodes.

FIG. 4 shows a sectional structure of the dummy element 13. As shown in FIG. The protruding electrode 11 of the gate line GL is covered with the gate insulating film 3. On the gate insulating film 3, an i-type semiconductor film 14 like the thin film transistor 2, and on the i-type semiconductor film 14, an n-type semiconductor film On the n-type semiconductor film 15, a metal film 16 made of the same material as the drain electrode D and the source electrode S of the thin film transistor 2 is deposited, and the protruding electrode 12 of the data line DL contacts the metal film 16. are doing. Since the dummy element 13 has substantially the same deposition structure as the thin film transistor 2, it can be formed simultaneously with the step of forming the thin film transistor 2.

In this embodiment, the protruding electrode 11 of the gate line GL and the protruding electrode 12 of the data line DL are formed on both sides of the intersection of the gate line GL and the data line DL. Alternatively, it may be formed only on one side.

In the TFT panel thus constructed, an alignment film (not shown) is formed thereon, and an alignment process is performed on the film surface of the alignment film by rubbing. Sent.

Here, when rubbing the film surface of the alignment film,
During the handling of the T panel, static electricity may act on the TFT panel. The charges due to the static electricity are concentrated at both ends of the gate lines GL and the data lines DL. However, the charges are generated between both ends of each gate line GL and the data lines DL intersecting this portion, and both ends of each data line DL. A dummy element 13 is provided between the dummy element 13 and the gate line GL intersecting this portion. Therefore, the electrostatic element is preferentially damaged by the action of static electricity. Then, the protruding electrode 11 of the gate line GL and the protruding electrode 12 of the data line DL are short-circuited by the dummy element 13 that has caused the electrostatic breakdown, and the short-circuit causes the gate line GL and the data line DL to have the same potential. Does not act on static electricity, preventing static electricity breakdown between the drain electrode D and the gate electrode G of the thin film transistor 2 and between the gate line GL and the data line DL.

Before finally assembling the TFT panel as a liquid crystal display element, the base of the protruding electrode 11 of the gate line GL connected to the dummy element 13 and the base of the protruding electrode 12 of the data line DL are cut lines shown in FIG. Along the line C, each is cut by a laser repair device. The cutting may be performed on all the dummy elements 13 on the TFT panel, or may be performed only on the dummy element 13 in which the electrostatic breakdown has occurred. And, by this cutting, the gate line GL
The short between the data line DL and the gate line G is released.
L and the data line DL have a normal configuration.

[0024]

As described above, according to the present invention, when the static electricity acts, the dummy element is preferentially broken down to short-circuit the gate line and the data line when the static electricity acts. Electrostatic breakdown between the gate electrode and between the gate line and the data line can be prevented, and the yield can be improved.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of a TFT panel according to one embodiment of the present invention.

FIG. 2 is a plan view showing a main configuration of the TFT panel.

FIG. 3 is a sectional view taken along line AA in FIG. 2;

FIG. 4 is a sectional view taken along the line BB in FIG. 2;

FIG. 5 is an equivalent circuit diagram of a conventional TFT panel.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Thin film transistor 3 ... Gate insulating film 4 ... i-type semiconductor film 5 ... n-type semiconductor film 7 ... Pixel electrode GL ... Gate line DL ... Data line G ... Gate electrode D ... Drain electrode S ... Source electrode 11 ... Projection Electrode 12 ... Projecting electrode 13 ... Dummy element 13 ... Gate insulating film 14 ... i-type semiconductor film 15 ... n-type semiconductor film 16 ... metal film

Claims (1)

(57) [Claims] A gate line arranged in a plurality of rows on an insulating substrate and a data line arranged in a plurality of rows orthogonal to the gate line are insulated from each other and wired. At the intersection of the other gate line except for the data line of the last column and the other data line except for the data line of the last column, a thin film transistor having a gate electrode connected to the gate line and a drain electrode connected to the data line is provided. Protruding electrodes are formed near the intersections between these gate lines and the respective data lines, and the intersections between these data lines and the respective gate lines are formed in the first and last data lines. Protruding electrodes are formed near each other, and the protruding electrodes of the gate line and the protruding electrodes of the data line are opposed to each other. As provided dummy element and at least the insulating film and the semiconductor film is deposited between the opposed, thin film transistor panel, characterized in that the dummy element and the are in contact with both the protruding electrodes.