JP3245219B2 - High frequency multilayer thin film electronic components - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency multilayer thin-film electronic component in which a coil, a capacitor, a resistance element, or a composite element thereof is formed on an insulating substrate by using thin-film technology.

[0002]

2. Description of the Related Art FIG.
Is a conventional example of a high-frequency multilayer thin film electronic component in which a metal thin film pattern and an insulating layer are alternately laminated on an insulating substrate. In this figure, 1 is an insulating substrate, 2A, 2B and 2C are metal thin film patterns, 3A, 3B and 3C are insulating layers, and the metal thin film patterns 2A, 2B and 2C and the insulating layers 3A, 3B and 3C are alternately laminated. Have been.

In the prior art shown in FIG. 12, before the external electrodes 4 are provided by plating or the like, a part of each of the metal thin film patterns 2A, 2B, and 2C and the substrate 1 and the metal thin film pattern 2 are formed.
Since the boundary with A is exposed to the outside, in the process of forming the external electrode 4, moisture may enter the boundary between the substrate 1 and the metal thin film pattern 2A, or the metal thin film patterns 2A, 2B, 2C
May be etched in the step of etching the external electrode 4, which may cause a reduction in reliability.

Further, in the conventional multilayer thin film electronic component, the arrangement of the contact holes for electrically connecting the metal thin film patterns of a plurality of layers has not been devised, so that the problems described below with reference to FIGS. There was also.

FIG. 13 shows that a first metal thin film pattern 11A is formed on an insulating substrate 10 by a thin film technique, and then a contact hole 13A is formed on the first insulating layer 12A by a photolithographic technique.
Is shown. That is, a coating type organic insulating resin such as polyimide is applied, dried and cured to form an insulating layer 12A, a photoresist 14 is further provided to cover the insulating layer 12A other than the contact hole position, and then the insulating layer 12A is wet-etched. The contact hole 13A is formed. FIG. 14 shows the photoresist 14 of FIG.
After the removal, the second-layer metal thin film pattern 11B is formed by thin film technology. In the case of the thin-film technology, the metal thin-film pattern 11B has a uniform thickness, so that the contact hole position is depressed. FIG. 15 shows a state where a second insulating layer 12B is formed on the second metal thin film pattern 11B. In the insulating layer 12B made of a coating type organic insulating resin such as polyimide, the upper surface becomes flat due to its viscosity and surface tension, and the film thickness at the position of the contact hole becomes large.
FIG. 16 shows a step of forming a contact hole 13B in the second insulating layer 12B by photolithography. Even if the diameter of the hole formed in the photoresist 14 in FIG. 16 is the same, if the contact hole 13B is formed so as to leave no etching residue, the insulating layer 12B is isotropically etched. 13B is larger in diameter than the first contact hole 13A.
FIG. 17 shows the formation of the third metal thin film pattern 11C and the insulating layer 12C by repeating such steps, and FIG. 18 shows the formation of the fourth metal thin film pattern 11D and the insulating layer 12D. .

As can be seen from FIGS. 13 to 18, when the position of the contact hole is not devised, the hole diameter of the contact hole increases as the metal thin film pattern and the insulating layer are stacked in multiple layers. In addition to obstructing the miniaturization of the element, the step of the contact hole becomes tighter in the upper layer, the metal conductor is torn, and the conductor volume at the contact hole (coupling part) increases, resulting in a large conductor loss at this part. This degrades the characteristics of the device.

SUMMARY OF THE INVENTION In view of the foregoing, it is an object of the present invention to provide a small and highly reliable high-frequency multilayer thin film electronic component.

[0008]

In order to achieve the above object, a high-frequency multilayer thin-film electronic component according to the present invention comprises an insulating substrate.
An insulating layer is formed on the front and back with a coating type organic insulating film,
The edge layer is a lowermost insulating layer , and a metal thin film pattern is formed on the lowermost insulating layer and a coating type organic insulating film above the lowermost layer that completely covers the plane region of the metal thin film pattern. > stacking a marginal alternately electrical coupling between the metal thin film pattern, in all planar area extending to the external electrodes, the top as completely covered by the upper and lower thin metal film pattern or the external electrodes The configuration is such that the process is performed only in the contact holes formed in the insulating layer above the lower layer .

In the present invention, the contact holes provided in the insulating layer are completely separated from the plane regions of the contact holes provided in the insulating layer one layer above and below the insulating layer, or A configuration in which the position of the contact hole provided in the layer is the same for every other layer of the insulating layer can be adopted.

[0010]

In the high frequency multilayer thin film electronic component of the present invention, the coating is performed so as to completely cover the plane area of the metal thin film pattern.
Insulation layer of mold type organic insulating resin is provided and the contact hole is covered with upper and lower metal thin film patterns or external electrodes to prevent moisture from entering from the boundary between the insulating substrate and the metal thin film pattern or from the contact holes. Thus, reliability can be improved. Further, by devising the arrangement of the contact holes, it is possible to avoid disadvantages such as an increase in the diameter of the contact holes and an increase in stress when the contact holes are provided in the same place over each layer. That is, the contact hole diameter and the step near the contact hole can be reduced, and the stress applied to the metal thin film can be reduced (averaged). In addition, use a coating type organic insulating resin
Since the ground insulating layer is provided,
There is an advantage that a polished substrate can be used. In addition, the base insulating layer
By using a material with a sufficiently low dielectric constant,
And the effect of dielectric constant can be reduced. In addition, the back of the insulating substrate
The base insulating layer is provided with the coating type organic insulating resin
To reduce irregularities on the back surface of the substrate and secure the external electrodes by plating, etc.
Indeed, it can be formed.

[0011]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a high-frequency multilayer thin-film electronic component according to an embodiment of the present invention.

FIGS. 1 and 2 show the first reference which is the basis of the present invention.
This is an example and shows a case where a high-frequency coil is configured.
In these figures, reference numeral 20 denotes an insulating substrate on which a first-layer metal thin film pattern 21A is formed by deposition using a thin film technique such as vapor deposition, sputtering, or ion plating. Then, the first insulating layer (such as SiN) 22A is formed to completely cover the plane area of the metal thin film pattern 21A.
Are similarly formed by thin-film technology. Furthermore, a second metal thin film pattern 21B is formed on the first insulating layer 22A.
Is formed by thin film technology. The second-layer metal thin film pattern 21B is formed by a spiral coil pattern portion 23 electrically coupled to the first-layer metal thin film pattern 21A through a central contact hole 24A formed in the insulating layer 22A.
And an end pattern portion 25 integrally formed at the end portion for connecting an external electrode, and a contact hole 24B near the end portion.
And an end pattern portion 26 for external electrode connection electrically coupled to the first-layer metal thin film pattern 21A via the first layer. The second insulating layer 22B is also formed by a thin film technique so as to completely cover the plane area of the second metal thin film pattern 21B, and is formed through a contact hole 28 formed in the second insulating layer 22B. Metal thin film pattern 21 of layer
External electrodes 27 are formed on both ends of the insulating substrate 20 by plating or the like so as to be electrically coupled to the end pattern portions 25 and 26 of B.

In the case of the first reference example , the plane areas of the metal thin film patterns 21A and 21B are completely covered with the insulating layers 22A and 22B, and the contact holes 24A and 24A formed in the first insulating layer 22A are formed. 24B is completely covered with the upper and lower metal thin film patterns 21A and 21B, and the contact hole 28 of the second insulating layer 22B is completely covered with the metal thin film pattern 21B and the external electrode 27. As a result, intrusion of moisture or the like from the boundary between the insulating substrate 20 and the metal thin film pattern 21A or from each contact hole can be reliably prevented, and reliability can be improved.

FIG. 3 shows a second reference example in which a high-frequency capacitor is formed. In this figure, reference numeral 30 denotes an insulating substrate on which a first-layer metal thin film pattern 31A is formed by deposition, thin-film technology such as evaporation, sputtering, or ion plating. It comprises a capacitor electrode pattern section 32 and a dummy electrode pattern section 33. And metal thin film pattern 3
The first insulating layer so as to completely cover the plane area of 1A
34A (such as SiN) is likewise deposited by thin film technology. Further, a second metal thin film pattern 31B is formed on the first insulating layer 34A by a thin film technique. This 2
The metal thin film pattern 31B of the first layer includes a dummy electrode pattern portion 36 electrically connected to the capacitor electrode pattern portion 32 of the first metal thin film pattern 31A through a contact hole 35A formed in the insulating layer 34A. The capacitor electrode pattern portion 37 is electrically coupled to the dummy electrode pattern portion 33 via the hole 35B. Here, the dummy electrode pattern portions 33 and 36 are provided to prevent the occurrence of a step when the metal thin film pattern and the insulating layer are stacked. Further, the second insulating layer 34B
The second insulating layer 34 is formed by a thin film technique so as to completely cover the plane area of the metal thin film pattern 31B of the second layer.
B, the dummy electrode pattern portion 36 of the second-layer metal thin film pattern 31B through the contact hole 38A opened in B.
Capacitor electrode pattern 3 via contact hole 38B
External electrodes 39 are formed on both ends of the insulating substrate 30 by plating or the like so as to be electrically coupled to the respective electrodes 7.

Also in the case of the second reference example , the plane area of each metal thin film pattern 31A, 31B corresponds to each insulating layer 34A, 34B.
The contact holes 35A and 35B formed in the first insulating layer 34A are completely covered with the metal thin film pattern 31A including the upper and lower dummy portions 33, and the pattern 31B including the dummy portion 36, and The contact holes 38A and 38B of the insulating layer 34B of the layer are formed between the metal thin film pattern 31B including the dummy portion 36 and the external electrode 3B.
9 completely covered. As a result, intrusion of moisture or the like from the boundary between the insulating substrate 30 and the metal thin film pattern 31A or from each contact hole can be reliably prevented, and reliability can be improved.

FIGS. 4 and 5 show a third reference example in which a high-frequency resistor is formed. In these figures,
Reference numeral 40 denotes an insulating substrate, on which a metal thin film pattern 41 having a required resistance is formed by deposition using a thin film technique such as vapor deposition, sputtering, or ion plating. An insulating layer (such as SiN) 42 is similarly formed by thin-film technology so as to completely cover the plane area of the metal thin-film pattern 41. Further, external electrodes 44 are formed on both ends of the insulating substrate 20 by plating or the like so as to be electrically coupled to the ends of the metal thin film pattern 41 via the contact holes 43 formed in the insulating layer 42.

In the case of the third reference example , the planar region of the metal thin film pattern 41 is completely covered with the insulating layer 42, and the contact hole 43 formed in the insulating layer 42 has the lower metal thin film pattern 41 and the upper outer layer. Since it is completely covered with the electrodes, intrusion of moisture or the like from the boundary between the insulating substrate 40 and the metal thin film pattern 41 or from each contact hole 43 can be reliably prevented, and reliability can be improved.

FIG. 6 shows a fourth reference example in which a high-frequency capacitor is formed. In this figure, reference numeral 50 denotes an insulating substrate on which a first-layer metal thin-film pattern 51A is formed by deposition, thin-film technology such as vapor deposition, sputtering, or ion plating. It comprises a capacitance electrode pattern portion 52A and a dummy electrode pattern portion 53A. Then, a first insulating layer (such as SiN) 54A is similarly formed by thin film technology so as to completely cover the plane region of the metal thin film pattern 51A. Further, a second metal thin film pattern 51B is formed on the first insulating layer 54A by thin film technology. The second metal thin film pattern 51B is connected to a dummy electrode pattern portion 53B electrically coupled to the capacitance electrode pattern portion 52A of the first metal thin film pattern 51A through a contact hole 55 formed in the insulating layer 54A. And a capacitor electrode pattern portion 52B electrically coupled to the dummy electrode pattern portion 53A via the contact hole 55. Here, the dummy electrode pattern portions 53A and 53B are provided to prevent the occurrence of a step when the metal thin film pattern and the insulating layer are stacked. Further, the second insulating layer 54B is also formed by a thin film technique so as to completely cover the plane area of the second metal thin film pattern 51B, and a third metal thin film pattern 51C is formed thereon by the thin film technique. Is formed. The third metal thin film pattern 51C is electrically connected to the dummy electrode pattern portion 53B of the second metal thin film pattern 51B through the contact hole 56 formed in the insulating layer 54B.
And a dummy electrode pattern 53C electrically coupled to the capacitor electrode pattern 52B via the contact hole 56.
It consists of Here, the planar positions of the contact holes 55 of the first insulating layer 54A and the contact holes 56 of the second insulating layer 54B are different. This is to avoid an increase in the step between the contact hole and the periphery caused by forming the contact hole at the same position. On the third metal thin film pattern 51C,
The third insulating layer 54 so as to completely cover the plane area.
C is deposited by thin film technology, and the third insulating layer 54C
The external electrodes 58 are plated or the like at both ends of the insulating substrate 50 so as to be electrically coupled to the capacitance electrode pattern portion 52C and the dummy electrode pattern portion 53C of the third metal thin film pattern 51C via the contact holes 57 opened in the third layer. Is formed on the part.

In the case of the fourth reference example , the plane area of each of the metal thin film patterns 51A, 51B, 51C corresponds to each of the insulating layers 54A,
And contact holes 55, 5 formed in the first and second insulating layers 54A, 54B.
6 is completely covered with the upper and lower metal thin film patterns 51A, 51B, 51C, and the contact hole 57 of the third insulating layer 54C is formed by the metal thin film pattern 51C and the external electrode 58.
Completely covered with. As a result, intrusion of moisture or the like from the boundary between the insulating substrate 50 and the metal thin film pattern 51A or from each contact hole can be reliably prevented, and reliability can be improved.
Further, the contact holes 55, 56, 57 provided in the insulating layers 54A, 54B, 54C are completely separated from the plane areas of the contact holes provided in the upper and lower insulating layers, and are located at the same position. When a contact hole is provided, it is possible to avoid a situation in which an excessive step is generated between the contact hole and the periphery, and it is possible to prevent inconveniences such as a breakage of a metal conductor in a contact hole portion and an increase in conductor loss due to an increase in conductor volume. Further, since the positions of the contact holes provided in each of the insulating layers 54A, 54B and 54C are the same (staggered) for every other insulating layer, when the number of stacked metal thin film patterns and insulating layers increases. However, the arrangement space for the contact holes does not increase, and the size does not increase.

FIG. 7 shows a fifth embodiment, in which a high-frequency capacitor is formed. In this drawing, reference numeral 50 denotes an insulating substrate on which a first metal thin film pattern 51A is formed by deposition using a thin film technique such as evaporation, sputtering, or ion plating.
1A includes a capacitance electrode pattern portion 52A and a dummy electrode pattern portion 53A. Then, the first insulating layer 59A made of a coating type organic insulating resin such as a polyimide resin so as to completely cover the plane region of the metal thin film pattern 51A.
Are formed by the photolithographic technique described with reference to FIG. Further, a second metal thin film pattern 51B is formed on the first insulating layer 59A by thin film technology.
The second metal thin film pattern 51B is formed of an insulating layer 59A.
The dummy electrode pattern portion 53B electrically connected to the capacitance electrode pattern portion 52A of the first metal thin film pattern 51A through the contact hole 55 opened, and the dummy electrode pattern portion 53A is electrically connected to the dummy electrode pattern portion 53A through the contact hole 55. And a capacitive electrode pattern portion 52B that is electrically coupled. Here, the dummy electrode pattern portions 53A, 53B
Is provided to prevent the occurrence of a step when the metal thin film pattern and the insulating layer are laminated. Further, a second insulating layer 59B made of a coating type organic insulating resin is also formed by photolithography so as to completely cover the plane area of the second metal thin film pattern 51B, and a third metal thin film pattern is formed thereon. 51C is deposited by thin film technology. This 3
The first-layer metal thin film pattern 51C is connected to a capacitor electrode pattern portion 52C electrically coupled to the dummy electrode pattern portion 53B of the second-layer metal thin film pattern 51B through a contact hole 56 formed in the insulating layer 59B. A dummy electrode pattern portion 53C electrically coupled to the capacitor electrode pattern portion 52B via the hole 56. Here, the planar positions of the contact hole 55 of the first insulating layer 59A and the contact hole 56 of the second insulating layer 59B are different. This is because, when the insulating layer is formed of a coating type organic insulating resin, the contact hole is formed at the same position and the diameter of the contact hole is increased (the process has been described with reference to FIGS. 13 to 18). This is to prevent the step between the hole and the periphery from expanding. On the third metal thin film pattern 51C, a third insulating layer 59C of a coating type organic insulating resin is formed by photolithography so as to completely cover the plane area thereof, and the third insulating layer 59C is formed. The capacitor electrode pattern portion 52C and the dummy electrode pattern portion 53 of the third metal thin film pattern 51C through the contact hole 57 opened
External electrodes 58 are formed on both ends of the insulating substrate 50 by plating or the like so as to be electrically coupled to C.

In the case of the fifth embodiment , in addition to the effects of the above-described fourth embodiment , since each of the insulating layers 59A, 59B, and 59C is formed of a coating type organic insulating resin such as polyimide, step-and-step is performed.
With good coverage, the reliability of the insulating layer can be improved. Further, fine processing of the insulating layer can be easily performed by photolithography. Further, the insulating layers 59A, 59B, 5
Contact holes 55, 56, 57 provided in 9C are
Since it is completely isolated from the plane region of the contact hole provided in the upper and lower insulating layers and is located at the same position (staggered arrangement) every other insulating layer, the contact holes are provided at the same position over all layers. In this case, it is possible to avoid a situation where the diameter of the contact hole is increased or an excessive step is generated between the contact hole and the periphery.

FIG. 8 shows a sixth embodiment, in which a high-frequency capacitor is formed. In this figure, before providing a metal thin film pattern, a base insulating layer 60 as a lowermost layer is formed on an insulating substrate 50 by applying a coating type organic insulating resin such as polyimide on one entire surface thereof, drying and curing. . Thereafter, similarly to FIG. 7, the metal thin film patterns 51A, 51A,
51B, 51C and an insulating layer 59A of a coating type organic insulating resin,
59B and 59C are alternately stacked, and an external electrode 58 is further provided. The base insulating layer 60 is provided for the purpose of forming a smooth surface on a substrate so that a metal thin film pattern can be formed by a thin film technique when the surface of the insulating substrate 50 is rough.

[0023] When the sixth reference example of FIG. 8, the fifth 7
In addition to the effects of the reference example , there is an advantage that an unpolished substrate having a rough surface can be used as the insulating substrate 50.

FIG. 9 is a multilayer thin film electronic device for high frequency wave according to the present invention .
1 shows a first embodiment of a component in which a high-frequency coil is configured. In this figure, 70 is an insulating substrate,
A lowermost insulating layer on the entire surface of one side of the insulating substrate;
The second insulating layer 62A is formed by applying, drying, and curing a coating type organic insulating resin such as polyimide. The insulating layer 81 is also formed on the entire back surface of the insulating substrate 70 by applying a coating type organic insulating resin such as polyimide, drying and curing. Then, the first insulating layer 62
A first metal thin film pattern 61A is formed on A by a thin film technique such as evaporation, sputtering, or ion plating. The metal thin film pattern 61A includes a transverse pattern portion 63 and an end pattern portion 64 separated therefrom. The second insulating layer 62B is similarly formed of a coating type organic insulating resin so as to completely cover the plane area of the metal thin film pattern 61A. Further, a second metal thin film pattern 61B is formed on the second insulating layer 62B by thin film technology. The second metal thin-film pattern 61B includes a spiral coil pattern 66A and an end pattern 67A separated therefrom. The central portion of the spiral coil pattern portion 66A is electrically coupled to the center of the transverse pattern portion 63 of the first-layer metal thin film pattern 61A via a central contact hole 65A formed in the insulating layer 62B, and near the left end. Contact hole 65
Through B, it is electrically coupled to the end pattern portion 64 of the first metal thin film pattern 61A. The end pattern portion 67A of the second metal thin film pattern 61B is electrically coupled to the right end of the transverse pattern portion 63 of the first metal thin film pattern 61A via a contact hole 65C near the right end. The third insulating layer 62C is also formed of a coating type organic insulating resin so as to completely cover the plane area of the second metal thin film pattern 61B. Then, a third metal thin film pattern 61C is formed on the third insulating layer 62C by thin film technology. This third metal thin film pattern 6
1C is the same as the second-layer metal thin film pattern 61B except for the position of the contact hole, and is provided to secure the current capacity of the coil without increasing the loss at high frequencies. The central portion of the spiral coil pattern portion 66B of the third metal thin film pattern 61C is located at the central portion of the spiral coil pattern portion 66A of the second metal thin film pattern 61B via the central contact hole 68A formed in the insulating layer 62C. Is electrically coupled to the spiral coil pattern portion 66.
The left end of B is electrically connected to the left end of the spiral coil pattern portion 66A of the second metal thin film pattern 61B via a contact hole 68B near the left end portion (the two spiral coil pattern portions are located at the central portion). And at the left end are electrically connected in parallel). The end pattern portion 67B of the third metal thin film pattern 61C is electrically coupled to the end pattern portion 67A of the second metal thin film pattern 61B via a contact hole 68C near the right end. Further, a fourth insulating layer 62 made of a coating type organic insulating resin is used.
D is formed so as to completely cover the plane area of the third metal thin film pattern 61C, and the third metal thin film pattern 61C is formed through a contact hole 69A near the left end portion opened in the fourth insulating layer 62D. External electrode 80A connected to the left end of the spiral pattern portion of FIG.
The end pattern portion 6 of the third metal thin film pattern 61C through the contact hole 69B near the right end portion opened
The external electrode 80B connected to the insulating substrate 7B is formed by plating or the like.
0 are formed at both ends.

In the case of the first embodiment of FIG. 9, in addition to the effects of high-frequency coil of the first reference example of FIG. 1 and FIG. 2, since the the spiral pattern section 2 layer, without increasing the high-frequency loss The reliability of the insulation layer can be improved by forming the insulation layer with a coating type organic insulation resin such as polyimide which can increase the current capacity of the coil and has good step coverage. Fine processing of the insulating layer is also easy. Further, the insulating layers 62B, 62C,
Contact holes 65A, 65B provided in 62D,
65C, 68A, 68B, 68C, 69A, 69B,
Since it is completely isolated from the plane region of the contact hole provided in the upper and lower insulating layers and is located at the same position (staggered arrangement) every other insulating layer, the contact holes are provided at the same position over all layers. In this case, it is possible to avoid a situation where the diameter of the contact hole is increased or an excessive step is generated between the contact hole and the periphery. In addition, since the base insulating layer is provided with a coating type organic insulating resin, there is an advantage that an unpolished substrate having a rough surface can be used as the insulating substrate 70. In addition, by using a material having a sufficiently low dielectric constant as the base insulating layer, the influence of the dielectric constant of the insulating substrate 70 can be reduced. Furthermore, since the base insulating layer 81 is also provided on the back surface of the insulating substrate 70 with a coating type organic insulating resin, unevenness on the back surface of the substrate is reduced,
The external electrodes 80A and 80B can be securely formed by plating or the like.

FIG. 10 shows a second embodiment of the present invention, particularly showing an example of the arrangement of contact holes when a high frequency coil is formed. In this figure, 90 is an insulating substrate, 9
Numeral 1 is a metal thin film pattern that becomes a transverse conductor from the center to the end, and 92 is a metal thin film pattern that becomes a spiral coil conductor. In this case, an insulating layer 93 is interposed between the metal thin film patterns 91 and 92, and both metal thin film patterns 91, 92 are provided.
The connection at 92 uses the contact holes at positions P11 and P22, or uses the contact holes at positions P12 and P21. When the metal thin film pattern and the insulating layer are stacked in multiple layers, the contact holes at the positions P11 and P22 and the contact holes at the positions P12 and P21 may be used every other layer. Similarly, the connection between the metal thin film patterns of each layer and the connection between the end pattern portion 94 for connecting the pattern and the external electrode and the external electrode (or the end pattern portion of the upper layer) are also performed at the positions Q11, Q22, and Q13. , Q
, Q28 or the staggered contact holes at positions Q21, Q12, Q23, Q14,..., Q18 may be selected to perform the electrical connection. When multiple layers are stacked, contact holes arranged in a staggered manner at positions Q11, Q22, Q13, Q24,..., Q28 and positions Q21, Q12, Q2
, Q18 may be alternately used.

FIG. 11 shows an end pattern 9 on an insulating substrate 90 provided with a base insulating layer 100 in the second embodiment .
This is an example in which a metal thin film pattern having No. 4 and an insulating layer 93 are laminated in three layers, and finally an external electrode 101 is provided. Since the contact holes 102 are arranged in a staggered manner, it can be seen that even if the insulating layer is a coating type organic insulating resin, there is no inconvenience such as an increase in the diameter of the contact holes.

In each embodiment, the metal thin film pattern provided by the thin film technique is, for example, Cr, Cu, NiCr from the bottom.
In a three-layer structure. In addition, at least two coils, capacitors, and resistors are mounted on the same insulating substrate.
These may be combined to form a composite device.

[0029]

As described above, according to the high-frequency multilayer thin-film electronic component of the present invention, miniaturization and improvement of reliability can be achieved, and furthermore, a multilayer metal thin-film pattern can be electrically connected. By devising the arrangement of the contact holes provided in the insulating layer, it is possible to avoid an increase in the diameter of the contact holes and an increase in steps around the contact holes due to the multi-layer structure. In addition, the base is removed with a coating type organic insulating resin.
Unpolished rough surface as insulating substrate due to the provision of an edge layer
There is an advantage that a substrate can be used. Also, as a base insulating layer
By using a material with a sufficiently low dielectric constant, the dielectric substrate
The influence of the electric power can be reduced. Furthermore, on the back of the insulating substrate
Since the base insulating layer is provided with a coating type organic insulating resin,
Alleviate irregularities on the back surface of the plate and securely cover the external electrodes with plating, etc.
Can be formed.

[Brief description of the drawings]

FIG. 1 is a front sectional view showing a high-frequency coil according to a first reference example which is a basis of the present invention.

FIG. 2 is a plan view of the same.

FIG. 3 is a front sectional view showing a high-frequency capacitor according to a second reference example .

FIG. 4 is a front sectional view showing a high-frequency resistor according to a third reference example .

FIG. 5 is a plan view of the same.

FIG. 6 is a front sectional view showing a high-frequency capacitor according to a fourth reference example ;

FIG. 7 is a front sectional view showing a high-frequency capacitor according to a fifth reference example .

FIG. 8 is a front sectional view showing a high-frequency capacitor according to a sixth reference example of the present invention.

FIG. 9 is a first embodiment of a high-frequency multilayer thin film electronic component of the present invention.
FIG. 3 is a front sectional view showing an example of a high-frequency coil.

FIG. 10 is a plan view showing a contact hole arrangement of a high frequency coil according to a second embodiment of the present invention.

FIG. 11 is an enlarged cross-sectional view showing a case where three layers of a metal thin film pattern having an end pattern portion and an insulating layer are laminated in the second embodiment .

FIG. 12 is an enlarged sectional view showing a conventional high-frequency multilayer thin-film electronic component.

FIG. 13 is a cross-sectional view showing a step of forming a contact hole by photolithography in an insulating layer of a coating type organic insulating resin in a conventional high-frequency multilayer thin-film electronic component.

FIG. 14 shows a conventional high-frequency multilayer thin film electronic component 2
It is sectional drawing in which the metal thin film pattern of the layer was formed.

FIG. 15 shows a conventional high-frequency multilayer thin-film electronic component 2
It is sectional drawing in which the insulating layer of the layer was formed.

FIG. 16 shows a conventional high-frequency multilayer thin film electronic component 2
It is sectional drawing which shows the process of forming a contact hole by photolithography technique in the insulating layer of a layer.

FIG. 17 shows a conventional high-frequency multilayer thin film electronic component 3
It is sectional drawing in which the insulating layer of the layer was formed.

FIG. 18 illustrates a conventional high-frequency multilayer thin film electronic component,
It is sectional drawing in which the insulating layer of the layer was formed.

[Explanation of symbols]

1, 10, 20, 30, 40, 50, 70, 90 insulating substrates 2A, 2B, 2C, 11A, 11B, 11C, 11D,
21A, 21B, 31A, 31B, 41, 51A, 51
B, 51C, 61A, 61B, 61C, 91, 92 Metal thin film patterns 3A, 3B, 3C, 12A, 12B, 12C, 12D,
22A, 22B, 34A, 34B, 42, 54A, 54
B, 54C, 59A, 59B, 59C, 62A, 62
B, 62C, 62D, 93 Insulating layers 4, 27, 39, 44, 58, 80A, 80B, 101
External electrodes 13A, 13B, 24A, 24B, 28, 35A, 35
B, 38A, 38B, 43, 55, 56, 57, 65
A, 65B, 65C, 68A, 68B, 68C, 69
A, 69B, 102 Contact hole

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-59-119796 (JP, A) JP-A-63-76497 (JP, A) JP-A-63-37693 (JP, A) 276655 (JP, A) Japanese Utility Model Showa 57-47020 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01G 4/00-4/10 H01G 4/14-4/40 H01G 13/00-13/06

Claims (4)

(57) [Claims] 1. A coating type organic insulating film is provided on both sides of an insulating substrate.
Form an insulating layer and make one of the insulating layers the lowermost insulating layer,
On the lowermost insulating layer , a metal thin film pattern and a coating layer above the lowermost layer that completely covers the planar region of the metal thin film pattern.
An insulating layer made of a cloth-type organic insulating film is alternately laminated, and the electrical coupling between the metal thin film patterns is completely formed by the upper and lower metal thin film patterns or the external electrodes in all the plane regions reaching the external electrodes. A high-frequency multilayer thin-film electronic component, which is performed only in a contact hole formed in an insulating layer above the lowermost layer so as to be covered. 2. The high-frequency multilayer thin-film electronic component according to claim 1, wherein the metal thin-film pattern has three or more layers. 3. The high-frequency multilayer according to claim 1, wherein the contact holes provided in the insulating layer are completely isolated from the plane regions of the contact holes provided in the insulating layer one layer above and below the insulating layer. Thin film electronic components. 4. The position of a contact hole provided in each insulating layer is the same for every other insulating layer.
The high-frequency multilayer thin film electronic component according to the above.