JPH05343262A - Multilayered thin film electronic component for high frequency - Google Patents

Abstract

PURPOSE:To materialize a small-sized and highly reliable multilayered thin film electronic component for high frequency by providing an insulating layer such that it covers the plane area of a metallic thin film pattern completely, and besides, covering a contact hole with upper and lower metallic thin film pattern or external electrodes. CONSTITUTION:Metallic thin film patterns 21A and 21B and insulating layers 22A and 22B, which completely cover the plane areas of these metallic thin film patterns, are stacked alternately on an insulating substrate 20. And, the electric coupling between each metallic thin film pattern is performed by contact holes 24A and 24B, which are so opened in insulating films as to be completely covered with upper and lower metallic thin films 21A and 21B or an external electrode 27, in all plane regions leading to the external electrode 27. Hereby, downsizing or improvement can be materialized, and further the size up of the contact hole accompanying the progress into multilayer or the enlargement of the step in the vicinity of the contact hole can be avoided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency multi-layer thin film electronic component formed by forming a coil, a capacitor, a resistance element or a composite element thereof on an insulating substrate by using a thin film technique.

[0002]

Prior Art and Problems to be Solved by the Invention FIG.
Is a conventional example of a high-frequency multilayer thin-film electronic component in which metal thin-film patterns and insulating layers are alternately laminated on an insulating substrate. In this figure, 1 is an insulating substrate, 2A, 2B and 2C are metal thin film patterns, 3A, 3B and 3C are insulating layers, and metal thin film patterns 2A, 2B and 2C and insulating layers 3A, 3B and 3C are alternately laminated. Has been done.

In the conventional example of FIG. 12, in a state before the external electrode 4 is provided by plating or the like, a part of each metal thin film pattern 2A, 2B, 2C and the substrate 1 and the metal thin film pattern 2 are formed.
Since the boundary with A is exposed to the outside, moisture may enter the boundary between the substrate 1 and the metal thin film pattern 2A in the process of forming the external electrode 4, or the metal thin film patterns 2A, 2B, 2C.
May be etched in the step of etching the external electrode 4, which may lead to a decrease in reliability.

Further, in the conventional multi-layered thin film electronic component, the arrangement of the contact holes for electrically connecting the metal thin film patterns of a plurality of layers has not been devised, so that there are problems as described in FIGS. 13 to 18 below. There was also.

In FIG. 13, a first metal thin film pattern 11A is formed on the insulating substrate 10 by a thin film technique, and then a contact hole 13A is formed on the first insulating layer 12A by a photolithographic technique.
The process of forming the is shown. That is, a coating type organic insulating resin such as polyimide is applied, dried and cured to form an insulating layer 12A, and a photoresist 14 is further provided to cover the insulating layer 12A other than the contact hole position, and then wet etching is performed to form the insulating layer 12A. The contact hole 13A is formed. FIG. 14 shows the photoresist 14 of FIG.
The second layer of metal thin film pattern 11B has been formed by the thin film technique after the removal. In the case of the thin film technique, the metal thin film pattern 11B has a uniform film thickness, so that a depression is formed at the contact hole position. FIG. 15 shows that the second insulating layer 12B is formed on the second metal thin film pattern 11B. The insulating layer 12B made of a coating type organic insulating resin such as polyimide has a flat upper surface due to its viscosity and surface tension, and the film thickness at the contact hole position becomes large.
FIG. 16 shows a step of forming a contact hole 13B in the second insulating layer 12B by a photolithographic technique. Even if the holes formed in the photoresist 14 in FIG. 16 have the same diameter, if the contact hole 13B is formed so that there is no etching residue, the insulating layer 12B is isotropically etched. The diameter of 13B becomes larger than that of the first contact hole 13A.
FIG. 17 shows the third metal thin film pattern 11C and the insulating layer 12C formed by repeating such steps, and FIG. 18 shows the fourth metal thin film pattern 11D and the insulating layer 12D formed. ..

As can be seen from FIGS. 13 to 18, when the position of the contact hole is not devised, the hole diameter of the contact hole increases as the metal thin film pattern and the insulating layer are laminated in multiple layers. In addition to hindering the miniaturization of the device, the contact holes in the upper layer become tighter and the metal conductor ruptures, and the conductor volume in the contact hole part (coupling part) increases, resulting in a large conductor loss in this part. However, the characteristics of the element are deteriorated.

In view of the above points, it is an object of the present invention to provide a small-sized and highly reliable multilayer thin-film electronic component for high frequencies.

[0008]

In order to achieve the above object, a high frequency multilayer thin film electronic component of the present invention comprises an insulating layer which completely covers a metal thin film pattern and a plane area of the metal thin film pattern on an insulating substrate. Are alternately laminated, and the electrical coupling between the respective metal thin film patterns is provided in the insulating layer so as to be completely covered by the upper and lower metal thin film patterns or the outer electrodes in all planar regions reaching the outer electrodes. It is configured to be performed only in the contact hole provided.

In the present invention, the contact hole provided in the insulating layer is completely isolated from the plane area of the contact hole provided in the insulating layer one layer above and below the insulating layer, or each insulating layer is formed. It is possible to adopt a configuration in which the positions of the contact holes provided in the layers are the same every other insulating layer.

[0010]

In the high-frequency multi-layer thin-film electronic component of the present invention, the insulating layer is provided so as to completely cover the planar area of the metal thin-film pattern, and the contact holes are covered with the upper and lower metal thin-film patterns or external electrodes. It is possible to prevent intrusion of moisture or the like from the boundary between the insulating substrate and the metal thin film pattern or the contact hole, and improve the reliability. Also, by devising the arrangement of contact holes,
It is possible to avoid inconveniences such as an increase in the diameter of the contact hole and an increase in stress when the contact hole is provided at the same location over each layer. That is, the diameter of the contact hole and the level difference near the contact hole can be reduced, and the stress applied to the metal thin film can be relieved (averaged).

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a high frequency multilayer thin film electronic component according to the present invention will be described below with reference to the drawings.

1 and 2 show a first embodiment of the present invention in which a high frequency coil is constructed. In these drawings, reference numeral 20 denotes an insulating substrate, and a first layer of metal thin film pattern 21A is formed on the insulating substrate by a thin film technique such as vapor deposition, sputtering or ion plating. Then, the first insulating layer (SiN or the like) 22A is similarly formed by the thin film technique so as to completely cover the plane area of the metal thin film pattern 21A. Further, the second metal thin film pattern 21B is formed on the first insulating layer 22A by a thin film technique. This second-layer metal thin film pattern 21
B is a spiral coil pattern portion 23 electrically coupled to the first-layer metal thin film pattern 21A through a central contact hole 24A formed in the insulating layer 22A, and an external electrode integrally formed at this end portion. 1 through the end pattern portion 25 for connection and the contact hole 24B near the end
It is composed of an end pattern portion 26 for connecting an external electrode which is electrically coupled to the metal thin film pattern 21A of the layer. Two
The second insulating layer 22B is also the second metal thin film pattern 21B.
Of the metal thin film pattern 21B of the second layer through the contact hole 28 formed in the insulating layer 22B of the second layer via the contact hole 28 formed in the second insulating layer 22B of the second layer. External electrodes 27 are formed on both ends of the insulating substrate 20 by plating or the like so as to be electrically coupled.

In the case of the first embodiment, the planar regions of the metal thin film patterns 21A and 21B are completely covered with the insulating layers 22A and 22B, and the contact holes 24A and the contact holes 24A formed in the first insulating layer 22A. 24B is completely covered with the upper and lower metal thin film patterns 21A and 21B, and the contact hole 28 of the second insulating layer 22B is completely covered with the metal thin film pattern 21B and the external electrode 27. As a result, it is possible to reliably prevent the intrusion of moisture or the like from the boundary between the insulating substrate 20 and the metal thin film pattern 21A or each contact hole, and the reliability can be improved.

FIG. 3 shows a second embodiment of the present invention in which a high frequency capacitor is constructed. In this figure, reference numeral 30 designates an insulating substrate, on which a first-layer metal thin film pattern 31A is deposited by a thin film technique such as vapor deposition, sputtering or ion plating. The capacitor electrode pattern portion 32 and the dummy electrode pattern portion 33 are included. Then, a first insulating layer (SiN or the like) 34A is similarly formed by the thin film technique so as to completely cover the plane area of the metal thin film pattern 31A. Further, the second metal thin film pattern 31B is formed on the first insulating layer 34A by a thin film technique. The second metal thin film pattern 31B is used as the insulating layer 3
Capacitor electrode pattern part 32 of first layer metal thin film pattern 31A through contact hole 35A formed in 4A
To the dummy electrode pattern portion 33 electrically connected to the dummy electrode pattern portion 33 through the contact hole 35B.
And a capacitive electrode pattern portion 37 electrically coupled to the. Here, the dummy electrode pattern portions 33 and 36 are provided to prevent the occurrence of a step when the metal thin film pattern and the insulating layer are laminated. Further, the second insulating layer 34B is also formed by the thin film technique so as to completely cover the plane area of the second metal thin film pattern 31B, and the contact hole 38A formed in the second insulating layer 34B is formed. External electrodes 39 are formed on both ends of the insulating substrate 30 by plating or the like so as to be electrically coupled to the dummy electrode pattern portion 36 of the second-layer metal thin film pattern 31B and the capacitor electrode pattern portion 37 through the contact holes 38B. Deposition is formed.

Also in the case of the second embodiment, the plane regions of the metal thin film patterns 31A and 31B are formed on the insulating layers 34A and 34B, respectively.
And the contact holes 35A and 35B formed in the first insulating layer 34A are completely covered with the metal thin film pattern 31A including the upper and lower dummy portions 33 and the pattern 31B including the dummy portion 36, and 2 The contact holes 38A and 38B of the insulating layer 34B of the second layer are the metal thin film pattern 31B including the dummy portion 36 and the external electrode 3.
Completely covered with 9. As a result, it is possible to reliably prevent intrusion of moisture or the like from the boundary between the insulating substrate 30 and the metal thin film pattern 31A or each contact hole, and it is possible to improve reliability.

FIGS. 4 and 5 show a third embodiment of the present invention in which a high frequency resistor is constructed. In these figures, 40 is an insulating substrate, on which a metal thin film pattern 41 having a required resistance is deposited, sputtered,
It is formed by thin film technology such as ion plating. Then, an insulating layer (SiN or the like) 42 is similarly deposited by the thin film technique so as to completely cover the plane area of the metal thin film pattern 41. Further, external electrodes 44 are formed on both ends of the insulating substrate 20 by plating or the like so as to be electrically coupled to the ends of the metal thin film pattern 41 through the contact holes 43 formed in the insulating layer 42.

In the case of the third embodiment, the plane area of the metal thin film pattern 41 is completely covered with the insulating layer 42, and the contact hole 43 formed in the insulating layer 42 has the lower metal thin film pattern 41 and the outer portion of the upper layer. Since it is completely covered with the electrodes, it is possible to reliably prevent intrusion of moisture or the like from the boundary between the insulating substrate 40 and the metal thin film pattern 41 or each contact hole 43, and the reliability can be improved.

FIG. 6 shows a fourth embodiment of the present invention in which a high frequency capacitor is constructed. In this figure, reference numeral 50 designates an insulating substrate, and a first-layer metal thin film pattern 51A is formed on the insulating substrate by a thin film technique such as vapor deposition, sputtering or ion plating. It is composed of a capacitive electrode pattern portion 52A and a dummy electrode pattern portion 53A. Then, 1 so as to completely cover the plane area of the metal thin film pattern 51A.
An insulating layer (SiN or the like) 54A of the second layer is similarly deposited by the thin film technique. Further, the second metal thin film pattern 51B is formed on the first insulating layer 54A by a thin film technique. The second metal thin film pattern 51B is formed through the contact hole 55 formed in the insulating layer 54A.
The capacitive electrode pattern portion 5 of the metal thin film pattern 51A of the second layer
Dummy electrode pattern portion 53B electrically coupled to 2A
And a capacitive electrode pattern portion 52B electrically coupled to the dummy electrode pattern portion 53A through the contact hole 55.
It consists of Here, the dummy electrode pattern portion 53
A and 53B are provided to prevent the occurrence of a step when the metal thin film pattern and the insulating layer are laminated. further,
The second insulating layer 54B is also the second metal thin film pattern 51.
A thin film technique is applied to completely cover the plane area of B, and a third metal thin film pattern 51C is deposited thereon by the thin film technique. The third-layer metal thin film pattern 51C is connected to the capacitive electrode pattern portion 52C electrically coupled to the dummy electrode pattern portion 53B of the second-layer metal thin film pattern 51B through the contact hole 56 formed in the insulating layer 54B. , A dummy electrode pattern portion 53C electrically coupled to the capacitive electrode pattern portion 52B through the contact hole 56. Here, the contact hole 55 of the first insulating layer 54A and the second insulating layer 54A
The plane positions of the B contact holes 56 are different.
This is to prevent the step difference between the contact hole and the periphery caused by forming the contact hole at the same position from being enlarged. The third layer metal thin film pattern 5
A third insulating layer 54C is formed on the 1C by a thin film technique so as to completely cover the planar region, and the third insulating layer 54C is formed through a contact hole 57 formed in the third insulating layer 54C. The external electrode 58 is formed by plating or the like so as to be electrically coupled to the capacitive electrode pattern portion 52C and the dummy electrode pattern portion 53C of the metal thin film pattern 51C.
It is adhered to both end portions of 0.

In the case of the fourth embodiment, the plane areas of the metal thin film patterns 51A, 51B and 51C are the insulating layers 54A and 54A.
54B and 54C are completely covered, and contact holes 55 and 5 are formed in the first and second insulating layers 54A and 54B.
6 is completely covered with the upper and lower metal thin film patterns 51A, 51B and 51C, and the contact hole 57 of the third insulating layer 54C is formed with the metal thin film pattern 51C and the external electrode 58.
Completely covered with. As a result, it is possible to reliably prevent the intrusion of moisture or the like from the boundary between the insulating substrate 50 and the metal thin film pattern 51A or each contact hole, and the reliability can be improved.
Further, the contact holes 55, 56, 57 provided in the insulating layers 54A, 54B, 54C are completely separated from the plane regions of the contact holes provided in the insulating layers one layer above and below, and are located at the same position. When a contact hole is provided, it is possible to avoid a situation in which an excessive step is generated between the contact hole and the periphery, and it is possible to prevent inconveniences such as rupture of the metal conductor in the contact hole portion and increase in conductor loss due to increase in conductor volume. Further, since the positions of the contact holes provided in each of the insulating layers 54A, 54B, 54C are the same (staggered arrangement) every other insulating layer, when the number of stacked metal thin film patterns and insulating layers is increased. However, the space for disposing the contact hole does not increase, and the size of the shape does not increase.

FIG. 7 shows a fifth embodiment of the present invention and shows a case where a high frequency capacitor is constructed. In this figure,
Reference numeral 50 denotes an insulating substrate, on which a first-layer metal thin film pattern 51A is deposited and formed by a thin film technique such as vapor deposition, sputtering, or ion plating. The metal thin film pattern 51A is a capacitive electrode pattern portion. 52A and a dummy electrode pattern portion 53A. Then, a first insulating layer 59A made of a coating type organic insulating resin such as a polyimide resin is formed by the photolithographic technique described with reference to FIG. 13 and so on so as to completely cover the plane area of the metal thin film pattern 51A. Further, the second-layer metal thin film pattern 51B is deposited and formed on the first insulating layer 59A by a thin film technique. The metal thin film pattern 51B of the second layer is 1 through the contact hole 55 formed in the insulating layer 59A.
The capacitive electrode pattern portion 5 of the metal thin film pattern 51A of the second layer
Dummy electrode pattern portion 53B electrically coupled to 2A
And a capacitive electrode pattern portion 52B electrically coupled to the dummy electrode pattern portion 53A through the contact hole 55.
It consists of Here, the dummy electrode pattern portion 53
A and 53B are provided to prevent the occurrence of a step when the metal thin film pattern and the insulating layer are laminated. further,
The second insulating layer 59B made of a coating type organic insulating resin is also 2
The metal thin film pattern 51B of the third layer is formed by the photolithographic technique so as to completely cover the plane area, and the metal thin film pattern 51C of the third layer is formed thereon by the thin film technique. The third metal thin film pattern 51C is the insulating layer 5
The dummy electrode pattern portion 53 of the second metal thin film pattern 51B is formed through the contact hole 56 formed in 9B.
The capacitive electrode pattern portion 52C electrically coupled to B and the capacitive electrode pattern portion 52B through the contact hole 56.
And a dummy electrode pattern portion 53C electrically coupled to. Here, the planar positions of the contact holes 55 of the first insulating layer 59A and the contact holes 56 of the second insulating layer 59B are different. This is because when the insulating layer is formed of a coating type organic insulating resin, the contact hole is formed at the same position, so that the diameter of the contact hole is increased (the process is described in FIGS. 13 to 18) and the contact is made. This is to prevent the step difference between the hole and the periphery from expanding. The third layer metal thin film pattern 51
A third insulating layer 59C of a coating type organic insulating resin is formed on C by photolithographic technique so as to completely cover the plane area, and a contact hole 57 is formed in the third insulating layer 59C. 3rd layer metal thin film pattern 5
External electrodes 58 are formed on both ends of the insulating substrate 50 by plating or the like so as to be electrically coupled to the capacitive electrode pattern portion 52C and the dummy electrode pattern portion 53C of 1C.

In the case of the fifth embodiment, in addition to the effects of the above-mentioned fourth embodiment, the insulating layers 59A, 59B, 59C are formed of a coating type organic insulating resin such as polyimide.
The coverage can be improved and the reliability of the insulating layer can be improved. In addition, the photolithographic technique facilitates fine processing of the insulating layer. Further, the insulating layers 59A, 59B, 5
The contact holes 55, 56, 57 provided in 9C are
The contact holes are completely isolated from the plane areas of the contact holes provided in the upper and lower insulating layers, and are located at the same position (staggered arrangement) every other insulating layer. In this case, it is possible to avoid the situation where the diameter of the contact hole is increased or an excessive step is generated between the contact hole and the periphery.

FIG. 8 shows a sixth embodiment of the present invention in which a high frequency capacitor is constructed. In this figure,
Before providing the metal thin film pattern, a base insulating layer 60, which is the lowermost layer, is formed on the insulating substrate 50 by applying a coating type organic insulating resin such as polyimide, drying and curing on one side. Thereafter, similar to FIG. 7, the metal thin film patterns 51A, 51B and 51C and the insulating layers 59A, 59B and 59C of the coating type organic insulating resin are alternately laminated, and the external electrode 58 is further provided. The base insulating layer 60 is the insulating substrate 50.
It is provided for the purpose of forming a smooth surface on a substrate so that a metal thin film pattern can be formed by a thin film technique when the surface is rough.

In the case of the sixth embodiment of FIG. 8, the fifth embodiment of FIG.
In addition to the effects of the embodiment, there is an advantage that an unpolished substrate having a rough surface can be used as the insulating substrate 50.

FIG. 9 shows a seventh embodiment of the present invention in which a high frequency coil is constructed. In this figure, 7
Reference numeral 0 denotes an insulating substrate, and the first insulating layer 62A, which serves as the lowermost underlying insulating layer, is formed on the entire one surface of the insulating substrate by applying a coating type organic insulating resin such as polyimide, drying, and curing. ing. An insulating layer 81 is also formed on the entire back surface of the insulating substrate 70 by applying a coating type organic insulating resin such as polyimide, drying and curing. And
The first metal thin film pattern 61A is formed on the first insulating layer 62A by a thin film technique such as vapor deposition, sputtering or ion plating. The metal thin film pattern 61A includes a transverse pattern portion 63 and an end pattern portion 64 separated from the transverse pattern portion 63. Then, a second insulating layer 62B is similarly formed of a coating type organic insulating resin so as to completely cover the plane area of the metal thin film pattern 61A. Further, the second metal thin film pattern 61B is formed on the second insulating layer 62B by a thin film technique. This 2
The metal thin film pattern 61B of the layer is composed of a spiral coil pattern portion 66A and an end pattern portion 67A separated from the spiral coil pattern portion 66A. The central portion of the spiral coil pattern portion 66A is electrically coupled to the center of the transverse pattern portion 63 of the first metal thin film pattern 61A through a central contact hole 65A formed in the insulating layer 62B, and is located near the left end portion. It is electrically coupled to the end pattern portion 64 of the first metal thin film pattern 61A through the contact hole 65B. The end pattern portion 67A of the second-layer metal thin film pattern 61B is provided with the transverse pattern portion 6 of the first-layer metal thin film pattern 61A through the contact hole 65C near the right end.
3 It is electrically connected to the right end. Third insulating layer 62C
Is also formed of a coating type organic insulating resin so as to completely cover the plane area of the second-layer metal thin film pattern 61B. Then, a metal thin film pattern 61C of the third layer is deposited and formed on the third insulating layer 62C by a thin film technique. The third-layer metal thin-film pattern 61C is the same as the second-layer metal thin-film pattern 61B except for the position of the contact hole, and is provided to secure the current capacity of the coil without increasing the loss at high frequencies. ing. The central portion of the spiral coil pattern portion 66B of the third layer metal thin film pattern 61C has a central contact hole 68 formed in the insulating layer 62C.
It is electrically coupled to the central portion of the spiral coil pattern portion 66A of the second metal thin film pattern 61B via A, and the left end portion of the spiral coil pattern portion 66B is the second layer through a contact hole 68B near the left end portion. Is electrically coupled to the left end portion of the spiral coil pattern portion 66A of the metal thin film pattern 61B (two spiral coil pattern portions are electrically connected in parallel at two points, the central portion and the left end portion). The end pattern portion 67B of the third-layer metal thin film pattern 61C is connected to the end pattern portion 6 of the second-layer metal thin film pattern 61B through the contact hole 68C near the right end.
It is electrically coupled to 7A. Further, a fourth insulating layer 62D is formed of a coating type organic insulating resin so as to completely cover the plane area of the third metal thin film pattern 61C.
The metal thin film pattern 61C of the third layer is formed through the contact hole 69A near the left end formed in the insulating layer 62D of the third layer.
External electrode 80A connected to the left end of the spiral pattern portion of
And the external electrode 80 connected to the end pattern portion 67B of the third metal thin film pattern 61C through the contact hole 69B formed in the fourth insulating layer 62D near the right end.
B is deposited on both ends of the insulating substrate 70 by plating or the like.

In the case of the seventh embodiment of FIG. 9, in addition to the effect of the high frequency coil of the first embodiment of FIGS. 1 and 2, the spiral pattern portion has two layers, so that high frequency loss is not increased. By increasing the current capacity of the coil and forming the insulating layer with a coating type organic insulating resin such as polyimide, which has good step coverage, the reliability of the insulating layer can be improved. Fine processing of the insulating layer is also easy. Further, the insulating layers 62B, 62C,
62D, contact holes 65A, 65B,
65C, 68A, 68B, 68C, 69A, 69B
The contact holes are completely isolated from the plane areas of the contact holes provided in the upper and lower insulating layers, and are located at the same position (staggered arrangement) every other insulating layer. In this case, it is possible to avoid the situation where the diameter of the contact hole is increased or an excessive step is generated between the contact hole and the periphery. In addition, since the base insulating layer is formed of the coating type organic insulating resin, there is an advantage that an unpolished substrate having a rough surface can be used as the insulating substrate 70. Also, by using a base insulating layer having a sufficiently low dielectric constant, the influence of the dielectric constant of the insulating substrate 70 can be reduced. Further, since the base insulating layer 81 is also provided on the back surface of the insulating substrate 70 with the coating type organic insulating resin, unevenness on the back surface of the substrate is reduced,
The external electrodes 80A and 80B can be surely deposited by plating or the like.

FIG. 10 shows an eighth embodiment of the present invention, showing an example of the arrangement of contact holes particularly when a high frequency coil is constructed. In this figure, 90 is an insulating substrate, 9
Reference numeral 1 is a metal thin film pattern that serves as a transverse conductor from the center to the end portion, and 92 is a metal thin film pattern that serves as a spiral coil conductor. In this case, the insulating layer 93 is interposed between the metal thin film patterns 91 and 92, and the metal thin film patterns 91,
The connection at 92 uses the contact holes at positions P11 and P22, or the contact holes at positions P12 and P21. When the metal thin film pattern and the insulating layer are laminated in multiple layers, the contact holes at the positions P11 and P22 and the contact holes at the positions P12 and P21 may be selectively used every other layer. Similarly, the connection between the metal thin film patterns of each layer and the connection between the end pattern portion 94 for connecting the pattern and the external electrode and the external electrode (or the end pattern portion of the upper layer) are also at positions Q11, Q22, Q13. , Q
24, ..., Q28 in the staggered arrangement of contact holes or the positions of Q21, Q12, Q23, Q14, ..., Q18 in the staggered arrangement of contact holes may be selected for electrical connection. In the case of stacking in multiple layers, contact holes arranged in a zigzag pattern at positions Q11, Q22, Q13, Q24, ..., Q28 and positions Q21, Q12, Q2.
The contact holes in the staggered arrangement of 3, Q14, ..., Q18 may be used alternately.

FIG. 11 shows a metal thin film having an end pattern portion 94 on an insulating substrate 90 in which a base insulating layer 100 is provided on the upper surface and a base insulating layer 95 is provided on the lower surface by a coating type organic insulating film in the eighth embodiment. This is an example in which the pattern and the insulating layer 93 are laminated in three layers, and the external electrode 101 is finally provided. Since the contact holes 102 are arranged in a staggered manner, it can be seen that even if the insulating layer is a coating type organic insulating resin, there is no inconvenience such as an increase in diameter of the contact holes.

The metal thin film pattern provided by the thin film technique in each embodiment is, for example, Cr, Cu, NiCr from the bottom.
It may have a three-layer structure in which the layers are laminated in this order. In addition, at least two of coils, capacitors, and resistors are provided on the same insulating substrate.
A composite element may be configured by combining the two.

[0029]

As described above, according to the high frequency multi-layered thin film electronic component of the present invention, it is possible to reduce the size and improve the reliability and to electrically connect the multi-layered metal thin film patterns. By devising the arrangement of the contact holes provided in the insulating layer, it is possible to avoid increasing the diameter of the contact holes and expanding the step around the contact holes due to the multilayer structure.

[Brief description of drawings]

FIG. 1 is a first example of a high-frequency multilayer thin-film electronic component according to the present invention.
FIG. 3 is a front cross-sectional view showing a high frequency coil according to an embodiment.

FIG. 2 is a plan view of the same.

FIG. 3 is a front sectional view showing a high frequency capacitor according to a second embodiment of the present invention.

FIG. 4 is a front sectional view showing a high frequency resistor according to a third embodiment of the present invention.

FIG. 5 is a plan view of the same.

FIG. 6 is a front sectional view showing a high frequency capacitor according to a fourth embodiment of the present invention.

FIG. 7 is a front sectional view showing a high frequency capacitor according to a fifth embodiment of the present invention.

FIG. 8 is a front sectional view showing a high frequency capacitor according to a sixth embodiment of the present invention.

FIG. 9 is a front sectional view showing a high frequency coil according to a seventh embodiment of the present invention.

FIG. 10 is a plan view showing an arrangement of contact holes of a high frequency coil according to an eighth embodiment of the present invention.

FIG. 11 is an enlarged cross-sectional view showing a case where three layers of a metal thin film pattern having an end pattern portion and an insulating layer are laminated in the eighth embodiment.

FIG. 12 is an enlarged cross-sectional view showing a conventional high frequency multilayer thin film electronic component.

FIG. 13 is a cross-sectional view showing a step of forming a contact hole in an insulating layer of a coating type organic insulating resin by a photolithographic technique in a conventional high frequency multilayer thin film electronic component.

FIG. 14 shows a conventional multi-layer thin-film electronic component for high frequencies
FIG. 6 is a cross-sectional view of a case where a metal thin film pattern of a layer is formed.

FIG. 15 shows a conventional multi-layer thin-film electronic component for high frequency, which is 2
FIG. 6 is a cross-sectional view of a case where a second insulating layer is formed.

FIG. 16 shows a conventional multi-layer thin-film electronic component for high frequencies, which is 2
It is sectional drawing which shows the process of forming a contact hole in the insulating layer of the layer by the photolithographic technique.

FIG. 17 shows a conventional multi-layer thin-film electronic component for high frequencies, which is 3
FIG. 6 is a cross-sectional view of a case where a second insulating layer is formed.

FIG. 18 shows a conventional multi-layer thin-film electronic component for high frequencies
FIG. 6 is a cross-sectional view of a case where a second insulating layer is formed.

[Explanation of symbols]

1, 10, 20, 30, 40, 50, 70, 90 Insulating substrates 2A, 2B, 2C, 11A, 11B, 11C, 11D,
21A, 21B, 31A, 31B, 41, 51A, 51
B, 51C, 61A, 61B, 61C, 91, 92 Metal thin film patterns 3A, 3B, 3C, 12A, 12B, 12C, 12D,
22A, 22B, 34A, 34B, 42, 54A, 54
B, 54C, 59A, 59B, 59C, 62A, 62
B, 62C, 62D, 93 Insulating layer 4, 27, 39, 44, 58, 80A, 80B, 101
External electrodes 13A, 13B, 24A, 24B, 28, 35A, 35
B, 38A, 38B, 43, 55, 56, 57, 65
A, 65B, 65C, 68A, 68B, 68C, 69
A, 69B, 102 contact hole

Claims (7)

[Claims] 1. A metal thin film pattern and an insulating layer which completely covers the plane area of the metal thin film pattern are alternately laminated on an insulating substrate, and the electrical coupling between the metal thin film patterns reaches all external electrodes. The high-frequency multilayer thin-film electronic component, which is carried out only in the contact region formed in the insulating layer so as to be completely covered by the upper and lower metal thin film patterns or the external electrodes in the plane area. 2. The high frequency multilayer thin film electronic component according to claim 1, wherein the metal thin film pattern has three or more layers. 3. The multilayer high frequency thin film electronic component according to claim 1, wherein a lowermost insulating layer is formed on the insulating substrate, and a lowermost metal thin film pattern is formed on the lowermost insulating layer. 4. The high frequency multi-layer according to claim 1, wherein the contact hole provided in the insulating layer is completely isolated from the plane area of the contact hole provided in the insulating layer one layer above and below the insulating layer. Thin film electronic components. 5. The position of the contact hole provided in each insulating layer is the same every other insulating layer.
The multilayer thin-film electronic component for high frequency described. 6. The high-frequency multilayer thin-film electronic component according to claim 1, wherein each insulating layer is a coating type organic insulating film. 7. The high-frequency multilayer thin-film electronic component according to claim 1, wherein an insulating layer is formed of a coating type organic insulating film on the back surface of the insulating substrate.