JP3214021B2 - Current limit circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current limiting circuit, and more particularly to a current limiting circuit for limiting a current in a circuit for controlling an output voltage by a control transistor.

[0002]

2. Description of the Related Art FIG. 6 shows a circuit diagram of an example of the prior art.
FIG. 1 shows a constant voltage circuit, in which 1 indicates a DC power supply.

[0003] DC power supply 1 is connected to the load R _L through a PNP transistor to Q ₁ for output voltage control.

[0004] Reference numeral 2 denotes a voltage detection circuit, and a current source CC.₁, Tse
Knob diode D_Z, Resistance R₁, R _Two, Operational amplifier
A₁, NPN transistor Q_FourConsisting of

The operational amplifier A ₁ constitutes a differential amplifier circuit. A voltage obtained by dividing an output voltage by resistors R ₁ and R ₂ is input to a non-inverting input terminal, and a constant current source CC ₁ is input to an inverting input terminal. And a reference voltage V _S1 generated by the Zener diode D _Z.

The operational amplifier A ₁ outputs a detection signal corresponding to a difference between a reference voltage and a detection voltage corresponding to an output voltage, and outputs an NPN signal.
It is supplied to the base of the transistor Q _4.

The emitter of the NPN transistor Q ₄ is PN.
Is connected to the base of PNP transistor Q ₂ to which controls the base current of the P transistor Q _1.

[0008] The emitter of the PNP transistor Q ₂ is PN
It is connected to the base of the P transistor Q _1. PNP transistor Q ₁ is controlled by the emitter current of the PNP transistor Q _2.

Reference numeral 3 denotes a current limiting circuit. Current limiting circuit 3
Is a constant voltage source 3a and an operational amplifier A constituting a comparator
₂ , an NPN transistor Q ₅ and a constant current source CC ₂ .

[0010] The inverting input terminal of the operational amplifier A ₂ is supplied a reference voltage V _S2 from the constant voltage source 3a, the non-inverting input terminal and the output voltage V _out is input.

Operational amplifier A_TwoConstitutes a comparator
Output voltage V_outIs the reference voltage V _S2Greater than and high
Output a level signal and output voltage V_outIs the reference voltage V_S2Yo
Output a low level signal when
TA Q_FiveSupply to the base.

The NPN transistor Q ₅ is an operational amplifier A ₂
Turns on when the output goes to a high level, and turns off when the output goes to a low level.

The output voltage Vout is detected by the voltage detection circuit 2 , and the transistor Q1 is controlled by the detection signal to control the output voltage Vout constant. When the input voltage Vin drops close to the output voltage Vout (target constant voltage) and the VCE (sat) of the transistor Q1 becomes VS2, the current limiting circuit 3 operates to limit the base current of the transistor Q2 and the valley current of the transistor Q1. Was reduced.

[0014]

[0007] However, since the conventional current limiting circuit has been performed limits the base current of the output voltage, that transistor transistor Q ₁ by detecting the collector voltage of Q _1, the transistor Q during the launch power
₁ can not be made sufficiently small base current of the transistor Q ₁ when it becomes saturated, it is impossible to launch efficiently circuit, also low quiescent current when transistor Q ₁ collector - emitter Voltage V _CE (saturation voltage V
There is a problem that the input / output voltage difference cannot be reduced because it cannot be reduced (below _sat ).

The present invention has been made in view of the above points, and has as its object to provide a current limiting circuit capable of sufficiently reducing a peak current.

[0016]

According to the present invention, there is provided a current limiting circuit for limiting a base current of a control transistor for controlling an output voltage, wherein a detecting means for detecting a difference between a base current of the control transistor and a load current; Current limiting means for limiting a base current of the control transistor when a detection signal level detected by the detecting means is out of a predetermined range.

[0017]

The detecting means detects the difference between the base current and the load current of the control transistor, and the current limiting means limits the control transistor according to the detection signal detected by the detecting means. For this reason, the base current according to the characteristics of the control transistor can be limited.

[0018]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. In the figure, reference numeral 4 denotes an output voltage detection circuit.

The output voltage detecting circuit 4 comprises a constant current source CC ₁ , a Zener diode D _Z , resistors R ₁ and R ₂ , an operational amplifier A ₁ constituting a differential amplifier, and an NPN transistor Q ₄ .

Constant current source CC₁And Zener diode D
_ZGenerates a reference voltage, and the operational amplifier A₁Inversion of
Input to the input terminal. Also, the output voltage V_out,resistance
R₁, R _TwoThe detection signal attenuated by the
₁Is input to the non-inverting input terminal.

The operational amplifier A ₁ outputs a signal corresponding to the difference between the reference voltage and the detection voltage and supplies the signal to the base of the transistor Q ₄ .

[0022] The emitter of the transistor Q ₄ is not connected to the base of the transistor Q _2, the emitter of the transistor Q ₂ is connected to the base of the multi-collector transistor Tr _1. Transistor Q ₂ is to control the base current of the transistor Tr ₁ in accordance with a signal supplied from the detection circuit 4.

Reference numeral 5 denotes a current limiting circuit. Current limiting circuit 5
Is the PNP transistor Q for current detection _Three, Q₆， Compare
A that constitutes the data_Two, NPN transistor for control
Star Q_Five, Constant current source CC_TwoConsisting of In addition, Transis
TA Q_Three, Q₆And operational amplifier A_TwoIs the load current and the base
A detection means for detecting a signal corresponding to the difference from the
Transistor Q_Four, Q_Five, Constant current source CC_TwoIs the current limiting means
Is configured.

[0024] NPN transistor Q ₃ are diode-connected, the collector connected to the collector of NPN transistor Q _2. Connection point between NPN transistor Q ₃ and the NPN transistor Q ₂ is connected to the non-inverting input terminal of the operational amplifier A _2.

The NPN transistor Q ₆ is also diode-connected, and its collector is connected to the collector of the detecting transistor Q ₁ ′ of the multi-collector transistor Tr ₁ , and the collector of the NPN transistor Q _{6 and} the collector of the transistor Q ₁ ′ are connected. connection point is connected to the inverting input terminal of the operational amplifier a _2.

[0026] Thus, the transistor base current I _B of Th ₁ is supplied to the non-inverting input terminal of the operational amplifier A _2, multi-collector transistor Tr ₁ in the load-side transistor current transistor Q ₁ in accordance with the collector current of Q ₁ '
Flows to the collector, is supplied to the inverting input terminal of the operational amplifier A _2.

The output voltage is detected by the voltage detection circuit 4,
According to the detection signal, the multi-collector transistor Tr
₁Transistor Q on the load side of₁To control the load current
Output voltage V_outIs controlled to be constant. Input power
Pressure V_inIs the output voltage V_outUp to (target voltage)
Then, the current limiting circuit 5 operates, and the transistor Q _Two
Is controlled, and the transistor Q₁Is the Yamagoshi current
To reduce.

Next, the operation of the current limiting circuit will be described.

The collector-area ratio (or current ratio) between the load-side transistor Q ₁ and the detection-side transistor Q ₁ ′ of the multi-collector transistor Tr ₁ is n ₁ : 1, the current amplification factor of the transistor Tr ₁ is h _FE1 , and the load is current (transistor to Q ₁ collector current) and I _L, the current flowing to the collector side I _Ln of the detection transistor Q ₁ ', the base current of the transistor Tr ₁ and I _B1,

[0030]

(Equation 1)

Next, if h _{FE2 of the} transistor Q ₂ is h _FE2 ≫1 (5), then I _C2 ≒ I _B1 (6).

Next, the input voltages V ₃ and V _{6 of the} operational amplifier A ₂
Is i _B-2 , i _{B + 2} ≪I _C2 , I _Ln .

[0033] _{V 3 = V BE3 (7)} V 6 = V BE6 (8) In addition, the base-emitter voltage V _BE3, V _BE6 of the transistor Q _3, Q ₆ is made in the following manner.

[0034]

(Equation 2)

However, at this time, T is the operating temperature KK K is the Boltzmann constant 1,380662 × 10 ^-23 (JK ^-1 ) q is the electron charge 1,6021892 × 10 ^-19 (C) I _S5 , I _S6 : input voltage of the saturation current therefore the operational amplifier a ₂ of each of the transistors V _in a ₂ (+ input basis)

[0036]

(Equation 3)

Is as follows.

[0038] Here, (15) the output of the operational amplifier A ₂ when it is negative by controlling the base current of the positive side transistors Q ₂ swings (High) the transistor Tr ₁ in the drive current (base current I _B1 ).

The conditions at that time are

[0040]

(Equation 4)

## EQU1 ## That is, I _B1 is increased to satisfy the expression (18) does not flow any more. That maximum drive current of the transistor Q ₁ is only flow until the current is limited by the current mirror ratio of the detection side and the transistor Q ₃ and the transistor Q ₆ and the load side of the transistor Q _1.

Therefore, if n ₁ and n ₂ are set to predetermined values in consideration of the value of the current amplification factor h _FE1 of the load-side transistor Q ₁ , it is possible to reduce the peak current at power-on. Unlike the conventional example, according to the present invention, since not a control in saturation voltage of the load side transistor Q _1, it may limit considering the characteristics of the load-side transistor Q ₁ saturation voltage of the load side transistor Q ₁ You can get the naked characteristics of. For this reason, the use efficiency of the power supply voltage increases, and a small input / output voltage difference can be used as a power supply.

In particular, the above characteristics at a low load current can be greatly improved. For example, what used to be about 0.3 V in the past
V. Input voltage V _in increases relative to the output voltage _{V out (V out + V CE} (sat) Q 1) and I _B1 is reduced to below the current.

[0044]

(Equation 5)

[0045] Incidentally, h _FE1 indicates the current amplification factor load transistor Q ₁ is entered in the constant current characteristic. FIG. 2 shows V _in -V _out (minimum V _in and V _{out at a} constant voltage) with respect to the load current.
FIG.

FIG. 3 shows an example of the base current I _B1 and output voltage V _out characteristics of the load-side transistor Q ₁ when the hill-over current circuit is removed.

FIG. 4 is a circuit diagram of a second embodiment of the present invention. In the figure, the same components as those of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

[0048] This example, taken relative to the positive side of the power input to the operational amplifier A _2, further ballast resistor R
₄ to R _7, the transistor Q _5, Q _11, are more greatly reduced I _B1MAX by applying an amplifier circuit consisting of resistor R _8.

The maximum value of the base current I _{B1 in} this case is

[0050]

(Equation 6)

The maximum base current IB1MAX depends on the load current as in the case of the equation (18).
, Q6, Q7, Q8, Q9, and Q1 '.

It should be _noted that I _B1MAX is determined as follows.

[0053]

(Equation 7)

[0054] As V _i A ₂ is limiter moves i _B1 at less than or equal to 0, than V _i A ₂ = 0 because the operational amplifier A _2, transistor Q ₅ is working,

[0055]

(Equation 8)

Is as follows.

FIG. 5 is a circuit diagram of a third embodiment of the present invention. In the figure, the same components as those in FIGS. 1 and 4 are denoted by the same reference numerals, and description thereof will be omitted.

This embodiment is different from the circuit of the second embodiment in that an NPN
Transistor Q₁₂And PNP transistor Q₁₃, Constant current source
CC_ThreeConsisting of a control transistor Q₁Correct the characteristics of
The correction circuit b is provided between the current detection side and the load side.
Collector-emitter voltage V _CEEach current due to the difference
Amplification rate h_FEImbalance (deviation of current mirror ratio)
With transistor Q₁₂, Q₁₃And constant current source CC_ThreeMore current
This is corrected by configuring an amplifier circuit. In addition,
The polarity of the transistor is not limited to that of the present embodiment, but may be reversed.
Make the same operation even when using transistors with polarity
Can be.

[0059]

As described above, according to the present invention, the occurrence of overcurrent at the time of starting the circuit can be reduced in accordance with the characteristics of the control transistor. It has such features that it can be widely used for

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a characteristic diagram of (V _i −V _out ) with respect to a load current.

3 is a characteristic diagram of I _B1 and V _out for V _in.

FIG. 4 is a circuit diagram of a second embodiment of the present invention.

FIG. 5 is a circuit diagram of a third embodiment of the present invention.

FIG. 6 is a circuit diagram of a conventional example.

[Explanation of symbols]

4 output voltage detection circuit 5 current limiting circuit R _L load Q ₁ control transistor

Claims (1)

(57) [Claims] 1. A current limiting circuit for limiting a base current of a control transistor for controlling a load current within a predetermined range, a detecting means for detecting a difference between a base current of the control transistor and a load current, and the detecting means. Of the control transistor detected by
The difference between the base current and the load current is determined by the control transistor.
When a value corresponding to the saturation region of the
Current limiting circuit, characterized by comprising a current limiting means for limiting the base current of the transistor to the current value at that time.