JP3176250B2 - Package for storing semiconductor elements - Google Patents

Package for storing semiconductor elements

Info

Publication number
JP3176250B2
JP3176250B2 JP11823395A JP11823395A JP3176250B2 JP 3176250 B2 JP3176250 B2 JP 3176250B2 JP 11823395 A JP11823395 A JP 11823395A JP 11823395 A JP11823395 A JP 11823395A JP 3176250 B2 JP3176250 B2 JP 3176250B2
Authority
JP
Japan
Prior art keywords
metal
metal frame
frame
semiconductor element
insulating base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11823395A
Other languages
Japanese (ja)
Other versions
JPH08316352A (en
Inventor
憲司 竹村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP11823395A priority Critical patent/JP3176250B2/en
Publication of JPH08316352A publication Critical patent/JPH08316352A/en
Application granted granted Critical
Publication of JP3176250B2 publication Critical patent/JP3176250B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は半導体素子を収容するた
めの半導体素子収納用パッケージに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device.

【0002】[0002]

【従来の技術】従来、LSI(大規模集積回路素子)等
の半導体素子を内部に収容する半導体素子収納用パッケ
ージは、通常、酸化アルミニウム質焼結体等の電気絶縁
材料から成り、その上面の略中央部に半導体素子を収容
するための凹部及び該凹部周辺から外周縁にかけて導出
されたタングステン、モリブデン、マンガン等の高融点
金属粉末から成る複数個のメタライズ配線層を有する絶
縁基体と、半導体素子を外部電気回路に電気的に接続す
るために前記メタライズ配線層に銀ロウ等のロウ材を介
してロウ付けされた複数個の外部リード端子と、鉄ーニ
ッケルーコバルト合金や鉄ーニッケル合金等の金属から
成る蓋体とから構成されており、絶縁基体の凹部底面に
半導体素子をガラス、樹脂、ロウ材等の接着剤を介して
接着固定するとともに該半導体素子の各電極をボンディ
ングワイヤを介してメタライズ配線層に接続し、しかる
後、絶縁基体上面に金属製蓋体を溶接し、絶縁基体と金
属製蓋体とから成る容器内部に半導体素子を気密に収容
することによって最終製品としての半導体装置となる。
2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element such as an LSI (Large Scale Integrated Circuit) is usually made of an electrically insulating material such as an aluminum oxide sintered body. An insulating base having a recess for accommodating a semiconductor element in a substantially central portion and a plurality of metallized wiring layers made of a high melting point metal powder of tungsten, molybdenum, manganese or the like led out from the periphery of the recess to the outer periphery; A plurality of external lead terminals brazed to the metallized wiring layer via a brazing material such as silver brazing in order to electrically connect to an external electric circuit, such as an iron-nickel-cobalt alloy or an iron-nickel alloy. A semiconductor element is bonded and fixed to the bottom surface of the concave portion of the insulating base via an adhesive such as glass, resin, and brazing material. Then, each electrode of the semiconductor element is connected to a metallized wiring layer via a bonding wire, and thereafter, a metal lid is welded to the upper surface of the insulating base, and the semiconductor element is placed inside a container comprising the insulating base and the metal lid. Is airtightly accommodated to form a semiconductor device as a final product.

【0003】尚、前記従来の半導体素子収納用パッケー
ジは通常、絶縁基体の上面に鉄ーニッケルーコバルト合
金や鉄ーニッケル合金等の金属材料から成る金属枠体を
予めロウ付けしておくとともに該金属枠体に金属製蓋体
をシームウエルド法等により溶接させることによって金
属製蓋体は絶縁基体の上面に取着され、これによって絶
縁基体と金属製蓋体とから成る容器が気密に封止され
る。
In the above-described conventional package for housing a semiconductor element, a metal frame made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy is usually brazed on the upper surface of an insulating base, and the metal frame is formed. The metal lid is attached to the upper surface of the insulating base by welding the metal lid to the frame by a seam welding method or the like, whereby the container including the insulating base and the metal lid is hermetically sealed. You.

【0004】また前記絶縁基体への金属枠体のロウ付け
はまず絶縁基体の上面で、半導体素子を収容する凹部周
囲にタングステン、モリブデン、マンガン等の高融点金
属粉末から成る枠状のメタライズ金属層を従来周知のス
クリーン印刷法等の厚膜手法を採用することによって被
着形成し、次に前記枠状メタライズ金属層上に銀ロウ等
のロウ材と金属枠体とを順次載置させ、最後に前記ロウ
材に約800℃の温度を印加し、ロウ材を加熱溶融させ
ることによって行われる。
[0004] In addition, the metal frame is brazed to the insulating base by first forming a frame-shaped metallized metal layer made of a refractory metal powder of tungsten, molybdenum, manganese or the like on the upper surface of the insulating base and around the recess for accommodating the semiconductor element. Is formed by employing a conventionally known thick film method such as a screen printing method, and then a brazing material such as a silver brazing material and a metal frame are sequentially placed on the frame-shaped metallized metal layer. Then, a temperature of about 800 ° C. is applied to the brazing material, and the brazing material is heated and melted.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、近時、
半導体素子の応用分野の拡大に伴い半導体素子の形状が
従来に比し大きくなってきており、これに伴って絶縁基
体の凹部及び該凹部周辺にロウ付けされる金属枠体もそ
の形状が極めて大きなものとなってきたこと、金属枠体
は断面四角形状をなし、剛性が高いこと、金属製蓋体と
絶縁基体の熱膨張係数が若干相違すること等から絶縁基
体と金属製蓋体とから成る容器内部に半導体素子を気密
に収容し半導体装置となした後、金属製蓋体と絶縁基体
に熱が印加されると金属製蓋体と絶縁基体の間に両者の
熱膨張係数の相違に起因する熱応力が発生するとともに
これが金属枠体に印加されて金属枠体が絶縁基体に被着
形成したメタライズ金属層とともに絶縁基体より外れた
り、金属枠体が取着されている絶縁基体に割れやクラッ
クが発生したりして容器の気密封止が破れ、その結果、
容器の内部に収容する半導体素子を長期間にわたり正
常、且つ安定に作動させることができないという欠点を
有していた。
However, recently,
With the expansion of the application field of the semiconductor element, the shape of the semiconductor element has become larger than before, and accordingly, the concave portion of the insulating base and the metal frame brazed around the concave portion have an extremely large shape. Because the metal frame has a rectangular cross section, high rigidity, and a slightly different coefficient of thermal expansion between the metal lid and the insulating base, the metal frame is composed of the insulating base and the metal lid. After the semiconductor element is hermetically housed inside the container to form a semiconductor device, when heat is applied to the metal lid and the insulating base, a difference in the thermal expansion coefficient between the metal lid and the insulating base results. When the thermal stress is generated and applied to the metal frame, the metal frame is detached from the insulating substrate together with the metallized metal layer formed on the insulating substrate, and the metal frame is cracked or cracked in the insulating substrate to which the metal frame is attached. Cracks Hermetic seal is torn of the container, as a result,
There has been a disadvantage that the semiconductor element housed in the container cannot be operated normally and stably for a long period of time.

【0006】[0006]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は絶縁基体と金属製蓋体とから成る容器の
気密封止を完全とし、内部に収容する大型の半導体素子
を長期間にわたり正常、且つ安定に作動させることがで
きる半導体素子収納用パッケージを提供することにあ
る。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to complete a hermetic sealing of a container composed of an insulating base and a metal lid, and to provide a large-sized semiconductor device accommodated therein. An object of the present invention is to provide a semiconductor element housing package that can be operated normally and stably for a long period of time.

【0007】[0007]

【課題を解決するための手段】本発明は上面に半導体素
子を収容するための凹部と、該凹部を囲繞する枠状のメ
タライズ金属層を有する絶縁基体と、前記枠状のメタラ
イズ金属層にロウ付けされる金属枠体と、前記金属枠体
に取着される金属製蓋体とから成る半導体素子収納用パ
ッケージであって、前記金属枠体が脚部の上下に鍔部を
設けた、断面略コ字状をなしており、前記金属枠体の脚
部の長さLと厚さTを2≦L/T≦25とするととも
に、脚部と鍔部の接合角部を半径0.05mm以上の円
弧状としたことを特徴とするものである。
SUMMARY OF THE INVENTION According to the present invention, there is provided an insulating substrate having a concave portion for accommodating a semiconductor element on an upper surface, a frame-shaped metallized metal layer surrounding the concave portion, and a brazing metal layer on the frame-shaped metallized metal layer. A semiconductor element storage package comprising a metal frame to be attached and a metal lid attached to the metal frame, wherein the metal frame is provided with flanges above and below legs. It has a substantially U-shape, and has legs of the metal frame.
The length L and the thickness T of the portion are set to 2 ≦ L / T ≦ 25.
The joint angle between the leg and the collar is a circle with a radius of 0.05 mm or more.
It is characterized by having an arc shape .

【0008】[0008]

【0009】[0009]

【0010】[0010]

【作用】本発明の半導体素子収納用パッケージによれ
ば、絶縁基体に被着された枠状メタライズ金属層にロウ
付けされる金属枠体を脚部の上下に鍔部を設けた、断面
略コ字状となしたことから金属枠体にバネ性が付与さ
れ、その結果、絶縁基体と金属製蓋体とから成る容器内
部に半導体素子を気密に収容し半導体装置となした後、
金属製蓋体と絶縁基体の両者に熱が印加され両者間に熱
応力が発生したとしてもその熱応力は金属枠体のバネ性
によって吸収され、これによって金属枠体が絶縁基体に
被着形成させたメタライズ金属層とともに絶縁基体より
外れたり、金属枠体が取着されている絶縁基体に割れや
クラックが発生することはなく、容器の気密封止を完全
として容器内部に収容する半導体素子を長期間にわたり
正常、且つ安定に作動させることが可能となる。
According to the semiconductor device housing package of the present invention, a metal frame brazed to the frame-shaped metallized metal layer attached to the insulating base is provided with flanges on the upper and lower sides of the legs, and the cross section of the metal frame is substantially the same. Because of the letter-shaped shape, the metal frame is provided with spring properties.As a result, after the semiconductor element is hermetically housed in a container formed of an insulating base and a metal lid, the semiconductor device is formed.
Even if heat is applied to both the metal lid and the insulating base and thermal stress is generated between the two, the thermal stress is absorbed by the spring properties of the metal frame, thereby forming the metal frame on the insulating base. The semiconductor element to be housed inside the container with the hermetic sealing of the container completely completed without the metallized metal layer being detached from the insulating substrate together with the metallized metal layer and without the occurrence of cracks or cracks in the insulating substrate to which the metal frame is attached. It is possible to operate normally and stably for a long time.

【0011】また本発明の半導体素子収納用パッケージ
によれば、金属枠体の脚部の長さLと厚さTを2≦L/
T≦25としておくと金属枠体のバネ性が適度となり、
金属製蓋体と絶縁基体の熱膨張係数の相違に起因して発
生する熱応力を金属枠体で完全に吸収することができ
る。
According to the package for housing a semiconductor element of the present invention, the length L and the thickness T of the leg of the metal frame are set to 2 ≦ L /
If T ≦ 25, the spring properties of the metal frame become moderate,
The thermal stress generated due to the difference in thermal expansion coefficient between the metal lid and the insulating base can be completely absorbed by the metal frame.

【0012】更に本発明の半導体素子収納用パッケージ
によれば、金属枠体の脚部と鍔部の接合角部を半径0.
05mm以上の円弧状とすれば、金属枠体を絶縁基体に
被着させたメタライズ金属層にロウ材を介してロウ付け
する際、ロウ材が金属枠体の全周に均等に流れ、金属枠
体のロウ付け強度を強固となすことができる。
Further, according to the package for housing a semiconductor element of the present invention, the joint corner between the leg and the flange of the metal frame has a radius of 0.1 mm.
When the metal frame is formed in an arc shape of not less than 05 mm , when the metal frame is brazed to the metallized metal layer adhered to the insulating base via the brazing material, the brazing material flows uniformly over the entire circumference of the metal frame, The brazing strength of the body can be increased.

【0013】[0013]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1及び図2は本発明の半導体素子収納用パッケー
ジの一実施例を示し、1は絶縁基体、2は金属製蓋体で
ある。この絶縁基体1と金属製蓋体2とで半導体素子3
を収容するための容器が構成される。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 and 2 show an embodiment of a package for accommodating a semiconductor element according to the present invention, wherein 1 is an insulating base, and 2 is a metal lid. The insulating element 1 and the metal lid 2 make the semiconductor element 3
The container for accommodating is comprised.

【0014】前記絶縁基体1は酸化アルミニウム質焼結
体、ムライト質焼結体、窒化アルミニウム質焼結体、炭
化珪素質焼結体、ガラスセラミックス焼結体等の電気絶
縁材料から成り、その上面の略中央部に半導体素子3を
収容するための空所を形成する凹部1aが設けてあり、
該凹部1a底面には半導体素子3がロウ材、ガラス、樹
脂等の接着剤を介して接着固定される。
The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a glass ceramic sintered body, and the like. A recess 1a is formed at a substantially central portion of the recess to form a space for accommodating the semiconductor element 3,
A semiconductor element 3 is bonded and fixed to the bottom of the recess 1a via an adhesive such as brazing material, glass, resin, or the like.

【0015】前記絶縁基体1は例えば、酸化アルミニウ
ム質焼結体から成る場合、酸化アルミニウム、酸化珪
素、酸化マグネシウム、酸化カルシウム等の原料粉末に
適当な有機バインダー、溶剤等を添加混合して泥漿状と
なすとともにこれを従来周知のドクターブレード法やカ
レンダーロール法等によりシート状に成形してセラミッ
クグリーンシート(セラミック生シート)を得、しかる
後、前記セラミックグリーンシートに適当な打ち抜き加
工を施すとともにこれを複数枚積層し、高温(約160
0℃)で焼成することによって製作される。
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide or the like is mixed with a suitable organic binder, a solvent, etc., and mixed to form a slurry. In addition, this is formed into a sheet by a well-known doctor blade method, calender roll method, or the like to obtain a ceramic green sheet (ceramic raw sheet). Are laminated at a high temperature (about 160
(0 ° C.).

【0016】また前記絶縁基体1には凹部1a周辺から
外周縁にかけて複数個のメタライズ配線層4が被着形成
されており、該メタライズ配線層4の凹部1a周辺部に
は半導体素子3の各電極がボンディングワイヤ5を介し
て電気的に接続され、また絶縁基体1の外周縁に導出す
る部位には外部リード端子6がロウ材を介してロウ付け
される。
A plurality of metallized wiring layers 4 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the outer peripheral edge, and each electrode of the semiconductor element 3 is provided around the concave portion 1a of the metallized wiring layer 4. Are electrically connected via bonding wires 5, and external lead terminals 6 are brazed through brazing materials to portions led out to the outer peripheral edge of the insulating base 1.

【0017】前記絶縁基体1に設けたメタライズ配線層
4はタングステン、モリブデン、マンガン等の高融点金
属粉末から成り、該メタライズ配線層4は外部電気回路
に接続される外部リード端子6に半導体素子3の各電極
を電気的に導通させる作用を為す。
The metallized wiring layer 4 provided on the insulating base 1 is made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like, and the metallized wiring layer 4 is connected to an external lead terminal 6 connected to an external electric circuit. Has the function of electrically conducting the respective electrodes.

【0018】前記メタライズ配線層4は例えば、タング
ステン等の高融点金属粉末に適当な有機溶剤、溶媒を添
加混合して得た金属ペーストを絶縁基体1となるセラミ
ックグリーンシートに予め従来周知のスクリーン印刷法
により所定パターンに印刷塗布しておくことによって絶
縁基体1の所定位置に被着形成される。
The metallized wiring layer 4 is prepared by screen-printing a metal paste obtained by adding a suitable organic solvent and a solvent to a refractory metal powder such as tungsten, for example, on a ceramic green sheet serving as the insulating substrate 1 in advance. By printing and applying a predetermined pattern by the method, the insulating substrate 1 is adhered and formed at a predetermined position.

【0019】尚、前記メタライズ配線層4はその露出す
る表面にニッケル、金等の耐蝕性に優れ、且つロウ材と
濡れ性の良い金属をメッキ法により1乃至20μmの厚
みに層着させておくとメタライズ配線層4の酸化腐食を
有効に防止することができるとともにメタライズ配線層
4とボンディングワイヤ5及び外部リード端子6とのロ
ウ付け接合を強固なものとなすことができる。従って、
前記メタライズ配線層4の表面にはニッケル、金等の耐
蝕性に優れ、且つロウ材と濡れ性が良い金属をメッキ法
により1乃至20μmの厚みに層着させておくことが好
ましい。
The metallized wiring layer 4 is coated with a metal having excellent corrosion resistance, such as nickel and gold, and a good wettability with a brazing material to a thickness of 1 to 20 μm on the exposed surface by plating. In addition, the oxidation corrosion of the metallized wiring layer 4 can be effectively prevented, and the brazing connection between the metallized wiring layer 4 and the bonding wires 5 and the external lead terminals 6 can be made strong. Therefore,
It is preferable that a metal having excellent corrosion resistance, such as nickel and gold, and having good wettability with the brazing material is applied to the surface of the metallized wiring layer 4 to a thickness of 1 to 20 μm by plating.

【0020】また前記絶縁基体1に被着したメタライズ
配線層4にロウ付けされる外部リード端子6は鉄ーニッ
ケルーコバルト合金や鉄ーニッケル合金等の金属材料か
ら成り、半導体素子3の各電極を外部電気回路に電気的
に接続する作用を為す。
The external lead terminals 6 brazed to the metallized wiring layer 4 adhered to the insulating base 1 are made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy. It acts to electrically connect to an external electrical circuit.

【0021】前記外部リード端子6は鉄ーニッケルーコ
バルト合金等のインゴット(塊)を圧延加工法や打ち抜
き加工法等、従来周知の金属加工法を採用し、所定の板
状に形成することによって製作される。
The external lead terminal 6 is formed by forming an ingot (lumps) such as an iron-nickel-cobalt alloy into a predetermined plate shape by using a conventionally known metal working method such as a rolling method or a punching method. Be produced.

【0022】また一方、前記絶縁基体1の上面には半導
体素子3を収容する凹部1aを囲繞するようにしてメタ
ライズ金属層7が枠状に被着形成されており、該枠状の
メタライズ金属層7には金属枠体8がロウ材9を介して
ロウ付けされている。
On the other hand, a metallized metal layer 7 is formed on the upper surface of the insulating base 1 so as to surround the recess 1a for accommodating the semiconductor element 3, and the metallized metal layer 7 is formed in a frame shape. A metal frame 8 is brazed to 7 via a brazing material 9.

【0023】前記枠状のメタライズ金属層7は金属枠体
8を絶縁基体1にロウ付けする際の下地金属層として作
用し、タングステン、モリブデン、マンガン等の高融点
金属粉末によって形成されている。
The frame-shaped metallized metal layer 7 functions as a base metal layer when the metal frame 8 is brazed to the insulating base 1, and is formed of a high melting point metal powder such as tungsten, molybdenum, and manganese.

【0024】前記枠状のメタライズ金属層7はメタライ
ズ配線層4と同様の方法、具体的にはタングステン等の
高融点金属粉末に適当な有機溶剤、溶媒を添加混合して
得た金属ペーストを絶縁基体1となるセラミックグリー
ンシートに予め従来周知のスクリーン印刷法により所定
パターンに印刷塗布しておくことによって絶縁基体1の
上面に枠状に被着形成される。
The frame-shaped metallized metal layer 7 is insulated from a metal paste obtained by adding a suitable organic solvent and a solvent to a refractory metal powder such as tungsten and mixing the same method as the metallized wiring layer 4. The ceramic green sheet serving as the base 1 is previously applied in a predetermined pattern by a well-known screen printing method so as to be formed in a frame shape on the upper surface of the insulating base 1.

【0025】前記枠状のメタライズ金属層7は更にその
上面に金属枠体8が取着されており、該金属枠体8は図
2に示す如く、脚部8aの上下に鍔部8b、8cを設け
た断面略コ字状を成している。
The frame-shaped metallized metal layer 7 is further provided with a metal frame 8 on its upper surface, and the metal frame 8 is provided with flanges 8b and 8c above and below a leg 8a as shown in FIG. Is provided, and has a substantially U-shaped cross section.

【0026】前記金属枠体2は金属製蓋体2を絶縁基体
1に取着する際の下地金属部材として作用し、鍔部8b
を絶縁基体1の上面に被着させたメタライズ金属層7に
銀ロウ等のロウ材9を介しロウ付けすることによって絶
縁基体1の上面に取着され、また鍔部8cには金属製蓋
体2がシームウエルド法等の溶接によって取着される。
The metal frame 2 functions as a base metal member when the metal lid 2 is attached to the insulating base 1, and the flange 8b
Is attached to the upper surface of the insulating substrate 1 by brazing a metallized metal layer 7 adhered to the upper surface of the insulating substrate 1 via a brazing material 9 such as silver brazing, and a metal lid is provided on the flange portion 8c. 2 is attached by welding such as a seam welding method.

【0027】前記金属枠体2はその断面が略コ字状を為
し、脚部8aにバネ性が付与されていることから鍔部8
cに金属製蓋体2を溶接させ、絶縁基体1と金属製蓋体
2とから成る容器内部に半導体素子3を気密に収容し半
導体装置となした後、金属製蓋体2と絶縁基体1の両者
に熱が印加され両者間に熱応力が発生したとしてもその
熱応力は金属枠体8のバネ性によって吸収され、これに
よって金属枠体8が絶縁基体1に被着形成させたメタラ
イズ金属層7とともに絶縁基体1より外れたり、金属枠
体2が取着されている絶縁基体1に割れやクラックが発
生することはなく、容器の気密封止を完全として容器内
部に収容する半導体素子3を長期間にわたり正常、且つ
安定に作動させることが可能となる。
The cross section of the metal frame 2 is substantially U-shaped, and the leg 8a is provided with a spring property so that the flange 8
c, the metal lid 2 is welded, and the semiconductor element 3 is hermetically housed in a container including the insulating base 1 and the metal lid 2 to form a semiconductor device. Even if heat is applied to both of them and a thermal stress is generated between the two, the thermal stress is absorbed by the resiliency of the metal frame 8, whereby the metallized metal is formed on the insulating substrate 1. The semiconductor element 3 accommodated in the container without completely separating from the insulating substrate 1 together with the layer 7 and without causing cracks or cracks in the insulating substrate 1 to which the metal frame 2 is attached is completely hermetically sealed. Can operate normally and stably over a long period of time.

【0028】尚、前記金属枠体8は脚部8aの長さLと
厚さTを2≦L/T≦25としておくと金属枠体8のバ
ネ性が適度となり、金属製蓋体2と絶縁基体1の間に両
者の熱膨張係数の相違に起因して熱応力が発生してもそ
の熱応力を金属枠体2で完全に吸収することができ、こ
れによって絶縁基体1と金属製蓋体2とから成る容器の
気密封止の信頼性を極めて高いものとなすことができ
る。従って、前記金属枠体8は脚部8aの長さLと厚さ
Tを2≦L/T≦25としておくことが好ましい。
If the length L and the thickness T of the legs 8a are set to 2 ≦ L / T ≦ 25, the metal frame 8 has an appropriate spring property, and Even if thermal stress is generated between the insulating bases 1 due to the difference in thermal expansion coefficient between the two, the thermal stress can be completely absorbed by the metal frame 2, whereby the insulating base 1 and the metal lid The reliability of hermetic sealing of the container comprising the body 2 can be made extremely high. Therefore, it is preferable that the length L and the thickness T of the leg portion 8a of the metal frame 8 be set to 2 ≦ L / T ≦ 25.

【0029】また前記金属枠体8は脚部8aと鍔部8
b、8cの接合角部aを半径0.05mm以上の円弧状
にしておけば金属枠体8の鍔部8bを絶縁基体1に被着
させたメタライズ金属層7に銀ロウ等のロウ材9を介し
てロウ付けする際、ロウ材9が金属枠体8の全表面に均
等に流れて金属枠体8のロウ付け強度が強固となる。従
って、前記金属枠体8は脚部8aと鍔部8b、8cの接
合角部aを半径0.05mm以上の円弧状にしておくこ
とが好ましい。
The metal frame 8 has a leg 8a and a flange 8a.
If the joining corners a of b and 8c are formed in an arc shape having a radius of 0.05 mm or more, a brazing material 9 such as silver brazing is applied to the metallized metal layer 7 in which the flange 8b of the metal frame 8 is adhered to the insulating base 1. When brazing is performed through the metal frame 8, the brazing material 9 flows evenly over the entire surface of the metal frame 8, and the brazing strength of the metal frame 8 becomes strong. Therefore, in the metal frame 8, it is preferable that a joint corner a between the leg 8a and the flanges 8b and 8c is formed in an arc shape having a radius of 0.05 mm or more.

【0030】前記金属枠体8は鉄ーニッケルーコバルト
合金や鉄ーニッケル合金等の金属材料から成り、該鉄ー
ニッケルーコバルト合金等のインゴット(塊)に所定の
金属加工を施すことによって所定の断面コ字状に形成さ
れる。
The metal frame 8 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy, and is subjected to a predetermined metal working on an ingot such as the iron-nickel-cobalt alloy. It is formed in a U-shaped cross section.

【0031】かくして上述の半導体素子収納用パッケー
ジによれば、絶縁基体1の凹部1a底面に半導体素子3
をロウ材、ガラス、樹脂等の接着剤を介して接着固定す
るとともに該半導体素子3の各電極をボンディングワイ
ヤ5を介してメタライズ配線層4に電気的に接続し、し
かる後、絶縁基体1の上面にロウ付けした金属枠体8の
鍔部8cに金属製蓋体2をシームウエルド法等により溶
接し、絶縁基体1と金属製蓋体2とから成る容器内部に
半導体素子3を気密に収容することによって最終製品と
しての半導体装置となる。
Thus, according to the above-described package for accommodating a semiconductor element, the semiconductor element 3
Is bonded and fixed via an adhesive such as brazing material, glass, resin and the like, and each electrode of the semiconductor element 3 is electrically connected to the metallized wiring layer 4 via a bonding wire 5. The metal cover 2 is welded to the flange 8c of the metal frame 8 brazed to the upper surface by a seam welding method or the like, and the semiconductor element 3 is hermetically accommodated in a container including the insulating base 1 and the metal cover 2. By doing so, a semiconductor device as a final product is obtained.

【0032】尚、本発明は上述した半導体素子収納用パ
ッケージに限定されるものではなく、本発明の要旨を逸
脱しない範囲であれば種々の変更は可能である。
The present invention is not limited to the above-described semiconductor device housing package, and various modifications can be made without departing from the scope of the present invention.

【0033】[0033]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、絶縁基体に被着された枠状メタライズ金属層に
ロウ付けされる金属枠体を脚部の上下に鍔部を設けた、
断面略コ字状となしたことから金属枠体にバネ性が付与
され、その結果、絶縁基体と金属製蓋体とから成る容器
内部に半導体素子を気密に収容し半導体装置となした
後、金属製蓋体と絶縁基体の両者に熱が印加され両者間
に熱応力が発生したとしてもその熱応力は金属枠体のバ
ネ性によって吸収され、これによって金属枠体が絶縁基
体に被着形成させたメタライズ金属層とともに絶縁基体
より外れたり、金属枠体が取着されている絶縁基体に割
れやクラックが発生することはなく、容器の気密封止を
完全として容器内部に収容する半導体素子を長期間にわ
たり正常、且つ安定に作動させることが可能となる。
According to the package for housing a semiconductor element of the present invention, the metal frame brazed to the frame-shaped metallized metal layer attached to the insulating base is provided with flanges on the upper and lower sides of the legs.
Since the metal frame body is provided with resiliency due to the substantially U-shaped cross section, as a result, after the semiconductor element is hermetically housed inside a container formed of an insulating base and a metal lid, a semiconductor device is formed. Even if heat is applied to both the metal lid and the insulating base and thermal stress is generated between the two, the thermal stress is absorbed by the spring properties of the metal frame, thereby forming the metal frame on the insulating base. The semiconductor element to be housed inside the container with the hermetic sealing of the container completely completed without the metallized metal layer being detached from the insulating substrate together with the metallized metal layer and without the occurrence of cracks or cracks in the insulating substrate to which the metal frame is attached. It is possible to operate normally and stably for a long time.

【0034】また本発明の半導体素子収納用パッケージ
によれば、金属枠体の脚部の長さLと厚さTを2≦L/
T≦25としておくと金属枠体のバネ性が適度となり、
金属製蓋体と絶縁基体の熱膨張係数の相違に起因して発
生する熱応力を金属枠体で完全に吸収することができ
る。
Further, according to the semiconductor device housing package of the present invention, the length L and the thickness T of the leg of the metal frame are set to 2 ≦ L /
If T ≦ 25, the spring properties of the metal frame become moderate,
The thermal stress generated due to the difference in thermal expansion coefficient between the metal lid and the insulating base can be completely absorbed by the metal frame.

【0035】更に本発明の半導体素子収納用パッケージ
によれば、金属枠体の脚部と鍔部の接合角部を半径0.
05mm以上の円弧状とすれば、金属枠体を絶縁基体に
被着させたメタライズ金属層にロウ材を介してロウ付け
する際、ロウ材が金属枠体の全周に均等に流れ、金属枠
体のロウ付け強度を強固となすことができる。
Further, according to the semiconductor element housing package of the present invention, the joint corner between the leg and the flange of the metal frame has a radius of 0.1 mm.
When the metal frame is formed in an arc shape of not less than 05 mm , when the metal frame is brazed to the metallized metal layer adhered to the insulating base via the brazing material, the brazing material flows uniformly over the entire circumference of the metal frame, The brazing strength of the body can be increased.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor element storage package according to the present invention.

【図2】図1に示す半導体素子収納用パッケージの要部
拡大断面図である。
2 is an enlarged cross-sectional view of a main part of the package for housing a semiconductor element shown in FIG. 1;

【符号の説明】[Explanation of symbols]

1・・・・・・絶縁基体 1a・・・・・凹部 2・・・・・・金属製蓋体 3・・・・・・半導体素子 4・・・・・・メタライズ配線層 6・・・・・・外部リード端子 7・・・・・・枠状のメタライズ金属層 8・・・・・・金属枠体 8a・・・・・脚部 8b、8c・・鍔部 9・・・・・・ロウ材 DESCRIPTION OF SYMBOLS 1 ... Insulating base 1a ... Depression 2 ... Metal lid 3 ... Semiconductor element 4 ... Metallized wiring layer 6 ... ... External lead terminals 7 ... Frame-shaped metallized metal layer 8 ... Metal frame 8a ... Legs 8b, 8c ... Flange 9 ...・ Braze material

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】上面に半導体素子を収容するための凹部
と、該凹部を囲繞する枠状のメタライズ金属層を有する
絶縁基体と、前記枠状のメタライズ金属層にロウ付けさ
れる金属枠体と、前記金属枠体に取着される金属製蓋体
とから成る半導体素子収納用パッケージであって、前記
金属枠体が脚部の上下に鍔部を設けた、断面略コ字状を
なしており、前記金属枠体の脚部の長さLと厚さTを2
≦L/T≦25とするとともに、脚部と鍔部の接合角部
を半径0.05mm以上の円弧状としたことを特徴とす
る半導体素子収納用パッケージ
An insulating base having a concave portion for accommodating a semiconductor element on an upper surface, a frame-shaped metallized metal layer surrounding the concave portion, and a metal frame brazed to the frame-shaped metallized metal layer. And a metal lid attached to the metal frame, wherein the metal frame has a substantially U-shaped cross section in which flanges are provided above and below the legs. And the length L and thickness T of the legs of the metal frame are 2
≤ L / T ≤ 25 and the joint corner between the leg and the flange
Characterized by having an arc shape with a radius of 0.05 mm or more.
Semiconductor device package .
JP11823395A 1995-05-17 1995-05-17 Package for storing semiconductor elements Expired - Fee Related JP3176250B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11823395A JP3176250B2 (en) 1995-05-17 1995-05-17 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11823395A JP3176250B2 (en) 1995-05-17 1995-05-17 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH08316352A JPH08316352A (en) 1996-11-29
JP3176250B2 true JP3176250B2 (en) 2001-06-11

Family

ID=14731530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11823395A Expired - Fee Related JP3176250B2 (en) 1995-05-17 1995-05-17 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP3176250B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007266171A (en) * 2006-03-28 2007-10-11 Kyocera Corp Ceramic container
JP5925057B2 (en) * 2012-06-04 2016-05-25 日本特殊陶業株式会社 Ceramic package
JP7033974B2 (en) * 2018-03-26 2022-03-11 京セラ株式会社 Ceramic circuit boards, packages and electronics
JP7041020B2 (en) * 2018-07-27 2022-03-23 京セラ株式会社 Ceramic circuit boards, packages and electronics

Also Published As

Publication number Publication date
JPH08316352A (en) 1996-11-29

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