JP3168801B2 - Ceramic capacitors - Google Patents

Ceramic capacitors

Info

Publication number
JP3168801B2
JP3168801B2 JP33166293A JP33166293A JP3168801B2 JP 3168801 B2 JP3168801 B2 JP 3168801B2 JP 33166293 A JP33166293 A JP 33166293A JP 33166293 A JP33166293 A JP 33166293A JP 3168801 B2 JP3168801 B2 JP 3168801B2
Authority
JP
Japan
Prior art keywords
ceramic capacitor
chip
external electrodes
solder
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP33166293A
Other languages
Japanese (ja)
Other versions
JPH07192966A (en
Inventor
英樹 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP33166293A priority Critical patent/JP3168801B2/en
Publication of JPH07192966A publication Critical patent/JPH07192966A/en
Application granted granted Critical
Publication of JP3168801B2 publication Critical patent/JP3168801B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は回路基板に直接はんだ付
けされるチップ型のセラミックコンデンサに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type ceramic capacitor which is directly soldered to a circuit board.

【0002】[0002]

【従来の技術】電子機器の小型化、高速デジタル化にと
もない、これら電子機器に用いる電子部品も小型化、高
速デジタル化対応の要請が強い。このため、電子部品の
代表的なものであるコンデンサにおいても、セラミック
誘電体を用いたチップ型のセラミックコンデンサ、例え
ば小型大容量で高周波特性に優れたチップ型積層セラミ
ックコンデンサが多用されている。
2. Description of the Related Art With the miniaturization and high-speed digitalization of electronic devices, there is a strong demand for electronic components used in these electronic devices to be miniaturized and compatible with high-speed digitalization. For this reason, a chip-type ceramic capacitor using a ceramic dielectric, for example, a chip-type multilayer ceramic capacitor excellent in high-frequency characteristics and small in capacity has been widely used in a capacitor which is a typical electronic component.

【0003】このチップ型積層セラミックコンデンサ
は、複数の誘電体セラミック層と、その誘電体セラミッ
ク層を介して互いに積層された複数の内部電極層とから
なる積層型誘電体セラミック本体の両端部に、内部電極
の所定のものに接続される外部電極が形成されている。
そして、回路基板への実装は、図5に示すようにチップ
型積層セラミックコンデンサ1の外部電極2と回路基板
5の導体部6とをはんだ4で直接接合して行なってい
る。
This chip-type multilayer ceramic capacitor is provided at both ends of a multilayer dielectric ceramic body composed of a plurality of dielectric ceramic layers and a plurality of internal electrode layers laminated to each other via the dielectric ceramic layers. External electrodes connected to predetermined ones of the internal electrodes are formed.
The mounting on the circuit board is performed by directly bonding the external electrodes 2 of the chip-type multilayer ceramic capacitor 1 and the conductor portions 6 of the circuit board 5 with solder 4 as shown in FIG.

【0004】[0004]

【発明が解決しようとする課題】このようなチップ型積
層セラミックコンデンサは、その主要構成材料がセラミ
ックであるため可撓性がない。このため実装後のセラミ
ックコンデンサは、回路基板のたわみや熱ストレスなど
による膨脹、収縮などの物理的ストレスの影響を受けや
すく、図5に示すようにクラックC等が発生してセラミ
ックコンデンサが破損することがあった。このような破
壊は、タンタル電解コンデンサやアルミ電解コンデンサ
の代わりに、チップ型のセラミックコンデンサとして、
高周波特性や無極性を生かして、大容量、大型のチップ
型積層セラミックコンデンサを使用する場合にしばしば
起こった。
Such a chip-type multilayer ceramic capacitor has no flexibility because its main constituent material is ceramic. Therefore, the mounted ceramic capacitor is easily affected by physical stresses such as expansion and contraction due to flexure and thermal stress of the circuit board, and cracks C and the like are generated as shown in FIG. There was something. Such destruction, instead of tantalum electrolytic capacitors and aluminum electrolytic capacitors, as chip-type ceramic capacitors,
Taking advantage of high frequency characteristics and non-polarity, it often occurred when a large-capacity, large-sized chip-type multilayer ceramic capacitor was used.

【0005】この対策として、回路基板へはんだ付けす
るときに使用するはんだ量を極力少なくし、はんだを介
してチップ型積層セラミックコンデンサへ加わるストレ
スを押さえること等が試みられている。しかし、この方
法は量産時に再現性よくはんだ量を一定に維持すること
が難しく、一方ではんだ量が少なすぎると固着力が不足
して逆に接続の信頼性が悪くなることもあり、根本的な
解決策とはなり得ていない。
[0005] As a countermeasure, attempts have been made to minimize the amount of solder used when soldering to a circuit board and to reduce the stress applied to the chip-type multilayer ceramic capacitor via the solder. However, this method makes it difficult to maintain a constant amount of solder with good reproducibility during mass production.On the other hand, if the amount of solder is too small, the bonding strength will be insufficient, and conversely, the reliability of the connection will be deteriorated. Is not a viable solution.

【0006】そこで、本発明の目的は、回路基板へ実装
後のチップ型のセラミックコンデンサに加わる物理的ス
トレスの影響を極力低減することができ、クラックや剥
離等の破損を生じることのない、信頼性の高いセラミッ
クコンデンサを提供することにある。
Accordingly, an object of the present invention is to minimize the influence of physical stress applied to a chip-type ceramic capacitor after being mounted on a circuit board, and to reduce the reliability of the chip-type ceramic capacitor without cracking or peeling. Another object of the present invention is to provide a ceramic capacitor having high performance.

【0007】[0007]

【課題を解決するための手段】上記目的を達成するた
め、本発明のセラミックコンデンサは、両端部に外部電
極が形成された複数個のチップ型セラミックコンデンサ
を、方向を揃えて隣接並置させ、その隣接する外部電極
同志を可撓性を有する導電性樹脂にて電気的に接続し、
外部電極が設けられていない隣接部分を可撓性を有する
絶縁性樹脂にて機械的に接合し、対向する外部電極のう
ちはんだの付く材料で形成した外部電極は互いに対角位
置に位置させたことを特徴とする。
In order to achieve the above object, a ceramic capacitor according to the present invention comprises a plurality of chip-type ceramic capacitors having external electrodes formed at both ends thereof, which are arranged side by side in the same direction. Adjacent external electrodes are electrically connected by a flexible conductive resin,
Adjacent portions where no external electrodes were provided were mechanically joined by a flexible insulating resin, and the external electrodes formed of a material to which solder was attached among the opposing external electrodes were positioned at diagonal positions to each other. It is characterized by the following.

【0008】[0008]

【作用】本発明のセラミックコンデンサは、複数のセラ
ミックコンデンサを可撓性のある樹脂で隣接接合して構
成され、かつ回路基板とはんだ付けされる外部電極は、
接合したセラミックコンデンサの中で互いに対角位置に
位置されるように形成されている。したがって、回路基
板に実装後、回路基板のたわみや熱ストレス等によりは
んだ付け部分を介してセラミックコンデンサがストレス
を受けても、セラミックコンデンサを接合した可撓性樹
脂の部分が変形してそのストレスは緩和される。
The ceramic capacitor according to the present invention is formed by joining a plurality of ceramic capacitors adjacently with a flexible resin, and the external electrodes soldered to the circuit board are:
They are formed so as to be located diagonally to each other in the joined ceramic capacitors. Therefore, after mounting on a circuit board, even if the ceramic capacitor is stressed via the soldered portion due to bending or thermal stress of the circuit board, the portion of the flexible resin to which the ceramic capacitor is bonded is deformed and the stress is reduced. Be relaxed.

【0009】[0009]

【実施例】以下、本発明のセラミックコンデンサの実施
例を、チップ型積層セラミックコンデンサを例として図
面に基づき説明する。図1は第1の実施例を示す斜視
図、図2は図1の第1の実施例のセラミックコンデンサ
を回路基板にはんだ付け実装した状態を示す斜視図であ
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the ceramic capacitor according to the present invention will be described below with reference to the drawings, taking a chip-type multilayer ceramic capacitor as an example. FIG. 1 is a perspective view showing a first embodiment, and FIG. 2 is a perspective view showing a state where the ceramic capacitor of the first embodiment of FIG. 1 is mounted on a circuit board by soldering.

【0010】本実施例のセラミックコンデンサは、2個
のチップ型積層セラミックコンデンサを隣接貼り合わせ
た構造となっている。即ち、図1において、1は互いに
方向を揃えて隣接並置されたチップ型積層セラミックコ
ンデンサ、2はAg等を主成分とする電極ペーストを塗
布・焼き付けしたはんだの付く外部電極、3はPd等を
主成分とするペーストを塗布・焼き付けしたはんだの付
かない外部電極である。7はAgを主成分とするエポキ
シ系の可撓性を有する導電性樹脂で、2つのチップ型積
層セラミックコンデンサ1の互いに隣接する外部電極2
と外部電極3とを接合し電気的に接続している。8はエ
ポキシ系の可撓性を有する絶縁性樹脂であり2つのチッ
プ型積層セラミックコンデンサ1を機械的に接合してい
る。
The ceramic capacitor of this embodiment has a structure in which two chip-type multilayer ceramic capacitors are adhered to each other. That is, in FIG. 1, reference numeral 1 denotes a chip-type multilayer ceramic capacitor which is juxtaposed and juxtaposed to each other, 2 denotes an external electrode to which solder is applied by applying and baking an electrode paste mainly composed of Ag or the like, and 3 denotes a Pd or the like. It is an external electrode without solder that is coated and baked with a paste as a main component. Reference numeral 7 denotes an epoxy-based flexible conductive resin containing Ag as a main component.
And the external electrode 3 are joined and electrically connected. Reference numeral 8 denotes an epoxy-based insulating resin having flexibility, which mechanically joins the two chip-type multilayer ceramic capacitors 1.

【0011】このように形成されたセラミックコンデン
サは、前記はんだの付く外部電極2が互いに対角位置に
位置されている。このため回路基板への実装時は、図2
に示すように対角線方向に位置するはんだの付く外部電
極2のみで回路基板5の導体部6にはんだ付けされる。
しかも実装されたセラミックコンデンサは、2つの積層
セラミックコンデンサ1が可撓性を有する導電性樹脂7
および可撓性を有する絶縁性樹脂8で接合されているた
め、回路基板5のたわみや熱ストレス等によりはんだ4
を介してストレスを受けても、可撓性を有する導電性樹
脂7および可撓性を有する絶縁性樹脂8の部分が容易に
変形してストレスは緩和される。このため、ストレスに
耐え切れずにセラミックコンデンサにクラックや剥離等
が生じるという恐れがない。
In the ceramic capacitor formed as described above, the external electrodes 2 to which the solder is attached are located at diagonal positions with respect to each other. Therefore, when mounting on a circuit board, FIG.
As shown in (1), only the diagonally positioned external electrodes 2 to which solder is applied are soldered to the conductor portions 6 of the circuit board 5.
In addition, the mounted ceramic capacitor is made of a conductive resin 7 having two laminated ceramic capacitors 1 having flexibility.
Also, since the circuit board 5 is joined by the flexible insulating resin 8, the solder 4
, The portions of the conductive resin 7 having flexibility and the insulating resin 8 having flexibility are easily deformed, and the stress is relieved. For this reason, there is no fear that cracks, peeling, and the like may occur in the ceramic capacitor without being able to withstand the stress.

【0012】なお、チップ型積層セラミックコンデンサ
の外部電極材は、上記実施例に限定されるものではな
い。例えば、はんだの付く外部電極としては、従来から
積層セラミックコンデンサの外部電極として公知のCu
電極、Ni(下層)−Sn(上層)めっき電極またはは
んだめっき電極等を用いることができる。また、はんだ
の付かない外部電極としては、Ni系電極又はAgを主
成分とする焼き付け電極にガラスフリットを多量に添加
したもの等を用いることができる。
The external electrode material of the chip type multilayer ceramic capacitor is not limited to the above embodiment. For example, as an external electrode to which solder is attached, there is conventionally known Cu as an external electrode of a multilayer ceramic capacitor.
An electrode, a Ni (lower layer) -Sn (upper layer) plated electrode, a solder plated electrode, or the like can be used. Further, as the external electrode to which no solder is attached, a Ni-based electrode or an electrode obtained by adding a large amount of glass frit to a baked electrode mainly containing Ag can be used.

【0013】また、チップ型積層セラミックコンデンサ
の外部電極を電気的に接続する導電性樹脂、あるいはチ
ップ型積層セラミックコンデンサを接合する絶縁性樹脂
も、上記実施例に限定されるものではない。たとえば、
可撓性を有する導電性樹脂としては、導電性成分として
Ag以外にCu等を用いることができ、樹脂成分として
は、シリコン樹脂等を用いることができる。また、可撓
性を有する絶縁性樹脂としても、同様にシリコン樹脂等
を用いることができる。
The conductive resin for electrically connecting the external electrodes of the chip-type multilayer ceramic capacitor or the insulating resin for joining the chip-type multilayer ceramic capacitor is not limited to the above embodiment. For example,
As the conductive resin having flexibility, Cu or the like can be used in addition to Ag as the conductive component, and as the resin component, a silicon resin or the like can be used. Silicon resin or the like can also be used as the flexible insulating resin.

【0014】さらに、チップ型積層セラミックコンデン
サの貼り合わせ枚数、方向は前記実施例に限定されるも
のではなく、セラミックコンデンサの静電容量、用途等
に応じて適宜設計することができる。以下に、他の実施
例を示す。
Furthermore, the number and direction of the chip-type multilayer ceramic capacitors to be bonded are not limited to those in the above-described embodiment, but can be appropriately designed according to the capacitance of the ceramic capacitors, the application, and the like. Hereinafter, another embodiment will be described.

【0015】図3は第2の実施例を示し、3つのチップ
型積層セラミックコンデンサを、その厚みの薄い方向に
重ねて接合したものである。その他の部分は、第1の実
施例である図1と同一であるので、同一番号を付して説
明は省略する。また、図4は第3の実施例を示し、4つ
のチップ型積層セラミックコンデンサを接合したもので
ある。その他の部分は、第1の実施例である図1と同一
であるので、同一番号を付して説明は省略する。
FIG. 3 shows a second embodiment in which three chip-type multilayer ceramic capacitors are stacked and joined in the direction of decreasing thickness. The other parts are the same as those of the first embodiment shown in FIG. FIG. 4 shows a third embodiment, in which four chip-type multilayer ceramic capacitors are joined. The other parts are the same as those of the first embodiment shown in FIG.

【0016】なお、以上の実施例においては、セラミッ
クコンデンサとしてチップ型積層セラミックコンデンサ
の場合について説明したが、本発明はこれのみに限定さ
れることなく、広くチップ型のセラミックコンデンサの
場合に同様の効果が得られることは言うまでもない。
In the above embodiment, the case of a chip-type multilayer ceramic capacitor has been described as a ceramic capacitor. However, the present invention is not limited to this, and the same applies to a case of a chip-type ceramic capacitor. Needless to say, the effect is obtained.

【0017】[0017]

【発明の効果】以上の説明で明らかなように、本発明の
セラミックコンデンサによれば、回路基板に実装した
後、基板のたわみや熱ストレス等によりはんだ付け部分
を介してセラミックコンデンサがストレスを受けても、
セラミックコンデンサを接合した可撓性樹脂の部分でそ
のストレスが緩和されて、セラミックコンデンサにクラ
ック等の損傷が起きるのを防止できる。したがって、信
頼性の高いセラミックコンデンサを得ることができる。
As is clear from the above description, according to the ceramic capacitor of the present invention, after mounting on a circuit board, the ceramic capacitor is subjected to stress through soldering parts due to bending of the board or thermal stress. Even
The stress is relieved at the portion of the flexible resin to which the ceramic capacitor is bonded, and damage such as cracks can be prevented from occurring in the ceramic capacitor. Therefore, a highly reliable ceramic capacitor can be obtained.

【0018】また、この効果は、タンタル電解コンデン
サやアルミ電解コンデンサの代わりとして、大容量、大
型のセラミックコンデンサに適用する場合に特に顕著と
なる。
This effect is particularly remarkable when applied to a large-capacity, large-sized ceramic capacitor in place of a tantalum electrolytic capacitor or an aluminum electrolytic capacitor.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のセラミックコンデンサの第1の実施例
を示す斜視図である。
FIG. 1 is a perspective view showing a first embodiment of a ceramic capacitor according to the present invention.

【図2】第1の実施例のセラミックコンデンサを回路基
板上にはんだ付け実装した状態を示す斜視図である。
FIG. 2 is a perspective view showing a state in which the ceramic capacitor of the first embodiment is soldered and mounted on a circuit board.

【図3】本発明のセラミックコンデンサの第2の実施例
を示す斜視図である。
FIG. 3 is a perspective view showing a second embodiment of the ceramic capacitor of the present invention.

【図4】本発明のセラミックコンデンサの第3の実施例
を示す斜視図である。
FIG. 4 is a perspective view showing a third embodiment of the ceramic capacitor of the present invention.

【図5】従来のセラミックコンデンサを回路基板上には
んだ付け実装した状態を示す斜視図である。
FIG. 5 is a perspective view showing a state in which a conventional ceramic capacitor is mounted on a circuit board by soldering.

【符号の説明】[Explanation of symbols]

1 チップ型積層セラミックコンデンサ 2 はんだの付く外部電極 3 はんだの付かない外部電極 4 はんだ 5 回路基板 6 回路基板の導体部 7 可撓性を有する導電性樹脂 8 可撓性を有する絶縁性樹脂 DESCRIPTION OF SYMBOLS 1 Chip-type multilayer ceramic capacitor 2 External electrode with solder 3 External electrode without solder 4 Solder 5 Circuit board 6 Conductor part of circuit board 7 Flexible conductive resin 8 Flexible insulating resin

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 両端部に外部電極が形成された複数個の
チップ型セラミックコンデンサを、方向を揃えて隣接並
置させ、その隣接する外部電極同志を可撓性を有する導
電性樹脂にて電気的に接続し、外部電極が設けられてい
ない隣接部分を可撓性を有する絶縁性樹脂にて機械的に
接合し、対向する外部電極のうちはんだの付く材料で形
成した外部電極は互いに対角位置に位置させたことを特
徴とするセラミックコンデンサ。
1. A plurality of chip-type ceramic capacitors having external electrodes formed at both ends are juxtaposed and juxtaposed in the same direction, and the adjacent external electrodes are electrically connected with a conductive resin having flexibility. And adjacent portions where the external electrodes are not provided are mechanically joined by a flexible insulating resin, and the external electrodes formed of a material to which solder is attached among the opposing external electrodes are at diagonal positions with respect to each other. A ceramic capacitor, characterized in that:
JP33166293A 1993-12-27 1993-12-27 Ceramic capacitors Expired - Lifetime JP3168801B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33166293A JP3168801B2 (en) 1993-12-27 1993-12-27 Ceramic capacitors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33166293A JP3168801B2 (en) 1993-12-27 1993-12-27 Ceramic capacitors

Publications (2)

Publication Number Publication Date
JPH07192966A JPH07192966A (en) 1995-07-28
JP3168801B2 true JP3168801B2 (en) 2001-05-21

Family

ID=18246181

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33166293A Expired - Lifetime JP3168801B2 (en) 1993-12-27 1993-12-27 Ceramic capacitors

Country Status (1)

Country Link
JP (1) JP3168801B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000012301A (en) * 1998-06-24 2000-01-14 Murata Mfg Co Ltd Method for mounting electronic part
JP5367154B2 (en) * 2009-03-26 2013-12-11 ケメット エレクトロニクス コーポレーション Leaded multilayer ceramic capacitor with low ESL and ESR

Also Published As

Publication number Publication date
JPH07192966A (en) 1995-07-28

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