JP3147338B2 - Semiconductor substrate manufacturing method - Google Patents
Semiconductor substrate manufacturing methodInfo
- Publication number
- JP3147338B2 JP3147338B2 JP03157191A JP3157191A JP3147338B2 JP 3147338 B2 JP3147338 B2 JP 3147338B2 JP 03157191 A JP03157191 A JP 03157191A JP 3157191 A JP3157191 A JP 3157191A JP 3147338 B2 JP3147338 B2 JP 3147338B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- temperature
- film
- epitaxial
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【０００１】[0001]
【産業上の利用分野】この発明は、半導体基板の製造方
法、特に高濃度不純物を局所または全体に有する半導体
基板へのエピタキシャル膜成長方法に係り、所定成膜温
度より高温度からの降温中に第一層目のエピタキシャル
層を成膜し、次いで所定成膜温度で第二層目のエピタキ
シャル層を成膜し、高濃度不純物領域からのオートドー
ピングを防止して、均質かつすぐれた特性のエピタキシ
ャル膜を得る半導体基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to a method for growing an epitaxial film on a semiconductor substrate having a high concentration impurity locally or entirely. A first epitaxial layer is formed, and then a second epitaxial layer is formed at a predetermined film forming temperature to prevent auto-doping from a high-concentration impurity region. The present invention relates to a method for manufacturing a semiconductor substrate for obtaining a film.
【０００２】[0002]
【従来の技術】従来、高濃度不純物を局所的に有する半
導体基板にエピタキシャル膜形成を行なう場合には、例
えば、図２に示す如く、ＳｉＨＣｌ3（トリクロールシ
ラン）をＳｉ源として使用し、１１５０〜１１９０℃の
温度でＨ2（水素）ガスやＨ2＋ＨＣｌ（塩酸ガス）の混
合ガスにて半導体基板表面をエッチングして清浄化した
後に、１０００℃に温度を下げてＳｉＨＣｌ3ガスに不
純物ガスを混合したガスを所定の厚さのエピタキシャル
膜になるまで、エピタキシャル膜形成の方法が主に用い
られていた。Conventionally, when the high concentration impurity the epitaxial film formed on a semiconductor substrate having locally, for example, as shown in FIG. 2, using SiHCl 3 a (trichloroacetic silane) as an Si source, 1150 the semiconductor substrate surface with a mixed gas of H 2 (hydrogen) gas or H 2 + HCl (hydrochloric acid gas) after etched and cleaned at a temperature of ~1190 ℃, impurity gas SiHCl 3 gas temperature was lowered to 1000 ° C. Until a gas having a predetermined thickness is formed into an epitaxial film having a predetermined thickness, a method of forming an epitaxial film has been mainly used.
【０００３】従来の半導体基板に半導体素子を形成した
場合、耐圧特性の劣化や電流増幅率の低下等の半導体素
子特性が劣化してしまうという問題があった。[0003] When a semiconductor element is formed on a conventional semiconductor substrate, there has been a problem that the semiconductor element characteristics such as the breakdown voltage characteristic and the current amplification factor are deteriorated.
【０００４】[0004]
【発明が解決しようとする課題】従来の半導体基板に半
導体素子を形成した場合、耐圧特性の劣化や電流増幅率
の低下等の半導体素子特性が劣化してしまうという問題
に鑑み、成膜行程を検討した結果、成膜に先駆けて行う
成膜温度以上の高温度エッチング清浄後、降温し所定の
成膜温度で成膜する際にオートドーピングがあり、これ
が膜特性を劣化させることを知見した。In the case where a semiconductor element is formed on a conventional semiconductor substrate, in view of the problem that the semiconductor element characteristics such as the withstand voltage characteristic and the current amplification factor are deteriorated, the film forming process is reduced. As a result of the study, it was found that auto-doping occurs when the film is cooled at a predetermined film forming temperature after high-temperature etching cleaning at a film forming temperature higher than the film forming temperature prior to film forming, and this deteriorates film characteristics.
【０００５】すなわち、従来のエピタキシャル成長の方
法では、半導体基板表面をエッチング清浄化した後に、
所定の温度まで温度を下げてからエピタキシャル膜を成
長していたため、エピタキシャル成長中に基板及び基板
内の高濃度不純物領域からのオートドーピングのため、
エピタキシャル膜内に高濃度不純物層や、反転層が形成
されてしまい、実効エピタキシャル膜厚みが減少するこ
とを知見した。That is, in the conventional epitaxial growth method, after the surface of the semiconductor substrate is cleaned by etching,
Because the epitaxial film was grown after lowering the temperature to the predetermined temperature, during the epitaxial growth, for auto doping from the substrate and the high concentration impurity region in the substrate,
It has been found that a high-concentration impurity layer and an inversion layer are formed in the epitaxial film, and the effective epitaxial film thickness is reduced.
【０００６】このため、従来のエピタキシャル成長によ
る半導体基板に半導体素子を形成した場合、実効エピタ
キシャル膜厚みが減少し、素子の電気的特性を劣化させ
るため、耐圧特性の劣化や電流増幅率の低下等の半導体
素子特性が劣化してしまうという問題が生じていた。For this reason, when a semiconductor device is formed on a semiconductor substrate by conventional epitaxial growth, the effective epitaxial film thickness is reduced, and the electrical characteristics of the device are deteriorated. There has been a problem that the characteristics of the semiconductor element are deteriorated.
【０００７】この発明は、表面に高濃度不純物領域を形
成した半導体基板上に形成したエピタキシャル膜の特性
の劣化を防止、すなわち実効エピタキシャル膜厚みを減
少させない成膜方法の提供を目的としている。[0007] This invention prevents the deterioration of the characteristics of the epitaxial film formed on a semiconductor substrate formed with high concentration impurity regions on the surface, i.e., to provide a reduced <br/> small let no film forming method effective epitaxial film thickness The purpose is.
【０００８】[0008]
【課題を解決するための手段】この発明は、表面に高濃
度不純物領域を形成した半導体基板上にエピタキシャル
層を形成する半導体基板の製造方法において、所定成膜
温度より高温度からの降温中に第一層目のエピタキシャ
ル層を成膜し、次いで所定成膜温度で第二層目のエピタ
キシャル層を成膜することを特徴とする半導体基板の製
造方法である。SUMMARY OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor substrate in which an epitaxial layer is formed on a semiconductor substrate having a high-concentration impurity region formed on a surface thereof. A method for manufacturing a semiconductor substrate, comprising forming a first epitaxial layer and then forming a second epitaxial layer at a predetermined film forming temperature.
【０００９】[0009]
【作用】この発明は、高濃度不純物領域を形成した半導
体基板上にエピタキシャル層を形成する半導体基板の製
造方法において、所定のエピタキシャル層成長温度より
高い温度より温度を下げながら、第一層目のエピタキシ
ャル層を成長させた後に所定の温度で第二層目のエピタ
キシャル層を成長させるものである。According to the present invention, in a method of manufacturing a semiconductor substrate in which an epitaxial layer is formed on a semiconductor substrate in which a high concentration impurity region is formed, the temperature of the first layer is reduced while the temperature is lower than a predetermined epitaxial layer growth temperature. After the epitaxial layer is grown, a second epitaxial layer is grown at a predetermined temperature.
【００１０】したがって、この発明による半導体基板
は、所定成膜温度より高温度からの降温中に第一層目の
エピタキシャル層を成膜するため、エピタキシャル成長
中に基板及び基板内の高濃度不純物領域からのオートド
ーピングが防止され、成膜された膜厚みの全てが利用で
き、従来の如き実効エピタキシャル膜厚みの減少がな
い。この発明による半導体基板に半導体素子を形成した
場合、素子の設計に必要な実効エピタキシャル膜厚みを
確保できるため、設計どおりの電気的特性を発揮させる
ことができる。Therefore, in the semiconductor substrate according to the present invention, the first epitaxial layer is formed while the temperature is lowered from a temperature higher than a predetermined film forming temperature. Is prevented, the entire thickness of the formed film can be used, and there is no decrease in the effective epitaxial film thickness unlike the conventional case. When a semiconductor element is formed on a semiconductor substrate according to the present invention, an effective epitaxial film thickness required for element design can be ensured, so that electrical characteristics as designed can be exhibited.
【００１１】この発明による製造方法において、所定成
膜温度より高温度とは、所定のエピタキシャル層成長温
度より高い温度であり、例えば、Ｈ2ガスによる半導体
基板表面清浄化の工程、ＨＣｌガスによるガスエッチン
グ工程での雰囲気温度などをいう。すなわち、実施例で
はＨ2ガスによる半導体基板表面清浄化の工程を用いた
場合を示すが、ＨＣｌガスによるガスエッチング工程を
導入し、かかるガスエッチングの雰囲気温度からの降温
中に第一層目のエピタキシャル層を成膜することもでき
る。In the manufacturing method according to the present invention, the temperature higher than a predetermined film forming temperature is a temperature higher than a predetermined epitaxial layer growth temperature, for example, a step of cleaning the surface of a semiconductor substrate by H 2 gas, a gas of HCl gas, It refers to the ambient temperature in the etching step. That is, in the embodiment, the case of using the step of cleaning the surface of the semiconductor substrate using H 2 gas is shown. However, a gas etching step using HCl gas is introduced, and the temperature of the first layer is reduced during the temperature lowering from the ambient temperature of the gas etching. An epitaxial layer can also be formed.
【００１２】また、高濃度不純物領域を形成した半導体
基板の成膜において、成膜前の種々の清浄工程、あるい
は成膜温度より高い熱処理工程などの工程を経る場合な
ど、いずれの場合もこの発明を適用することができる。
実施例ではＰ型半導体基板にＮ型高濃度不純物領域を形
成した上で、ＳｉＨＣｌ3を用いてＮ型エピタキシャル
膜を形成する場合について説明するが、いずれの半導体
基板の製造方法にもこの発明を適用することができる。
また、エピタキシャル膜のシリコンガスとして、実施例
ではＳｉＨＣｌ3ガスを用いるが、他にＳｉＨ2Ｃｌ2、
ＳｉＣｌ4を用いることもでき、何れの材質の成膜にも
この発明を適用することができる。In addition, in the case of forming a semiconductor substrate having a high-concentration impurity region formed therein, the present invention may be applied to any of a variety of cleaning steps before the film formation, a heat treatment step higher than the film formation temperature, and the like. Can be applied.
In the embodiment, a case in which an N-type high-concentration impurity region is formed in a P-type semiconductor substrate, and then an N-type epitaxial film is formed using SiHCl 3 will be described. Can be applied.
Further, as the silicon gas for the epitaxial film, SiHCl 3 gas is used in the embodiment, but SiH 2 Cl 2 ,
SiCl 4 can also be used, and the present invention can be applied to film formation of any material.
【００１３】この発明による製造方法は、所定成膜温度
より高温度からの降温中に成膜した第一層目エピタキシ
ャル層と、続く所定成膜温度での成膜による第二層目エ
ピタキシャル層とで所定膜厚みのエピタキシャル層を得
るものであるが、第一層目と第二層目の厚み比率がエピ
タキシャル膜内不純物濃度分布に影響するため、半導体
基板の用途、すなわち後工程で成膜する半導体素子等あ
るいは要求されるエピタキシャル膜の特性等に応じて、
例えば全膜厚み３μｍ程度の場合、第一層目のエピタキ
シャル層を０．５〜１μｍ程度とするなど、第一層目と
第二層目の厚み比率を適宜選定することができる。According to the manufacturing method of the present invention, the first epitaxial layer formed while the temperature is lowered from a temperature higher than the predetermined film forming temperature, and the second epitaxial layer formed by the subsequent film formation at the predetermined film forming temperature. Is used to obtain an epitaxial layer having a predetermined film thickness, but since the thickness ratio of the first layer and the second layer affects the impurity concentration distribution in the epitaxial film, it is used for a semiconductor substrate, that is, a film is formed in a later step. Depending on the characteristics of the semiconductor device or the required epitaxial film, etc.
For example, when the total film thickness is about 3 μm, the thickness ratio of the first layer to the second layer can be appropriately selected, for example, the thickness of the first epitaxial layer is about 0.5 to 1 μm.
【００１４】また、第一層目と第二層目の厚み比率に応
じて、所定成膜温度より高温度からの降温時の降温勾配
を選定したり、あるいは第一層と第二層で膜材質あるい
は成膜ガスを変えるなどの成膜手段を用いることによ
り、積極的にエピタキシャル膜内不純物濃度分布を制御
することもでき、半導体素子等あるいは要求されるエピ
タキシャル膜の特性等に応じた半導体基板を製造するこ
とができる。In addition, depending on the thickness ratio of the first layer and the second layer, it is possible to select a temperature drop gradient when the temperature is lowered from a temperature higher than a predetermined film forming temperature, or to form a film between the first layer and the second layer. By using film forming means such as changing the material or the film forming gas, the impurity concentration distribution in the epitaxial film can be positively controlled, and the semiconductor substrate according to the characteristics of the semiconductor device or the required epitaxial film can be positively controlled. Can be manufactured.
【００１５】[0015]
【実施例】図１は、Ｐ型半導体基板にＮ型高濃度不純物
領域を形成した上で、ＳｉＨＣｌ3を用いてＮ型エピタ
キシャル膜を形成するこの発明の一実施例を示すエピタ
キシャル成長時の温度と時間の関係を示すグラフであ
る。DETAILED DESCRIPTION FIG. 1, after forming the N-type high concentration impurity regions in the P-type semiconductor substrate, and the temperature during the epitaxial growth of an embodiment of the present invention for forming the N-type epitaxial film using SiHCl 3 It is a graph which shows the relationship of time.
【００１６】まず、１１７０℃の温度で、Ｈ2ガスを用
いて高濃度不純物領域を有する半導体基板表面を清浄化
した後に、温度を下げながら、ＳｉＨＣｌ3ガスをＳｉ
源として用いて、厚さ０．５μｍ程度の第一層目のエピ
タキシャル層を形成する。次に、所定の温度１０００℃
にて、所定の膜厚となるように第二層目のエピタキシャ
ル層を形成する。上記の製造方法にて、Ｎ型の高濃度不
純物領域（層抵抗１０Ω／口）を形成したＰ型のシリコ
ン基板（比抵抗１０〜２０Ω−ｃｍ）上に、全体厚さと
して３μｍで比抵抗５Ω−ｃｍのＮ型エピタキシャル層
を形成した場合のエピタキシャル膜内不純物濃度分布を
図３に示す。First, the surface of a semiconductor substrate having a high concentration impurity region is cleaned at a temperature of 1170 ° C. using H 2 gas, and then, while the temperature is lowered, SiHCl 3 gas is removed.
A first epitaxial layer having a thickness of about 0.5 μm is formed as a source. Next, a predetermined temperature of 1000 ° C.
Then, a second epitaxial layer is formed to have a predetermined thickness. According to the above-described manufacturing method, a total thickness of 3 μm and a specific resistance of 5Ω is formed on a P-type silicon substrate (specific resistance of 10 to 20 Ω-cm) on which an N-type high-concentration impurity region (layer resistance of 10 Ω / port) is formed. FIG. 3 shows the impurity concentration distribution in the epitaxial film when the −cm N-type epitaxial layer is formed.
【００１７】比較のため上述の如くＰ型の比抵抗１０〜
２０Ω−ｃｍのシリコン基板に高濃度のＮ型不純物を１
×１０18〜１０19ａｔｏｍｓ／ｃｃの濃度で局所的に注
入した上に、図２に示す如く、従来の成膜方法で比抵抗
５Ω−ｃｍの厚さ３μｍＮ型エピタキシャル膜を形成し
た場合のエピタキシャル成長膜内の不純物濃度分布を図
４に示す。For comparison, a P-type specific resistance of 10 to 10
A high-concentration N-type impurity is added to a 20 Ω-cm silicon substrate.
As shown in FIG. 2, after a local injection at a concentration of × 10 18 to 10 19 atoms / cc, a 3 μm-thick N-type epitaxial film having a specific resistance of 5Ω-cm was formed by a conventional film forming method. FIG. 4 shows the impurity concentration distribution in the film.
【００１８】図４に示す如く、従来の成膜方法ではオー
トドーピングの影響により実質的なエピタキシャル膜厚
（フラットゾーン幅）が、成長エピタキシャル膜厚より
も減少していることがわかる。これに対してこの発明の
成膜方法では半導体基板とエピタキシャル膜との界面近
傍での不純物濃度勾配が、従来に比して急勾配となって
おり、エピタキシャル成長中のオートドーピングが防止
され、実効エピタキシャル膜厚みの減少がないことがわ
かる。As shown in FIG. 4, in the conventional film forming method, the substantial epitaxial film thickness (flat zone width) is smaller than the grown epitaxial film due to the influence of auto doping. On the other hand, in the film forming method of the present invention, the impurity concentration gradient near the interface between the semiconductor substrate and the epitaxial film is steeper than in the past, so that auto doping during epitaxial growth is prevented, and the effective epitaxial growth is prevented. It can be seen that there is no decrease in the film thickness.
【００１９】[0019]
【発明の効果】この発明は、上述した如く、高濃度不純
物領域を局所的または全体に形成された半導体基板上に
エピタキシャル膜を形成する場合に、所定のエピタキシ
ャル成長温度より高い温度より温度を下げながら第一層
目のエピタキシャル膜を成長させ、次に所定の温度で第
二層目のエピタキシャル膜を成長させる工程であるた
め、高濃度不純物領域からのオートドーピングを低減さ
せて、不純物濃度勾配の急なエピタキシャル膜を形成で
き、耐圧特性の優れた半導体素子用の半導体基板を得る
ことができる。According to the present invention, as described above, when an epitaxial film is formed on a semiconductor substrate in which a high-concentration impurity region is locally or entirely formed, the temperature is lowered from a temperature higher than a predetermined epitaxial growth temperature. Since this is a step of growing the first-layer epitaxial film and then growing the second-layer epitaxial film at a predetermined temperature, the auto-doping from the high-concentration impurity region is reduced and the impurity concentration gradient is sharply increased. Thus, a semiconductor substrate for a semiconductor element having excellent withstand voltage characteristics can be obtained.
【図１】この発明の一実施例を示すエピタキシャル成長
時の温度と時間の関係を示すグラフである。FIG. 1 is a graph showing the relationship between temperature and time during epitaxial growth showing one embodiment of the present invention.
【図２】従来の成膜方法を示すエピタキシャル成長時の
温度と時間の関係を示すグラフである。FIG. 2 is a graph showing a relationship between temperature and time during epitaxial growth showing a conventional film forming method.
【図３】この発明による半導体基板のエピタキシャル成
長膜内の不純物濃度を示す不純物濃度分布図である。FIG. 3 is an impurity concentration distribution diagram showing an impurity concentration in an epitaxial growth film of a semiconductor substrate according to the present invention.
【図４】従来の製造方法による半導体基板のエピタキシ
ャル成長膜内の不純物濃度を示す不純物濃度分布図であ
る。FIG. 4 is an impurity concentration distribution diagram showing an impurity concentration in an epitaxially grown film of a semiconductor substrate according to a conventional manufacturing method.
Claims (1)
体基板上にエピタキシャル層を形成する半導体基板の製
造方法において、所定成膜温度より高温度からの降温中
に第一層目のエピタキシャル層を成膜し、次いで所定成
膜温度で第二層目のエピタキシャル層を成膜することを
特徴とする半導体基板の製造方法。In a method of manufacturing a semiconductor substrate, wherein an epitaxial layer is formed on a semiconductor substrate having a high-concentration impurity region formed on a surface, a first epitaxial layer is formed during a temperature lower than a predetermined film forming temperature. A method for manufacturing a semiconductor substrate, comprising: forming a film and then forming a second epitaxial layer at a predetermined film forming temperature.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03157191A JP3147338B2 (en) | 1991-01-30 | 1991-01-30 | Semiconductor substrate manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03157191A JP3147338B2 (en) | 1991-01-30 | 1991-01-30 | Semiconductor substrate manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04245419A JPH04245419A (en) | 1992-09-02 |
| JP3147338B2 true JP3147338B2 (en) | 2001-03-19 |
Family
ID=12334864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03157191A Expired - Lifetime JP3147338B2 (en) | 1991-01-30 | 1991-01-30 | Semiconductor substrate manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3147338B2 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4782670B2 (en) * | 2003-03-13 | 2011-09-28 | エーエスエム アメリカ インコーポレイテッド | Epitaxial Ge-containing film growth method and epitaxial semiconductor film forming system |
| US7682947B2 (en) | 2003-03-13 | 2010-03-23 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
| US7718225B2 (en) * | 2005-08-17 | 2010-05-18 | Applied Materials, Inc. | Method to control semiconductor film deposition characteristics |
| JP5267176B2 (en) * | 2009-02-04 | 2013-08-21 | 富士電機株式会社 | Thin film formation method |
| US9127345B2 (en) | 2012-03-06 | 2015-09-08 | Asm America, Inc. | Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent |
| US9171715B2 (en) | 2012-09-05 | 2015-10-27 | Asm Ip Holding B.V. | Atomic layer deposition of GeO2 |
| US9218963B2 (en) | 2013-12-19 | 2015-12-22 | Asm Ip Holding B.V. | Cyclical deposition of germanium |
-
1991
- 1991-01-30 JP JP03157191A patent/JP3147338B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04245419A (en) | 1992-09-02 |
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