JP3130287B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which protects an integrated circuit portion of a semiconductor device, stably secures an electrical connection between an external device and the semiconductor device, and which enables the highest density mounting. It is. The semiconductor device of the present invention facilitates miniaturization of industrial electronic devices such as information communication devices, office electronic devices, home electronic devices, measuring devices, and assembly robots, medical electronic devices, and electronic toys. is there.

[0002]

2. Description of the Related Art A conventional semiconductor device will be described below with reference to the drawings. FIG. 11 is a cross-sectional view showing a conventional semiconductor device called a quad flat pack (QFP). The configuration of a conventional semiconductor device will be described with reference to FIG. As a conventional semiconductor device, a semiconductor device in which external electrode terminals are provided on side surfaces of a semiconductor package will be described as an example.

A semiconductor element 1 having an electrode (not shown) on its surface is mounted in a recess 3 of a semiconductor package 2 using ceramic or the like as an insulating base. A wire bond area 4 is formed around the recess 3 where the semiconductor element 1 of the semiconductor package 2 is mounted, and an electrode 5 corresponding to the electrode formed on the semiconductor element 1 is formed in the wire bond area 4. It is formed. Then, the electrode 5 in the wire bond area 4 and the electrode formed on the semiconductor element 1 are joined by a thin wire 6 such as Au. Further, an external electrode terminal 7 is formed on a side surface of the semiconductor package 2 for conduction between the electrode 5 in the wire bond area 4 and the outside. A cover 8 is attached for the purpose of protecting the semiconductor element 1, the electrode 5 of the wire bond area 4, and the thin wire 6 such as Au bonded to the electrode formed on the semiconductor element 1.

Next, a conventional method for manufacturing a semiconductor device will be described with reference to the drawings. 12 to 14 are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device.

[0005] A conventional method of manufacturing a semiconductor device comprises a die bonding step, a wire bonding step, and a sealing step.

First, a die bonding step will be described with reference to FIG. The semiconductor element 1 is mounted on a concave portion 3 of a semiconductor package 2 using a ceramic or the like as an insulating base by using a conductive adhesive. This step is performed by an apparatus called a die bonder.

Next, a wire bonding step will be described with reference to FIG. The electrodes of the semiconductor element 1 mounted on the semiconductor package 2 and the electrodes 5 of the wire bond areas 4 provided on the semiconductor package 2 are electrically connected to each other by thin wires 6 of Au or Al. This step is performed by an apparatus called a wire bonder.

Finally, the sealing step will be described with reference to FIG. After the electrodes are connected to each other with a thin wire 6 of Au or Al, a cover 8 is provided to protect the thin wire 6 and the semiconductor element 1.
To seal the recess 3 of the semiconductor package 2. The lid 8 is attached to the semiconductor package 2 with an adhesive and sealed.

Conventionally, the types of semiconductor packages of a semiconductor device can be roughly divided into two types. First, there is a ceramic package. Ceramic packages are further classified into laminated ceramic packages and glass-sealed ceramic packages. Laminated ceramic packages are made by forming fine holes in the green sheet by mechanical processing at necessary positions on the wiring, filling the holes with conductive paste, printing and forming circuits, and then laminating. Then, the package body is manufactured by firing in a reducing atmosphere. The glass-sealed ceramic package applies low-melting glass to the top surface of the package body, attaches the lead frame, and then melts the low-melting glass in a heating furnace to join the package body and the lead frame. An Au paste or the like is applied to the center where the semiconductor element is mounted. The most commonly used is a plastic package. In this type of package, a semiconductor element is mounted on a lead frame, and after electrical connection is made by a wire bonding method, the package is held in a hollow portion of a mold and mainly made of a thermosetting resin such as an epoxy resin. After the resin has flowed in, it is cured. Ceramic package,
For the plastic package, a wire bonding method using a fine Au or Al wire for electrical connection between the semiconductor element and the package is mainly used. In the case of the mounting method using this wire bonding method, it is necessary to provide a wiring region for connecting a wire to a peripheral portion where the semiconductor element is attached, which has been an obstacle to miniaturization of a package.

Further, a package using a flip-chip mounting method for mounting a semiconductor element directly on a circuit board has been studied. A package using the flip chip mounting method is disclosed in Japanese Patent Application Laid-Open No. Sho 62-118549, when ceramic is used as a substrate material of the package and in Japanese Patent Application Laid-Open No. 63-65656. Thus, the case where the resin base material is used as the substrate material is being studied. One of the features of the flip-chip package that has been studied in the past is that, like the conventional wire-bonding type ceramic package, the part where the semiconductor element is mounted is hollow, and the semiconductor is mounted after the semiconductor element is mounted. In order to protect the element,
The lid made of metal or ceramic etc.
The low-melting glass or Au-Sn alloy is used as a joining material, or is attached by using a method such as resistance pressure welding. With the miniaturization and high performance of electronic devices, the semiconductor package is required to increase the number of external electrodes and reduce the size and thickness of the semiconductor package body. Further, a heat sink is attached and mounted due to heat generated from the semiconductor element.

[0011]

However, in the above-mentioned conventional semiconductor device, the wiring layer of the semiconductor package 2 is made finer and multi-layered, the mounting direction of the external electrode terminals 7 is made multidirectional, and the distance between the external electrode terminals 7 is reduced. Although it has a structure corresponding to miniaturization, a wire bonding method is generally used as an electrical connection method between the semiconductor element 1 and the semiconductor package 2. Therefore, as a region for forming an internal electrode terminal which is an electrode 5 for wiring the thin wire 6 around the periphery of the semiconductor element 1, 2.0 mm or more around the semiconductor element 1 and a region for attaching the lid 8 2.0 mm or more around the bond area 4 is required. For this reason, it is impossible to make the area of the semiconductor package 2 approximately equal to the dimension of the semiconductor element 1, and it is not possible to satisfy the demands for downsizing and thinning of the semiconductor package body. In a method of mounting semiconductor elements directly on a circuit board without housing them in a semiconductor package in order to mount the semiconductor elements on the circuit board of the device at a high density, a heat sink is attached due to heat generated from the semiconductor elements. Since it must be mounted, thinning cannot be realized.

The present invention has been made to solve the above-mentioned problems, and it is possible to reduce the area required for mounting a semiconductor element, to reduce the thickness, and to suppress the fineness of the interval between external electrode terminals of a semiconductor package. It is an object of the present invention to provide a semiconductor device having an electrode configuration and capable of ensuring normal operation without a heat sink.

[0013]

To solve the above problems, a semiconductor device according to the present invention has the following configuration. That is, a semiconductor element having a bump electrode (Au bump) is face-down mounted on an electrode on a surface of a semiconductor carrier made of an insulating substrate with a conductive adhesive via the bump electrode, and the semiconductor element and the semiconductor carrier are connected to each other. In a semiconductor device in which a gap and a peripheral edge of the semiconductor element are filled and covered with a thermosetting resin, the semiconductor element and the semiconductor carrier have substantially the same size under the condition that the semiconductor carrier is larger than the semiconductor element. And
The semiconductor element and the semiconductor carrier have a bimetal effect.
A thin obtain results, and the different thermal expansion coefficient between the semiconductor element and the semiconductor carrier, the thermosetting resin is an epoxy resin, the thermosetting resin between the semiconductor element and the semiconductor carrier A semiconductor device in which a contact angle between the semiconductor carrier and the thermosetting resin is provided at an angle of 60 degrees or less so as to protrude from the interval onto the semiconductor carrier.

[0014]

With the above configuration, the semiconductor device according to the present invention does not require a wire bonding area which has been indispensable for connecting semiconductor elements.
In addition, the semiconductor element can be protected by penetrating a thermosetting resin between the semiconductor carrier and the semiconductor element and heat-hardening the same, and there is no need to attach the lid, so that the lid attachment area can be eliminated. Since the thermosetting resin is a resin obtained by adding a high thermal conductive ceramic to an epoxy-based resin, the coefficient of thermal expansion is reduced, and the improved thermal conductivity ensures the normal operation of the semiconductor device without a heat sink. be able to.

Further, by using a solder bump structure in which a region for attaching an external electrode terminal uses the entire bottom surface of the carrier and enables formation of a narrow pitch of grid electrodes, it is easy to make the semiconductor device extremely small. . Further, since the mounting electrode of the circuit board is provided below the package body region, an effective area can be used.

Further, since the contact angle of the sealing resin with the semiconductor carrier is formed at an angle of 60 degrees or less, a film for electrical connection can be effectively formed from the back surface of the semiconductor element to the electrode of the semiconductor carrier. Therefore, when the back surface is used as an electrode such as a power IC transistor, a so-called back bias that creates a negative voltage in a semiconductor device and connects to a substrate electrode or the like like a random access memory or a microcomputer can be obtained. Thus, when the semiconductor element is mounted face down, it is not necessary to consider the type of the semiconductor element. Also, since the semiconductor element and the semiconductor carrier have substantially the same size, the shear stress applied to the bump can be eliminated by the principle of bimetal, and the conductive adhesive is formed only around the bump. , The reliability of the joint can be obtained.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

First, a first embodiment will be described. FIG.
FIG. 2 is a plan view of the semiconductor device according to the embodiment. FIG. 2 is a bottom view of the semiconductor device according to the present embodiment. FIG. 3 is a cross-sectional view of the semiconductor device according to the present embodiment.
The cross section taken along the line A1 is shown.

1, 2 and 3, the configuration of the semiconductor device according to the present embodiment will be described.

Au bumps 9 are formed on electrodes (not shown) on the surface.
Is bonded to a semiconductor carrier 11 which is a multilayer circuit board using ceramic as an insulating base with its surface side down. A plurality of electrodes 1 for conduction with the semiconductor element 10 are provided on the upper surface of the semiconductor carrier 11.
2 are formed, and the electrode 12 and the Au bump 9 formed on the semiconductor element 10 are joined by a conductive adhesive 13. The conductive adhesive 13 is supplied to the Au bump 9 in advance. Then, the bonded semiconductor element 1
0 and the semiconductor element 1
The zero end is filled and covered with an epoxy-based sealing resin 14. The sealing resin 14 is a high thermal conductive ceramic such as aluminum nitride (A
1N) or a resin to which silicon carbide (SiC) is added. External electrode terminals 15 made of Ag-Pd are formed as a metallized metal layer in a lattice pattern at regular intervals on the bottom surface of the semiconductor carrier 11 which is a multilayer circuit board.
Other than Ag-Pd, Cu and Au may be used as the metallized metal layer. Furthermore, in the case where solder is used for the conductive adhesive 13 used for bonding the Au bump 9 of the semiconductor element 10 and the semiconductor carrier 11 for Au plating for the purpose of preventing surface oxidation of the electrode material, the metallized solder is prevented from being eroded. Ni plating is performed for the purpose. The interval between the external electrode terminals 15 formed in a lattice shape made of a metallized metal layer is about 0.8 mm. If it is larger than 1.0 mm, miniaturization cannot be realized, and if it is 0.6 mm or less, high precision is required when mounting the carrier on the wiring board. Furthermore, since it becomes difficult to secure a sufficient bump height, it becomes difficult to obtain a stable connection due to a problem such as warpage of the wiring board surface.

The first purpose of using an epoxy resin for the sealing resin 14 is that the semiconductor element 10 and the semiconductor carrier 11 are used.
This is to prevent the thermal stress due to the thermal stress difference from the above from being concentrated on the Au bump 9 and the conductive adhesive 13. After the curing, the semiconductor element 10 and the semiconductor carrier 11 are firmly fixed with an epoxy resin having a large elastic coefficient, so that the stress based on the difference in the deformation amount of the semiconductor carrier 11 and the semiconductor element 10 due to the temperature change is reduced. This is because the conversion into bending deformation based on the principle eliminates the shear stress applied to the bump. Second
This is because the epoxy resin has a lower moisture permeation than other resins such as novolak resin. Third, instead of silica (SiO ₂ ), which is generally used as a filler, for an epoxy resin, aluminum nitride (AlN), and silicon carbide (SiC) as a highly thermally conductive ceramic are added. This makes it possible to control the coefficient of thermal expansion and the thermal conductivity, thereby preventing a rise in temperature due to the generation of heat accompanying the operation of the semiconductor device and reducing the stress generated in the semiconductor device.

Next, a second embodiment will be described with reference to the drawings. FIG. 4 is a sectional view showing a semiconductor device according to the second embodiment.

As shown in FIG. 4, the basic structure is the same as that of the first embodiment, except that a conductive film 16 such as Au is formed on the back surface of the semiconductor element 10,
4 in that the conductive film 17 is partially formed on the conductive film 4. With this configuration, the conductive film 16 formed on the back surface of the semiconductor element 10 and the electrode 18 on the semiconductor carrier 11 are connected by the conductive film 17 to generate a negative voltage in the semiconductor element 10 and connect to the substrate electrode and the like. A so-called back bias can be taken.

Next, a method of manufacturing a semiconductor device according to a third embodiment will be described with reference to the drawings. FIG.
It is a figure which shows an Au bump formation process. 6 to 8 are partial cross-sectional views illustrating a method of manufacturing the semiconductor device according to the present embodiment for each process.

First, as shown in FIG. 5, Au bumps 9 (Au two-step projections) are formed on the electrodes 19 of the semiconductor element 10 by using a wire bonding method (ball bonding method). In this method, a ball formed at the tip of the Au wire is heat-pressed to an aluminum electrode to form a lower step portion of the two-step projection, and further, by moving the capillary 20, an Au wire loop is formed.
The upper part of the two-step projection is formed. In the above state, A
Since the height of the u two-step projections is not uniform and the flatness of the top of the head is also lacking, uniformization of the height and flattening of the top of the head, so-called leveling, are performed by pressing the Au two-step projections. Do.

Next, a conductive adhesive 13 containing Ag-Pd as a conductive material is applied on the rotating disk by a doctor blade method to an appropriate thickness. At this time, the conductive adhesive 13 is agitated on a disk with a squeegee in order to always maintain a fresh surface. As shown in FIG. 6, the semiconductor device 10 provided with the Au bumps 9 is pressed against the conductive adhesive 13 and then pulled up.
The conductive adhesive 13 is supplied to the u bump 9. As the conductive adhesive 13, for example, an epoxy resin is used as a binder and an adhesive made of an Ag-Pd alloy is used as a conductive filler in consideration of reliability, thermal stress, and the like.

Next, as shown in FIG. 7, the Au bump 9 supplied with the conductive adhesive 13 on the semiconductor element 10 is formed by the flip-chip method, which is a method of mounting the semiconductor element 10 with its surface down. After bonding the electrodes 12 on the semiconductor carrier 11 whose external electrode terminals 15 are formed at regular intervals in a grid pattern on the bottom surface with good positional accuracy, the thermosetting is performed at a constant temperature. For example, when an epoxy resin is used as the binder and a conductive adhesive made of an Ag-Pd alloy is used as the conductive filler as the conductive adhesive 13, the heating is performed at a temperature of 100 ° C. for 1 hour and further at a temperature of 120 ° C. for 2 hours. Completes the joining.

Finally, as shown in FIG. 8, an epoxy-based sealing resin 14 is injected into a peripheral edge of the semiconductor element 10 and a gap formed between the semiconductor element 10 and the semiconductor carrier 11, It is cured at a certain temperature and resin molded. As a method of this resin molding, a sealing resin 14 is used.
Is injected into the gap formed between the semiconductor element 10 and the semiconductor carrier 11 from one direction using an injection nozzle, and the peripheral end of the semiconductor element 10 is sealed after filling the gap. As the sealing resin 14, a resin obtained by adding a high thermal conductive ceramic such as aluminum nitride (AlN) or silicon carbide (SiC) as a filler to an epoxy resin is used.
When the resin is supplied to the peripheral end portion of the semiconductor element 10, the resin sufficiently reaches the rear surface of the semiconductor element 10, and
The contact angle between 1 and the resin 14 is set to a small angle of 60 ° or less. After the supply of the sealing resin 14, the sealing resin 14 is cured by heating in an oven.

In the resin sealing step, in order to improve the voids generated when the resin is injected into the narrow gap and the prolonged injection time, which are problems of the conventionally known method, An ultrasonic oscillator is attached to a table for fixing the semiconductor carrier 11 at the time of resin injection, and an ultrasonic wave is applied during the resin injection to use a sealing resin injection method. By applying ultrasonic waves, bubbles in the resin that become voids when the resin is cured can be removed.

Next, a fourth embodiment will be described with reference to the drawings. FIG. 9 is a cross-sectional view showing the steps of the method for manufacturing a semiconductor device according to the present embodiment.

As shown in the third embodiment, the steps up to resin sealing are the same as those shown in FIGS. 5 to 8, but in this embodiment, the conductive The conductive film 17 is formed after the step of forming the conductive film 16 and sealing the resin. As shown in FIG. 9, using a dispenser or an offset printing method, an electrode that is not covered with the sealing resin 14 on the semiconductor carrier 11 from the back surface of the semiconductor element 10 through the surface of the sealing resin 14 using the conductive ultraviolet curable ink. Then, the conductive film 17 is formed by applying and curing until the conductive film 17 reaches. In order to form the conductive film 17 by applying the conductive ultraviolet curable ink by offset printing, the contact angle between the semiconductor carrier 11 and the sealing resin 14 is maintained at an angle of 60 ° or less, and the resin sealing is performed. There is a need to. The reason why the contact angle is set to 60 ° or less is that if the angle is larger than 60 °, the conductive ultraviolet curable ink cannot be applied to form the conductive film 17.

Further, for the production of the semiconductor carrier 11, first, a ceramic powder is put into a mixing mill together with a glass powder and a solvent, and is subjected to rotary mixing and pulverization. Further, an organic binder is added and further mixed. This ceramic powder,
Usually, the main component is alumina. However, in particular, aluminum nitride (AlN), silicon carbide (S
Powders such as iC) are also added. After thorough mixing, the resulting slurry, a so-called slurry, is applied to the carrier sheet at any thickness for green sheet molding.
The doctor blade method or the like is used for adjusting the thickness. The slurry on the conveying sheet is dried by using infrared rays and hot air to obtain a green sheet which is rich in elasticity and excellent in permeability of the paste solvent when printing the conductive paste. When the wiring rule is 200 μm or more, a guide hole is provided directly on the green sheet, and when the green sheet is less than 200 μm, the green sheet is attached to a holding frame having the guide hole. Next, holes are provided by mechanical processing in portions of the green sheet that require electrical conduction on the front and back. These holes are filled with a conductive paste mainly containing Cu powder by a printing method. Next, a necessary circuit is printed on the surface of the green sheet and then dried, and the printed circuit is buried in the green sheet with an appropriate load. The purpose of this is to make the surface of the green sheet on which the circuit is printed flat, thereby preventing lamination failure in the subsequent lamination step, so-called delamination. In the laminating step, the green sheets laminated with high precision are pressed by the guide holes provided in the green sheets or the guide holes of the holding frame, thereby firmly bonding the green sheets.

The Sn-Pb eutectic solder cream is applied to the grid electrodes formed on the back of the ceramic carrier thus completed. Then, after the high melting point solder balls are supplied to the applied solder cream using an alignment jig, the solder bumps are formed by heating and melting using a reflow furnace or the like, and the semiconductor carrier 11 is formed.

FIG. 10 shows an epoxy resin as the sealing resin 14.
Silica (SiO _Two) Is added
And aluminum nitride (A
1N) and silicon carbide (SiC)
For the semiconductor device sealed using the sealing resin in the case,
Drive by applying power of 1W (5V × 0.2A)
Diagram showing comparison of temperature rise of semiconductor element when heated
It is. Silica and aluminum nitride added as filler
And silicon carbide each have a particle size of 5 μm and an added amount of 4 μm.
0 wt%. Temperature measurement drives the semiconductor device,
When the temperature rises and the temperature becomes constant,
The temperature is 25 ° C., no wind.

FIG. 10 shows that when aluminum nitride and silicon carbide are added as fillers, the temperature rises to about 80 ° C., but 100 ° C. or more where the semiconductor device may malfunction, break down, or adversely affect the peripheral devices due to heat. Is not reached. If aluminum nitride is not added as a filler, the temperature rises to about 130 ° C. as in the case where silica is added, and a malfunction or failure occurs without a heat sink. The same effect can be obtained by using other high thermal conductive ceramics such as silicon carbide as the filler to be added, in addition to aluminum nitride.

The particle size of the filler to be added is 10 μm.
When m and the amount are set to 70 wt%, the thermal conductivity is further improved, but the fluidity is deteriorated at the time of sealing. Therefore, the particle size is preferably 5 μm and the amount is about 40 wt%.

[0038]

According to the present invention, the electrode area around the semiconductor element required for wire bonding and the area required for mounting the package lid, which are conventionally required, are unnecessary, and the entire bottom surface of the package having a smaller area can be used. Since the semiconductor package body can be effectively used, the size and thickness of the semiconductor package body can be reduced, and high-density mounting can be achieved. In addition, since the resin is sealed with a sealing resin obtained by adding aluminum nitride, which is a high thermal conductive ceramic, as a filler to an epoxy resin, the coefficient of thermal expansion can be reduced, so that stress generated in the semiconductor device can be reduced, and the thermal conductivity can be reduced. With the improvement, the semiconductor device can be driven, and normal operation can be ensured without a heat sink even when heat is generated. Further, since a conductive film for connecting the back surface of the semiconductor element and the electrode on the semiconductor carrier is provided, a back bias can be obtained.

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a bottom view of the semiconductor device according to one embodiment of the present invention;

FIG. 3 is a sectional view of a semiconductor device according to one embodiment of the present invention;

FIG. 4 is a sectional view of a semiconductor device according to one embodiment of the present invention;

FIG. 5 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 6 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 7 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 8 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 9 is a sectional view showing the method of manufacturing the semiconductor device according to one embodiment of the present invention;

FIG. 10 is a diagram showing a temperature rise during operation of the semiconductor device according to one embodiment of the present invention;

FIG. 11 is a sectional view showing a conventional semiconductor device.

FIG. 12 is a sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 13 is a sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 14 is a sectional view showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Semiconductor package 3 Depressed part 4 Wire bond area 5 Electrode 6 Fine wire 7 External electrode terminal 8 Lid 9 Au bump 10 Semiconductor element 11 Semiconductor carrier 12 Electrode 13 Conductive adhesive 14 Sealing resin 15 External electrode terminal 16 Conductivity Capable film 17 Conductive film 18 Electrode 19 Electrode 20 Capillary

──────────────────────────────────────────────────続 き Continuing on the front page (72) Katsuhide Tsukamoto, Inventor 1-1, Sakaicho, Takatsuki-shi, Osaka Inside Matsushita Electronics Corporation (72) Inventor Seiichi Nakatani 1-1, Sayukicho, Takatsuki-shi, Osaka Matsushita Electronics (72) Inventor Keiji Saeki 1-1, Sachimachi, Takatsuki-shi, Osaka Matsushita Electronics Corporation (72) Inventor Yoshifumi Kitayama 1-1, Sachimachi, Takatsuki-shi, Osaka Matsushita Electronics (56) References JP-A-5-166976 (JP, A) International Publication 93/15521 (WO, A1) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 23/28 H01L 21/60 311

Claims (1)

(57) [Claims] 1. A semiconductor device having a protruding electrode (Au bump) is mounted face down on an electrode on a surface of a semiconductor carrier made of an insulating substrate with a conductive adhesive via the protruding electrode, and the semiconductor device and the semiconductor are mounted. In a semiconductor device in which a space between the semiconductor element and the peripheral edge of the semiconductor element is filled and covered with a thermosetting resin, the semiconductor element and the semiconductor carrier have substantially the same size under the condition that the semiconductor carrier is larger than the semiconductor element. Having the said
The semiconductor element and the semiconductor carrier exhibit a bimetal effect.
Thickness, and the coefficient of thermal expansion between the semiconductor element and the semiconductor carrier is different, the thermosetting resin is made of an epoxy resin, and the thermosetting resin is formed from the distance between the semiconductor element and the semiconductor carrier. A semiconductor device, wherein a contact angle between the semiconductor carrier and the thermosetting resin protruding from the semiconductor carrier is provided at an angle of 60 degrees or less.