JP3096400B2 - Surface discharge type PDP and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface discharge type PDP (Plasma Display Panel) of a matrix display type and a driving method thereof.

[0002] PDPs are thin display devices that are excellent in visibility, capable of high-speed display, and are relatively easy to enlarge the screen. As the market for PDPs expands, the demand for display quality of surface-discharge-type PDPs, which are particularly suitable for color display using phosphors, is increasing.

[0003]

2. Description of the Related Art FIG. 5 is a plan view showing a basic structure of a surface discharge type PDP. The PDP includes a pair of glass substrates 11,
21 is a display device in which a discharge space having a gap dimension of about 100 to 200 μm is formed inside by sealing a peripheral portion of a facing region by disposing the facing space 21. In a matrix display type PDP, a display area (display screen) EH is defined by electrode groups arranged vertically and horizontally, and gas discharge of a sealing material 31 indicated by oblique lines in the figure near a sealing portion in a discharge space. As a result, the discharge becomes unstable, so that a non-display area EN is provided around the display area EH. Usually, the width of the non-display area EN is about 20 mm regardless of the screen size.

The surface discharge type PDP includes display electrodes X and Y defining a main discharge cell (surface discharge cell), an address electrode A defining a selected discharge cell together with one of the display electrodes Y, and a discharge space in a display region EH. Are partitioned in the line direction. The display electrodes X and Y are covered with a dielectric layer (not shown) for AC driving using wall charges, and are arranged so as to form a discharge sustaining electrode pair 12 for each display line.

In displaying by a surface discharge type PDP, wall charges are selectively accumulated in main discharge cells to be lit (lit) by a write address method or an erase address method, and then alternately applied to display electrodes X and Y. A discharge sustaining voltage is applied to periodically generate a surface discharge (discharge in a substrate surface direction). The display brightness is set by selecting the number of discharges per unit time.

In the surface discharge type PDP, since a pair of display electrodes X and Y are arranged in parallel, surface discharge occurs even in the non-display region EN, and both sides of the display region EH in the line direction become bright. Display contrast may be reduced.

Therefore, conventionally, the glass substrate 1 on the display surface side is conventionally used.
1 and a method of suppressing unnecessary discharge by increasing the thickness of the dielectric layer in the non-display area EN.
A method of suppressing unnecessary discharge by widening a discharge gap between display electrodes in the non-display area EN (Japanese Patent Laid-Open No. 5-114362) has been adopted.

[0008]

However, when the light-shielding layer is provided or the dielectric layer is partially thickened, there is a problem that the number of manufacturing steps increases accordingly, which leads to an increase in cost and a decrease in yield. Further, when the discharge gap is partially widened, it is difficult to reliably suppress unnecessary discharge, that is, there is a problem that the upper limit of the driving voltage is reduced.

On the other hand, address electrodes A are generally formed by firing a thick-film conductive material in order to prevent oxidation due to heat treatment after the electrodes are formed. Since the display electrodes X and Y are covered with a dielectric layer, there is no problem even if they are formed by a thin film method.

When the address electrode A is a thick film electrode as described above, a subtle difference in the firing state between the end address electrode A and the central address electrode A in the arrangement direction is likely to occur, and the address electrode group Has a non-uniform conductivity, and the uniformity of display control may be impaired.

SUMMARY OF THE INVENTION The present invention has been made in view of these problems, and it is possible to reliably prevent a decrease in display quality due to unnecessary discharge in a non-display area without increasing the number of manufacturing steps, and to reduce a firing state of a thick film electrode. The purpose is to achieve uniformity.

[0012]

Means for Solving the Problems The P according to the first aspect of the present invention.
As shown in FIG. 1, the DP includes a plurality of display electrodes forming an electrode pair for generating a surface discharge between adjacent electrodes and an address electrode group including a plurality of thick film electrodes parallel to each other and intersecting with the plurality of display electrodes. Surface discharge type P with matrix display system
DP, a plurality of dummy electrodes made of the same material as the thick film electrode are arranged in parallel with the thick film electrode on both sides in the electrode arrangement direction of the address electrode group, and the adjacent dummy electrodes are each Both ends are electrically integrated with each other by connecting conductors, and are commonly connected to external connection terminals.

In a PDP according to a second aspect of the present invention, the width of the dummy electrode is substantially equal to that of the thick film electrode, and the dummy electrodes are arranged at the same pitch as the thick film electrode. The driving method according to the invention according to claim 3, wherein in the address period in which an address voltage is selectively applied to each of the thick film electrodes according to display contents, the potentials of all the dummy electrodes are set to
This is to keep the same potential as that of the thick film electrode corresponding to the unit light emitting region where no light is emitted.

[0014]

A conductor loop is formed on both sides of the address electrode group by a plurality of dummy electrodes and a connecting conductor integrating them. By connecting this conductor loop to an external connection terminal and maintaining the same potential as the thick film electrode corresponding to the non-light emitting unit light emitting area during display, wall charges generated in the non-display area are forcibly erased. Unnecessary discharge is prevented.

Since the conductor loop is formed, even if a break occurs in the dummy electrode, the thick film conductor constituting the broken dummy electrode does not enter a floating state, so that unnecessary discharge can be reliably prevented. .

Further, by arranging the dummy electrodes on both sides of the address electrode group, when firing the thick film electrodes constituting the address electrode group, the firing conditions for the thick and thin film electrodes at the end and the center in the arrangement direction are substantially the same. And an address electrode group in a uniform fired state can be obtained.

[0017]

FIG. 1 is a schematic plan view showing an electrode structure of a PDP 1 according to the present invention. As shown in FIG. 1, the PDP 1 is a surface discharge type PDP having a three-electrode structure in which display electrodes X and Y constituting the sustain electrode pairs 12 correspond to address electrodes A in a unit light emitting region of a matrix display. The area where the display electrodes X and Y intersect the address electrode A is the display area EH.

Each of the address electrodes A is alternately distributed to one end or the other end and extended one by one in order to facilitate the arrangement of the external connection terminals 61. It is connected to the. External connection terminals 62 that are larger than the external connection terminals 61 are provided on both sides of the external connection terminals 61 in the arrangement direction.

In the PDP 1, the display area EH
A plurality of dummy electrodes D are arranged on both sides of the address electrode group AG in parallel with the address electrodes A in order to prevent unnecessary light emission outside of the address electrodes. Each dummy electrode D has the same width as the address electrode A and has a length that intersects all the sustain electrode pairs 12. Adjacent dummy electrodes D are electrically integrated with each other by connection conductors 50 at both ends thereof, and are commonly connected to an external connection terminal 62 at one end by connection conductors 51.

The dummy electrode D, the connecting conductor 50,
The connection conductor 51 is formed at the same time as the address electrode A by, for example, a thick film method of printing and firing a silver paste. In FIG. 1, six dummy electrodes D are integrated, but actually, as described above, the non-display area EN
Since the width of the dummy electrode D is about 20 mm (see FIG. 5), when the arrangement pitch is about 220 μm, which is the same as the address electrode A, about 90 dummy electrodes D are arranged on both sides of the address electrode group AG.

Dummy electrodes D are provided on both sides of the address electrode group AG.
When firing the address electrodes A, the firing conditions at the end and the center in the array direction become substantially the same, and the address electrode group AG in which the firing state of each address electrode A is uniform can be obtained.

By connecting both ends of the adjacent dummy electrodes D, a ladder-shaped conductor loop is formed. Therefore, even if some of the dummy electrodes D are disconnected during firing or the like, the disconnected dummy electrodes D are disconnected. Electrode D is connected conductor 5
It is connected to the external connection terminal 62 via 0 and another dummy electrode D, and does not enter a floating state. Therefore, unnecessary discharge can be reliably prevented.

FIG. 2 is an exploded perspective view showing the structure of a portion corresponding to one pixel of the PDP of FIG. As shown in FIG. 2, the display electrodes X and Y constituting the discharge sustaining electrode pair 12 are provided on the glass substrate 11 on the front surface side, and are formed in the discharge space 30 by the dielectric layer 17 having a thickness of about 20 to 30 μm. Covered. On the surface of the dielectric layer 17, an MgO film 18 having a thickness of about several thousand Å is provided as a protective film.

Since the display electrodes X and Y are arranged on the display surface H side with respect to the discharge space 30, the display electrodes X and Y are formed of a Nesa film or the like in order to widen the surface discharge and minimize the shielding of the display light. A transparent conductive film 41 having a large width and a bus metal film 42 having a small width for supplementing the conductivity thereof.

On the other hand, the address electrodes A for selectively emitting light in the unit light emitting region EU have a width of about 50 to 100 μm and are arranged on the glass substrate 21 on the back side. Between each address electrode A, a stripe-shaped partition wall 29 having a height of about 100 to 200 μm is provided,
As a result, the discharge space 30 moves in the line direction (display electrodes X,
In the direction of extension of Y), the space is defined for each unit light emitting area EU, and the gap size of the discharge space 30 is defined.

Further, R (red), G (green), and B (blue) are formed on the glass substrate 21 so as to cover the inner surface of the display area EH including the upper surface of the address electrode A and the side surface of the partition wall 29.
The three primary color phosphors 28 are provided. That is, P
DP1 is a PDP referred to as a reflection type after being classified according to the arrangement of the phosphors. The phosphor 28 emits light when excited by ultraviolet rays emitted by the discharge gas during surface discharge.

Each pixel (pixel) EG on the screen is composed of three unit light-emitting regions (sub-pixels) EU of the same area arranged in the line direction. For example, if the screen is 640x
With a 480 pixel configuration, each of the 480 lines is 640
It is composed of × 3 unit light emitting areas EU.

In each unit light emitting area EU, surface electrodes (main discharge cells for display) are formed by display electrodes X and Y.
Are defined, and an address discharge cell for selecting display or non-display is defined by the display electrode Y and the address electrode A. Accordingly, of the phosphors 28 that are continuous in the extending direction of the address electrode A, a portion corresponding to each unit light emitting region EU can be selectively made to emit light, and a full color display can be performed by a combination of R, G, and B. is there.

Next, a method of driving the PDP 1 having the above configuration will be described. FIG. 3 is an applied voltage waveform diagram showing an example of driving by the write address method. In the subfield SF obtained by subdividing the display period (frame) of one screen for performing the gradation display, the address period TA for setting the lighting or extinguishing of the unit light emitting region EU according to the display content, and the display brightness are secured. And a sustain period TS.

In the case of the write address method, in the address period TA, first, the entire screen is written and the entire surface is erased so as not to be affected by the previous lighting state. That is, for example, a positive write pulse PW having a peak value Vw and a negative sustain pulse (discharge sustaining voltage) PS having a peak value Vs are sequentially applied to all the display electrodes X. Then, a unit light emitting area E to emit light (light)
For the display electrode Y and the address electrode A corresponding to U,
As shown, the sustain pulse PS and the address pulse P
A is applied to cause a selective discharge to accumulate wall charges of a predetermined polarity necessary for maintaining the discharge. At this time, the display electrode Y
For, the application target is selected in line order. In the figure, the hatched lines attached to the respective pulses PS and PA indicate that the pulses are selectively applied.

In the address period TA in which the selective writing is performed using the address electrode A, the potential of the dummy electrode D is held at the ground potential (for example, 0 volt) which is the reference potential of the address electrode A. That is, regardless of the display content, the same potential state as that of the address electrode A corresponding to the unit light emitting area EU not to be turned on is set. Thus, in the non-display area EN, as in the display area EN,
The charge control for obtaining the light-off state is performed, and the non-display area E
N goes into a non-writing state.

The sustain period T following the address period TA
In S, a sustain pulse PS is alternately applied to the display electrodes X and Y so as to generate a surface discharge using the wall charges accumulated by the selective writing. At this time, as described above, the charge state of the non-display area EN is the same as that of the unit light-emitting area EU which is not turned on. Therefore, even if the sustain pulse PS is applied, no discharge occurs in the non-display area EN, and the discharge gas is discharged. Unnecessary light emission does not occur.

On the other hand, as shown in FIG. 4, in the case of the erase address method, the unit light emitting area E which is not turned on in the second half of the address period TA, contrary to the case of the write address method.
For the display electrode Y and the address electrode A corresponding to U,
A sustain pulse PS and an address pulse (erase pulse) PA are selectively applied to generate a selective discharge to erase unnecessary wall charges. Also in this case, the dummy electrode D is set to the same potential state as the address electrode A corresponding to the unit light-emitting region EU whose potential is not turned on. That is, the erase pulse PA is applied at the same timing as the address electrode A regardless of the display content. Thereby, the non-display area EN
In the same manner as in the display area EN, charge control for obtaining a light-off state is performed, and the non-display area EN is in a non-writing state.

According to the above-described embodiment, since the dummy electrodes D are arranged at the same pitch as the address electrodes A, the dummy electrodes D are connected to the address electrodes A when controlling the charge in the non-display area EN.
And there is no need to generate a special control voltage. Further, since the conductor loop is formed by connecting both ends of the adjacent dummy electrode D, the dummy electrode D
Or, even if the connection conductor 50 is disconnected, there is no problem in controlling the charge. That is, the yield at the time of manufacturing can be increased.

According to the above-described embodiment, only one of the connection conductors 50 on both sides of the dummy electrode D is connected to the external connection terminal 62. Therefore, the address electrode drive provided on one end and the other end of the address electrode A, respectively. The load on the circuit can be reduced. The external connection terminals 62 that are not electrically connected to the dummy electrodes D are used as dummy terminals for increasing the bonding strength between the external connection terminals 61 of each address electrode A and the printed board.

In the above-described embodiment, both ends of the dummy electrode D are led out to the edge of the glass substrate 21 and connected to the external connection terminal 62, so that a plurality of adjacent dummy electrodes D are electrically integrated. You may. In that case, the external connection terminal 62 has the role of the connection conductor 50. Others
The thick film conductive material, the number of electrodes, the electrode pitch, and the like can be variously changed in accordance with the gist of the present invention. Also, the phosphor 28
Is disposed on the inner surface of the glass substrate 11 on the front side.
The present invention can be applied to DP.

[0037]

According to the first and second aspects of the present invention,
Without increasing the number of manufacturing steps, it is possible to reliably prevent the deterioration of the display quality due to the unnecessary discharge in the non-display area, and to make the firing state of the thick film electrode uniform.

According to the third aspect of the invention, unnecessary discharge in the non-display area can be reliably prevented, and the display quality can be improved.

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing an electrode structure of a PDP according to the present invention.

FIG. 2 is an exploded perspective view showing a structure of a portion corresponding to one pixel of the PDP of FIG.

FIG. 3 is an applied voltage waveform diagram showing an example of driving by a write address method.

FIG. 4 is an applied voltage waveform diagram showing an example of driving by the erase address method.

FIG. 5 is a plan view showing a basic configuration of a surface discharge type PDP.

[Explanation of symbols]

 Reference Signs List 1 PDP (surface discharge type PDP) 12 electrode pairs 50 connecting conductor 62 external connection terminal A address electrode (thick film electrode) AG address electrode group D dummy electrode EU unit light emitting area PA address pulse (address voltage) TA address period X, Y Display electrode

Continuing on the front page (72) Inventor Tatsuri Kanae 1015 Uedanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Tsuyoshi Adachi 1015, Uedanaka, Nakahara-ku, Nakazaki-ku Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-7-220441 (JP, A) JP-A-5-190085 (JP, A) JP-A-3-269935 (JP, A) JP-A-62-17928 (JP, A) JP-A-55 -46472 (JP, A) JP-A-6-187914 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01J 11/00-11/02 G09G 3/28

Claims (3)

(57) [Claims] 1. A method for generating a surface discharge between adjacent electrodes.
A matrix display type surface discharge type PDP having a plurality of display electrodes forming an electrode pair and an address electrode group including a plurality of thick film electrodes parallel to each other and intersecting with the display electrodes , wherein an electrode arrangement direction of the address electrode group is provided. A plurality of dummy electrodes made of the same material as the thick film electrode are arranged in parallel on both sides of the thick film electrode, and the adjacent dummy electrodes are electrically integrated with each other by connecting conductors at both ends thereof. A surface discharge type PDP characterized by being commonly connected to an external connection terminal. 2. The surface discharge type PDP according to claim 1, wherein said dummy electrodes have an electrode width substantially equal to that of said thick film electrodes and are arranged at the same pitch as said thick film electrodes. 3. A surface discharge type PD according to claim 1 or 2.
In the display by P, during the address period in which an address voltage is selectively applied to each of the thick film electrodes according to the display content, the potentials of all the dummy electrodes are changed to the thick film electrodes corresponding to the unit light emitting regions in which light is not emitted. A method for driving a surface discharge type PDP, wherein the same potential is maintained.