JP3182280B2 - AC surface discharge type plasma display panel and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface discharge type plasma display panel (PDP) for performing matrix display, and a driving method thereof.

2. Description of the Related Art A PDP is a self-luminous display device that is advantageous in view of visibility, and has attracted attention as a thin display device that replaces a CRT because of its large screen and high-speed display. Especially AC driven surface discharge type PD
P is suitable for full-color display using phosphors, and its use is being expanded to the field of high-definition television.

[0003]

2. Description of the Related Art FIG. 5 is a plan view showing a basic structure of a surface discharge type PDP. The PDP includes a pair of glass substrates 11,
21 is a display device in which a discharge space having a gap dimension of about 100 μm is formed inside by sealing the peripheral portion of the opposing region. In a matrix display type PDP, a display area (display screen) EH is defined by electrode groups arranged vertically and horizontally, and gas discharge of a sealing material 31 indicated by oblique lines in the figure near a sealing portion in a discharge space. As a result, the discharge becomes unstable, so that a non-display area EN is provided around the display area EH. Usually, the width of the non-display area EN is about 20 mm regardless of the screen size.

The surface discharge type PDP includes display electrodes X and Y defining a main discharge cell (surface discharge cell), an address electrode A defining a selected discharge cell together with one of the display electrodes Y, and a discharge space in a display region EH. Are partitioned in the line direction. The display electrodes X and Y are covered with a dielectric layer (not shown) for AC driving using wall charges, and are arranged so as to form a discharge sustaining electrode pair 12 for each display line.

In displaying by a surface discharge type PDP, wall charges are selectively accumulated in main discharge cells to be lit (lit) by a write address method or an erase address method, and then alternately applied to display electrodes X and Y. A discharge sustaining voltage is applied to periodically generate a surface discharge (discharge in a substrate surface direction). The display brightness is set by selecting the number of discharges per unit time.

In the surface discharge type PDP, since a pair of display electrodes X and Y are arranged in parallel, surface discharge occurs even in the non-display region EN, and both sides of the display region EH in the line direction become bright. Display contrast may be reduced.

Therefore, conventionally, the glass substrate 1 on the display surface side is conventionally used.
1 and a method of suppressing unnecessary discharge by increasing the thickness of the dielectric layer in the non-display area EN.
A method of suppressing unnecessary discharge by widening a discharge gap between display electrodes in the non-display area EN (Japanese Patent Laid-Open No. 5-114362) has been adopted.

[0008]

However, when the light-shielding layer is provided or the dielectric layer is partially thickened, there is a problem that the number of manufacturing steps increases accordingly, which leads to an increase in cost and a decrease in yield. Further, when the discharge gap is partially widened, it is difficult to reliably suppress unnecessary discharge, that is, there is a problem that the upper limit of the driving voltage is reduced.

The present invention has been made in view of these problems, and has been proposed in view of the non-display area E without increasing the number of manufacturing steps.
It is an object of the present invention to reliably prevent the deterioration of display quality due to unnecessary discharge in N.

[0010]

Means for Solving the Problems The P according to the first aspect of the present invention.
DP is a matrix display type AC surface discharge type plasma display panel having a plurality of display electrodes constituting an electrode pair for generating a surface discharge between adjacent electrodes and a plurality of address electrodes intersecting with the display electrodes. On both sides of the row of address electrodes on the surface on which the address electrodes are formed, forced erase electrodes composed of a plurality of conductors arranged in parallel with the address electrodes, intersecting the display electrodes, and electrically connected to each other at both ends are provided. It is provided.

According to a second aspect of the present invention, there is provided a driving method for driving an AC surface-discharge type plasma display panel in an address period and a sustain period in a time-separated manner. An electrode that intersects with the display electrode is provided, and in the address period, the potential of the electrode provided in the outer region is maintained at the same potential as the address electrode corresponding to the unit light emitting region that does not emit light in the sustain period. .

According to a third aspect of the present invention, an erase pulse is applied to the electrodes provided in the outer region at the same timing as the address electrodes during the address period.

The wall charges generated by the surface discharge in a region outside the address electrode row are discharged between the forced erasing electrode E and the display electrode Y provided in the region or the erasing surface by the electrode pair 12. It is forcibly erased by discharging. And
The charge state after the erasing is maintained in the same state as the unit light emitting area EU in the display area where no light is emitted, by setting the potential of the forced erasing electrode E.

[0014]

FIG. 1 is a plan view schematically showing an electrode structure of a surface discharge type PDP 1 according to the present invention, and FIG. 2 is an exploded perspective view showing a structure of a portion corresponding to one pixel of the PDP of FIG.

As shown in FIG. 1, the PDP 1 is a surface discharge type PDP having a three-electrode structure in which a pair of display electrodes X and Y and an address electrode A correspond to a unit light-emitting region of a matrix display.
The display electrodes X and Y and the address electrode A are arranged in a non-display area E around a display area EH, which is an area where they intersect.
In order to provide N, the discharge space regions E30 are arranged at a constant pitch while avoiding the vertical and horizontal ends.

In the PDP 1, in order to prevent unnecessary light emission in the non-display area EN, the non-display area EN
At the both sides of the row of address electrodes at
Is provided. Each forced erasing electrode E is parallel to the address electrode A and has a plurality of strip-shaped main portions Ea having a length intersecting all the sustain electrode pairs 12, and all main portions at both ends of each main portion Ea. Connecting part E for electrically connecting Ea
b. The end of the forced erasing electrode E extends to the outside of the discharge space region E30 like the address electrode A, and is connected to an external conductor (not shown).

Such a forced erase electrode E is formed simultaneously with the address electrode A by a thick film method or the like. In the figure, each of the forced erasing electrodes E is composed of two main portions Ea. However, since the width of the non-display area EN is about 20 mm as described above, the arrangement of the main portions Ea When the pitch is set to about 220 μm, which is the same as the address electrode A, the forced erasing electrode E is composed of about 90 main parts Ea.

As shown in FIG. 2, the display electrodes X and Y constituting the discharge sustaining electrode pair 12 are provided on the glass substrate 11 on the display surface H side and have a dielectric layer 17 having a thickness of about 20 to 30 μm.
To the discharge space 30. On the surface of the dielectric layer 17, an M layer having a thickness of about several thousand
The gO film 18 is provided.

Since the display electrodes X and Y are disposed on the display surface H side with respect to the discharge space 30, the display electrodes X and Y are formed of a Nesa film or the like in order to widen the surface discharge and minimize the shielding of display light. A transparent conductive film 41 having a large width and a bus metal film 42 having a small width for supplementing the conductivity thereof.

On the other hand, the address electrodes A for selectively emitting light in the unit light emitting region EU have a width of about 50 to 100 μm and are arranged on the glass substrate 21 on the back side. Between each address electrode A, a stripe-shaped partition wall 29 having a height of about 100 to 150 μm is provided.
As a result, the discharge space 30 moves in the line direction (display electrodes X,
In the direction of extension of Y), the space is defined for each unit light emitting area EU, and the gap size of the discharge space 30 is defined. Partition wall 29
Are also provided between the main portions Ea of the forced erasing electrode E.

Further, R (red), G (green), and B (blue) are formed on the glass substrate 21 so as to cover the inner surface of the display area EH including the upper surface of the address electrode A and the side surface of the partition wall 29.
The three primary color phosphors 28 are provided. That is, P
DP1 is a PDP referred to as a reflection type after being classified according to the arrangement of the phosphors. The phosphor 28 emits light when excited by ultraviolet rays emitted by the discharge gas during surface discharge.

Each pixel (dot) EG on the screen is composed of three unit light emitting areas EU of the same area arranged in the line direction (extending direction of the display electrodes X and Y). For example, if the screen is composed of 640 × 480 dots, each of 480 lines is composed of 640 × 3 unit light emitting areas EU.

In each unit light emitting area EU, surface discharge cells (main discharge cells for display) are formed by display electrodes X and Y.
Are defined, and an address discharge cell for selecting display or non-display is defined by the display electrode Y and the address electrode A. Accordingly, of the phosphors 28 that are continuous in the extending direction of the address electrode A, a portion corresponding to each unit light emitting region EU can be selectively made to emit light, and a full color display can be performed by a combination of R, G, and B. is there.

Next, a method of driving the PDP 1 having the above configuration will be described. FIG. 3 is an applied voltage waveform diagram showing an example of driving by the write address method. In the subfield SF obtained by subdividing the display period (frame) of one screen for performing the gradation display, the address period TA for setting the lighting or extinguishing of the unit light emitting region EU according to the display content, and the display brightness are secured. And a sustain period TS.

In the case of the write address method, in the address period TA, first, the entire screen is written and the entire surface is erased so as not to be affected by the previous lighting state. That is, for example, a positive write pulse PW having a peak value Vw and a negative sustain pulse (discharge sustaining voltage) PS having a peak value Vs are sequentially applied to all the display electrodes X. Then, a unit light emitting area E to emit light (light)
For the display electrode Y and the address electrode A corresponding to U,
As shown, the sustain pulse PS and the address pulse P
A is applied to cause a selective discharge to accumulate wall charges of a predetermined polarity necessary for maintaining the discharge. At this time, the display electrode Y
For, the application target is selected in line order. In the figure, the hatched lines attached to the respective pulses PS and PA indicate that the pulses are selectively applied.

In the address period TA in which the selective writing is performed using the address electrode A, the forced erasing electrode E
, The potential is kept at the ground potential (for example, 0 volt) which is the reference potential of the address electrode A. That is, regardless of the display content, the same potential state as that of the address electrode A corresponding to the unit light emitting area EU not to be turned on is set. As a result, in the non-display area EN, similarly to the display area EN, charge control for obtaining a light-off state is performed, and the non-display area EN is set to a non-writing state.

The sustain period T following the address period TA
In S, a sustain pulse PS is alternately applied to the display electrodes X and Y so as to generate a surface discharge using the wall charges accumulated by the selective writing. At this time, as described above, the charge state of the non-display area EN is the same as that of the unit light-emitting area EU which is not turned on. Therefore, even if the sustain pulse PS is applied, no discharge occurs in the non-display area EN, and the discharge gas is discharged. Unnecessary light emission does not occur.

On the other hand, as shown in FIG. 4, in the case of the erasing address method, the unit light emitting area E which is not turned on in the second half of the address period TA, contrary to the case of the writing address method.
For the display electrode Y and the address electrode A corresponding to U,
A sustain pulse PS and an address pulse (erase pulse) PA are selectively applied to generate a selective discharge to erase unnecessary wall charges. Also in this case, the forced erasing electrode E is set to the same potential state as the address electrode A corresponding to the unit light emitting area EU whose potential is not turned on. That is,
The erase pulse PA is applied at the same timing as the address electrode A regardless of the display content. Thereby, the non-display area E
Also in N, charge control for obtaining a light-off state is performed similarly to the display area EN, and the non-display area EN is in a non-writing state.

According to the above-described embodiment, the non-display area EN is formed by arranging the main portions Ea of the forced erase electrodes E at the same pitch as the address electrodes A and forming the partition walls 29 between the main portions Ea. Since the discharge cells having the same structure as the display area EH are provided, the forced erasing electrode E can be treated as a part of the address electrode A when controlling the charge in the non-display area EN, and it is necessary to generate a special control voltage. Absent. Further, since the forced erasing electrode E has a loop pattern including the main portion Ea and the connecting portions Eb at both ends thereof, the main portion Ea or the connecting portion Eb is formed.
Even if a disconnection occurs in b, there is no problem in charge control. That is, the yield at the time of manufacturing can be increased.

In the above embodiment, the forced erase electrode E may be a wide so-called solid electrode. Each main part E
a may be led out of the discharge space region E30 to omit the connecting portion Ea, and the main portions Ea may be electrically connected collectively by an external conductor. In addition, the planar shape and material of the forced erasing electrode E, the applied voltage, the arrangement of the partition walls 29, and the like can be variously changed in accordance with the gist of the present invention.

[0031]

According to the present invention, it is possible to reliably prevent a decrease in display quality due to unnecessary discharge in a non-display area without increasing the number of manufacturing steps.

According to the second aspect of the present invention, the production yield can be improved.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing an electrode structure of a surface discharge type PDP according to the present invention.

FIG. 2 is an exploded perspective view showing a structure of a portion corresponding to one pixel of the PDP of FIG.

FIG. 3 is an applied voltage waveform diagram showing an example of driving by a write address method.

FIG. 4 is an applied voltage waveform diagram showing an example of driving by the erase address method.

FIG. 5 is a plan view showing a basic configuration of a surface discharge type PDP.

[Explanation of symbols]

 Reference Signs List 1 PDP (surface discharge type plasma display panel) 12 Electrode pair A Address electrode E Forced erasing electrode Ea Main part (band-shaped conductor) EH Display area PA Address pulse (address voltage) TA Address period X, Y display electrode

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masayuki Watani 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-4-223025 (JP, A) JP-A-48-74119 (JP, A) JP-A-6-203760 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01J 11/00-11/02 G09G 3/28

Claims (3)

(57) [Claims] 1. A matrix display type AC having a plurality of display electrodes constituting an electrode pair for generating a surface discharge between adjacent electrodes and a plurality of address electrodes intersecting the display electrodes.
It is a surface discharge type plasma display panel, Comprising: The address electrode row on the formation surface of the said address electrode
On both sides, the display electrodes are arranged in parallel with the address electrodes, intersect with the display electrodes, and are electrically connected to each other at both ends.
An AC surface discharge type plasma display panel, wherein a forced erasing electrode comprising a plurality of conductors is provided . 2. A method for generating a surface discharge between adjacent electrodes.
A plurality of display electrodes constituting an electrode pair and intersecting with them
Matrix display type AC having a plurality of address electrodes
The surface discharge type plasma display panel is
Driving method that is separated in time from the sustain period and the sustain period
The display electrodes in an area outside the plurality of address electrodes.
An electrode provided in the outer region during the address period.
Is a unit light emission that does not emit light during the sustain period.
Make sure to keep the same potential as the address electrode corresponding to the area.
Features of AC surface discharge type plasma display panel
Drive method. 3. An electrode provided in the outer region is provided with the address.
At the same timing as the address electrodes during the
3. The method for driving an AC surface discharge type plasma display panel according to claim 2, wherein an erasing pulse is applied .