JP3591971B2 - AC type PDP and driving method thereof - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a matrix display type AC PDP (Plasma Display Panel) having an electrode pair defining a surface discharge cell.
[0002]
Among the AC-driven PDPs that use wall charges for selective light emission, surface discharge PDPs, in particular, are suitable for color display using phosphors and have attracted attention as large-screen display devices for HDTV.
[0003]
[Prior art]
FIG. 7 is a plan view showing the electrode structure of the conventional surface discharge type PDP 80, and FIG. 8 is an exploded perspective view showing the internal structure of the conventional surface discharge type PDP 80.
[0004]
The PDP 80 has a plurality of electrode pairs 12j formed of linear sustain electrodes (main electrodes) Xj and Yj extending in parallel with each other, and a plurality of linear address electrodes Aj orthogonal to the sustain electrodes Xj and Yj. Each electrode pair 12j corresponds to one line (row) of the matrix display, and each address electrode Aj corresponds to one column. That is, the electrode structure of the cell (display element) of the PDP 80 is a three-electrode structure in which the electrode pair 12j and the address electrode Aj intersect.
[0005]
As shown in FIG. 8, the PDP 80 includes a front glass substrate 11j, sustain electrodes Xj and Yj, a dielectric layer 17j for AC driving, a protective film 18j, a rear glass substrate 21j, an address electrode Aj, and a straight line in a plan view. Partition 29j, a phosphor layer 28j for full color display, and the like. The internal discharge space 30j is partitioned by the partition 29j in the line direction (extending direction of the sustain electrodes Xj, Yj) for each sub-pixel EU, and the gap size is defined.
[0006]
The sustain electrodes Xj and Yj are arranged on the inner surface of the glass substrate 11j, and each is composed of a wide transparent conductive film 41j and a metal film 42j for ensuring conductivity. The transparent conductive film 41j is patterned in a band shape wider than the metal film 42j so as to spread the surface discharge.
[0007]
The phosphor layer 28j is provided between the partition walls 29j on the rear glass substrate 21j in order to reduce the ion bombardment caused by the surface discharge by moving away from the sustain electrodes Xj and Yj. It emits light when excited locally. Of the visible light emitted on the surface layer (the surface in contact with the discharge space) of the phosphor layer 28j, the light transmitted through the glass substrate 11j is the display light.
[0008]
A pixel (pixel) EG of the matrix screen is composed of three sub-pixels EU arranged in the line direction. These emission colors (R, G, B) are different from each other, and color display is performed by a combination of R, G, and B. The arrangement pattern of the partition walls 29j is a so-called stripe pattern, and a portion corresponding to each column in the discharge space 30j is continuous in the column direction across all the lines. The emission colors of the sub-pixels EU in each column are the same.
[0009]
At the time of display by the PDP 80, the address electrode Aj and one of the sustain electrodes Yj of the electrode pair 12j are used to select lighting (light emission) / non-lighting (addressing) of each sub-pixel EU. That is, line scanning is performed by sequentially applying scan pulses one by one to the n (n is the number of lines) sustain electrodes Yj, and the sustain electrodes Yj and the address electrodes Aj selected according to the display contents are scanned. A predetermined charge state is formed for each line by the opposite discharge (address discharge) between the two. After the addressing, when a sustain pulse having a predetermined peak value is alternately applied to the sustain electrode Xj and the sustain electrode Yj, a surface discharge (sustain discharge) occurs in a cell in which a predetermined amount of wall charge exists at the end of the addressing.
[0010]
[Problems to be solved by the invention]
As described above, the structure in which the address electrode Aj and the electrode pair 12j face each other across the discharge space 30 has an advantage that the capacitive coupling between the address electrode Aj and the electrode pair 12j can be prevented. In a structure in which the address electrode Aj and the electrode pair 12j intersect on the same substrate, an excessive current flows during addressing because the capacitance between the electrodes is relatively large.
[0011]
However, in the AC drive type, it is necessary to provide a sufficiently thick (for example, 30 to 40 μm) dielectric layer 17j between the electrode pair 12j and the discharge space 30 in view of current limitation, charging, and electrode protection. For this reason, in the related art, in order to generate an opposite discharge at the time of addressing, it is necessary to increase the potential difference between the address electrode Aj and the sustain electrode Yj. There is also a problem that the probability of occurrence of a discharge error in which no discharge occurs is large.
[0012]
SUMMARY OF THE INVENTION An object of the present invention is to facilitate driving by lowering an applied voltage for addressing.
[0013]
[Means for Solving the Problems]
A fourth electrode extending in the same direction as the sustain electrode pair is provided on the substrate on which the sustain electrode pair is disposed, and an electrode pair for sustain discharge and an electrode pair for address discharge are separated.
[0014]
In the PDP according to the first aspect of the present invention, first and second sustain electrodes extending in a row direction of matrix display are provided on a first substrate, and a second substrate facing the first substrate via a discharge space. A first address electrode extending in a column direction is provided on the substrate, and the first address electrode is provided on the first substrate at a position closer to the first address electrode than the first and second sustain electrodes. A second address electrode extending in the direction, the second address electrode is thinner than the second sustain electrode, and is separated from an electrode gap between the first and second sustain electrodes in plan view and It is arranged so as to overlap with the second sustain electrode .
[0015]
In the PDP of the invention of claim 2, wherein the first substrate is a substrate on the front side, wherein each of the first and second sustain electrodes, transparent conductive film and superimposed width edge of it is composed of a strip-like metal films, said second address electrode is substantially equal to the width of the metal film of the width of the second sustain electrode, and the metal film of the second sustain electrode in a plan view They arranged to overlap composed.
[0016]
4. The driving method according to claim 3, wherein in the address period, a discharge is generated between the first and second address electrodes to form a wall charge accumulation state according to display contents, and a sustain state following the address period. In the period, a discharge is periodically generated between the first and second sustain electrodes.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a sectional view of a main part of a PDP 1 of the present invention.
The PDP 1 is a surface discharge type AC PDP. On the inner surface of the glass substrate 11 on the front side, a pair of sustain electrodes X and Y are arranged for each line. The sustain electrodes X and Y each include a transparent conductive film 41 and a metal film 42, and are covered with a dielectric layer 17 for AC driving. On the surface of the dielectric layer 17, a protective film 18 made of MgO is deposited.
[0018]
In the PDP 1, an address electrode A2 extending in the line direction is embedded in the dielectric layer 17. That is, the dielectric layer 17 includes the lower layer 171 and the upper layer 172, and the address electrode A is provided between the lower layer 171 and the upper layer 172. The address electrode A2 is arranged so as to almost completely overlap the metal film 42 of the sustain electrode Y in a plan view, and exists at a position closer to the discharge space 30 than the sustain electrodes X and Y. Since the width of the address electrode A2 is substantially equal to the width of the metal film 42, the display light amount is slightly reduced by providing the address electrode A2, and there is no problem in display.
[0019]
On the other hand, on the inner surface of the glass substrate 21 on the back side, an address electrode A1, an insulating layer 24, partition walls (not shown), and a phosphor layer 28 extending in a column direction (a direction orthogonal to the line direction) are provided. Each partition has a role of partitioning the discharge space 30 for each sub-pixel in the line direction and defining a constant gap size of the discharge space 30. The partition structure of the PDP 1 and the arrangement pattern of the phosphors are the same as those of the conventional PDP 80 (see FIG. 7).
[0020]
In displaying by the PDP 1, addressing is performed by causing a discharge between the address electrode A1 on the rear side and the address electrode A2 on the front side. The address electrode A2 is located closer to the address electrode A1 than the sustain electrode Y, and since the dielectric layer (upper layer 172) covering the address electrode A2 is thin, a discharge is generated between the sustain electrode Y and the address electrode A1. An address discharge is generated by applying a lower voltage than in the case.
[0021]
FIG. 2 is an enlarged view of a main part showing an electrode terminal structure, and FIG. 3 is an enlarged view of a main part showing another example of the electrode terminal structure. In these drawings, components having the same function are denoted by the same reference numerals regardless of the difference in shape.
[0022]
In FIG. 2A, a metal film 42 constituting the sustain electrode Y is led out of the sealing material 31 that joins the glass substrates 11 to each other, and a terminal provided on an edge of the glass substrate 11 is provided. It is integrated with Yt. A terminal A2t is provided outside the sealing member 31 and inside the terminal Yt, and the terminal A2t and the address electrode A2 are integrated. The terminal Yt and the terminal A2t are electrically connected to a drive circuit via a printed wiring board (not shown). As shown in FIG. 2B, there is a step between the terminal Yt and the terminal A2t by the thickness of the lower layer 171. That is, in FIG. 2, the terminal Yt and the terminal A2t are arranged stepwise.
[0023]
On the other hand, in the example of FIG. 3, the terminal Yt of the sustain electrode Y and the terminal A2t of the address electrode A2 are adjacently arranged on the same plane. Since the terminal A2t is not on an extension of the sustain electrode Y, the end of the address electrode A2 is patterned into a bent shape.
[0024]
The electrode terminal structure of FIG. 2 has an advantage that the arrangement pitch of the sustain electrodes Y can be reduced while securing a predetermined terminal area. The electrode terminal structure of FIG. 3 has an advantage that the overhang width of the glass substrate 11 with respect to the glass substrate 21 can be reduced.
[0025]
Next, a driving method of the PDP 1 will be described. FIG. 4 is a waveform diagram of the applied voltage.
For display by the PDP 1, for example, one field is associated with a screen (one frame). However, when reproducing a screen scanned in an interlaced format like a television, two fields are used to display one screen (one frame).
[0026]
The field is divided into, for example, about 6 to 8 subfields sf to perform gradation display. Each subfield sf includes a reset period TR, an address period TA, and a sustain period TS. The luminance of each subfield sf is appropriately weighted, and the number of light emission in the sustain period TS of each subfield sf is set. Each subfield sf is a screen display period of one gradation level.
[0027]
The reset period TR is a period in which wall charges in the effective display area are erased (entirely erased) in order to prevent the influence of the previous lighting state. A write pulse PW is applied to the sustain electrodes X of all lines, and a pulse Paw (having the same polarity as the write pulse PW) is simultaneously applied to all the address electrodes A1. Strong surface discharge occurs in all lines in response to the rise of the write pulse PW, and wall charges are temporarily accumulated in the dielectric layer 17. However, in response to the fall of the address pulse PW, so-called self-discharge occurs due to wall charges, and the wall charges of the dielectric layer 17 disappear. The pulse Paw is applied to suppress accumulation of wall charges on the rear wall surface.
[0028]
The address period TA is a period in which line-sequential addressing is performed. The sustain electrode X is biased to a positive potential Vax with respect to the ground potential. In this state, each line is selected one by one in order from the first line, and a negative scan pulse Py is applied to the address electrode A2. Simultaneously with the selection of the line, a positive address pulse Pa having a peak value Va is applied to the address electrode A1 corresponding to the cell to be turned on (emit light). In the selected line, in the cell to which the address pulse Pa is applied, an address discharge occurs between the address electrode A1 and the address electrode A2. Since the sustain electrode X is biased to a potential having the same polarity as the address pulse Pa, the bias cancels the address pulse Pa and no discharge occurs between the sustain electrode X and the address electrode A1. In the address period TA, when the potential difference between the sustain electrode Y and the address electrode A2 is large, a discharge mistake is likely to occur. In order to prevent a discharge error, all the sustain electrodes Y are set to a floating state. In addition, discharge errors can be reduced by biasing the sustain electrode Y to a constant negative potential as shown by a broken line in the figure, regardless of the potential fluctuation of the address electrode A2 due to the line scanning.
[0029]
The sustain period TS is a period for maintaining a lighting state set by addressing in order to secure luminance according to a gradation level. In order to prevent the counter discharge, all the address electrodes A1 are biased to a positive potential (for example, Vs / 2), and first, a positive sustain pulse Ps having a peak value Vs is applied to all the sustain electrodes Y. Thereafter, a positive sustain pulse Ps having a peak value Vs is alternately applied to the sustain electrode X and the sustain electrode Y. Each time the sustain pulse Ps is applied, surface discharge occurs in the cell in which the wall charges are accumulated during the address period TA. In the sustain period TS, in order to prevent the influence on the surface discharge, the address electrode A2 is set to a floating state, or, as shown by a broken line in the drawing, synchronized with the application of the sustain pulse Ps to the sustain electrode Y. A2 is biased to a potential having the same polarity as the sustain pulse Ps.
[0030]
FIG. 5 is a block diagram of a main part of the drive circuit, and FIG. 6 is a waveform diagram of each signal in FIG.
As is apparent from the above description, the address electrode A2 is substantially used only in the address period TA, and the sustain electrode Y is used only in the sustain period TS. Therefore, it is possible to control the sustain electrode Y and the address electrode A2 in a time division manner.
[0031]
The application of the drive voltage to the sustain electrode Y is performed by the Y driver 132, and the application of the drive voltage to the address electrode A2 is performed by the A2 driver 133. The operations of the Y driver 132 and the A2 driver 133 are defined by one pulse generator 141. The pulse generator 141 generates a pulse signal S1 corresponding to a composite signal of the control signal SY defining the application timing of the sustain pulse and the address data signal SA and outputs the pulse signal S1 to the signal separation circuit 142. The signal separating circuit 142 operates according to timing signals SC1 and SC2 from a controller (not shown) to separate the pulse signal S1 into a control signal SY and an address data signal SA. One control signal SY of the two separated signals is input to the Y driver 132, and the other address data signal SA is input to the A2 driver 133.
[0032]
【The invention's effect】
According to the first to third aspects of the present invention, addressing can be performed by applying a voltage lower than that in the related art, and the probability of occurrence of a discharge error in addressing can be reduced. Further, wall charges can be efficiently accumulated without impairing the arrangement density of the sustain electrodes.
[0033]
According to the invention of claim 2, Ru can be lowered applied voltage in addressing without hardly reducing the display quantity.
[Brief description of the drawings]
FIG. 1 is a sectional view of a main part of a PDP of the present invention.
FIG. 2 is an enlarged view of a main part showing an electrode terminal structure.
FIG. 3 is an enlarged view of a main part showing another example of the electrode terminal structure.
FIG. 4 is a waveform diagram of an applied voltage.
FIG. 5 is a block diagram of a main part of a drive circuit.
FIG. 6 is a waveform diagram of each signal in FIG. 5;
FIG. 7 is a plan view showing an electrode structure of a conventional surface discharge type PDP.
FIG. 8 is an exploded perspective view showing an internal structure of a conventional surface discharge type PDP.
[Explanation of symbols]
1 PDP (AC type PDP)
11 Glass substrate (first substrate)
21 Glass substrate (second substrate)
30 Discharge space 172 Upper layer (dielectric layer)
A1 Address electrode (first address electrode)
A2 address electrode (second address electrode)
TA address period TS sustain period X sustain electrode (first sustain electrode)
Y sustain electrode (second sustain electrode)

Claims (3)

First and second sustain electrodes extending in the row direction of the matrix display on the first substrate;
A first address electrode extending in a column direction is provided on a second substrate facing the first substrate via a discharge space;
On the first substrate, a second address electrode extending in the row direction is provided at a position closer to the first address electrode than the first and second sustain electrodes ,
The second address electrode is thinner than the second sustain electrode, and is arranged so as to be away from an electrode gap between the first and second sustain electrodes in plan view and to overlap with the second sustain electrode. An AC-type PDP characterized by the following. The first substrate is a front-side substrate,
Each of the first and second sustain electrodes is composed of a transparent conductive film and a narrow band-shaped metal film superimposed on an edge thereof.
Said second address electrodes, according to claim 1 in which the width is substantially equal to the width of the metal film of the second sustain electrode, formed by arranged so as to overlap the metal film of the second sustain electrode in a plan view The described AC-type PDP. In displaying by the AC type PDP according to claim 1 or 2,
In the address period, a discharge is generated between the first and second address electrodes to form a wall charge accumulation state according to display contents;
A method of driving an AC PDP, wherein a discharge is periodically generated between the first and second sustain electrodes in a sustain period following the address period.

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