KR100615263B1 - Driving method of Plasma display panel - Google Patents

Abstract

An object of the present invention is to provide a method of driving a plasma display panel for stably performing sustain discharge in a multi-electrode plasma display panel.

In order to achieve the above object, the present invention, the front substrate and the rear substrate disposed in parallel to the front substrate; Barrier ribs disposed between the front substrate and the rear substrate and defining discharge cells generating discharge; Sustain electrode pairs disposed in the front dielectric layer formed on the front substrate in a rear substrate direction and having scan electrodes and sustain electrodes extending in one direction in which discharge cells extend; Intermediate electrodes disposed in the front dielectric layer and disposed between the scan electrode and the sustain electrode and extending in parallel to the direction in which the sustain electrode pairs extend; Address electrodes disposed in the rear dielectric layer formed on the rear substrate in the front substrate direction and extending across the discharge cells to intersect the direction in which the intermediate electrodes extend; A phosphor layer disposed in the discharge cells and positioned above the address electrodes; And a discharge gas in the discharge cells, wherein the plasma display panel is driven by a drive signal having a reset period, an address period, and a sustain discharge period, and in the address period, a first voltage is applied to the sustain electrodes. A second voltage is applied to the intermediate electrodes, and a scan pulse having a third voltage smaller than the second voltage is sequentially applied to the intermediate electrodes, and a display data signal having a fourth voltage is applied to the address electrodes in accordance with the scan pulse. And a fifth voltage smaller than the fourth voltage is applied to the scan electrodes in accordance with the scan pulse.

Description

Driving method of plasma display panel {Driving method of Plasma display panel}

1 is a timing diagram illustrating a conventional driving signal for driving a plasma display panel having a multi-electrode structure.

2A to 2D are diagrams illustrating wall charge states of a plasma display panel in an address section when the driving signal of FIG. 1 is applied.

3 is an exploded perspective view showing a plasma display panel of a multi-electrode structure to which the driving method of the present invention is applied.

4 is a plan view of the plasma display panel of FIG. 3 taken along line II-II.

FIG. 5 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for implementing the method of driving the plasma display panel of FIG. 3.

FIG. 6 is a timing diagram illustrating a first embodiment of a driving signal as a driving method of the present invention for driving the plasma display panel of FIG. 3.

FIG. 7 is a timing diagram illustrating a second embodiment of a driving signal as a driving method of the present invention for driving the plasma display panel of FIG. 3.

8A to 8B are diagrams showing wall charges in the discharge cells in the sustain discharge period of FIG. 6 or FIG.

 Explanation of symbols on the main parts of the drawings

100 ... plasma display panel, 110 ... front panel,

111 front panel, 112 scanning electrode,

113 holding electrode, 114 holding electrode pair,

150 intermediate electrodes 112a, 113a, 150a bus electrodes

112b, 113b, 150b, transparent electrode, 115 ... front dielectric layer,

116 shield, 120 rear panel,

121 back panel, 122 address electrode,

123 rear dielectric layer, 124 bulkhead,

125 phosphor layer, 126 discharge cell,

62 logic controller, 63 address drive,

64 ... X drive, 65 ... Y drive,

66 ... image processing section, 67 ... M driving section,

Vs ... 1st voltage, Vscan ... 2nd voltage,

V3 ... third voltage, Va ... fourth voltage,

Vp ... fifth voltage, Vm ... sixth voltage.

The present invention relates to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel for driving a plasma display panel having a multi-electrode structure.

A typical three electrode structure of a plasma display panel is disclosed in Japanese Laid-Open Patent Publication No. 1999-120924. The three-electrode structure has a structure in which an address electrode is arranged so as to be orthogonal to the scan electrode and the sustain electrode with respect to the scan electrode and the sustain electrode arranged in parallel. In order to drive the three-electrode structure, an ADS (Address Display Separation) driving method is used. That is, the plasma display panel is driven by applying a driving signal having a reset period, an address period, and a sustain discharge period to the scan electrode, sustain electrode, and address electrode.

However, the plasma display panel having a three-electrode structure has a problem in that the discharge volume of the discharge cell, which is an area intersected by the scan electrode, the sustain electrode and the address electrode, is small, and thus the luminance is not good. In order to improve this problem, efforts have been made to improve the plasma display panel having a four-electrode structure in which an intermediate electrode is further provided between the sustain electrode and the scan electrode to enlarge the discharge volume of the discharge cell.

1 is a timing diagram illustrating a conventional driving signal for driving a plasma display panel having a multi-electrode structure, and FIGS. 2A to 2D are wall charge states of a plasma display panel in an address period when the driving signal of FIG. 1 is applied. Figure showing.

The driving method of the plasma display panel having the four-electrode structure will be described with reference to FIGS. 1 and 2A to 2D.

One subfield SF includes a reset period PR, an address period PA, and a sustain discharge period PS, and include address electrodes A1, ..., Am, sustain electrodes X1,... , Xn), the driving signals are applied to the intermediate electrodes M1, ..., Mn and the scan electrodes Y1, ..., Yn, respectively.

First, the reset period PR applies a reset pulse to all of the intermediate electrodes M1, ..., Mn to perform reset discharge, thereby initializing the wall charge state of all the discharge cells. The reset period PR is carried out before entering the address period PA, which is carried out over the entire screen, thus making it possible to create a fairly even and evenly distributed wall charge arrangement. For this purpose, in the reset period PR from time t1 to t2 in FIG. 1, the ground voltage Vg is first applied to the intermediate electrodes M1,..., Mn, and then the sustain discharge voltage Vs is applied. Is applied, a rising ramp function is applied from the sustaining discharge voltage Vs to reach a rising maximum voltage Vset + Vs which is increased by the rising voltage Vset, and then rapidly descends to the sustaining discharge voltage Vs. The falling ramp function is applied from the sustain discharge voltage Vs to reach the lowest falling voltage, for example the ground voltage Vg. The ground voltage Vg is applied to the address electrodes A1, ..., Am and the scan electrodes Y1, ..., Yn during the reset period PR, and the sustain electrodes X1, ... , Xn) is continuously applied to the sustain discharge voltage (Vs) when the rising ramp function is applied.

Next, in the address period PA from time t2 to t3, the sustain discharge voltage Vs is applied to the sustain electrodes X1, ..., Xn in order to select a cell to be turned on, and the intermediate electrode The scan voltages Vscan are applied to the fields M1, ..., Mn, and the scan pulses having the ground voltage Vg are sequentially applied to the intermediate electrodes M1, ..., Mn. A display data signal having an address voltage Va is applied to the address electrodes A1, ..., Am in accordance with the scan pulse. As the scan pulse and the display data signal are applied, address discharge is performed in the selected discharge cell. Meanwhile, the ground voltage Vg is applied to the scan electrodes Y1,..., And Yn.

Next, in the sustain discharge period PS from the time t3 to the time t4, the sustain electrodes X1, ..., Xn and the scan are performed so that the sustain discharge is performed in the cell to be turned on selected in the address period PA. A sustain pulse having a sustain discharge voltage Vs is alternately applied to the electrodes Y1, ..., Yn. The sustain discharge is performed by the wall charge accumulated in the discharge cell selected by the address discharge and the applied sustain discharge voltage Vs. Plasma is formed from the plasma forming gas of the discharge cells which perform the sustain discharge, and the phosphors of the discharge cells are excited by ultraviolet radiation from the plasma to generate light.

The wall charge state inside the discharge cell will be described in detail with reference to FIG. 2. First, referring to FIG. 2A, as the rising ramp signal and the falling ramp signal are applied to the intermediate electrodes M1,... Mn during the reset period PR, the negative electrode is formed near the intermediate electrode M. FIG. Wall charges build up. Accordingly, positive wall charges are accumulated in the vicinity of the address electrode A and the scan electrode Y, and positive wall charges are not accumulated in the vicinity of the sustain electrode X due to the sustain discharge voltage Vs applied during the falling ramp. I can't.

In the address period PA, a scan voltage Vscan having a positive polarity is applied to the intermediate electrodes M1, ..., Mn, and a scan pulse having a ground voltage Vg is sequentially applied to each of the intermediate electrodes. A display data signal having a positive address voltage Va is applied to (A1, ..., Am) according to the scanning pulse, and the sustain discharge voltage Vs is applied to the sustain electrodes X1, ..., Xn. Is applied, and the ground voltage Vg is applied to the scan electrodes Y1, ..., Yn.

Referring to FIG. 2B, a diagram showing a state of wall charges in the discharge cells immediately before the address discharge, in which negative wall charges are accumulated near the intermediate electrode X, and near the scan electrode Y and the address electrode A. FIG. ), Wall charges of positive polarity continue to accumulate.

FIG. 2C is a diagram showing the state of wall charges in the discharge cells during the address discharge, and is due to the ground voltage Vg applied to the intermediate electrode M and the address voltage Va applied to the address electrode A. FIG. Address discharge starts to occur between (M) and the address electrode (A). Due to the address discharge, positive wall charges are accumulated near the intermediate electrode M, and negative wall charges are accumulated near the address electrode A. As shown in FIG. At this time, since the gap between the electrodes between the intermediate electrode M and the scan electrode Y is small, the negative wall charges accumulated near the address electrode A and the positive wall charges accumulated near the scan electrode Y are accumulated. Due to the secondary discharge occurs.

2D is a diagram showing the state of wall charges in the discharge cells after the address discharge is completed. Due to the secondary discharge, the wall charges accumulated on the electrodes in the discharge cell are mostly erased. That is, a small amount of negative wall charges are accumulated near the intermediate electrode M, and a small amount of negative wall charges are accumulated near the scan electrode Y, and a very small amount of positive polarity is accumulated in the address electrode A. Electric charges will accumulate.

 In order to generate sustain discharge in the four-electrode structure, as described above, a sustain pulse having a sustain discharge voltage Vs is alternately applied to the scan electrode Y and the sustain electrode X, and to the intermediate electrode M. A positive voltage is applied. Since the four-electrode structure has a feature that the distance between the sustain electrode X and the scan electrode Y is longer than the three-electrode structure, the four-electrode structure directly between the scan electrode Y and the sustain electrode X in the four-electrode structure. Maintenance discharges are difficult to occur. Therefore, in the sustain discharge of the four-electrode structure, a discharge (trigger discharge) between the sustain electrode X and the intermediate electrode M occurs first, and this discharge is expanded to discharge between the sustain electrode X and the scan electrode Y. It has a mechanism that extends to (long gap discharge).

However, due to the secondary discharge generated in the address period as described with reference to FIG. 2C, since the positive wall charges are not accumulated near the scan electrode Y as shown in FIG. 2D, the sustain electrode X and the scan electrode ( The long gap discharge between Y) does not occur. Therefore, when the driving signal shown in FIG. 1 is applied to the four-electrode plasma display panel, the sustain discharge may not be stably performed.

In order to solve the above problems, an object of the present invention is to provide a plasma display panel driving method for stably performing sustain discharge in a four-electrode plasma display panel.

In order to achieve the above object, the present invention, the front substrate and the rear substrate disposed in parallel to the front substrate; Barrier ribs disposed between the front substrate and the rear substrate to define discharge cells that cause discharge; Sustain electrode pairs disposed in the front dielectric layer formed on the front substrate in a rear substrate direction and having scan electrodes and sustain electrodes extending in one direction in which discharge cells extend; Intermediate electrodes disposed in the front dielectric layer and disposed between the scan electrode and the sustain electrode and extending in parallel to the direction in which the sustain electrode pairs extend; Address electrodes disposed in the rear dielectric layer formed on the rear substrate in the front substrate direction and extending across the discharge cells to intersect the direction in which the intermediate electrodes extend; A phosphor layer disposed in the discharge cells and positioned above the address electrodes; And a discharge gas in the discharge cells, the method of driving a plasma display panel comprising:

Driven by a drive signal having a reset section, an address section, and a sustain discharge section,

In the address period, a first voltage is applied to the sustain electrodes, a second voltage is applied to the intermediate electrodes, and a scan pulse having a third voltage smaller than the second voltage is sequentially applied, and the scan electrodes are applied to the scan electrodes. In accordance with the present invention, a display data signal having a fourth voltage is applied, and a fifth voltage smaller than the fourth voltage is applied to the scan electrodes in accordance with the scan pulse.

According to another aspect of the present invention, in the method of driving the plasma display panel, the rising ramp signal and the falling ramp signal are applied to the intermediate electrodes in the reset period, and the sustaining ramp signal is applied from the falling ramp signal. The first voltage is applied, and a ground voltage is applied to the address electrodes and the scan electrodes.

In the sustain discharge period, a first voltage may be alternately applied to the sustain electrodes and the scan electrodes, a sixth voltage may be applied to the intermediate electrodes, and a ground voltage may be applied to the address electrodes.

The present invention also in order to achieve the above object, the front substrate and the rear substrate disposed in parallel to the front substrate; Barrier ribs disposed between the front substrate and the rear substrate and defining discharge cells generating discharge; Sustain electrode pairs disposed in the front dielectric layer formed on the front substrate in a rear substrate direction and having scan electrodes and sustain electrodes extending in one direction in which discharge cells extend; Intermediate electrodes disposed in the front dielectric layer and disposed between the scan electrode and the sustain electrode and extending in parallel to the direction in which the sustain electrode pairs extend; Address electrodes disposed in the rear dielectric layer formed on the rear substrate in the front substrate direction and extending across the discharge cells to intersect the direction in which the intermediate electrodes extend; A phosphor layer disposed in the discharge cells and positioned above the address electrodes; And a discharge gas in the discharge cells, the method of driving a plasma display panel comprising:

Driven by a drive signal having a reset section, an address section, and a sustain discharge section,

In the address period, a first voltage is applied to the sustain electrodes, a second voltage is applied to the intermediate electrodes, and a scan pulse having a third voltage smaller than the second voltage is sequentially applied, and the scan pulses are applied to the address electrodes. In accordance with the present invention, a display data signal having a fourth voltage is applied, and the scan electrodes are floated.

According to another aspect of the present invention, in the driving method of the plasma display panel, the rising ramp signal and the falling ramp signal are applied to the intermediate electrodes in the reset period, and the first voltage is applied when the falling ramp signal is applied to the sustain electrodes. The ground voltage is applied to the address electrodes and the scan electrodes.

In the sustain discharge period, the first voltage may be alternately applied to the sustain electrodes and the scan electrodes, the sixth voltage may be applied to the intermediate electrodes, and the ground voltage may be applied to the address electrodes.

 According to another feature of the invention, the third voltage may be a ground voltage.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

3 is an exploded perspective view showing a plasma display panel of a multi-electrode structure to which the driving method of the present invention is applied.

4 is a plan view of the plasma display panel of FIG. 3 taken along line II-II.

3 and 4, the structure of the plasma display panel having the four-electrode structure will be described.

The plasma display panel 100 of FIG. 3 includes a front panel 110 and a rear panel 120. The front panel 110 is disposed on the front substrate 111, the rear of the front substrate, more specifically the rear surface 111a of the front substrate, between the front substrate 111 and the rear substrate 121 to be described later. The discharge electrode 126, which is a space for generating a discharge defined by the partition wall 124, is extended along one direction in which the discharge cells 126 extend, and the scan electrode 112 and the sustain electrode crossing the discharge cells 126 that extend. 113 are disposed between each of the sustain electrode pairs 114 including the sustain electrode pairs 114, the back of the front substrate, and more particularly, the sustain electrode pairs 114 of the rear surface 111a of the front substrate. The intermediate electrode 150 extends in parallel with the extending direction of the pair to cross the discharge cells. In this case, the storage electrode pairs and the intermediate electrodes may be disposed on the rear surface of the layer, not the rear surface of the front substrate, when a layer having a separate function such as a near infrared absorbing layer is disposed on the rear surface of the front substrate. As such, the arrangement position of the sustain electrode pair and the intermediate electrode is not limited to the rear surface of the front substrate, but is sufficient to be disposed behind the front substrate. Meanwhile, each of the scan electrode 112 and the sustain electrode 113 includes transparent electrodes 112b and 113b formed of ITO or the like for transmitting visible light. Since the transparent electrode generally has high resistance, the sustain electrode And the scan electrodes include bus electrodes 112a and 113a formed of a metal having high conductivity. Meanwhile, the bus electrodes 112a and 113a may be disposed on the rear surfaces 113bb and 112bb of the transparent electrode, but the bus electrodes 112a and 113a are not necessarily limited to this position, and the bus electrode and the transparent electrode may be electrically connected to each other. Meanwhile, the bus electrodes 112a and 113a are connected to a connection cable (not shown) disposed on the left and right sides of the plasma display panel 100 to extend a uniform electric field to discharge cells crossing the bus electrode. It functions to form. In addition, since the intermediate electrode 150 is applied with an electrical signal similarly to the sustain electrode pairs, and positioned on a rear surface of the front substrate and positioned on an optical path, a transparent electrode formed of ITO or the like like the sustain electrode pairs ( 150b) and metallic bus electrode 150a.

The front panel 110 includes a front dielectric layer 115 covering the sustain electrode pairs 114 and the intermediate electrodes 150. In addition, the front panel may include a protective layer 116 disposed on the first dielectric layer to protect the sustain electrode pairs, the intermediate electrodes, and the front dielectric layer. In this case, the passivation layer 116 is formed of MgO or the like, and the passivation layer functions to protect the sustain electrode pairs, the intermediate electrodes, and the front dielectric layer, and increases discharge of secondary electrons during discharge. To facilitate.

The rear panel 120 is located in the discharge cell 126 between the rear substrate 121, the rear substrate 121, and the front dielectric layer 115, more specifically, the intermediate part of the front substrate 121a of the rear substrate. The address electrodes 122 extend across the discharge cells 126 so as to cross the direction in which the electrodes 150 extend. On the other hand, it is preferable that the rear dielectric layer 123 disposed to cover the address electrode to protect the address electrode and to accumulate wall charges. However, when the phosphor layer 125 described later covers the address electrode while being disposed in a discharge cell, the phosphor layer may function as a dielectric layer, and thus the rear dielectric layer 123 is not necessarily a structure.

In addition, the rear panel 120 is disposed between the front substrate and the rear substrate, more specifically, in front of the rear dielectric layer 123, and discharges together with the front substrate 111 and the rear substrate 121. The partition wall 124 which defines discharge cells 126 which are the spaces which generate | occur | produce is provided, and the phosphor layer 125 arrange | positioned in the said discharge cell. On the other hand, the phosphor layer is more preferably disposed in the space defined by the partition wall 124 and the rear dielectric layer 123 for the process and the emission of visible light. In this case, the partition wall is a discharge cell that implements an image by applying a predetermined voltage to the plasma display panel and generating light by generating plasma discharge due to a collision of discharge gas particles and charge induced by an electric field induced by the voltage ( 126 to form a basic unit of an image, and prevent cross talk between discharge cells. In addition, the discharge cell is filled with a discharge gas (approximately 0.5 atm or less) of a vacuum lower than atmospheric pressure, and the partition wall supports the pressure generated between the front panel and the rear panel. The discharge gas is filled with a discharge gas consisting of any one of neon (Ne), helium (He), argon (Ar), or a mixed gas of two or more thereof, including xenon (Xe) gas.

Meanwhile, the phosphor layer 125 disposed in the discharge cell may include red, green, and blue light emitting phosphor layers to enable the plasma display panel to realize a color image. , And the blue light emitting phosphor layers may be disposed inside the discharge cell to form a unit pixel. The phosphor layer may include a phosphor paste in which any one of a phosphor, a solvent, and a binder is mixed with a red light emitting phosphor, a green light emitting phosphor, and a blue light emitting phosphor. It is formed by going through a drying and firing process after being applied to a portion of the. Examples of the red light emitting phosphor include (Y, Gd) BO 3: Eu 3+, and examples of the green light emitting phosphor include Zn 2 Si 04: Mn 2 +, and examples of the blue light emitting phosphor include BaMgAl 10 O 17: Eu 2 +. The address electrodes 122 are connected to connection cables (not shown) disposed above and below the plasma display panel.

FIG. 5 is a block diagram schematically illustrating an apparatus for driving a plasma display panel for implementing the method of driving the plasma display panel of FIG. 3.

Referring to FIG. 5, the driving apparatus of the four-electrode plasma display panel includes an image processor 66, a logic controller 62, a Y driver 65, an address driver 63, an X driver 64, An M driver 67 and a plasma display panel 100 are provided.

The image processor 66 receives an external video signal such as a PC signal, a DVD signal, a video signal, or a TV signal from the outside, converts an analog signal into a digital signal, and processes the digital signal into an internal video signal. The internal video signals are 8-bit red (R), green (G), and blue (B) image data, clock signals, and vertical and horizontal sync signals, respectively.

The logic controller 62 receives an internal image signal from the image processor 66 and performs an gamma correction, an automatic power control (APC) step, and the like, and each of an address driving control signal SA, an X driving control signal SX, The M drive control signal SM and the Y drive control signal SY are output.

The M driver 64 receives the M drive control signal SM from the logic controller 62, reset pulses having a rising ram signal and a falling ramp signal for initialization discharge in the reset period (PR of FIG. 6), A scan pulse having a scan voltage (Vscan in FIG. 6) in an address period (PA in FIG. 6) and a ground voltage Vg sequentially in the vertical direction of the panel for each intermediate electrode, and a sustain discharge period (PS in FIG. 6). The sixth voltage (Vm in Fig. 6) is applied to the intermediate electrodes M1, ..., Mn.

The Y driver 65 receives the Y drive control signal SY from the logic controller 62 and, in the reset period PR of FIG. 6, the ground voltage Vg and the address period PA of FIG. 6. The sustain pulses having the fifth voltage (Vp in FIG. 6) and the sustain discharge voltage (Vs in FIG. 6) and the ground voltage Vg in the sustain discharge period (PS in FIG. 6) are matched with the scan pulses. , ..., Yn).

The address driver 63 receives the address drive control signal SA from the logic controller 62 and has an address voltage (Va in FIG. 6) in a cell to be turned on among all cells in the address period (PA in FIG. 6). The display data signal is applied to the address electrodes A1, ... Am of the plasma display panel 1 in accordance with the scan pulse.

The X driving unit 64 receives the X driving control signal SX from the logic control unit 62, and the sustain discharge voltage (Vs in FIG. 6) in the reset period (PR in FIG. 6) and the address period PA, In sustain discharge, a sustain pulse having a positive sustain discharge voltage (Vs in FIG. 6) and a ground voltage (Vg in FIG. 6) is applied to sustain electrodes X1,..., Xn of the plasma display panel 100. do.

FIG. 6 is a timing diagram illustrating a first embodiment of a driving signal as a driving method of the present invention for driving the plasma display panel of FIG. 3.

8A to 8B are diagrams showing wall charges in the discharge cells in the sustain discharge period of FIG. 6 or FIG.

Referring to FIGS. 6, 8A, and 8B, the subfield SF includes a reset period PR, an address period PA, and a sustain discharge period PS.

In the reset period PR from time t1 to t2, the ground voltage vg is first applied to the intermediate electrodes M1, ..., Mn. Next, the sustain discharge voltage Vs, which is the first voltage, is suddenly applied, and a rising ramp signal is applied from the first voltage Vs to reach a rising maximum voltage Vs + Vset rising by the rising voltage vset. . The weak discharge occurs due to the application of the rising ramp signal having an uneven slope, and the negative discharge causes the negative wall charges to accumulate in the vicinity of the intermediate electrode (M). Until this time, the ground voltage Vg is applied to the address electrodes A1, ..., Am, the sustain electrodes X1, ..., Xn, and the scan electrodes Y1, ..., Yn. Positive wall charges begin to accumulate in the vicinity of the address electrode A and the scan electrode Y.

Next, the abruptly falling first voltage Vs is applied to the intermediate electrodes M1, ..., Mn, and a falling ramp signal is subsequently applied to finally apply the lowest falling voltage. The lowest falling voltage may be a negative voltage, or may be the ground voltage Vg as shown in FIG. 6. On the other hand, the sustain discharge voltage Vs, which is the first voltage, is applied to the sustain electrodes X1, ..., Xn from the drop lamp application, and the address electrodes A1, ..., Am and the scan electrodes. The ground voltage Vg is applied to (Y1, ..., Yn). As a falling ramp signal having a gentle slope is applied, weak discharge occurs, and negatively accumulated wall charges near the middle electrode M are erased. In addition, positive wall charges accumulated near the address electrode A and near the scan electrode Y are also erased. The wall charge state of the discharge cells after the end of the reset period is as shown in Fig. 2A.

Next, in order to select a cell to be turned on in the address period PA from the time t2 to the time t3, the second electrodes have the scan voltage Vscan as the second voltage, Scan pulses having the third voltage V3 are sequentially applied to the intermediate electrodes, that is, in the vertical direction of the panel. The third voltage V3 may be a negative voltage. In addition, in a power supply device (not shown) for supplying various kinds of power to the driving device of the plasma display panel illustrated in FIG. 5, as the level of the power to be supplied varies, the number of converters increases, so that the manufacturing cost increases. In consideration, it is preferable that the third voltage V3 is the ground voltage Vg in order to simplify the power supply level. In FIG. 6, the ground voltage Vg is illustrated. A display data signal having an address voltage Va, which is a fourth voltage, is applied to the address electrodes A1, ..., Am in accordance with the scan pulse. The address discharge is generated between the intermediate electrode M and the address electrode A by the applied drive signal and the wall charge accumulated in the reset period. At this time, the sustain discharge voltage Vs, which is the first voltage, is continuously applied to the sustain electrodes X1, ..., Xn, and the scan electrodes are matched to the scan pulses at the scan electrodes Y1, ..., Yn. The positive fifth voltage Vp is applied. The fifth voltage Vp may be a voltage smaller than the address voltage Va, which is the fourth voltage. Unlike the conventional driving signal shown in FIG. 1, the reason why the fifth voltage Vp is applied to the scan electrodes Y1,..., And Yn for each scan electrode in the address period PA is because of the intermediate electrode M. FIG. After the address discharge generated between the address electrode A and the secondary electrode, the secondary discharge between the scan electrode Y and the address electrode A is undesired due to the potential difference between the scan electrode Y and the address electrode A. This is to prevent this from happening. By applying the positive fifth voltage Vp to the scan electrode Y, the potential difference between the address electrode A and the scan electrode Y is reduced compared with the conventional one, and thus the gap between the electrodes is close. Even if the secondary discharge does not occur.

When the inside of the discharge cell in the address period PS is described in terms of wall charges, negative wall charges are accumulated near the intermediate electrode M before the start of the address discharge, and positive wall charges are formed near the scan electrode Y. The wall charges of the positive polarity are accumulated in the vicinity of the address electrode A. During the address discharge, an address discharge is generated between the intermediate electrode M and the address electrode A by the driving signal and the wall charge applied. A positive wall charge is generated near the intermediate electrode M by the address discharge. The wall charges of negative polarity accumulate in the vicinity of the address electrode A. Unlike the related art, the scan electrode Y does not engage in discharge, and thus the stacked positive wall charge state is maintained as it is. That is, the wall charge state shown in FIG. 2C is maintained.

Next, in the sustain discharge period PS from time t3 to time t4, the sustain discharge which is the first voltage is applied to the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn. A sustain pulse having a voltage Vs and a ground voltage Vg is applied alternately. The ground voltage Vg is applied to the address electrodes A1, ..., Am, and the sixth voltage Vm is applied to the intermediate electrodes M1, ..., Mn to perform sustain discharge. do. The sixth voltage Vm may be smaller than the first voltage Vs and may be the same as the first voltage Vs for simplifying power.

8A to 8B, the inside of the discharge cell in the sustain discharge period PS will be described in terms of wall charge. In the sustain discharge period, as shown in FIG. 8A, the wall charge state inside the discharge cell before the first sustain discharge is generated, positive wall charges are accumulated near the intermediate electrode M, and near the address electrode A. As shown in FIG. Negative wall charges are accumulated, positive wall charges are accumulated near the scan electrode Y, and negative wall charges are accumulated near the sustain electrode X. At this time, as the sustain pulse, the first voltage Vs is applied to the scan electrode Y, the ground voltage Vg is applied to the sustain electrode X, and the sixth voltage Vm is applied to the intermediate electrode M. As applied, discharge occurs due to the applied drive signal and the wall charge state inside the discharge cell. In detail, between the sustain electrode X and the intermediate electrode M due to the positive sixth voltage Vm applied to the intermediate electrode M and the ground voltage Vg applied to the sustain electrode X. First, discharge (trigger discharge) starts, and due to the trigger discharge, the positive wall charges accumulated near the scan electrode Y, the first voltage Vs applied to the scan electrode Y, and the sustain electrode A discharge (long gap discharge) is generated between the scan electrode Y and the sustain electrode X by the ground voltage Vg applied to (X). After the first sustain discharge occurs, negative wall charges accumulate near the intermediate electrode M, positive wall charges accumulate near the sustain electrode X, and negative wall charges near the scan electrode Y. The wall charges of the positive polarity are accumulated on the address electrode A.

Next, when the ground voltage Vg is applied to the scan electrode Y and the first voltage Vs is applied to the sustain electrode X as the sustain pulse, the intermediate electrode M as shown in FIG. 8B after the first sustain discharge. The sustain discharge is generated by the negative wall charges accumulated near the ()) and the scan electrodes (Y), the wall charges accumulated near the sustain electrode (X) and near the address electrode (A), and the driving signal applied thereto.

In detail, similarly to the first sustain discharge described above, a trigger discharge occurs first between the sustain electrode X and the intermediate electrode M, and between the sustain electrode X and the scan electrode Y due to the trigger discharge. Long gap discharge occurs at This second sustain discharge causes positive wall charges to accumulate in the vicinity of the scan electrode (Y) and the middle electrode (M), and negative wall charges accumulate in the vicinity of the sustain electrode (X) and near the address electrode (A). do. That is, the wall charge state as shown in Figure 8a is made.

Next, the first voltage Vs is applied to the scan electrode Y, and the ground voltage Vg is applied to the sustain electrode X. It goes through the same process as the first maintenance discharge.

In this way, the sustain pulses are alternately applied to the scan electrodes and the sustain electrodes so that the sustain discharge is continuously performed.

 FIG. 7 is a timing diagram illustrating a second embodiment of a driving signal as a driving method of the present invention for driving the plasma display panel of FIG. 3.

The drive signal of FIG. 7 is almost the same as the drive signal of FIG. 6. That is, the driving signals in the reset period and the sustain discharge period are applied in the same way. The difference is that the driving signal applied to the scan electrodes in the address period is differently applied. That is, in FIG. 6, a signal having a fifth voltage is applied to each scan electrode in accordance with the scan pulse applied to the intermediate electrode. In FIG. 7, the address electrode in the address period is floated.

Referring to FIGS. 7, 8A, and 8B, the subfield SF includes a reset period PR, an address period PA, and a sustain discharge period PS.

 In the reset period PR from time t1 to t2, the ground voltage vg is first applied to the intermediate electrodes M1, ..., Mn. Next, the sustain discharge voltage Vs, which is the first voltage, is suddenly applied, and a rising ramp signal is applied from the first voltage Vs to reach a rising maximum voltage Vs + Vset rising by the rising voltage vset. . The weak discharge occurs due to the application of the rising ramp signal having an uneven slope, and the negative discharge causes the negative wall charges to accumulate in the vicinity of the intermediate electrode (M). Until this time, the ground voltage Vg is applied to the address electrodes A1, ..., Am, the sustain electrodes X1, ..., Xn, and the scan electrodes Y1, ..., Yn. Positive wall charges begin to accumulate in the vicinity of the address electrode A and the scan electrode Y.

Next, the abruptly falling first voltage Vs is applied to the intermediate electrodes M1, ..., Mn, and a falling ramp signal is subsequently applied to finally apply the lowest falling voltage. The lowest falling voltage may be a negative voltage, or may be the ground voltage Vg as shown in FIG. 6. On the other hand, the sustain discharge voltage Vs, which is the first voltage, is applied to the sustain electrodes X1, ..., Xn from the falling lamp application, and the address electrodes A1, ..., Am and the scan electrodes. The ground voltage Vg is applied to (Y1, ..., Yn). As a falling ramp signal having a gentle slope is applied, weak discharge occurs, and negatively accumulated wall charges near the middle electrode M are erased. Further, the positive wall charges accumulated in the vicinity of the address electrode A and the scan electrode Y are also erased. The wall charge state of the discharge cells after the end of the reset period is as shown in Fig. 2A.

Next, in order to select a cell to be turned on in the address period PA from the time t2 to the time t3, the second electrodes have the scan voltage Vscan as the second voltage, Scan pulses having the third voltage V3 are sequentially applied to the intermediate electrodes, that is, in the vertical direction of the panel. The third voltage V3 may be a negative voltage. In addition, in a power supply device (not shown) for supplying various kinds of power to the driving device of the plasma display panel illustrated in FIG. 5, as the level of the power to be supplied varies, the number of converters increases, so that the manufacturing cost increases. In consideration, it is preferable that the third voltage V3 is the ground voltage Vg in order to simplify the power supply level. In FIG. 7, the ground voltage Vg is illustrated. A display data signal having an address voltage Va, which is a fourth voltage, is applied to the address electrodes A1, ..., Am in accordance with the scan pulse. The address discharge is generated between the intermediate electrode M and the address electrode A by the applied drive signal and the wall charge accumulated in the reset period. At this time, the sustain discharge voltage Vs, which is the first voltage, is continuously applied to the sustain electrodes X1, ..., Xn, and the scan electrodes Y1, ..., Yn are floating during the address period. do. The reason for floating the scan electrodes Y1, ..., Yn is that after the address discharge between the intermediate electrode M and the address electrode A, the potential difference between the scan electrode Y and the address electrode A is reduced. This is to prevent unwanted secondary discharge between the scan electrode Y and the address electrode A from occurring. When the scanning electrode Y is floated, negative wall charges are accumulated near the intermediate electrode M, and positive wall charges are accumulated near the address electrode A, as shown in FIG. 2B, before the address discharge. In the vicinity of the floating scan electrode Y, positive wall charges are accumulated. At the time of address discharge, as shown in FIG. 2C, positive wall charges accumulate near the intermediate electrode M, and negative wall charges accumulate near the address electrode A, and near the floating scan electrode Y. The negative wall charges are accumulated under the influence of the intermediate electrode M having a short distance. Therefore, after the address discharge, the same negative wall charges are accumulated in the vicinity of the address electrode A and in the vicinity of the scan electrode Y, so that secondary discharge does not occur between the address electrode A and the scan electrode Y unlike in the prior art. Will not. Therefore, after the end of the address period, the wall charges in the discharge cells have a distribution as shown in Fig. 2C.

Next, in the sustain discharge period PS from time t3 to time t4, the sustain discharge which is the first voltage is applied to the scan electrodes Y1, ..., Yn and the sustain electrodes X1, ..., Xn. A sustain pulse having a voltage Vs and a ground voltage Vg is applied alternately. The ground voltage Vg is applied to the address electrodes A1, ..., Am, and the sixth voltage Vm is applied to the intermediate electrodes M1, ..., Mn to perform sustain discharge. . The sixth voltage Vm may be smaller than the first voltage Vs and may be the same as the first voltage Vs for simplifying power.

8A to 8B, the inside of the discharge cell in the sustain discharge period PS will be described in terms of wall charge. In the sustain discharge period, as shown in FIG. 8A, the wall charge state inside the discharge cell before the first sustain discharge is generated, positive wall charges are accumulated near the intermediate electrode M, and near the address electrode A. As shown in FIG. Negative wall charges are accumulated, positive wall charges are accumulated near the scan electrode Y, and negative wall charges are accumulated near the sustain electrode X. At this time, as the sustain pulse, the first voltage Vs is applied to the scan electrode Y, the ground voltage Vg is applied to the sustain electrode X, and the sixth voltage Vm is applied to the intermediate electrode M. As applied, discharge occurs due to the applied drive signal and the wall charge state inside the discharge cell. In detail, between the sustain electrode X and the intermediate electrode M due to the positive sixth voltage Vm applied to the intermediate electrode M and the ground voltage Vg applied to the sustain electrode X. First, discharge (trigger discharge) starts, and due to the trigger discharge, the positive wall charges accumulated near the scan electrode Y, the first voltage Vs applied to the scan electrode Y, and the sustain electrode A discharge (long gap discharge) is generated between the scan electrode Y and the sustain electrode X by the ground voltage Vg applied to (X). After the first sustain discharge occurs, negative wall charges accumulate near the intermediate electrode M, positive wall charges accumulate near the sustain electrode X, and negative wall charges near the scan electrode Y. The wall charges of the positive polarity are accumulated on the address electrode A.

Next, when the ground voltage Vg is applied to the scan electrode Y and the first voltage Vs is applied to the sustain electrode X as the sustain pulse, the intermediate electrode M as shown in FIG. 8B after the first sustain discharge. The sustain discharge is generated by the negative wall charges accumulated near the ()) and the scan electrodes (Y), the wall charges accumulated near the sustain electrode (X) and near the address electrode (A), and the driving signal applied thereto.

In detail, similarly to the first sustain discharge described above, a trigger discharge occurs first between the sustain electrode X and the intermediate electrode M, and between the sustain electrode X and the scan electrode Y due to the trigger discharge. Long gap discharge occurs at This second sustain discharge causes positive wall charges to accumulate in the vicinity of the scan electrode (Y) and the intermediate electrode (M), and negative wall charges in the vicinity of the sustain electrode (X) and near the address electrode (A). Will accumulate. That is, the wall charge state as shown in Figure 8a is made.

Next, the first voltage Vs is applied to the scan electrode Y, and the ground voltage Vg is applied to the sustain electrode X. It goes through the same process as the first maintenance discharge.

In this way, the sustain pulses are alternately applied to the scan electrodes and the sustain electrodes so that the sustain discharge is continuously performed.

According to the present invention as described above, the following effects can be obtained.

First, as a driving method of a plasma display panel having a multi-electrode structure, a positive voltage is applied to a scan electrode in an address period, and thus, between the address electrode and the scan electrode, in addition to the address discharge generated between the intermediate electrode and the address electrode, Undesirable secondary discharge can be prevented. Therefore, the wall charge state suitable for the sustain discharge can be formed inside the discharge cell, so that the sustain discharge can be stably performed.

Second, as a driving method of a plasma display panel having a multi-electrode structure, by floating the scan electrodes in an address period, it is possible to prevent unwanted secondary discharges generated between the address electrodes and the scan electrodes. Therefore, the wall charge state suitable for the sustain discharge can be formed inside the discharge cell, so that the sustain discharge can be stably performed.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (5)

A rear substrate disposed in parallel with the front substrate and the front substrate; Barrier ribs disposed between the front substrate and the rear substrate and defining discharge cells generating discharge; Sustain electrode pairs disposed in the front dielectric layer formed on the front substrate in the rear substrate direction and having scan electrodes and sustain electrodes extending in one direction from which the discharge cells extend; Intermediate electrodes disposed in the front dielectric layer, disposed between the scan electrode and the sustain electrode, and extending in parallel to a direction in which the sustain electrode pairs extend; Address electrodes disposed on the rear substrate in the rear dielectric layer formed in the front substrate direction and extending across the discharge cells to intersect a direction in which the intermediate electrodes extend; A phosphor layer disposed in the discharge cells and positioned above the address electrodes; And a discharge gas in the discharge cells. Driven by a drive signal having a reset section, an address section, and a sustain discharge section, In the address period, a first voltage is applied to the sustain electrodes, a second voltage is applied to the intermediate electrodes, and a scan pulse having a third voltage smaller than the second voltage is sequentially applied to the sustain electrodes. Display data signals having a fourth voltage in response to the scan pulses, and a fifth voltage smaller than the fourth voltage in response to the scan pulses is applied to the scan electrodes. Way. The method of claim 1, In the reset period, a rising ramp signal and a falling ramp signal are applied to the intermediate electrodes, and the first voltage is applied to the sustain electrodes when the falling ramp signal is applied, and the address electrodes and the scan electrodes are applied to the intermediate electrodes. Ground voltage is applied, In the sustain discharge period, the first voltage is alternately applied to the sustain electrodes and the scan electrodes, a sixth voltage is applied to the intermediate electrodes, and the ground voltage is applied to the address electrodes. A method of driving a plasma display panel. A rear substrate disposed in parallel with the front substrate and the front substrate; Barrier ribs disposed between the front substrate and the rear substrate and defining discharge cells generating discharge; Sustain electrode pairs disposed in the front dielectric layer formed on the front substrate in the rear substrate direction and having scan electrodes and sustain electrodes extending in one direction from which the discharge cells extend; Intermediate electrodes disposed in the front dielectric layer, disposed between the scan electrode and the sustain electrode, and extending in parallel to a direction in which the sustain electrode pairs extend; Address electrodes disposed on the rear substrate in the rear dielectric layer formed in the front substrate direction and extending across the discharge cells to intersect a direction in which the intermediate electrodes extend; A phosphor layer disposed in the discharge cells and positioned above the address electrodes; And a discharge gas in the discharge cells. Driven by a drive signal having a reset section, an address section, and a sustain discharge section, In the address period, a first voltage is applied to the sustain electrodes, a second voltage is applied to the intermediate electrodes, and a scan pulse having a third voltage smaller than the second voltage is sequentially applied to the sustain electrodes. And a display data signal having a fourth voltage in response to the scan pulses, and the scan electrodes are floated. The method of claim 3, wherein In the reset period, a rising ramp signal and a falling ramp signal are applied to the intermediate electrodes, and the first voltage is applied to the sustain electrodes when the falling ramp signal is applied, and the address electrodes and the scan electrodes are applied to the intermediate electrodes. Ground voltage is applied, In the sustain discharge period, the first voltage is alternately applied to the sustain electrodes and the scan electrodes, a sixth voltage is applied to the intermediate electrodes, and the ground voltage is applied to the address electrodes. A method of driving a plasma display panel. The method of claim 1 or 3, wherein the third voltage, A driving method of a plasma display panel, characterized in that the ground voltage.

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