JP3644789B2 - Plasma display panel and driving method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an AC plasma display panel (PDP) of a matrix display system, and is applied to a surface discharge type PDP that generates discharge along a screen.
[0002]
A PDP is a self-luminous thin display device capable of high-speed display suitable for television. The surface discharge AC type color PDP is used for computer screen output and the like, and has attracted attention as a means for realizing a large screen for HDTV.
[0003]
In a PDP of a matrix display system in which a screen is configured by a set of cells as display elements, a memory effect is used to maintain a cell lighting state (sustain). The AC type PDP is structured to have a memory function structurally by covering the display electrode with a dielectric. When displaying with an AC type PDP, wall charges are accumulated only in the cells to be lit (emitted) according to the display contents, and an alternating polarity voltage (sustain voltage) is applied to all cells in one line. Apply. The sustain voltage is set to a value lower than the discharge start voltage between the sustain electrodes. In a cell in which wall charges exist, the wall voltage is superimposed on the sustain voltage, so that the effective voltage (cell voltage) applied to the cell exceeds the discharge start voltage and discharge occurs. If the application period of the sustain voltage is shortened, an apparently continuous lighting state can be obtained.
[0004]
[Prior art]
FIG. 11 is a cross-sectional view of the main part showing the internal structure of a conventional PDP 90.
The PDP 90 is a surface discharge type PDP in which three electrodes correspond to a unit light emitting region of matrix display. In the PDP 90, a pair of sustain electrodes 93 and 94 for generating discharge (surface discharge) along the substrate surface is arranged on the inner surface of the glass substrate 91 on the front side for each line of the matrix display. A dielectric layer 96 for AC driving is provided so as to insulate these sustain electrodes 93 and 94 from the discharge space 99. A protective film 97 made of a high gamma material is provided on the surface of the dielectric layer 96. Both the dielectric layer 96 and the protective film 97 are translucent. On the other hand, address electrodes 95 are arranged on the inner surface of the glass substrate 92 on the back side so as to be orthogonal to the sustain electrodes 93 and 94. A phosphor layer 98 is provided so as to cover the glass substrate 92 including the upper portion of the address electrode 95.
[0005]
The sustain electrode 93 is a composite electrode in which a band-shaped transparent thin film (ITO film) 931 is overlapped with a band-shaped metal thin film (so-called bus electrode) 932 narrower than that. Similarly, the sustain electrode 94 is also composed of a transparent electrode 941 having a band shape in plan view and a band-shaped metal thin film 942 having a narrower width. The metal thin films 932 and 942 are auxiliary conductors for ensuring appropriate electrical conductivity, and are superimposed on the edge portions of the transparent electrodes 931 and 941 far from the surface discharge gap.
[0006]
For display by the PDP 90, line sequential addressing is performed. When lighting (emitting) the surface discharge cells in the unit light emitting region, the address electrode 95 and the sustain electrode 94 are appropriately biased to generate counter discharge (discharge in the thickness direction of the panel), and the dielectric layer Wall charges are accumulated on the surface of 96 (protective film 97 is also part of dielectric layer 96). When the surface discharge cell is not lit, the potential of each electrode is set so that no counter discharge occurs. After the addressing for setting lighting / non-lighting of the surface discharge cells in this way, a sustain voltage is applied to the sustain electrode 94 and the sustain electrode 93 so that the polarities of these relative voltages are alternately switched, and the period is periodically changed. Causes surface discharge. The phosphor layer 98 is locally excited by ultraviolet UV generated mainly by surface discharge to emit visible light of a predetermined color. Of this visible light, the light that passes through the glass substrate 91 becomes display light. By forming the sustain electrodes 93 and 94 positioned on the front side of the discharge space 99 with the above-described laminated structure, it is possible to increase the light emission efficiency by expanding the surface discharge region while minimizing the shielding of display light.
[0007]
A gap S1 between the sustain electrode 93 and the sustain electrode 94 in each line is referred to as a “discharge slit”. A part of the discharge slit S1 in the line direction is a surface discharge gap. The width of the discharge slit S1 (the dimension in the arrangement direction of the sustain electrodes 93 and 94) is selected so that surface discharge occurs when a driving voltage of about 100 to 200 volts is applied. On the other hand, the gap S2 between the sustain electrode 93 and the sustain electrode 94 between adjacent lines is called “reverse slit”, and the width of the reverse slit S2 is sufficiently larger than the width of the discharge slit S1. Selected. That is, the discharge between the sustain electrodes 93 and 94 arranged with the reverse slit S2 therebetween is prevented. Thus, by providing the discharge slit S1 and the reverse slit S2 and arranging the sustain electrodes 93 and 94, each line can be selectively made to emit light.
[0008]
Normally, the sustain electrodes 93 and 94 have the same width, but a structure in which one sustain electrode 94 used for cell selection in addressing is wider than the other sustain electrode 93 is disclosed in JP-A-5-121006. ing.
[0009]
[Problems to be solved by the invention]
The ideal form of addressing is that a trigger discharge occurs between the sustain electrode 94 and the address electrode 95, and this discharge immediately shifts to a surface discharge between the sustain electrode 94 and the sustain electrode 94. Surface discharge is indispensable in order to uniformly charge the vicinity of the sustain electrodes 93 and 94. When the sustain electrode 94 has the metal thin film 942 as described above, the actual trigger discharge starts between the metal thin film 942 and the address electrode 95 and becomes transparent as the wall charges accumulate above the metal thin film 942. Transition is made to a discharge between the electrode 941 and the address electrode 95.
[0010]
In the conventional structure, there is a problem in that it is difficult to set a driving voltage for performing a correct display because the trigger discharge is likely to stop without shifting to the surface discharge due to the influence of the residual charge. In particular, as the cumulative use time becomes longer, the surface discharge start voltage increases due to the decrease in the thickness of the protective film 97, so that discharge mistakes frequently occur. As the display becomes more precise (increase in the number of lines) and the number of gradations is increased, if the time allocatable to one line addressing is shortened within the display period of one frame, a discharge error is more likely to occur.
[0011]
An object of the present invention is to realize a high-quality display without disturbance by surely generating a discharge necessary for addressing while ensuring a desired luminous efficiency.
[0012]
[Means for Solving the Problems]
Of the pair of transparent electrodes, the width of one electrode related to the trigger discharge of addressing is made smaller than the other width. That is, the electrode area of the electrode pair related to the light emission efficiency is secured, and the opposing area of the electrodes related to the trigger discharge is reduced. If the facing area is small, the trigger discharge quickly shifts to the discharge between the electrodes related to the light emission efficiency.
[0013]
The reverse slit expands by the amount of the reduced electrode width, and the coupling of discharge between adjacent lines is more reliably prevented. If the reverse slit has the same width as the conventional one, the line pitch can be reduced (high definition) by the amount that the electrode width is reduced.
[0014]
When the widths of the pair of electrodes are different, the outer side (reverse slit side) of the electrodes having a small width is easily charged in the sustain period. When wall charges exist in the reverse slit, although there is almost no problem with sustain, addressing for new display performed after sustain becomes uncertain. Negative charges (electrons) disappear relatively quickly due to neutralization or leakage, while positive charges (ions) remain long. Therefore, in the sustain period, a drive voltage is applied so as to prevent the remaining of positive charges in the reverse slit at the end of the sustain. For example, when a positive voltage pulse is alternately applied to a pair of electrodes, the pulse width for a wide electrode is made shorter than the other. Conversely, in a circuit configuration in which negative voltage pulses are alternately applied, the pulse width for a transparent electrode having a small width is shortened. That is, the pulse width is shortened when the electrode having a small width becomes the cathode. However, it is not necessary to shorten the pulse width over the entire sustain period. The same effect can be obtained even if the last applied voltage in the sustain period is such that the electrode having a small width becomes the cathode.
[0015]
  The PDP according to the first aspect of the present invention includes a first electrode and a second electrode extending in the row direction and arranged in the column direction with a discharge gap therebetween in each unit light emitting region of the matrix display, and a third electrode extending in the column direction. Intersect, and the first and second electrodes form a sustain electrode pair, and the second electrode and the third electrode form an address electrode pair.An AC type plasma display panel having a structure in which the first and second electrodes are each composed of a transparent electrode and a metal film having a width smaller than that of the transparent electrode, disposed on the surface of the discharge space. ,The width of the second electrode is smaller than the width of the first electrodeIn the second electrode, the metal film is arranged close to the edge of the transparent electrode near the discharge gap.It is.
[0016]
  The driving method of the invention of claim 2 is,singleIn the address period for setting lighting / non-lighting of the peripheral light emitting region, an address discharge is generated in the unit light emitting region to be set to be lighted to form wall charges in the unit light emitting region, and the first and second electrodes In the sustain period in which the discharge is generated a number of times according to the display brightness, the polarity of the drive pulse applied last among the drive pulses applied to the pair of sustain electrodes is set to the polarity in which the second electrode serves as an anode. It is what.
[0017]
  The driving method of the invention of claim 3 is as follows:In the address period, an address discharge is generated in the unit light emitting region to be set to be lit to form wall charges in the unit light emitting region,  In the sustain period, the pulse width of the drive pulse in which the second electrode becomes the cathode at least last of the drive pulses applied to the sustain electrode pair is made shorter than the pulse width of the other drive pulses.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a perspective view showing an internal structure of a PDP 1 according to the present invention, and FIG.
[0019]
A PDP 1 in FIG. 1 is a surface discharge AC type PDP capable of full color display, and is referred to as a reflection type in terms of classification according to the arrangement form of phosphors.
In the PDP 1, sustain electrodes X and Y are arranged on the inner surface of the front glass substrate 11 in the pair of substrates constituting the panel envelope. A dielectric layer 17 made of low-melting glass and having a thickness of about 30 μm is provided over the entire display area so as to cover the sustain electrodes X and Y with respect to the discharge space 30. A magnesium oxide film having a thickness of several thousand angstroms is formed as a protective film 18 on the surface of the dielectric layer 17. According to chemical vapor deposition (CVD), the thickness of the protective film 18 can be several μm or more. Both the dielectric layer 17 and the protective film 18 are translucent.
[0020]
On the other hand, address electrodes (third electrodes) A are arranged on the inner surface of the glass substrate 21 on the back side so as to be orthogonal to the sustain electrodes X and Y. The address electrode A is provided on the base layer 22 and is covered with a dielectric layer 24 having a thickness of about 10 μm. On the dielectric layer 24, one partition wall 29 having a height of 150 μm in a straight line in plan view is provided between the address electrodes A. The partition walls 29 divide the discharge space 30 into sub-pixels (unit light emitting regions) in the line direction, and define the gap size of the discharge space 30. Then, the phosphor layers 28R, 28G, and 28B of three colors R, G, and B for color display so as to cover the surface of the dielectric layer 24 and the side surfaces of the partition walls 29 including the upper portion of the address electrode A. (Hereinafter, when there is no need to distinguish colors, it is described as a phosphor layer 28). The discharge space 30 is filled with a Penning gas in which xenon (about 1 to 15% mol) is mixed with neon as a discharge gas. In the PDP 1, one display pixel (pixel) is composed of three adjacent sub-pixels (unit light emitting regions) in each line L. The emission color of each line in each column is the same.
[0021]
In the PDP 1, there is no partition that partitions the discharge space 30 in the column direction of matrix display (the arrangement direction of the sustain electrodes X and Y). Therefore, the electrode gap (reverse slit) between the lines L is selected to be a value (for example, 400 to 500 μm) larger than the surface discharge gap (for example, 80 to 140 μm).
[0022]
As shown in FIG. 2, the sustain electrode X includes a transparent electrode x1 which is an ITO film having a thickness of 0.02 μm patterned in a band shape in plan view, and a metal film having a thickness of 2 μm which is patterned in a narrower band shape. (Bus electrode) x2. Similarly, the sustain electrode Y is a composite electrode in which a transparent electrode y1 which is a strip-like ITO film and a narrow strip-like metal film y2 are integrated. The metal films x2 and y2 are both non-transparent thin films having a three-layer structure of chromium / copper / chromium, and discharge of the transparent electrodes x1 and y1 as auxiliary conductors for reducing the line resistance of the sustain electrodes X and Y. On the surface on the space side, it is formed close to the edge far from the discharge slit S1.
[0023]
Here, an important structural feature is that, among the pair of transparent electrodes x1, y1, the width of one transparent electrode y1 related to the trigger discharge between the address electrode A is larger than the width of the other transparent electrode x1. It is small. A practically preferable value of the width ratio is about 80 to 90%. As a specific example, the width of the transparent electrode x1 is 95 μm, and the width of the transparent electrode y1 is 80 μm. The width of the transparent electrode y1 is the width of the sustain electrode Y, and the width of the transparent electrode x1 is the width of the sustain electrode X. By reducing the width of the transparent electrode y1, the area facing the address electrode A is reduced, and the trigger discharge easily shifts to the surface discharge during addressing.
[0024]
FIG. 3 is a schematic diagram of the electrode matrix of the PDP 1, and schematically shows the electrode arrangement of the glass substrates 11 and 21 as viewed from the discharge space 30.
A pair of sustain electrodes X and Y corresponds to one line of the matrix display, and one address electrode A corresponds to one column. Three columns correspond to one pixel. In FIG. 3, a hatched frame-shaped region a <b> 31 is a bonding region of the glass substrates 11 and 21. All the sustain electrodes X are led out to one end edge of the glass substrate 11 in the horizontal direction, and all the sustain electrodes Y are led out to the other end edge. In order to simplify the drive circuit, the sustain electrode X is integrated with the common terminal Xt and electrically shared. In order to enable line-sequential addressing, the sustain electrode Y is an individual electrode that is independent for each line, and is individually integrated with the individual terminal Yt. The address electrode A is integrated with the individual terminal At at the edge portion in the vertical direction of the glass substrate 21.
[0025]
An area where discharge cells are defined by the sustain electrodes X and Y and the address electrode A inside the junction area a31 is an effective display area a1 (screen). A frame-like non-display area a2 is provided between the effective display area a1 and the bonding area a31 in order to avoid the influence of gas release of the bonding material. A through-hole 210 for enclosing a discharge gas is provided in the non-display area a2 of the glass substrate 21.
[0026]
The PDP 1 having the above configuration is used as a display device such as a wall-mounted television receiver in a state combined with a drive unit (not shown). At that time, the PDP 1 is electrically connected to the drive unit via a flexible wiring board or the like.
[0027]
Next, a method for driving the PDP 1 will be described.
4 is a field configuration diagram, and FIG. 5 is a waveform diagram of an applied voltage. FIG. 6 is a schematic diagram of wall charge transition in the address period TA.
[0028]
For display by the PDP 1, for example, one field f is associated with the screen (one frame). When 256 gradation display is performed, one field f is divided into eight subfields sf. Each subfield sf is divided into a reset period TR, an address period TA, and a sustain period TS. Then, weighting is performed so that the relative luminance ratio in each subfield sf is 1: 2: 4: 8: 16: 32: 64: 128, and the number of times of light emission in the sustain period TS of each subfield sf is set. . Each subfield sf is a screen display period of one gradation level. In the case of reproducing a screen scanned in an interlaced format as in a television, two fields f are used to display one screen (one frame).
[0029]
The reset period TR is a period during which wall charges in the effective display area a1 are erased (entire erasure) in order to prevent the influence of the previous lighting state. As shown in FIG. 5, in the reset period TR, the drive unit applies the surface discharge start voltage Vf to the sustain electrode X._XYA positive polarity write pulse PW having a peak value Vr (= Vs + Vw) exceeding 1 is applied. At the same time, a positive pulse Paw having a peak value Vaw is applied to all the address electrodes A.
[0030]
In response to the rise of the write pulse PW, strong surface discharge occurs in all the lines L, and wall charges are generated in the dielectric layer 17. However, in response to the fall of the write pulse PW, so-called self-discharge occurs due to wall charges, and the wall charges of the dielectric layer 17 disappear. The pulse Paw is applied to suppress the accumulation of wall charges on the wall surface on the back side of the discharge space 30.
[0031]
The address period TA is a period for performing line sequential addressing. The sustain electrode X is biased to the positive potential Vax (for example, +50 volts) with respect to the ground potential, and all the sustain electrodes Y are biased to the negative potential Vsc (for example, −70 volts). In this state, each line L is selected in order from the first line L, and a negative scan pulse Py is applied to the sustain electrode Y. The potential of the sustain electrode Y of the selected line L is temporarily biased to a negative potential Vy (for example, −170 volts). Simultaneously with the selection of the line L, a positive address pulse Pa having a peak value Va (for example, +60 volts) is applied to the address electrode A corresponding to the cell to be lit.
[0032]
In the selected line L, the trigger discharge in the substrate facing direction occurs between the sustain electrode Y and the address electrode A in the cell to which the address pulse Pa is applied. Since the sustain electrode X is biased to a potential having the same polarity as the address pulse Pa, the address pulse Pa is canceled by the bias, and no discharge occurs between the sustain electrode X and the address electrode A. Further, the bias potential Vax of the sustain electrode X prevents the wall charges from accumulating in the non-selected cells in the line L, so that the relative voltage between the sustain electrode X and the sustain electrode Y is the surface discharge start voltage Vf._XYIt is set to be lower. Usually, surface discharge start voltage Vf_XYIs the discharge start voltage Vf between the sustain electrode Y and the address electrode A_AYtaller than.
[0033]
The trigger discharge starts between the metal film y2 in the sustain electrode Y and the address electrode A, and shifts to a discharge between the transparent electrode y1 and the address electrode A as positive charges accumulate in the dielectric layer 17. . Negative charges accumulate in the phosphor layer 28. Accumulation of positive and negative charges weakens the electric field between the sustain electrode Y and the address electrode A, and the counter discharge stops (FIG. 6A). Since this trigger discharge generates floating charges in the discharge space 30 near the discharge slit S1, the surface discharge start voltage Vf is generated by the priming effect._XYGo down. For this reason, a surface discharge occurs between the sustain electrode X and the sustain electrode Y, and the amount of wall charges accumulated on the dielectric layer 17 increases (FIG. 6B). Wall charges accumulated in the vicinity of the discharge slit S1 effectively act on the sustain.
[0034]
The sustain period TS is a period in which the lighting state set by the addressing is maintained in order to ensure the luminance according to the gradation level. In order to prevent the counter discharge, all the address electrodes A are biased to a positive potential (for example, Vs / 2), and the peak value Vs (Vs <Vf) is first applied to all the sustain electrodes Y._XY) Positive polarity sustain pulse Ps is applied. Thereafter, a positive sustain pulse Ps having a peak value Vs is alternately applied to the sustain electrode X and the sustain electrode Y. Each time the sustain pulse Ps is applied, a surface discharge occurs in the cell in which wall charges are accumulated in the address period TA. In the present embodiment, the last sustain pulse Ps in the sustain period TS is applied to the sustain pulse Ps with respect to the sustain electrode Y. In the surface discharge by this application, since the sustain electrode Y becomes an anode, the wall charges charged on the sustain electrode Y side are negative charges (electrons). Even if the surface discharge spreads and negative charges are charged in the reverse slit S1, there is no problem in displaying the next subfield sf. This is because most of the negative charge disappears by the application of the write pulse PW in the next subfield sf. That is, even if the widths of the sustain electrodes X and Y are different, display can be performed correctly.
[0035]
FIG. 7 is a waveform diagram of the applied voltage during the sustain period TS according to the second driving method, and FIG. 8 is a schematic diagram of the relationship between the pulse width and the charged state in FIG. In these drawings, the structure of the PDP 1 is simplified for convenience of explanation.
[0036]
  The drive method of FIG. 7 also performs gradation display by dividing one frame into a plurality of subfields sf and providing a reset period TR, an address period TA, and a sustain period TS, as in the above-described method. The same is true in that a positive pulse having a peak value Vs is alternately applied to the sustain electrode X and the sustain electrode Y in the sustain period TS. A feature of the driving method in FIG. 7 is that the final sustain pulse Pss in the sustain period TS is applied to the sustain electrode X. The pulse width w2 of the sustain pulse Pss is shorter than the pulse width w1 of the other sustain pulses Ps. As a result, “charging of positive charges to the reverse slit S2”, which is an obstacle to the reset process of the next subfield sf, is prevented. That is, when a sustain pulse Ps having a normal pulse width w1 is applied to the sustain electrode X, a surface discharge is generated with the sustain electrode X as an anode (with the sustain electrode X as a cathode), and a negative charge is generated on the sustain electrode X side. A positive charge is charged on the sustain electrode Y side. The surface discharge is stopped when a time of about 1 μs elapses, but after that, while the bias is applied, charging by electrostatic adsorption of floating charges proceeds. For this reason, at the falling time t1 of the sustain pulse Ps, positive charges exist in the reverse slit S2 as shown in FIG. Next, when the sustain pulse Ps is applied to the sustain electrode Y, a surface discharge with the sustain electrode Y as an anode occurs.,Wall charges of opposite polarity to the previous one are charged. At the time t2 when the sustain pulse Ps falls at this time, negative charges exist in the reverse slit S2 as shown in FIG. 8B. Finally, when a sustain pulse Pss having a short pulse width w2 is applied to the sustain electrode X, a negative charge is again charged on the sustain electrode X side, and a positive charge is charged on the sustain electrode Y side again. However, in this case, since the voltage application time is short, charging after the discharge is stopped does not proceed. Therefore, substantially no charge is present in the reverse slit S2 as shown in FIG. 8C at the time t3 when the sustain pulse Pss falls.
[0037]
FIG. 9 is a schematic diagram of the sustain electrode structure of the second PDP 2.
The PDP 2 is also a surface discharge type PDP similar to the PDP 1 described above. A sustain electrode X2, a sustain electrode Y2, and an address electrode A2 exist in each unit light emitting region of the matrix display. Although not shown, the sustain electrodes X2 and Y2 are insulated from the discharge space 302 by a dielectric.
[0038]
The sustain electrode X2 includes a transparent electrode x12 and a metal film x22 that is an auxiliary conductor. Sustain electrode Y2 width W_YIs the width W of the sustain electrode X2_XSmaller than. The metal film x22 is vapor-deposited on the surface of the transparent electrode x12 on the discharge space side, and is arranged close to the edge of the transparent electrode x12 on the side far from the discharge slit S12. The sustain electrode Y2 also includes a transparent electrode y12 and a metal film y22 that is an auxiliary conductor. However, the metal film y22 is arranged on the surface on the discharge space side of the transparent electrode y12 so as to be close to the end edge portion on the side close to the discharge slit S12. By disposing the metal film y22 in the vicinity of the discharge slit S1, the surface discharge is likely to occur, so that the transition from the trigger discharge to the surface discharge is promoted.
[0039]
  FIG. 10 is an applied voltage waveform showing a modification of the driving method.
  Pulse width with respect to the sustain electrode X in the sustain period TSwA positive sustain pulse Pss 2 is applied and the pulse width is applied to the sustain electrode Y.w1 (w1>wBy applying the positive sustain pulse Ps of 2), surface discharge is periodically generated. That is, the voltage application time when the sustain electrode Y becomes the cathode is shortened. Thereby, charging of the positive charge to the reverse slit S2 is prevented. Note that when the sustain pulses Ps and Pss are negative pulses, the sustain pulse Ps is applied to the sustain electrode X and the sustain pulse Pss is applied to the sustain electrode Y.
[0040]
The PDPs 1 to 4 exemplified in the above description have a structure in which the address electrodes A and A2 are arranged on the inner surface of the glass substrate 21 on the back side. However, the present invention is not limited to the address electrodes A and A2 and the sustain electrodes. The present invention can also be applied to a PDP having a structure in which a pair is supported by the same substrate.
[0041]
【The invention's effect】
According to the first to third aspects of the invention, it is possible to realize a high-quality display without disturbance by reliably generating a discharge necessary for addressing while ensuring a desired light emission efficiency.
[0042]
According to the second or third aspect of the invention, it is possible to prevent unnecessary positive charges from becoming a hindrance to subsequent driving during the sustain period.
[Brief description of the drawings]
FIG. 1 is a perspective view showing an internal structure of a PDP according to the present invention.
FIG. 2 is a cross-sectional view of a main part of a PDP.
FIG. 3 is a schematic view of an electrode matrix of a PDP.
FIG. 4 is a field configuration diagram.
FIG. 5 is a waveform diagram of an applied voltage.
FIG. 6 is a schematic diagram showing transition of wall charges in an address period.
FIG. 7 is a waveform diagram of an applied voltage during a sustain period according to a second driving method.
8 is a schematic diagram of a relationship between a pulse width and a charged state in FIG.
FIG. 9 is a schematic diagram of a sustain electrode structure of a second PDP.
FIG. 10 is an applied voltage waveform showing a modification of the driving method.
FIG. 11 is a cross-sectional view of the main part showing the internal structure of a conventional PDP.
[Explanation of symbols]
  1, 2 PDP (Plasma Display Panel)
  30,302 discharge space
  A Address electrode (third electrode)
  S1, S12 Discharge slit (discharge gap)
  TA address period
  TS Sustain period
  W_X ,W_Y   width
  x12Transparent electrode
  y12Transparent electrode
  x22 metal film
  y22 metal film
  X, X2 Sustain electrode (first electrode)
  Y, Y2 Sustain electrode (second electrode)

Claims (3)

In each unit light emitting region of the matrix display, the first and second electrodes extending in the row direction and arranged in the column direction with a discharge gap therebetween intersect with the third electrode extending in the column direction, and the first and first electrodes An AC type plasma display panel having a structure in which a sustain electrode pair is constituted by two electrodes, and an address electrode pair is constituted by the second electrode and the third electrode,
Each of the first and second electrodes comprises a transparent electrode and a metal film disposed on the surface of the discharge space and having a width smaller than that of the transparent electrode,
The width of the second electrode is smaller than the width of the first electrode;
In the second electrode, an AC plasma display panel, wherein the metal film is arranged close to an end edge of the transparent electrode on the side close to the discharge gap. A driving method of an AC type plasma display panel according to claim 1 ,
In the address period for setting lighting / non-lighting of the unit light emitting region, an address discharge is generated in the unit light emitting region to be set to be lighted to form wall charges in the unit light emitting region,
In the sustain period in which discharge is generated between the first and second electrodes according to display brightness, the polarity of the drive pulse applied last among the drive pulses applied to the sustain electrode pair is set to the first and second electrodes. A driving method of an AC type plasma display panel, wherein the polarity of the two electrodes is an anode . A driving method of an AC type plasma display panel according to claim 1 ,
In the address period for setting lighting / non-lighting of the unit light emitting region, an address discharge is generated in the unit light emitting region to be set to be lighted to form wall charges in the unit light emitting region,
In the sustain period in which the discharge is generated a number of times according to display brightness between the first and second electrodes, the second electrode becomes the cathode at least at the end of the drive pulse applied to the sustain electrode pair. A driving method of an AC type plasma display panel, wherein a pulse width of a driving pulse is made shorter than a pulse width of other driving pulses.

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