JPH10302643A - Plasma display panel and its driving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely cause a discharge necessary for addressing while ensuring a desired emission efficiency, and perform a display of high quality free from disturbance by setting the width of one electrode related to trigger discharge smaller than the width of the other to ensure the electrode area of a pair of electrodes related to the emission efficiency, and contracting the opposed area of the electrodes related to the trigger discharge. SOLUTION: In each unit emitting area of a matrix display, a first and a second electrodes x1, y1 extended in line direction and arranged in column direction with a discharge gap are crossed to a third electrode A extended in the column direction. A sustain electrode pair is formed by the first and second electrodes x1, y1, and an address electrode pair is formed by the second electrode y1 and the third electrode A. Of the first and second electrodes x1, y1, the width of the second electrode y1 related to the trigger discharge with the address electrode A is set smaller than the width of the first electrode x1. In addressing, the trigger discharge thus becomes easy to transfer to surface discharge.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a matrix display type AC plasma display panel (PlasmaDispla).
y Panel: PDP) is applied to a surface discharge type PDP that generates a discharge along a screen.

[0002] A PDP is a self-luminous type thin display device capable of high-speed display suitable for television. The surface-discharge type AC color PDP is used for screen output of a computer or the like, and is attracting attention as a means for realizing a large screen for HDTV.

In a matrix display type PDP in which a screen is formed by a group of cells as display elements, a memory effect is used to maintain a lighting state of cells (sustain). The AC PDP is structured so as to structurally have a memory function by coating a display electrode with a dielectric. In displaying by the AC type PDP, wall charges are accumulated only in cells to be turned on (emit light) in accordance with display contents, and a voltage having an alternating polarity (sustain voltage) is commonly applied to all cells in one line. Apply. The sustain voltage is lower than the discharge start voltage between the sustain electrodes. In a cell with wall charges, the wall voltage is superimposed on the sustain voltage, so the effective voltage applied to the cell (cell voltage)
Exceeds the discharge starting voltage, and discharge occurs. If the application cycle of the sustain voltage is shortened, an apparently continuous lighting state can be obtained.

[0004]

2. Description of the Related Art FIG. 11 is a sectional view showing a main part of an internal structure of a conventional PDP 90. As shown in FIG. The PDP 90 is a surface-discharge type PDP in which three electrodes correspond to a unit light-emitting region of a matrix display.
DP. In the PDP 90, the glass substrate 91 on the front side
On the inner surface of the substrate, a pair of sustain electrodes 93 and 94 for generating a discharge (surface discharge) along the substrate surface are arranged for each matrix display line. A dielectric layer 96 for AC driving is provided so as to insulate these sustain electrodes 93 and 94 from the discharge space 99.
On the surface of the dielectric layer 96, a protective film 97 made of a high gamma material is provided. Both the dielectric layer 96 and the protective film 97 have translucency. On the other hand, on the inner surface of the glass substrate 92 on the rear side, address electrodes 95 are arranged so as to be orthogonal to the sustain electrodes 93 and 94. A phosphor layer 98 is provided so as to cover the glass substrate 92 including the upper part of the address electrode 95.

The sustain electrode 93 is a composite electrode in which a band-shaped transparent thin film (ITO film) 931 is superposed on a band-shaped thin metal film (so-called bus electrode) 932 having a smaller width. Similarly, the sustain electrode 94 includes a band-shaped transparent electrode 941 in a plan view and a band-shaped metal thin film 942 having a smaller width.
It is composed of The metal thin films 932 and 942 are auxiliary conductors for ensuring proper conductivity, and are superimposed on the edges of the transparent electrodes 931 and 941 far from the surface discharge gap.

For display by the PDP 90, line-sequential addressing is performed. When the surface discharge cells in the unit light emitting region are turned on (emit light), the address electrode 95 and the sustain electrode 94 are appropriately biased to generate an opposing discharge (discharge in the thickness direction of the panel), and a dielectric layer is formed. Wall charges are accumulated on the surface of the dielectric layer 96 (the protective film 97 is also a part of the dielectric layer 96). When the surface discharge cell is not turned on, the potential of each electrode is set so that no counter discharge occurs.
After the addressing for setting the lighting / non-lighting of the surface discharge cells as described above, the sustain electrode 94 and the sustain electrode 9 are set.
3 and a sustain voltage is applied such that the polarities of these relative voltages alternate with each other, and a surface discharge is generated periodically. The phosphor layer 98 is locally excited mainly by ultraviolet rays UV generated by surface discharge and emits visible light of a predetermined color. Of this visible light, the light that passes through the glass substrate 91 becomes the display light. By forming the sustain electrodes 93 and 94 located on the front side of the discharge space 99 in the above-described laminated structure,
The light emission efficiency can be increased by expanding the surface discharge region while minimizing the shielding of the display light.

The gap S1 between the sustain electrode 93 and the sustain electrode 94 in each line is called a "discharge slit". A part of the discharge slit S1 in the line direction is a surface discharge gap. The width of the discharge slit S1 (the dimension in the arrangement direction of the sustain electrodes 93 and 94) is 100 to 20.
It is selected so that surface discharge occurs when a driving voltage of about 0 volt is applied. On the other hand, the gap S2 between the sustain electrode 93 and the sustain electrode 94 between adjacent lines is called an "inverted slit", and the inverted slit S
The width of 2 is selected to be a value sufficiently larger than the width of the discharge slit S1. That is, discharge is prevented between the sustain electrodes 93 and 94 arranged with the reverse slit S2 therebetween. Thus, the discharge slit S1 and the reverse slit S2
And by arranging the sustain electrodes 93 and 94, each line can selectively emit light.

Although the widths of the sustain electrodes 93 and 94 are usually the same, a structure in which one sustain electrode 94 used for cell selection in addressing is wider than the other sustain electrode 93 is disclosed in Japanese Patent Laid-Open No. 5-121006. Is disclosed.

[0009]

The ideal form of addressing is as follows. First, the sustain electrode 94 and the address electrode 95 are used.
Trigger discharge occurs between the two, and this discharge immediately shifts to a surface discharge between the sustain electrode 94 and the sustain electrode 94. Each sustain electrode 93, 9
Surface discharge is indispensable for uniformly charging the vicinity of 4.
When the sustain electrode 94 has the metal thin film 942 as described above, the actual trigger discharge is caused by the metal thin film 942.
And between the transparent electrode 941 and the address electrode 95 as wall charges accumulate above the metal thin film 942.

In the conventional structure, there is a problem that a discharge mistake in which the trigger discharge is stopped without shifting to the surface discharge due to the influence of the residual charge or the like easily occurs, and it is difficult to set a driving voltage for performing a correct display. Was. In particular, as the cumulative use time becomes longer, the surface discharge starting voltage increases due to the decrease in the thickness of the protective film 97, so that a discharge mistake frequently occurs. With higher definition of display (increase of the number of lines) and multi-gradation, 1
If the time allocatable to one-line addressing within the frame display period is shortened, a discharge error is more likely to occur.

According to the present invention, while securing a desired luminous efficiency,
It is an object of the present invention to reliably generate a discharge necessary for addressing and realize a high-quality display without disturbance.

[0012]

Means for Solving the Problems Of the pair of transparent electrodes,
The width of one electrode related to the addressing trigger discharge is made smaller than the width of the other electrode. That is, the electrode area of the electrode pair related to the luminous efficiency is secured, and the facing area between the electrodes related to the trigger discharge is reduced. If the facing area is small, the trigger discharge quickly shifts to discharge between the electrodes related to the luminous efficiency.

[0013] The reverse slit is widened by the reduced width of the electrode, and the discharge coupling between adjacent lines is more reliably prevented. If the width of the reverse slit is the same as that of the conventional slit, the line pitch can be reduced (higher definition) by the reduced width of the electrode.

If the width of the pair of electrodes is different, the outside (the reverse slit side) of the narrow electrode is likely to be charged during the sustain period. If there is wall charge in the reverse slit, there is almost no problem with the sustain, but the addressing for a new display performed after the sustain becomes uncertain. Negative charges (electrons) disappear relatively quickly due to neutralization or leakage, whereas positive charges (ions) remain for a long time. Therefore, in the sustain period, a drive voltage is applied so as to prevent the positive charges from remaining in the reverse slit at the end of the sustain. For example, in the case where positive voltage pulses are alternately applied to a pair of electrodes, the pulse width for an electrode having a large width is made shorter than the other. Conversely, in a circuit configuration in which negative voltage pulses are alternately applied, the pulse width for a transparent electrode having a small width is shortened. That is, the pulse width is shortened when the electrode having the smaller width becomes the cathode. However, it is not necessary to shorten the pulse width over the entire sustain period. The same effect can be obtained even if the electrode having a small width is used as the cathode by applying the last applied voltage in the sustain period.

According to the first aspect of the present invention, in each unit light emitting region of a matrix display, first and second electrodes extending in a row direction and arranged in a column direction with a discharge gap therebetween, and a third electrode extending in a column direction. And the first and second electrodes intersect with each other.
A sustain electrode pair is constituted by the electrodes of
An address electrode pair is formed by the first electrode and the third electrode, and the PDP has a structure in which the width of the second electrode is smaller than the width of the first electrode.

In a driving method according to a second aspect of the present invention, the driving pulse applied to the pair of sustain electrodes during a sustain period in which discharge is generated between the first and second electrodes a number of times corresponding to display luminance. The polarity of the drive pulse applied last is the polarity at which the second electrode becomes a cathode.

In a driving method according to a third aspect of the present invention, the driving pulse applied to the pair of sustain electrodes during a sustain period in which a discharge is generated between the first and second electrodes a number of times corresponding to the display luminance. At least at the end, the pulse width of the drive pulse in which the second electrode becomes the cathode is shorter than the pulse width of the other drive pulses.

[0018]

FIG. 1 is a perspective view showing the internal structure of a PDP 1 according to the present invention, and FIG. 2 is a sectional view of a main part of the PDP 1.

The PDP 1 shown in FIG. 1 is an AC type PDP of a surface discharge type capable of full color display, and is called a reflection type after being classified according to the arrangement of phosphors. In the PDP 1, sustain electrodes X and Y are arranged on the inner surface of the glass substrate 11 on the front side of the substrate pair forming the panel envelope. These sustain electrodes X and Y are connected to discharge space 3
A dielectric layer 17 made of low-melting glass and having a thickness of about 30 μm is provided over the entire display area so as to cover the area 0. On the surface of the dielectric layer 17, a magnesium oxide film having a thickness of several thousand angstroms is formed as a protective film. According to chemical vapor deposition (CVD), the protective film 1
8 can have a thickness of several μm or more. Dielectric layer 1
7 and the protective film 18 both have a light transmitting property.

On the other hand, address electrodes (third electrodes) A are arranged on the inner surface of the rear glass substrate 21 so as to be orthogonal to the sustain electrodes X and Y. Address electrode A
Is provided on the underlayer 22 and is covered with a dielectric layer 24 having a thickness of about 10 μm. On the dielectric layer 24, one partition wall 29 having a height of 150 μm and having a linear band shape in a plan view is provided between each address electrode A. These partition walls 29 divide the discharge space 30 into sub-pixels (unit light emitting regions) in the line direction.
A gap size of 0 is defined. Then, R, G, and B for color display are covered so as to cover the surface of the dielectric layer 24 and the side surfaces of the partition 29, including the upper part of the address electrode A.
Phosphor layers 28R, 28G, and 28B (hereinafter, referred to as phosphor layers 28 when there is no need to distinguish colors). The discharge space 30 is filled with a penning gas in which xenon (about 1 to 15% mol) is mixed with neon as a discharge gas. In PDP1,
One pixel (pixel) of display is composed of three adjacent sub-pixels (unit light-emitting regions) in each line L. The emission color of each line in each column is the same.

In the PDP 1, the discharge spaces 3 are arranged in the column direction of the matrix display (the direction in which the sustain electrodes X and Y are arranged).
There is no partition separating 0. Therefore, the electrode gap (reverse slit) between the lines L is larger than the surface discharge gap (for example, 80 to 140 μm) (for example, 400 to 50 μm).
0 μm).

As shown in FIG. 2, the sustain electrode X has a thickness of 0.02 μm patterned in a band shape in plan view.
A transparent electrode x1 as an ITO film and a metal film (bus electrode) x2 having a thickness of 2 μm and patterned in a band shape narrower than the transparent electrode x1. Similarly, the sustain electrode Y is a composite electrode in which a transparent electrode y1 which is a band-shaped ITO film and a band-shaped metal film y2 which is narrower than the transparent electrode y1 are integrated. Each of the metal films x2 and y2 is a non-light-transmitting thin film having a three-layer structure of chromium / copper / chromium, and has sustain electrodes X and Y.
As an auxiliary conductor for reducing the line resistance of the transparent electrodes x1 and y1, a discharge slit S1
It is formed close to the edge farther from the side.

Here, an important structural feature is that, of the pair of transparent electrodes x1 and y1, the width of one transparent electrode y1 related to the trigger discharge between the pair of transparent electrodes x1 and y1 is different from that of the other transparent electrode x1. It is smaller than the width. A practically preferable value of the width ratio is about 80 to 90%. As a specific example, the width of the transparent electrode x1 is 95 μm, and the transparent electrode y1
Is 80 μm. The width of the transparent electrode y1 is the width of the sustain electrode Y, and the width of the transparent electrode x1 is the width of the sustain electrode X. By reducing the width of the transparent electrode y1, the area facing the address electrode A is reduced,
At the time of addressing, the trigger discharge easily shifts to surface discharge.

FIG. 3 is a schematic diagram of the electrode matrix of the PDP 1 and shows the glass substrates 11 and 21 viewed from the discharge space 30.
Are schematically shown. 1 of matrix display
A line corresponds to a pair of sustain electrodes X and Y, and one column corresponds to one address electrode A. Then, three columns correspond to one pixel. In FIG. 3, a hatched frame-shaped area a31 is a bonding area between the glass substrates 11 and 21. All the sustain electrodes X are led out to one edge in the horizontal direction of the glass substrate 11, and all the sustain electrodes Y are led out to the other edge. The sustain electrode X is connected to a common terminal Xt for simplification of the driving circuit.
And are electrically shared. The sustain electrode Y is an individual electrode that is independent for each line in order to enable line-sequential addressing, and is individually integrated with the individual terminal Yt. Address electrode A
Are integrated with the individual terminals At at the vertical edge of the glass substrate 21.

The area where the discharge cells are defined by the sustain electrodes X and Y and the address electrode A inside the junction area a31 is the effective display area a1 (screen). A non-display area a2 having a frame shape is provided between the effective display area a1 and the bonding area a31 in order to avoid the influence of outgassing of the bonding material. In the non-display area a2 of the glass substrate 21, a through hole 210 for enclosing a discharge gas is provided.
Is provided.

The PDP 1 having the above configuration is used as a display device such as a wall-mounted television receiver in a state where the PDP 1 is combined with a drive unit (not shown). that time,
The PDP 1 is electrically connected to a drive unit via a flexible wiring board or the like.

Next, a method of driving the PDP 1 will be described. FIG. 4 is a field configuration diagram, and FIG. 5 is a waveform diagram of an applied voltage. FIG. 6 is a schematic diagram of transition of wall charges during the address period TA.

When displaying on the PDP 1, the screen (1
For example, one field f is associated with a frame.
When performing 256 gradation display, one field f is divided into eight subfields sf. Each subfield sf is divided into a reset period TR, an address period TA, and a sustain period TS. Then, the relative ratio of luminance in each subfield sf is 1: 2: 4: 8: 1.
6: 32: 64: 128
The number of times of light emission in the sustain period TS of each subfield sf is set. Each subfield sf is a screen display period of one gradation level. When reproducing a screen scanned in an interlaced format like a television, two fields f are used to display one screen (one frame).

The reset period TR is a period in which wall charges in the effective display area a1 are erased (entirely erased) in order to prevent the influence of the previous lighting state. As shown in FIG. 5, in the reset period TR, the drive unit applies a _peak value Vr (= Vs) exceeding the surface discharge start voltage Vf _XY to the sustain electrode X.
+ Vw) is applied. At the same time, a positive pulse Paw having a peak value Vaw is applied to all the address electrodes A.

In response to the rise of the address pulse PW, a strong surface discharge is generated in all the lines L, and a wall charge is generated in the dielectric layer 17. However, in response to the fall of the write pulse PW, so-called self-discharge occurs due to wall charges, and the wall charges of the dielectric layer 17 disappear. The pulse Paw is applied to suppress accumulation of wall charges on the back wall surface of the discharge space 30.

The address period TA is a period in which line-sequential addressing is performed. The sustain electrodes X are biased to a positive potential Vax (for example, +50 volts) with respect to the ground potential, and all the sustain electrodes Y are biased to a negative potential Vsc (for example, -70 volts). In this state, each line L is sequentially selected one by one from the first line L, and a negative scan pulse Py is applied to the sustain electrode Y. The potential of the sustain electrode Y of the selected line L is
It is temporarily biased to a negative potential Vy (eg, -170 volts). Simultaneously with the selection of the line L, the peak value Va (for example, +
A positive address pulse Pa of 60 volts) is applied.

In the cell to which the address pulse Pa is applied in the selected line L, a trigger discharge occurs between the sustain electrode Y and the address electrode A in the direction facing the substrate. Since the sustain electrode X is biased to a potential having the same polarity as the address pulse Pa, the bias cancels the address pulse Pa and no discharge occurs between the sustain electrode X and the address electrode A. Further, the bias voltage Vax of the sustain electrode X is set so that the relative voltage between the sustain electrode X and the sustain electrode Y is higher than the surface discharge start voltage Vf _XY in order to prevent accumulation of wall charges in unselected cells in the line L. It is set to be low. Normal,
The surface discharge start voltage Vf _XY is higher than the discharge start voltage Vf _AY between the sustain electrode Y and the address electrode A.

The trigger discharge starts between the metal film y2 in the sustain electrode Y and the address electrode A, and as the positive charges accumulate in the dielectric layer 17, the discharge between the transparent electrode y1 and the address electrode A occurs. Move to Negative charges are accumulated in the phosphor layer 28. The electric field between the sustain electrode Y and the address electrode A is weakened by the accumulation of the positive charge and the negative charge, and the opposing discharge is stopped (FIG. 6A). The trigger discharge generates floating charges in the discharge space 30 near the discharge slit S1, so that the priming effect lowers the surface discharge start voltage Vf _XY . For this reason, surface discharge occurs between the sustain electrode X and the sustain electrode Y, and the amount of accumulated wall charges on the dielectric layer 17 increases [FIG.
(B)]. The wall charges accumulated in the vicinity of the discharge slit S1 effectively act on the sustain.

The sustain period TS is a period in which the lighting state set by addressing is maintained in order to secure luminance according to the gradation level. In order to prevent the counter discharge, all the address electrodes A are biased to a positive potential (for example, Vs / 2), and a positive sustain pulse of a peak value Vs (Vs <Vf _XY ) is first applied to all the sustain electrodes Y. Apply Ps. Thereafter, a positive sustain pulse Ps having a peak value Vs is alternately applied to the sustain electrode X and the sustain electrode Y. Each time the sustain pulse Ps is applied, surface discharge occurs in the cell in which the wall charges are accumulated in the address period TA. In the present embodiment, the last sustain pulse Ps in the sustain period TS is applied to the sustain electrode Y as the sustain pulse Ps. In the surface discharge by this application, the sustain electrode Y
Becomes an anode, and the wall charges charged on the side of the sustain electrode Y are negative charges (electrons). Even if the surface discharge spreads and negative charges are charged in the reverse slit S1, there is no problem in displaying the next subfield sf. This is because most of the negative charges disappear by the application of the address pulse PW in the next subfield sf. That is, display can be performed correctly even if the widths of the sustain electrodes X and Y are different.

FIG. 7 is a waveform diagram of the applied voltage in the sustain period TS according to the second driving method, and FIG. 8 is a schematic diagram showing the relationship between the pulse width and the charging state in FIG. In these figures, the structure of PDP 1 is simplified for convenience of explanation.

The driving method shown in FIG. 7 is similar to the above-described method.
The frame is divided into a plurality of subfields sf, and a reset period TR, an address period TA, and a sustain period TS
Is provided to perform gradation display. Sustain period T
In S, the same applies to the case where a positive polarity pulse having a peak value Vs is alternately applied to the sustain electrode X and the sustain electrode Y. A feature of the driving method in FIG. 7 is that the last sustain pulse Pss in the sustain period TS is applied to the sustain electrode X. The pulse width w2 of this sustain pulse Pss is different from that of another sustain pulse Ps.
Is shorter than the pulse width w1. As a result, the “reverse slit S” which is an obstacle to the reset processing of the next subfield sf
That is, when the sustain pulse Ps having a normal pulse width w1 is applied to the sustain electrode X, the surface discharge using the sustain electrode X as the anode (using the sustain electrode X as the cathode) is prevented. Then, a negative charge is charged on the side of the sustain electrode X and a positive charge is charged on the side of the sustain electrode Y. The surface discharge is stopped when a time of about 1 μs elapses, and thereafter, the surface discharge is suspended while the bias is applied. As a result, the charge is increased due to the electrostatic attraction of the electric charge, so that at the falling time t1 of the sustain pulse Ps, a positive electric charge exists in the reverse slit S2 as shown in FIG.
Next, the sustain electrode Ps is applied to the sustain electrode Y.
Is applied, a surface discharge with the sustain electrode Y as an anode occurs, and wall charges having a polarity opposite to the previous polarity are charged as shown in FIG. At this time, at the falling time point t2 of the sustain pulse Ps, negative charges exist in the reverse slit S2 as shown in FIG. 8B. Finally, when a sustain pulse Pss having a short pulse width w2 is applied to the sustain electrode X,
A negative charge is again applied to the sustain electrode X side, and the sustain electrode Y
Is charged with a positive charge. However, in this case, since the voltage application time is short, charging after stopping the discharge does not proceed. Therefore, the falling time t3 of the sustain pulse Pss
In FIG. 8C, there is substantially no charge in the reverse slit S2 as shown in FIG.

FIG. 9 is a schematic diagram of the sustain electrode structure of the second PDP 2. PDP2 is a surface discharge type PDP similar to PDP1 described above. In each unit light emitting region of the matrix display, a sustain electrode X2, a sustain electrode Y2,
And an address electrode A2. Although illustration is omitted,
The sustain electrodes X2 and Y2 are connected to the discharge space 3 by a dielectric.
02 is insulated.

The sustain electrode X2 is a transparent electrode x12.
And a metal film x22 as an auxiliary conductor. The width W _Y of the sustain electrode Y2 is smaller than the width W _X of the sustain electrode X2. The metal film x22 is vapor-deposited on the surface of the transparent electrode x12 on the discharge space side, and is arranged near the edge of the transparent electrode x12 on the side far from the discharge slit S12. The sustain electrode Y2 also includes a transparent electrode y12 and a metal film y22 serving as an auxiliary conductor. However, the metal film y22
Are arranged on the surface on the discharge space side of the transparent electrode y12, close to the edge near the discharge slit S12. By arranging the metal film y22 in the vicinity of the discharge slit S1, the surface discharge is easily caused, and the transition of the trigger discharge to the surface discharge is promoted.

FIG. 10 is an applied voltage waveform showing a modification of the driving method. In the sustain period TS, a positive sustain pulse Pss having a pulse width t2 is applied to the sustain electrode X, and a positive sustain pulse Ps having a pulse width t1 (t1> t2) is applied to the sustain electrode Y. As a result, a surface discharge is periodically generated.
That is, the voltage application time when the sustain electrode Y becomes the cathode is shortened. This prevents the reverse slit S2 from being charged with positive charges. Note that the sustain pulse Ps,
When Pss is a negative pulse, the sustain electrode X
, And a sustain pulse Pss is applied to the sustain electrode Y.

In the PDPs 1 to 4 exemplified in the above description, the address electrodes A and A2 are all provided on the glass substrate 21 on the rear side.
However, the present invention is also applicable to a PDP having a structure in which the address electrodes A and A2 and the sustain electrode pair are supported by the same substrate.

[0041]

According to the first to third aspects of the present invention,
Discharge required for addressing can be reliably generated while maintaining a desired luminous efficiency, and a high-quality display without disturbance can be realized.

According to the second or third aspect of the present invention, it is possible to prevent unnecessary positive charges from becoming an obstacle to subsequent driving during the sustain period.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an internal structure of a PDP of the present invention.

FIG. 2 is a sectional view of a main part of the PDP.

FIG. 3 is a schematic view of an electrode matrix of a PDP.

FIG. 4 is a field configuration diagram.

FIG. 5 is a waveform diagram of an applied voltage.

FIG. 6 is a schematic diagram showing transition of wall charges during an address period.

FIG. 7 is a waveform diagram of an applied voltage in a sustain period according to a second driving method.

FIG. 8 is a schematic diagram of a relationship between a pulse width and a charging state in FIG. 7;

FIG. 9 is a schematic diagram of a sustain electrode structure of a second PDP.

FIG. 10 is an applied voltage waveform showing a modification of the driving method.

FIG. 11 is a cross-sectional view of a main part showing an internal structure of a conventional PDP.

[Explanation of symbols]

1, 2, PDP (plasma display panel) 30, 302 Discharge space A Address electrode (third electrode) S1, S12 Discharge slit (discharge gap) TS sustain period W _X W _Y width x1, x12 Sustain electrode (first electrode) ) Y2, y12 sustain electrode (second electrode)

Claims (3)

[Claims] In each unit light emitting region of a matrix display, first and second electrodes extending in a row direction and arranged in a column direction with a discharge gap therebetween intersect with third electrodes extending in a column direction, An AC plasma display panel having a structure in which a sustain electrode pair is formed by the first and second electrodes, and an address electrode pair is formed by the second electrode and the third electrode, A width of the electrode is smaller than a width of the first electrode. 2. A display according to claim 1, wherein a voltage is applied to said pair of sustain electrodes during a sustain period in which a discharge is generated between said first and second electrodes a number of times corresponding to a display luminance. A method for driving a plasma display panel, wherein the polarity of the last drive pulse applied among the drive pulses is the polarity of the second electrode serving as a cathode. 3. A display according to claim 1, wherein a voltage is applied to the pair of sustain electrodes during a sustain period in which a discharge is generated between the first and second electrodes a number of times corresponding to a display luminance. A method of driving a plasma display panel, wherein a pulse width of a driving pulse in which the second electrode becomes a cathode at least at the end of the driving pulses is shorter than pulse widths of other driving pulses.