JP3089885B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a charge transfer device output section.

[0002]

2. Description of the Related Art Charge transfer devices are used in photoelectric conversion devices such as facsimile machines and video cameras. FIG. 2 is a schematic sectional view of a conventional charge transfer device and its output section. As shown in FIG. 2, for example, a P-type impurity semiconductor substrate 1
A transfer gate electrode 3 for performing charge transfer via an insulating film 2 is arranged thereon as shown in the figure, and is wired so as to apply clocks of Φ ₁ , Φ ₂ , and Φ _{3 in} order. Φ ₁ , Φ
₂ , Φ ₃ Charges sent in the potential well formed by the three-phase clock pass through the semiconductor surface immediately below the output gate electrode 4 formed through the insulating film 2 and are formed in the N-type impurity layer. It flows into the floating diffusion layer 5. At this time, the voltage V
_The N-type impurity floating diffusion layer 5 is set to the potential of V _OD by applying a clock Φ _R to the reset gate electrode 7 by the N-type impurity layer 6 to which _OD is applied. Since charges flow into the floating diffusion layer from the charge transfer section, the potential of the floating diffusion layer is set by _{VOD and} fluctuates from the potential by an amount proportional to the signal charge. This fluctuating potential is taken out as a potential change of V ₀ by a transistor 9 having an electrode 8 electrically connected to the floating diffusion layer 5 as a gate. FIG. 2B is a schematic cross-sectional view of the output section, that is, the transistor 9 described above.

[0003] The detection sensitivity of the output circuit of the charge transfer device thus produced is represented by the output potential with respect to the signal charge. Assuming that the signal charge is Q, the total capacitance of the floating diffusion layer portion is C, and the potential change in this portion is ΔV, ΔV = Q / C
It is expressed as As can be seen, reducing the total capacitance of the floating diffusion layer improves the detection sensitivity. Here, the total capacitance of the floating diffusion layer is determined by the N-type impurity diffusion layer 5 and the substrate 1
And the N-type impurity diffusion layer 5 and the output gate electrode V _OG ,
The main elements are the capacitance of the reset gate electrode Φ _{R and} the capacitance between the gate electrode connected to the N-type impurity diffusion layer 5 and _VOD .

[0004]

In the conventional charge transfer device output circuit section, the total capacitance of the floating diffusion layer has been reduced by reducing the size of the pattern in order to achieve high detection sensitivity. However, this method also has limitations. .

It is an object of the present invention to provide a charge transfer device which realizes a high-sensitivity detection circuit in which a capacitance between a gate electrode electrically connected to a floating diffusion layer and a drain potential portion is reduced.

[0006]

A charge transfer section formed on a semiconductor substrate of one conductivity type and a reverse conductivity type provided adjacent to the charge transfer section and into which a charge signal from the charge transfer section flows. An impurity layer, a gate electrode connected to the impurity layer, and a reset signal applied to a reset gate electrode biasing the impurity layer to a certain potential before the signal charge is poured into the impurity layer, In order to block the impurity layer, a potential supply impurity layer of a reverse conductivity type provided adjacent to the impurity layer, and a change in the potential of the impurity layer before and after the charge signal is applied to the potential of the gate electrode. And an output amplifying transistor that detects a current value and changes the current value, the output amplifying transistor having the gate voltage.
Separated from the gate electrode together with the
A second gate electrode provided which is located on the side of the output side of the diffusion layer width transistor, out of the output amplifier transistor
The diffusion layer on the force side and the diffusion layer on the opposite side are biased to the constant potential.
Is Ass, the second gate electrode is connected to the second impurity layer of the opposite conductivity type formed at positions sandwiching the potential supply impurity layer on the impurity layer co <br/>, the potential supply impurity A second reset gate electrode is provided between the layer and the second impurity layer, and the same reset signal is applied to the reset gate electrode and the second reset gate electrode. .

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a schematic sectional view of a semiconductor device according to an embodiment of the present invention and a schematic sectional view of an output circuit section. In the figure, points different from the conventional example of FIG. 2 will be described. First, a clock Φ _R is applied to the second reset gate electrode 10 by the N-type impurity layer 6 to which the voltage V _OD is applied, thereby setting the second N-type impurity floating diffusion layer 11 to the potential of V _OD. Then, by closing the second reset gate electrode 10, the second reset gate electrode 10 is closed.
The N-type impurity floating diffusion layer 11 and the gate electrode 12 connected to the N-type floating diffusion layer are brought into a floating state. This gate electrode 12 is arranged adjacent to the drain side of the gate electrode 8 as shown in FIG. When the output circuit is configured as described above, the gate electrode 8 connected to the first N-type impurity floating diffusion layer 5 and the drain portion N set to the voltage of V _OD
The capacitance with the mold impurity layer almost disappears, and the capacitance between the gate electrode 8 and the gate electrode 12 is added. Here the first
When the second N-type impurity floating diffusion layer 11 is in a floating state, the capacitance C ₁ as seen from the gate electrode 8 on the side of the N-type impurity floating diffusion layer 5 Assuming that the capacitance between them is C ₂ and the total capacitance of the second N-type impurity floating diffusion layer is C ₃

[0008]

Can be represented by Therefore the gate electrode
The capacitance C ₁ viewed from the side of the gate electrode 8 is equal to the gate electrode 8 and the gate electrode 12.
Smaller than the capacitance C ₂ between. When the distance between the gate electrode 8 and the gate electrode 12 was 0.6 μm, the capacitance of the floating diffusion layer of the conventional example, 0.02 PF, could be reduced to 0.014 PF or less. That is, it is apparent that the detection sensitivity is improved by 30% or more.

[0010]

As described above, at the output section of the charge transfer device of the present invention, the capacitance between the gate electrode electrically connected to the floating diffusion layer and the drain potential section can be reduced, so that a high sensitivity detection circuit is realized. can do.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of an embodiment of the present invention and a schematic sectional view of an output circuit section thereof.

FIG. 2 is a schematic cross-sectional view of an example of a conventional charge transfer device and a schematic cross-sectional view of an output circuit thereof.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 P-type semiconductor substrate 2 Insulating film 3 Transfer gate electrode 4 Output gate electrode 5,11 Floating diffusion layer 6 N-type impurity layer 7,10 Reset gate electrode 8,12 Gate electrode 9 Transistor

Claims (1)

(57) [Claims] A charge transfer section formed on a semiconductor substrate of one conductivity type; an impurity layer of a reverse conductivity type provided adjacent to the charge transfer section and into which a charge signal from the charge transfer section flows. A gate electrode connected to the impurity layer, and a bias signal applied to the impurity layer by a reset signal applied to a reset gate electrode before the signal charge is supplied to the impurity layer. In order to cut off, a potential supply impurity layer of a reverse conductivity type provided adjacent to the impurity layer, and a change in the potential of the impurity layer before and after the charge signal is applied is determined by an amount of change in the potential of the gate electrode. A semiconductor device comprising: an output amplifying transistor for detecting and changing a current value, wherein the output amplifying transistor includes the gate electrode together with the gate electrode.
A gate electrode, and the output amplification transistor
A second gate electrode located on the side of the diffusion layer on the output side of the output amplifying transistor;
The diffusion layer on the opposite side is biased to the constant potential, and the second gate electrode is connected to a second impurity layer of the opposite conductivity type provided at a position sandwiching the potential supply impurity layer together with the impurity layer. The potential supply impurity layer and the second
A second reset gate electrode is provided between the gate and the pure layer.
The reset gate electrode and the second reset gate.
A semiconductor device, wherein the same reset signal is applied to a gate electrode .