JP3080184B2 - Charge transfer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge transfer device,
In particular, the present invention relates to a charge transfer device in which a floating diffusion layer is used as a gate region of a charge detection driver FET.

[0002]

2. Description of the Related Art FIG. 4A is a plan view showing a conventional charge detecting section of this type, and FIG. 4B is a sectional view taken along the line AB. This is the technical report of the Institute of Television Engineers of Japan [IT
EJ Technical Report Vol.14 No.16.pp.19-24.IPU '
90-11, CE'90-11 (Feb. 1990)], and this kind of charge detection element is an RJG (Ring Junction Gat).
e) Type charge detection element.

In FIG. 4, 1 is an n-type semiconductor substrate, 2 is a p-well, 3 is an n-type charge transfer region, and 4 and 5 are charge transfer electrodes formed on the charge transfer region 3 via an insulating film, respectively. , An output gate, 6 is a floating diffusion layer for receiving charges transferred in the charge transfer region, 7 is a reset drain whose potential is fixed to a constant potential, and 8 is a potential of the floating diffusion layer 6 which is a potential of the reset drain 7. , A channel stopper 9 formed on the surface of the p-well 2 so as to surround the active region, a drain electrode 11 formed on the channel stopper 9, and a drain electrode 12 on the p ⁺ -type region 15. The formed source electrode, 13 is a load FET,
14 is an output terminal, and 16 is an oxide film.

A junction type FET, which is a component of the RJD type charge detection element, has a p ⁺ type region 15 as a source region, a channel stopper 9 as a drain region, a p well 2 as a channel region, and a floating diffusion layer 6 as a gate. Have been.

Next, the operation of the conventional example will be described. The signal charge transferred in the charge transfer region 3 is RJ
G is accumulated in the floating diffusion layer 6 constituting G. Due to the fluctuation in the potential of the RJG that accompanies this, the hole current flowing through the p-well 2 immediately below the RJG is modulated, and the potential of the output terminal 14 fluctuates. The charges transferred to the RJG are then discharged to the reset drain 7 by controlling the voltage of the reset gate 8.

[0006]

In the above-described conventional charge detecting means, the p-type charge existing around the RJG-type charge detection element is reduced.
The detection of electric charge is performed by passing a detection current through the well. Naturally, this electric current is concentrated on a portion having the smallest resistance, that is, a portion which is not easily modulated by the charge of the floating diffusion layer. In other words, there is a problem that the current also flows to a portion other than the detection purpose, and therefore, the linearity of the charge detection is reduced and the accuracy is reduced.

[0007]

According to the present invention, there is provided a charge transfer device, comprising: a first conductivity type semiconductor substrate; a second conductivity type well formed on the semiconductor substrate; and a second conductivity type well formed in the well. A charge transfer region of one conductivity type, a charge transfer electrode formed on the charge transfer region via an insulating film , and at least a part of a surface formed at a subsequent stage of the charge transfer region.
A first conductivity type floating diffusion layer exposed on the surface of the semiconductor substrate, a charge discharging means for discharging the floating transferred becoming the signal charge into the diffusion layer from the charge transfer region from the floating diffusion layer, wherein For charge detection, a floating diffusion layer is used as a gate, and a second conductive type diffusion resistance region formed in a surface region of the floating diffusion layer or in a surface region of the semiconductor substrate adjacent to the floating diffusion layer is used as a channel region . Junction FET
And a load element connected to the junction FET.

[0008]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1A is a plan view showing a first embodiment of the present invention, and FIG. 1B is a cross-sectional view taken along the line AB. In FIG. 1, 1 is an n-type semiconductor substrate, 2 is a p-well, 3 is an n-type charge transfer region, and 4 and 5 are charge transfer electrodes and output gates respectively formed on the charge transfer region 3 via an insulating film. , 6 is a floating diffusion layer for receiving charges transferred in the charge transfer region, 7 is a reset drain whose potential is fixed to a constant potential, and 8 is a reset of the potential of the floating diffusion layer 6 to a reset drain 7 potential. A reset gate, 9 is a channel stopper formed on the surface of the p-well 2 surrounding the active region, and 10 is formed in a surface region of the semiconductor substrate so as to be sandwiched between the floating diffusion layer 6 and the semiconductor substrate 1. The diffused resistance regions 11 and 12 are drain electrodes and source electrodes provided at the ends of the diffused resistance region 10, respectively, 13 is a load FET, and 14 is an output terminal.

In this embodiment, a junction type FET having the diffusion resistance region 10 as a channel region and the floating diffusion layer 6 as a gate constitutes a driver transistor of a charge detection source follower.

Next, the operation of this embodiment will be described.
The potential of the floating diffusion layer 6 is reset to the potential of the reset drain 7 by controlling the voltage of the reset gate 8. After the reset gate is turned off, the charges transferred from the charge transfer region 3 are accumulated in the floating diffusion layer 6. Floating diffusion layer 6
Charge changes the potential of the floating diffusion layer according to the capacitance of the floating diffusion layer. The fluctuation of the potential of the floating diffusion layer modulates the hole current flowing through the diffusion resistance region 10, which is the channel region of the driver FET, and changes the resistance value. Since the current flowing from the load FET 13 is kept constant, when the resistance value of the diffusion resistance region changes, the potential of the output terminal 14 changes. Therefore, the signal charge amount can be detected at the output terminal 14.

The signal charge is discharged to the reset drain by operating the reset gate after the detection of the charge amount. By repeating these series of operations, the amount of signal charge transferred to the floating diffusion layer is sequentially detected as a voltage signal.

According to this embodiment, the current flowing between the source and the drain of the FET having the floating diffusion layer as the gate is almost limited to the diffusion resistance region, and is directly controlled by the potential change of the floating diffusion layer. Therefore, highly efficient charge detection becomes possible.

FIG. 2 is a perspective view including a cross section of a second embodiment of the present invention. In FIG. 2, the same reference numerals are given to portions common to those in FIG. 1, and thus duplicate description will be omitted. However, in this embodiment, two diffusion resistance regions 10 are formed linearly. ing. This embodiment is structurally simpler than the previous embodiment, but can achieve the same effect.

FIG. 3 is a sectional view showing a third embodiment of the present invention. The difference of the present embodiment from the first embodiment is that the diffusion resistance region 10 is formed as a single line and is formed in the surface region of the floating diffusion layer 6. However, also in this embodiment, one end of the diffusion resistance region is connected to the channel stopper 9, and the drain electrode is formed there.

[0015]

As described above, according to the present invention, a floating diffusion layer for receiving signal charges is used as a gate, and a diffusion resistance region formed on the substrate surface adjacent to the diffusion layer is used as a channel region. Since the amount is detected, according to the present invention, a current component that is not affected by the signal charge can be reduced, and highly accurate charge detection with excellent linearity can be performed.

[Brief description of the drawings]

FIG. 1 is a plan view and a cross-sectional view showing a first embodiment of the present invention.

FIG. 2 is a perspective view, partly in section, of a second embodiment of the present invention.

FIG. 3 is a sectional view showing a third embodiment of the present invention.

FIG. 4 is a plan view and a cross-sectional view of a conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... n-type semiconductor substrate, 2 ... p well, 3 ... charge transfer area, 4 ... charge transfer electrode, 5 ... output gate, 6 ... floating diffusion layer, 7 ... reset drain,
8: reset gate, 9: channel stopper,
10: diffusion resistance region, 11: drain electrode,
12: Source electrode, 13: Load FET, 14
... output terminal, 15 ... p ⁺ type region, 16 ... oxide film.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/762 H01L 21/339

Claims (1)

(57) [Claims] A first conductivity type semiconductor substrate, a second conductivity type well formed on the semiconductor substrate, a first conductivity type charge transfer region formed in the well, and the charge transfer. a charge transfer electrodes formed via an insulating film on a region, which is formed downstream of the charge transfer region, at least
A first conductive type floating diffusion layer having a part of the surface exposed on the surface of the semiconductor substrate; and a charge for discharging the signal charge transferred from the charge transfer region to the floating diffusion layer from the floating diffusion layer. Discharging means, the floating diffusion layer as a gate,
A charge detection contact type having a diffusion region of a second conductivity type formed in a surface region of the floating diffusion layer or in a surface region of the semiconductor substrate adjacent to the floating diffusion layer as a channel region. A charge transfer device comprising: an FET; and a load element connected to the junction FET.