JP3076561B1 - Field emission type electron source and method of manufacturing the same - Google Patents

Abstract

A field emission type electron source capable of emitting electrons from a desired region of a surface electrode and a method of manufacturing the same are provided. A field emission type electron source (10) includes a p-type silicon substrate (1) as a conductive substrate and an n-type region (8) as a diffusion layer formed in a stripe shape on the main surface side in the p-type silicon substrate (1).
An electric field drift layer 6 made of oxidized porous polycrystalline silicon formed on n-type region 8 and drifting electrons injected from n-type region 8, and a polycrystalline silicon layer formed between electric field drift layers 6 3 and a surface electrode 7 made of a conductive thin film formed in a stripe shape in a direction intersecting the n-type region 8 and formed over the electric field drift layer 6 and the polycrystalline silicon layer 3. On the main surface side of the p-type silicon substrate 1, a p ^{++ type} region 17 as a high impurity concentration p-type region is provided substantially at the center between the n-type regions 8.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission type electron source using a semiconductor material to emit an electron beam by field emission.

[0002]

2. Description of the Related Art Conventionally, a thermally oxidized porous polycrystalline silicon layer is formed on a conductive substrate, and a surface electrode made of a metal thin film is formed on the thermally oxidized porous polycrystalline silicon layer. A planar field emission electron source has been proposed (Japanese Patent Application No. 10-65592). This field emission type electron source uses a front electrode as a positive electrode with respect to a conductive substrate, applies a DC voltage between the front electrode and the conductive substrate, and has a collector electrode disposed opposite to the front electrode with the front electrode as a cathode. And applying a DC voltage between them to emit electrons from the surface of the surface electrode.

A display device using this type of field emission type electron source includes a glass substrate 33 arranged opposite to a surface electrode 7 of a field emission type electron source 10 'as shown in FIG. A collector electrode 31 is formed in a stripe shape on the surface facing the field emission electron source 10 ′ so that a phosphor layer 32 that emits visible light by an electron beam emitted from the surface electrode 7 covers the collector electrode 31. Is formed. Here, the field emission type electron source 10 ′
A thermally oxidized porous polycrystalline silicon layer 6 is formed on an n-type silicon substrate 1 'which is a conductive substrate, and surface electrodes 7 are formed on the porous polycrystalline silicon layer 6 in stripes. Note that an ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1 '.

In a display device, in order to emit electrons from a predetermined area of a planar field emission type electron source 10 ',
It is necessary to selectively apply a voltage to a region where electrons are to be emitted. Therefore, in this type of display device, the surface electrode 7 is formed in a stripe shape as described above, and the collector electrode 31 is formed in a stripe shape orthogonal to the surface electrode 7, and the collector electrode 31 and the surface electrode 7 are appropriately formed. By selectively applying a voltage (electric field), electrons are emitted only from the surface electrode 7 to which the voltage is applied. In the emitted electrons, only the electrons emitted from the region where the voltage is applied to the opposing collector electrode 31 in the surface electrode 7 from which the electrons are emitted are accelerated, and the phosphor covering the collector electrode 31 is accelerated. Shine.

In short, in the display device having the configuration shown in FIG. 3, a specific surface electrode 7 and a specific collector electrode 31 are provided.
By applying a voltage to the phosphor layer 32, a portion of the phosphor layer 32 corresponding to a region where the two electrodes 7, 31 to which the voltage is applied intersects can be illuminated. By appropriately switching the surface electrode 7 and the collector electrode 31 to which a voltage is applied, images, characters, and the like can be displayed.

Therefore, in the above display device,
In order to make the phosphor of the phosphor layer 32 glow with the electrons emitted from the field emission electron source 10 ', it is necessary to apply a high voltage to the collector electrode 31 to accelerate the electrons. In the case of a display device using a field emission type electron source, a high voltage of several hundred V to several kV is usually applied to the collector electrode 31. For this reason, in the display device using the field emission type electron source 10 ′ having the configuration shown in FIG. 3, it is necessary to switch the voltage of several hundred V to several kV applied to the collector electrode 31, and to switch the high voltage. In such a case, a surge voltage is generated, so that a switching element having a high withstand voltage is required, and the cost is increased. Further, for example, when the collector current flowing through the collector electrode 31 is 1 mA and the applied collector voltage is 1 kV, a switching element of 1 W is required for one collector electrode 31, which is necessary for the number of the collector electrodes 31. In addition, there is a problem that a very large device is formed only by the switching element.

In order to solve this kind of problem, a display device using a field emission type electron source 10 ″ shown in FIGS. 4 to 6 has been proposed (Japanese Patent Application No. 10-2723).
No. 34). FIG. 4 is a perspective view showing a schematic configuration of the display device, in which a glass substrate 33 is provided so as to face the field emission electron source 10 ″. The glass substrate 33 faces the field emission electron source 10 ″. A collector electrode 31 is formed on the surface on the side where the light is emitted, and a phosphor layer 32 that emits visible light by electrons emitted from the field emission electron source 10 ″ is applied to the collector electrode 31. A glass substrate is provided. 33 is integrated with the field emission type electron source 10 ″ using a glass spacer or the like (not shown), and the internal space surrounded by the glass substrate 33, the spacer, and the field emission type electron source 10 ″ is set to a predetermined degree of vacuum. is there.

As shown in FIGS. 4 to 6, the field emission type electron source 10 ″ includes a p-type silicon substrate 1 and an n-type region 8 formed in a stripe shape on the main surface side in the p-type silicon substrate 1. An electric field drift layer 6 made of oxidized porous polycrystalline silicon formed on n-type region 8 and drifting electrons injected from n-type region 8, and a polycrystalline semiconductor layer formed between electric field drift layers 6 A polycrystalline silicon layer 3 and n
And a surface electrode 7 formed of a metal thin film formed in a stripe shape in a direction intersecting the shaped region 8 and formed over the electric field drift layer 6 and the polycrystalline silicon layer 3.
The electric field drift layer 6 is formed by forming a polycrystalline silicon layer 3 over the entire main surface of the p-type silicon substrate 1 and then forming a part of the polycrystalline silicon layer 3 by anodic oxidation. And is oxidized by rapid thermal oxidation.

In the field emission type electron source 10 ″ shown in FIGS. 4 to 6, the n-type region 8 formed in a stripe and the surface electrode 7 formed in a stripe orthogonal to the n-type region 8 are formed. Since the matrix is composed of the n-type region 8 to which the voltage is applied and the surface electrode 7, the n-type region 8 to which the voltage is applied is selected from the surface electrode 7 to which the voltage is applied. Since electrons are emitted only from the region that intersects with the region, electrons can be emitted from a desired region of the surface electrode 7. The contact to the n-type region 8 is made by the electric field drift layer 6 as shown in FIG. Is formed by exposing a part of the surface of the n-type region 8 by etching a part of the n-type region 8, and is connected by the electric wire W.

In addition, when the display device as shown in FIG. 4 is constructed, it is not necessary to form the collector electrode 31 in a stripe shape as in the display device shown in FIG. Or several kV
Circuit for switching the high voltage of
Cost reduction and size reduction can be achieved.

In this field emission type electron source 10, n
The voltage applied between the shaped region 8 and the surface electrode 7 is about 10 V to 30 V. The carrier concentration of the n-type region 8 is set to 1 × 10 ¹⁸ cm ⁻³ to 5 × 10 ¹⁹ cm ⁻³ , which is relatively high.

[0012]

In the conventional field emission type electron source 10 "shown in FIGS. 4 to 6, the n-type region 8 and the electric field drift layer 6 are formed in stripes, respectively. There is a possibility that a leakage current flows between the n-type regions 8 or between the electric field drift layers 6, and when such a leakage current flows, electrons are emitted from the surface electrode 7 above the n-type region 8 where no voltage is applied. The emission may cause crosstalk in the display device.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a field emission type electron source capable of reducing cost and size and having a small leakage current, and a method of manufacturing the same. It is in.

[0014]

According to a first aspect of the present invention, a conductive substrate and a conductive substrate are formed in stripes on a main surface side of the conductive substrate and electrically separated from each other. A separated diffusion layer, an electric field drift layer formed on the diffusion layer and drifting electrons injected from the diffusion layer, and a polycrystalline semiconductor layer formed between the electric field drift layers,
A surface electrode formed of a conductive thin film formed in a stripe shape in a direction intersecting with the diffusion layer and formed over the electric field drift layer and the polycrystalline semiconductor layer, and a diffusion layer on the main surface side in the conductive substrate. And a high impurity concentration diffusion layer is provided on the surface electrode. By appropriately selecting the diffusion layer to which a voltage is applied and the surface electrode, the voltage is applied to the surface electrodes to which the voltage is applied. Since electrons are emitted only from a region that intersects the diffused layer, electrons can be emitted from a desired region of the surface electrode, and a collector electrode is arranged to face the surface electrode to constitute a display device. In such a case, a circuit for switching a high voltage of several hundred V to several kV applied to the collector electrode is not required, and cost and size can be reduced. By high impurity concentration diffusion layer is provided on the diffusion layers in the main surface side of the conductive substrate, it is possible to prevent the leakage current flows through the diffusion layer.

According to a second aspect of the present invention, there is provided a semiconductor device comprising: a p-type semiconductor substrate;
An n-type region formed in a stripe shape on the main surface side in a semiconductor substrate, an electric field drift layer formed on the n-type region and drifting electrons injected from the n-type region, and an electric field drift layer formed between the electric field drift layer. A p-type semiconductor substrate comprising: a polycrystalline semiconductor layer; and a surface electrode formed of a conductive thin film formed in a stripe shape in a direction intersecting the n-type region and formed over the electric field drift layer and the polycrystalline semiconductor layer. Characterized in that a high impurity concentration p-type region is provided between n-type regions on the main surface side of
By appropriately selecting the shape region and the surface electrode, electrons are emitted only from the region of the surface electrode to which the voltage is applied, which crosses the n-type region to which the voltage is applied. A circuit for switching a high voltage of several hundred V to several kV applied to the collector electrode when a display device is constructed by disposing electrons on the surface electrode and a collector electrode facing the surface electrode. Is not required, cost reduction and miniaturization can be achieved, and the high impurity concentration p-type region is provided between the n-type regions on the main surface side in the p-type semiconductor substrate. Leakage current can be prevented from flowing therebetween.

According to a third aspect of the present invention, there is provided a semiconductor device comprising: a p-type semiconductor substrate;
Region formed in a stripe shape on the main surface side in a semiconductor substrate, and an n-type region formed on the stripe-shaped n-type region.
Forming an electric field drift layer electrons injected from the n-type region made form the stripe drifts, and a polycrystalline semiconductor layer formed on the electric field drift layers, in stripes in a direction crossing the n-type region along the And a surface electrode made of a conductive thin film formed over the electric field drift layer and the polycrystalline semiconductor layer. A part of the polycrystalline semiconductor layer between the surface electrodes has a separation penetrating in the thickness direction. A groove is provided, and by appropriately selecting an n-type region to which a voltage is applied and a surface electrode, the n-type to which a voltage is applied among the surface electrodes to which a voltage is applied. Since electrons are emitted only from the region that intersects the region, electrons can be emitted from a desired region of the surface electrode. In such a case, a circuit for switching a high voltage of several hundred V to several kV applied to the collector electrode becomes unnecessary, cost reduction and miniaturization can be achieved, and further, in the polycrystalline semiconductor layer, Since a separation groove penetrating in the thickness direction is provided in a part of the portion between the surface electrodes, it is possible to suppress a leakage current from flowing between the electric field drift layers.

The invention of claim 4 is the invention of claim 2 or claim 3.
In the invention of the first aspect, on the main surface side in the p-type semiconductor substrate, on both sides in the width direction of the n-type region, an n ⁺ layer having a higher impurity concentration than the n-type region is provided adjacent to the n-type region.
Even if the impurity concentration of the n-type region is reduced, the resistance value of the n-type portion can be reduced because the n-type region and the n ⁺ layer are adjacent to each other.

According to a fifth aspect of the present invention, in the second to fourth aspects of the present invention, the back surface electrode connected to the p-type semiconductor substrate is provided on the back surface of the p-type semiconductor substrate. By controlling the potential of the p-type semiconductor substrate, leakage current can be prevented from flowing between the n-type regions.

[0019] The invention of claim 6 is the invention of claim 4, since n ⁺⁺ layer of a high impurity concentration than the n ⁺ layer on the n ⁺ layer in is provided, it is possible to prevent concentration of an electric field, The withstand voltage can be improved.

According to a seventh aspect of the present invention, in the second aspect of the present invention, since the insulating layer is provided between the p-type semiconductor substrate and the polycrystalline semiconductor layer, the main surface of the p-type semiconductor substrate is provided. When an electric field drift layer is formed by forming a polycrystalline semiconductor layer on the entire surface on the side and making a part of the polycrystalline semiconductor layer porous by anodizing treatment, the n-type region is used as an electrode This eliminates the need to provide a protective film on the polycrystalline semiconductor layer when performing the anodic oxidation treatment, thereby facilitating the production.

According to an eighth aspect of the present invention, in the seventh aspect of the present invention, the insulating layer is formed in such a shape that the thickness gradually decreases as both ends in the width direction approach the ends. The step between the layer surface and the surface of the electric field drift layer can be reduced, and disconnection of the surface electrode due to the provision of the insulating layer can be prevented.

According to a ninth aspect of the present invention, in the eighth aspect of the present invention, the p-type semiconductor substrate is made of a p-type silicon substrate, and the insulating layer is formed by a LOCOS method. It can be formed relatively easily by the LOCOS method used in the manufacturing process of devices and the like, and the insulating layer can be stably formed in the shape as described in claim 7.

According to a tenth aspect of the present invention, in the first to ninth aspects, the surface electrode is formed such that a width of a portion on the polycrystalline semiconductor layer is smaller than a width of a portion on the electric field drift layer. Therefore, the crosstalk can be reduced as compared with the case where the width of the surface electrode is constant over the entire area in the length direction.

According to an eleventh aspect of the present invention, in the first to ninth aspects of the present invention, since an insulating film is provided between the surface electrode and the polycrystalline semiconductor layer, crosstalk can be reduced. .

According to a twelfth aspect of the present invention, in the first to ninth aspects of the present invention, the surface electrode is provided with an insulating film on a portion which does not overlap the electric field drift layer in the thickness direction. Can be reduced.

The invention of claim 13 is the invention of claims 1 to 9, the surface electrode overlaps the thickness of the portion in the thickness direction does not overlap the field drift layer to the electric field drift <br/> coat layer Since it is formed thicker than the thickness of the part, crosstalk can be reduced.

According to a fourteenth aspect of the present invention, there is provided the method of manufacturing a field emission type electron source according to the ninth aspect, wherein the insulating layer made of a silicon oxide film formed in a stripe shape on the main surface side of the p-type silicon substrate is formed. After forming using the LOCOS method, n is formed on the main surface side of the p-type silicon substrate using the insulating layer as a mask.
An n-type region is formed in a stripe by introducing a n-type impurity, a polycrystalline semiconductor layer is formed on the n-type region and the insulating layer, and the n-type region is used as an electrode to form a polycrystalline semiconductor layer. Of these, a portion on the n-type region is made porous by anodizing treatment, and furthermore, the porous polycrystalline semiconductor layer is oxidized to form an electric field drift layer, and then on the electric field drift layer and the polycrystalline semiconductor layer. It is characterized in that a surface electrode made of a stripe-shaped conductive thin film is formed over the upper surface, and the insulating layer made of a silicon oxide film formed by using the LOCOS method is used as a mask on the main surface side of the p-type silicon substrate. By introducing the n-type impurity, the n-type region can be formed in a stripe shape, so that a separate step of forming a mask for forming the n-type region is not required. The positional accuracy of the relative position between the n-type region and the insulating layer can be improved, and a portion of the polycrystalline semiconductor layer on the n-type region can be made porous by anodizing using the n-type region as an electrode. The electric field drift layer can be formed by oxidizing the polycrystalline semiconductor layer that has been made porous, and thus, the positional accuracy between the n-type region and the electric field drift layer can be increased. It is possible to provide a field emission type electron source capable of emitting electrons only from a desired region and insulating between adjacent electric field drift layers.

[0028]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) The basic configuration of a field emission type electron source 10 of this embodiment is substantially the same as the conventional configuration shown in FIGS. 4 to 6, and as shown in FIG. A p-type silicon substrate 1 serving as a conductive substrate, an n-type region 8 (diffusion layer) formed in a stripe shape on the main surface side in the p-type silicon substrate 1, and an n-type region 8 formed on the n-type region 8 Drift layer 6 made of oxidized porous polycrystalline silicon in which electrons injected from the semiconductor drift, polycrystalline silicon layer 3 formed between electric field drift layers 6, and stripes in a direction intersecting n-type region 8. And a surface electrode 7 of a conductive thin film formed over the electric field drift layer 6 and the polycrystalline silicon layer 3. The electric field drift layer 6 is formed by forming the polycrystalline silicon layer 3 over the entire surface on the main surface side of the p-type silicon substrate 1 in the same manner as the conventional configuration shown in FIGS. Silicon layer 3
Can be formed by making a part of the material porous by anodizing treatment and further oxidizing it by rapid thermal oxidation.

In this embodiment, Cr / Au is used as the surface electrode 7, but the material of the surface electrode 7 is Cr / Au.
The material is not limited to Au but may be any metal having a small work function or a conductive film (for example, an ITO film). Examples of the metal include aluminum, chromium, tungsten, nickel, platinum, and the like. Alloys and the like can be used. In the present embodiment, the thickness of the surface electrode 7 is set to 1
Although the thickness was set to 0 nm, the thickness is not particularly limited.

Thus, in the field emission type electron source 10 of the present embodiment, the n-type region 8 formed in a stripe shape is also provided.
And a surface electrode 7 formed in a stripe shape orthogonal to the n-type region 8, a matrix is formed. Therefore, by appropriately selecting the n-type region 8 to which a voltage is applied and the surface electrode 7, the voltage is applied. Electrons are emitted only from the region of the surface electrode 7 that intersects the n-type region 8 to which the voltage is applied, so that electrons can be emitted from a desired region of the surface electrode 7.

The field emission type electron source 10 of the present embodiment
When a display device is configured by using FIG.
Although not shown, a glass substrate 33 similar to the conventional configuration shown in FIG. 4 may be disposed to face the field emission electron source 10. Here, a collector electrode 31 is formed on the surface of the glass substrate 33 facing the field emission electron source 10, and the collector electrode 31 emits visible light by electrons emitted from the field emission electron source 10. The phosphor layer 32 may be applied. The glass substrate 33 is made of a field emission type electron source 10 using a glass spacer (not shown) or the like.
The internal space surrounded by the glass substrate 33, the spacer, and the field emission electron source 10 may be set to a predetermined degree of vacuum.

In the case of configuring such a display device, it is not necessary to form the collector electrode 31 in a stripe shape as in the display device shown in FIG. 3, and a high voltage of several hundred V to several kV applied to the collector electrode 31 can be obtained. A circuit for switching the voltage is not required, and cost reduction and size reduction can be achieved.

The field emission type electron source 10 of the present embodiment
In this case, the voltage applied between the n-type region 8 and the surface electrode 7 is about 10 V to 30 V.

Next, the field emission type electron source 10 of this embodiment
The characteristic part of will be described.

In the field emission type electron source 10 of the present embodiment,
On the main surface side of the p-type silicon substrate 1, ap ⁺ -type region 17, which is a p-type region with a high impurity concentration, is provided substantially at the center between the n-type regions 8.
Is provided. Therefore, the provision of the p ⁺⁺ -type region 17 can prevent a leakage current from flowing between the n-type regions 8.

On the main surface side of the p-type silicon substrate 1, on both sides in the width direction of the n-type region 8, an n ⁺ layer adjacent to the n-type region 8 and having a higher impurity concentration than the n-type region 8 is formed. ⁺ diffusion layer 18 is provided, n ⁺ than the n ⁺ diffusion layer 18 to the diffusion layer 18 serving as n ⁺⁺ layer of high impurity concentration n ⁺⁺ diffusion layer 19 is provided. Therefore, even if the impurity concentration of n-type region 8 is reduced, the resistance value of the n-type portion can be reduced because n-type region 8 and n ⁺ diffusion layer 18 are adjacent to each other. Moreover, since the n ⁺⁺ diffusion layer 19 having a high impurity concentration than the n ⁺ diffusion layer 18 to the n ⁺ diffusion layer 18 is provided, p
The concentration of the electric field on the main surface side of the silicon substrate 1 can be prevented, and the withstand voltage can be improved.

Since the ohmic electrode 2 serving as the back electrode is provided on the back surface of the p-type silicon substrate 1, the potential of the p-type silicon substrate 1 is controlled by using the ohmic electrode 2, so that the n-type region 8 is formed. It is possible to more reliably prevent leakage current from flowing therebetween.

A part of the polycrystalline silicon layer 3 between the surface electrodes 7 is provided with a separation groove 3a penetrating in the thickness direction. The opening shape of the separation groove 3a is a strip shape, and is formed so that the longitudinal direction coincides with the surface electrode 7 and the width direction coincides with the longitudinal direction of the electric field drift layer 6. Therefore, it is possible to suppress the leakage current from flowing between the electric field drift layers 6.

Further, the field emission type electron source 1 of the present embodiment
0, an insulating layer 15 formed by the LOCOS (Local Oxidation of Silicon) method is provided between the p-type silicon substrate 1 and the polycrystalline silicon layer 3. That is, the insulating layer 15 is formed such that a part thereof is buried in the p-type silicon substrate 1 in the thickness direction, and has a shape in which the thickness gradually decreases as both ends in the width direction approach the ends. Thus, even if the insulating layer 15 is provided between the p-type silicon substrate 1 and the polycrystalline silicon layer 3,
A step between the surface and the surface of the electric field drift layer 6 can be reduced, and disconnection of the surface electrode 7 due to the provision of the insulating layer 15 can be prevented. The LOCOS method is, as is well known, an element isolation technique used in a manufacturing process of a MOS device or the like. By forming the insulating layer 15 by the LOCOS method, the variation in the shape of the insulating layer 15 in a wafer or between wafers can be compared. Can be easily reduced.

The polycrystalline silicon layer 3 is formed on the entire surface on the main surface side of the p-type silicon substrate 1, and a part of the polycrystalline silicon layer 3 is made porous by anodizing treatment to thereby form an electric field drift layer. For example, in the case of forming the negative electrode 6, the n-type region 8 can be used as an electrode (positive electrode) with respect to the negative electrode composed of a platinum electrode, and a protective film is formed on the polycrystalline silicon layer 3 when performing anodic oxidation. There is no need to provide them, and manufacturing becomes easy.

The surface electrode 7 has a narrow portion 7 a having a smaller width on the polycrystalline silicon layer 3 than the portion on the electric field drift layer 6. That is, the polycrystalline silicon layer 3
Since the width of the upper portion (narrow portion 7a) is formed smaller than the width of the portion on the electric field drift layer 6, the width of the surface electrode 7 is reduced over the entire area in the length direction when used for a display device or the like. As compared with the case where the voltage is constant, it is possible to reduce crosstalk in which electrons are emitted from the surface electrode 7 above the n-type region 8 to which no voltage is applied.

The crosstalk can be reduced by providing an insulating film between the surface electrode 7 and the polycrystalline silicon layer 3.

Hereinafter, the field emission type electron source 10 of this embodiment will be described.
The steps which characterize the method of manufacturing will be briefly described.

After a silicon nitride film is formed on the main surface of the p-type silicon substrate 1 by a plasma CVD method or the like, the silicon nitride film is patterned into stripes by using a photolithography technique and an etching technique. By wet oxidizing the main surface side of the p-type silicon substrate 1 on which the nitride film is formed in water vapor,
By selectively oxidizing only a portion of the main surface of the p-type silicon substrate 1 that is not covered with the silicon nitride film 14, an insulating layer 15 made of a silicon oxide film is formed. That is,
The insulating layer 15 is formed using the LOCOS method. Then, after the silicon nitride film is removed by etching, phosphorus (P) or the like is ion-implanted using the insulating layer 15 as a mask to form a striped n-type region 8 on the main surface side in the p-type silicon substrate 1. I do. Subsequently, a polycrystalline silicon layer 3 is formed on the n-type region 8 and the insulating layer 15 by LPCVD or the like, and thereafter, a 55 wt% aqueous hydrogen fluoride solution and ethanol are mixed at a ratio of 1: 1 to 0 ° C. Using a cooled electrolytic solution, a platinum electrode (not shown) is used as a negative electrode, and the n-type region 8 is used as a positive electrode. The crystalline silicon layer 3 is made porous to form a porous polycrystalline silicon layer, and the porous polycrystalline silicon layer is subjected to rapid thermal oxidation (RT) in a dry oxygen atmosphere using a lamp annealing apparatus.
O) to form an electric field drift layer 6 made of thermally oxidized porous polycrystalline silicon. Thereafter, a metal thin film is formed as a surface electrode 7 on the main surface side of the p-type silicon substrate 1 in a stripe shape in a direction orthogonal to the n-type region 8 by an evaporation method.

In this embodiment, the p-type silicon substrate 1 is used as the conductive substrate, and the n-type region 8 is used as the diffusion layer.
However, the conductive substrate is not limited to the p-type silicon substrate, the diffusion layer is not limited to the n-type region 8, and the diffusion layers formed in stripes are electrically connected to each other. As long as it is electrically separated from the conductive substrate.

(Embodiment 2) The basic configuration of the field emission electron source 10 of this embodiment is substantially the same as the conventional configuration shown in FIG. 1, and as shown in FIG.
It is characterized in that the width of the surface electrode 7 is formed to be constant over the entire area in the length direction, and the insulating film 21 is provided on a portion that does not overlap the electric field drift layer 6 in the thickness direction.
Note that the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

However, in the field emission type electron source 10 of the present embodiment, the insulating film 21 is provided on a portion which does not overlap with the electric field drift layer 6 in the thickness direction of the surface electrode 7, so that it can be used for a display device or the like. In this case, crosstalk in which electrons are emitted from the surface electrode 7 above the n-type region 8 to which no voltage is applied can be reduced.

[0048] Incidentally, instead of providing the insulating film 21, conductive at a site which does not overlap the thickness of the surface electrode 7 to the electric field drift layer 6
By making the thickness greater than the thickness of the portion overlapping with the field drift layer 6, electrons are emitted from the surface electrode 7 above the n-type region 8 where no voltage is applied when used in a display device or the like. Crosstalk can be reduced.

[0049]

According to the first aspect of the present invention, there is provided a conductive substrate and a diffusion layer formed in a stripe shape on the main surface side of the conductive substrate and electrically separated from each other and electrically separated from the conductive substrate. An electric field drift layer formed on the diffusion layer and drifting electrons injected from the diffusion layer; a polycrystalline semiconductor layer formed between the electric field drift layers; and an electric field drift formed in a direction crossing the diffusion layer. Since a surface electrode composed of a conductive thin film formed over the drift layer and the polycrystalline semiconductor layer is provided, the voltage is applied by appropriately selecting the diffusion layer to which the voltage is applied and the surface electrode. Electrons are emitted only from a region of the surface electrode that intersects the diffusion layer to which the voltage is applied, so that electrons can be emitted from a desired region of the surface electrode. When a display device is constructed by arranging the high-voltage and the low-voltage, a circuit for switching a high voltage of several hundred V to several kV applied to the collector electrode becomes unnecessary, so that cost reduction and miniaturization can be achieved. Since the high impurity concentration diffusion layer is provided between the diffusion layers on the main surface side in the conductive substrate, leakage current can be prevented from flowing between the diffusion layers.

According to a second aspect of the present invention, there is provided a semiconductor device comprising: a p-type semiconductor substrate;
An n-type region formed in a stripe shape on the main surface side in a semiconductor substrate, an electric field drift layer formed on the n-type region and drifting electrons injected from the n-type region, and an electric field drift layer formed between the electric field drift layer. Since it has a polycrystalline semiconductor layer and a surface electrode formed of a conductive thin film formed in a stripe shape in a direction crossing the n-type region and formed over the electric field drift layer and the polycrystalline semiconductor layer, Apply n
By appropriately selecting the shape region and the surface electrode, electrons are emitted only from the region of the surface electrode to which the voltage is applied, which crosses the n-type region to which the voltage is applied. A circuit for switching a high voltage of several hundred V to several kV applied to the collector electrode when a display device is constructed by disposing electrons on the surface electrode and a collector electrode facing the surface electrode. Is unnecessary, and there is an effect that cost reduction and miniaturization can be achieved. Further, since the high impurity concentration p-type region is provided between the n-type regions on the main surface side in the p-type semiconductor substrate, There is an effect that leakage current can be prevented from flowing between the n-type regions.

According to a third aspect of the present invention, a p-type semiconductor substrate is provided.
Region formed in a stripe shape on the main surface side in a semiconductor substrate, and an n-type region formed on the stripe-shaped n-type region.
Forming an electric field drift layer electrons injected from the n-type region made form the stripe drifts, and a polycrystalline semiconductor layer formed on the electric field drift layers, in stripes in a direction crossing the n-type region along the And a surface electrode formed of a conductive thin film formed over the electric field drift layer and the polycrystalline semiconductor layer. Therefore, by appropriately selecting the n-type region to which the voltage is applied and the surface electrode, Of the surface electrode to which the voltage is applied, electrons are emitted only from a region intersecting the n-type region to which the voltage is applied, so that electrons can be emitted from a desired region of the surface electrode. In the case where a display device is configured by arranging the collector electrodes facing each other, a circuit for switching a high voltage of several hundred V to several kV applied to the collector electrode becomes unnecessary, This has the effect of reducing costs and miniaturization, and furthermore, by providing a separation groove penetrating in the thickness direction at a part of the portion between the surface electrodes in the polycrystalline semiconductor layer, electric field drift There is an effect that leakage current can be suppressed from flowing between the layers.

The invention of claim 4 is the invention of claim 2 or claim 3.
In the invention of the first aspect, on the main surface side in the p-type semiconductor substrate, on both sides in the width direction of the n-type region, an n ⁺ layer having a higher impurity concentration than the n-type region is provided adjacent to the n-type region.
Even if the impurity concentration of the n-type region is reduced, there is an effect that the resistance value of the n-type portion can be reduced because the n-type region and the n ⁺ layer are adjacent to each other.

According to a fifth aspect of the present invention, in the second to fourth aspects of the present invention, the back surface electrode connected to the p-type semiconductor substrate is provided on the back surface of the p-type semiconductor substrate. By controlling the potential of the p-type semiconductor substrate, it is possible to prevent a leakage current from flowing between the n-type regions.

[0054] The invention of claim 6 is the invention of claim 4, since n ⁺⁺ layer of a high impurity concentration than the n ⁺ layer on the n ⁺ layer in is provided, it is possible to prevent concentration of an electric field, There is an effect that the withstand voltage can be improved.

According to a seventh aspect of the present invention, in the second to sixth aspects of the present invention, since the insulating layer is provided between the p-type semiconductor substrate and the polycrystalline semiconductor layer, the main surface of the p-type semiconductor substrate is provided. When an electric field drift layer is formed by forming a polycrystalline semiconductor layer on the entire surface on the side and making a part of the polycrystalline semiconductor layer porous by anodizing treatment, the n-type region is used as an electrode Therefore, there is no need to provide a protective film on the polycrystalline semiconductor layer when performing the anodic oxidation treatment, which has an effect of facilitating the production.

According to an eighth aspect of the present invention, in the invention of the seventh aspect, the insulating layer is formed in such a shape that the thickness gradually decreases as both ends in the width direction approach the ends. It is possible to reduce the level difference between the layer surface and the electric field drift layer surface, and it is possible to prevent disconnection of the surface electrode due to the provision of the insulating layer.

According to a ninth aspect of the present invention, in the eighth aspect, the p-type semiconductor substrate is a p-type silicon substrate, and the insulating layer is formed by a LOCOS method. The LOCOS method used in the manufacturing process of devices and the like can be relatively easily formed, and the insulating layer can be stably formed in the shape as described in claim 7.

According to a tenth aspect of the present invention, in the first to ninth aspects of the invention, the surface electrode is formed such that a width of a portion on the polycrystalline semiconductor layer is smaller than a width of a portion on the electric field drift layer. Therefore, there is an effect that crosstalk can be reduced as compared with the case where the width of the surface electrode is constant over the entire area in the length direction.

According to an eleventh aspect, in the first to ninth aspects, since an insulating film is provided between the surface electrode and the polycrystalline semiconductor layer, crosstalk can be reduced. This has the effect.

According to a twelfth aspect of the present invention, in the first to ninth aspects of the present invention, the surface electrode is provided with an insulating film on a portion which does not overlap the electric field drift layer in the thickness direction. There is an effect that it can be reduced.

[0061] The invention of claim 13 is the invention of claims 1 to 9, the surface electrode overlaps the thickness of the portion in the thickness direction does not overlap the field drift layer to the electric field drift <br/> coat layer Since it is formed thicker than the thickness of the part, there is an effect that crosstalk can be reduced.

According to a fourteenth aspect of the present invention, there is provided the method for manufacturing a field emission type electron source according to the ninth aspect, wherein the insulating layer made of a silicon oxide film formed in a stripe shape on the main surface side of the p-type silicon substrate is formed. After forming using the LOCOS method, n is formed on the main surface side of the p-type silicon substrate using the insulating layer as a mask.
An n-type region is formed in a stripe by introducing a n-type impurity, a polycrystalline semiconductor layer is formed on the n-type region and the insulating layer, and the n-type region is used as an electrode to form a polycrystalline semiconductor layer. Of these, a portion on the n-type region is made porous by anodizing treatment, and furthermore, the porous polycrystalline semiconductor layer is oxidized to form an electric field drift layer, and then on the electric field drift layer and the polycrystalline semiconductor layer. Since a surface electrode consisting of a stripe-shaped conductive thin film is formed over the top,
Since an n-type impurity can be introduced into the main surface side of the p-type silicon substrate by using an insulating layer made of a silicon oxide film formed using the LOCOS method as a mask, an n-type region can be formed in a stripe shape. A separate step of forming a mask for forming the n-type region is not required, and the positional accuracy of the relative position between the n-type region and the insulating layer can be improved, and the n-type region is used as an electrode. Then, a portion on the n-type region in the polycrystalline semiconductor layer is made porous by anodizing treatment, and further, by oxidizing the porous polycrystalline semiconductor layer, an electric field drift layer can be formed. The position accuracy between the n-type region and the electric field drift layer can be improved, so that electrons can be emitted only from a desired region of the surface electrode, and the adjacent electric field drift layer is disconnected. There is an effect that it is possible to provide an electric field emission type electron source.

[Brief description of the drawings]

FIG. 1 is a schematic perspective view showing a first embodiment.

FIG. 2 is a schematic perspective view showing a second embodiment.

FIG. 3 is a schematic perspective view showing a conventional example.

FIG. 4 is a schematic perspective view showing another conventional example.

FIG. 5 is a perspective view of a main part of the above.

FIG. 6 is a sectional view of the above.

[Explanation of symbols]

Reference Signs List 1 p-type silicon substrate 3 polycrystalline silicon layer 6 electric field drift layer 7 surface electrode 8 n-type region 10 field emission electron source 17 p ⁺⁺ type region

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Naomasa Oka 1048 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. (72) Inventor Tsutomu Ichihara 1048 Odaka Kadoma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. (72) Inventor Takashi Hatai 1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture (72) Inventor Yoshifumi Watanabe 1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture 72 Matsushita Electric Works, Ltd. No. 1048, Oaza Kadoma Matsushita Electric Works, Ltd. (56) Reference JP-A-9-259795 (JP, A) JP-A 8-111166 (JP, A) JP-A 9-92130 (JP, A) 6-140502 (JP, A) JP-A-8-274375 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01J 1/312 H01J 9/02 H01J 29/04 H01J 31 / 12 H01L 33/00

Claims (14)

(57) [Claims] 1. A conductive substrate, a diffusion layer formed in a stripe shape on a main surface side of the conductive substrate and electrically separated from each other and electrically separated from the conductive substrate; An electric field drift layer in which electrons injected from the diffusion layer are drifted, a polycrystalline semiconductor layer formed between the electric field drift layers, and a stripe-shaped electric field drift layer and a polycrystalline semiconductor formed in a direction crossing the diffusion layer. A field electrode comprising a conductive thin film formed over the layer, and a high impurity concentration diffusion layer provided between the diffusion layers on the main surface side of the conductive substrate. source. 2. A p-type semiconductor substrate, an n-type region formed in a stripe shape on a main surface side in the p-type semiconductor substrate, and electrons injected from the n-type region formed on the n-type region drift. An electric field drift layer, a polycrystalline semiconductor layer formed between the electric field drift layers, and a conductive thin film formed in a stripe shape in a direction crossing the n-type region and formed over the electric field drift layer and the polycrystalline semiconductor layer A field emission type electron source, comprising: a surface electrode comprising a high impurity concentration p-type region between n-type regions on a main surface side in a p-type semiconductor substrate. 3. A p-type semiconductor substrate; an n-type region formed in a stripe shape on a main surface side in the p-type semiconductor substrate ;
Strip along the n-type region on the striped n -type region
An electric field drift layer electrons injected from the shape made is n-type region looped drifts, and a polycrystalline semiconductor layer formed on the electric field drift layers, the electric field drift formed in stripes in a direction crossing the n-type region A surface electrode made of a conductive thin film formed over the layer and the polycrystalline semiconductor layer, and a separation groove penetrating in the thickness direction is provided in a part of a portion between the surface electrodes in the polycrystalline semiconductor layer. A field emission type electron source characterized by being obtained. 4. A method according to claim 1, wherein n is formed on a main surface side of the p-type semiconductor substrate.
4. The field emission type electron according to claim 2, wherein an n ⁺ layer adjacent to the n-type region and having a higher impurity concentration than the n-type region is provided on both sides of the n-type region in the width direction. source. 5. The field emission type electron device according to claim 2, wherein a back surface electrode connected to the p-type semiconductor substrate is provided on a back surface of the p-type semiconductor substrate. source. 6. The field emission electron source according to claim 4, characterized by being n ⁺⁺ layer of a high impurity concentration than the n ⁺ layer on the n ⁺ layer in is provided. 7. The field emission type electron source according to claim 2, wherein an insulating layer is provided between the p-type semiconductor substrate and the polycrystalline semiconductor layer. 8. The field emission type electron source according to claim 7, wherein said insulating layer is formed in such a shape that the thickness gradually decreases as both ends in the width direction approach the ends. 9. The field emission type electron source according to claim 8, wherein said p-type semiconductor substrate is made of a p-type silicon substrate, and said insulating layer is formed by a LOCOS method. 10. The surface electrode according to claim 1, wherein a width of a portion on the polycrystalline semiconductor layer is formed to be smaller than a width of a portion on the electric field drift layer. 3. A field emission type electron source according to claim 1. 11. The field emission type electron source according to claim 1, wherein an insulating film is provided between the surface electrode and the polycrystalline semiconductor layer. 12. The surface electrode is conductive in the thickness direction
10. The field emission type electron source according to claim 1, wherein an insulating film is provided on a portion that does not overlap with the field drift layer. 13. The surface electrode is conductive in the thickness direction
Field emission electron according to any one of claims 1 to 9, characterized by being formed thick than the thickness of the portion that does not overlap the field drift layer to the thickness of the portion overlapping the electric field drift layer source. 14. The method for manufacturing a field emission type electron source according to claim 9, wherein the insulating layer made of a silicon oxide film formed in a stripe shape on the main surface side of the p-type silicon substrate is formed of L.
After the formation using the OCOS method, an n-type impurity is introduced into the main surface side of the p-type silicon substrate using the insulating layer as a mask to form an n-type region in a stripe shape. A polycrystalline semiconductor layer is formed on the insulating layer, and a portion of the polycrystalline semiconductor layer on the n-type region is made porous by anodic oxidation using the n-type region as an electrode. Field emission characterized by forming an electric field drift layer by oxidizing a crystalline semiconductor layer, and then forming a surface electrode made of a striped conductive thin film over the electric field drift layer and the polycrystalline semiconductor layer. Method of manufacturing a type electron source.