JP3084280B2 - Method for manufacturing field emission electron source, method for manufacturing flat light emitting device, and method for manufacturing display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates, due field emission using a semiconductor material manufacturing method of a field emission electron source so as to emit an electron beam, a plane emission equipment of using a field emission electron source manufacturing method of the production method you and display equipment
It relates to.

[0002]

2. Description of the Related Art Heretofore, there has been proposed a flat field emission electron source in which an oxidized porous silicon layer is formed on a conductive substrate and a metal thin film is formed on the oxidized porous silicon layer. Have been. This field emission type electron source applies a DC voltage between the metal thin film and an ohmic electrode formed on the back surface of the conductive substrate, using the metal thin film as a positive electrode with respect to the conductive substrate, and uses the metal thin film as a cathode, Electrons are emitted from the surface of the metal thin film by applying an electric field between the thin film and a collector electrode arranged opposite to the thin film.

A display device using this type of field emission type electron source includes a transparent electrode disposed opposite to a metal thin film, and a phosphor that emits visible light by an electron beam emitted from the metal thin film is used as the transparent electrode. Is provided. In a display device, in order to emit electrons from a predetermined region of a planar field emission electron source, it is necessary to selectively apply a voltage to a region where electrons are to be emitted. Therefore, in this type of display device, the metal thin film is formed in a stripe shape, the transparent electrode is formed in a stripe shape orthogonal to the metal thin film, and the voltage (electric field) is selected by appropriately selecting the transparent electrode and the metal thin film. A system in which electrons are emitted from a predetermined region by applying a voltage (a so-called simple matrix system) is employed.

As a method of forming a striped metal thin film on an oxidized porous silicon layer,
A method of forming a striped metal thin film using a metal mask having a striped opening pattern, after forming a metal thin film over the entire surface of the oxidized porous silicon layer, using photolithography and etching techniques A method of forming a striped metal thin film by etching unnecessary portions of a metal thin film, coating and forming a photoresist layer on an oxidized porous silicon layer, and forming a striped opening in the photoresist layer by a photolithography technique. After forming a pattern, a method has been used in which a metal thin film is formed on an exposed porous silicon layer and a photoresist layer and lifted off to form a striped metal thin film.

[0005]

However, in the above-mentioned method using a metal mask, the adhesion of the metal mask to the porous silicon layer is low, and the metal thin film material wraps around. There is a problem of low. When the pattern precision is low and the width of the metal thin film formed in a stripe pattern varies, the electron emission area varies, which causes uneven light emission when applied to a flat light emitting device or a display device. There's a problem.

On the other hand, in the above methods, since a photolithography technique is used, a highly accurate striped metal thin film can be formed. However,
In the method of (1), it is necessary to apply a photoresist layer on the oxidized porous silicon layer and then pattern the photoresist layer by performing exposure and development. The porous structure of the porous silicon layer may be destroyed. Further, the method (1) has a disadvantage that a material such as gold or platinum without an appropriate etchant cannot be used as a material for the metal thin film.

Further, in the method described above, if a wet method using a resist stripping solution such as concentrated nitric acid is employed for stripping the photoresist layer, the conductive substrate and the ohmic electrode are attacked. It is necessary to use the ashing method by the method described above, and there is a problem that the process becomes complicated and the cost increases.

In the field emission type electron source having the oxidized porous silicon layer, a so-called popping phenomenon easily occurs at the time of electron emission, and the amount of emitted electrons tends to be uneven. When applied to, for example, there is a problem that uneven light emission is generated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a method of manufacturing a field emission type electron source capable of improving the pattern accuracy of an electron emission area at a low cost, and an electron emission method at a low cost. It is an object of the present invention to provide a field emission type electron source having high area pattern accuracy, and a flat light emitting device and a display device using these field emission type electron sources.

[0010]

According to a first aspect of the present invention, an electric field is applied by using a conductive thin film formed on the outermost surface on the main surface side of a conductive substrate as a positive electrode. A method for manufacturing a field emission type electron source for emitting an electron beam from a surface of a conductive thin film, comprising forming a polycrystalline semiconductor layer on a conductive substrate, and opening a predetermined region on the polycrystalline semiconductor layer. forming a material layer, and a mask the mask material layer, utilizing an electrochemical reaction of the electrolytic solution anode
A mass that is oxidized and etched during anodization
The thickness of the mask material layer becomes smaller than the thickness of the mask material layer
Wherein a portion of the electrolytic solution was cooled perform positive electrode oxidation process multi binding <br/> crystal semiconductor layer made porous, the polycrystalline semiconductor layer of the porous structure forming porous oxide or nitrided as Forming a conductive thin film patterned in a predetermined shape on the oxidized or nitrided porous polycrystalline semiconductor layer , utilizing an electrochemical reaction in a cooled electrolytic solution, and
Since polycrystalline semiconductor layer porous is formed by performing anodic oxidation processing mask material layer as a mask, a mask
The margin for etching the material layer can be increased.
Improved pattern accuracy of Rutotomoni multi porous polycrystalline semiconductor layer, the contact area between the porous polycrystalline semiconductor layer and the conductive thin film is oxidized or nitrided is determined by the pattern accuracy of the mask material layer, the low The pattern accuracy of the electron emission area can be improved at a low cost.

[0011]

According to a second aspect of the present invention, in the first aspect of the present invention, the conductive substrate is formed of a substrate on which a conductive layer for supplying electrons to the porous polycrystalline semiconductor layer is formed.

[0013]

[0014]

According to a third aspect of the present invention, there is provided an electric field emission type in which an electron beam is emitted from the surface of the conductive thin film by applying an electric field using the conductive thin film formed on the outermost surface on the main surface side of the conductive substrate as a positive electrode. A method of manufacturing an electron source, wherein a substrate in which a lower electrode made of a conductor layer is formed in a stripe shape on a main surface side as a conductive substrate is used, and a polycrystalline semiconductor layer is formed on the conductive substrate so as to cover the lower electrode. Is formed, and a mask material layer patterned in a stripe shape crossing the lower electrode is formed on the polycrystalline semiconductor layer, and then anodizing treatment is performed using the mask material layer as a mask, thereby forming a part of the polycrystalline semiconductor layer. And oxidizing or nitriding the porous polycrystalline semiconductor layer, and forming a stripe-shaped conductive layer intersecting the lower electrode on the oxidized or nitrided porous polycrystalline semiconductor layer. It is characterized in that a thin film is formed, and the pattern of the porous polycrystalline semiconductor layer is formed according to the mask material layer pattern by performing anodic oxidation using the mask material layer as a mask. By increasing the precision, the pattern accuracy of the porous polycrystalline semiconductor layer is improved, and the contact area between the oxidized or nitrided porous polycrystalline semiconductor layer and the conductive thin film is increased. Since the accuracy is determined by the accuracy, the pattern accuracy of the electron emission area can be improved at low cost.

[0016] The invention of claim 4 is claim 1 or claim 1.
In the third aspect of the present invention, since the mask material layer is made of any one of a silicon oxide layer, a silicon nitride layer, and a photoresist layer or a combination thereof, the pattern of the mask material layer can be easily made highly accurate.

The invention according to claim 5 is the invention according to claims 1 to
The invention according to claim 4 , wherein the polycrystalline semiconductor layer is formed of a polysilicon layer.

[0018]

[0019]

According to a sixth aspect of the present invention, one surface of the conductive substrate is provided.
A strong electric field drift layer is formed on and above the strong electric field drift layer
A field emission type electron source having a conductive thin film formed thereon, and an electrode disposed to face the conductive thin film, and a phosphor that emits visible light by an electron beam emitted from the surface of the conductive thin film is provided. in the production method of providing et a plane light emitting device to the electrodes
Forming a polycrystalline semiconductor layer on a conductive substrate;
A mask material layer having a predetermined area opened on the crystalline semiconductor layer
Formed, and using the mask material layer as a mask,
Anodization utilizing an electrochemical reaction.
The thickness of the mask material layer that is etched during processing
Cooling the electrolytic solution so as to be smaller than the thickness of the material layer.
And anodize it to make part of the polycrystalline semiconductor layer porous.
And oxidize the porous polycrystalline semiconductor layer.
Or nitrided, the oxidized or nitrided porous material
Conductivity patterned into predetermined shape on crystalline semiconductor layer
Characterized by forming a thin film, in a cooled electrolytic solution
Utilizing the electrochemical reaction of the above and using the mask material layer as a mask
Porous polycrystalline semiconductor by anodizing
The layer is formed, so that the etching of the mask material layer
Polycrystalline that can increase
The pattern accuracy of the semiconductor layer is improved, and oxidation or
Contact between nitrided porous polycrystalline semiconductor layer and conductive thin film
Since the area is determined by the pattern accuracy of the mask material layer,
Field emission electron source with high emission area pattern accuracy
Is, it is possible to realize a small plane light emitting device emitting light uneven.

The invention of claim 7 is characterized in that, in the invention of claim 6 , the porous polycrystalline semiconductor layer is formed of a porous polysilicon layer.

The invention according to claim 8 is the one surface side of the conductive substrate.
Oxidized or nitrided porous polycrystalline semiconductor layer
It is formed in a lip shape and is oxidized or nitrided.
Conductive thin film on the porous polycrystalline semiconductor layer
Field-emission electron source formed in a shape, and the field-emission electron
A conductive thin film that is placed opposite to the source and orthogonal to the conductive thin film
Phosphor that emits light by electron beams emitted from
Of a display device comprising a striped electrode
A manufacturing method, comprising forming a polycrystalline semiconductor layer on a conductive substrate.
Having a predetermined region opened on the polycrystalline semiconductor layer.
A mask material layer, and using the mask material layer as a mask,
Anodization utilizing an electrochemical reaction in the solution,
The thickness of the mask material layer etched during the anodization process
Is smaller than the thickness of the mask material layer.
The solution is cooled and subjected to anodizing treatment to remove the polycrystalline semiconductor layer.
Part is made porous, and the porous polycrystalline semiconductor is made porous.
Oxidizing or nitriding the body layer,
Patterned into a predetermined shape on the porous polycrystalline semiconductor layer
Characterized by forming a conductive thin film, it cooled
Utilizing electrochemical reaction in electrolytic solution and forming mask material layer
By performing anodizing treatment as a mask,
Since a crystalline semiconductor layer is formed, etching of the mask material layer is performed.
It is possible to increase the margin for
Quality of the polycrystalline semiconductor layer is improved, and acid
Or nitrided porous polycrystalline semiconductor layer and conductive thin film
The contact area with the film is determined by the pattern accuracy of the mask material layer
Therefore, the field emission type with high pattern accuracy of the electron emission area
As a result, a high- definition display device can be realized.

[0023]

[0024]

[0025]

(Embodiment 1) A method for manufacturing a field emission type electron source according to this embodiment will be described with reference to FIGS. 1 (a) to 1 (f). In this embodiment, an n-type silicon substrate 1 (a (100) substrate having a resistivity of 0.1 Ωcm) is used as the conductive substrate.

First, an ohmic electrode 2 is formed on the back surface of an n-type silicon substrate 1, and then a 1.5 μm-thick non-doped polysilicon layer 3 is formed on the surface of the n-type silicon substrate 1 by LPCVD. The structure shown in FIG. 1A is obtained. Here, the film forming conditions of the LPCVD method are as follows: the substrate temperature is 610 ° C., and the SiH ₄ gas flow rate is 600 s.
ccm and the degree of vacuum were set to 20 Pa. In the present embodiment, the polysilicon layer 3 forms a polycrystalline semiconductor layer. Here, the method of forming the polysilicon layer 3 is L
The method is not limited to the PCVD method. For example, a method in which an amorphous silicon layer is formed by a sputtering method or a plasma CVD method, and then the amorphous silicon layer is crystallized by performing an annealing process to form a polysilicon layer May be used.

Next, a plasma CV is applied on the polysilicon layer 3.
By forming the silicon oxide layer 4 having a thickness of 1 μm by the method D, the structure shown in FIG. 1B is obtained. The conditions for forming the silicon oxide layer 4 are as follows.
H ₄ gas flow rate is 50 sccm, N ₂ O gas flow rate is 875
sccm, vacuum degree 133 Pa, discharge power 150 W
(The discharge power density was 0.05 W / cm ² ). Note that the method for forming the silicon oxide layer 4 is not limited to the plasma CVD method, and a method such as a thermal oxidation method may be used.

Next, the structure shown in FIG. 1C is obtained by patterning the silicon oxide layer 4 using the photolithography technique and the etching technique. In the present embodiment, the silicon oxide layer 4 having a predetermined region opened by the patterning forms a mask material layer. Further, as the mask material layer, a material that can easily achieve high precision of the pattern may be used. For example, any one of a silicon oxide layer, a silicon nitride layer, a photoresist layer, or a combination thereof may be used. Good.

Next, a platinum electrode (not shown) was used as a negative electrode, an n-type silicon substrate 1 (an ohmic solution) was prepared by using an electrolytic solution obtained by mixing a 55 wt% aqueous hydrogen fluoride solution and ethanol at a ratio of 1: 1 and cooling to 0 ° C. By performing anodization with a constant current while irradiating the exposed portion of the polysilicon layer 3 with light (ie, using the silicon oxide layer 4 as a mask material layer as a mask) with the electrode 2) as a positive electrode, The porous polysilicon layer 5 is formed, and the structure shown in FIG. 1D is obtained. In the present embodiment, as the conditions of the anodizing treatment,
The current density is constant at 20 mA / cm ² and the anodic oxidation time is 15
Seconds, and the film thickness is reduced to 1 μm by irradiating light with a 500 W tungsten lamp during the anodic oxidation treatment.
m of the porous polysilicon layer 5 was formed. In the present embodiment, the polysilicon layer 3 is made porous up to a point in the thickness direction, but may be made porous to a depth reaching the n-type silicon substrate 1. Further, in the present embodiment, the porosity of the porous polysilicon layer 5 is made substantially uniform while the current density during the anodic oxidation treatment is constant, but the porosity is increased by changing the current density during the anodic oxidation treatment. A structure in which a polysilicon layer and a low-porosity polysilicon layer are alternately stacked may be employed, or a structure in which the porosity continuously changes in the thickness direction may be employed.

The silicon oxide layer 4 is also etched by the electrolytic solution during the anodizing treatment. The silicon oxide layer 4 has a thickness of 1 μm, and the etching rate of the silicon oxide by the electrolytic solution is 1 minute. Since the anodic oxidation time is about 0.14 μm and the anodic oxidation time is 15 seconds, the silicon oxide layer 4 reliably functions as a mask.

Next, by rapid thermal oxidation (RTO),
By oxidizing the porous polysilicon 5 to a predetermined depth (that is, oxidizing a part of the porous polysilicon layer 5), the structure shown in FIG. 1E is obtained. Here, reference numeral 6 in FIG. 1E denotes a thermally oxidized porous polysilicon layer. The conditions for rapid thermal oxidation were an oxidation temperature of 900 ° C. and an oxidation time of 1 hour. In this embodiment, a part of the porous polysilicon layer 5 is oxidized. However, the whole may be oxidized. Further, the porous polysilicon layer 5 may be nitrided instead of being oxidized.

Thereafter, a thin metal film 7 made of a thin gold film is formed on the main surface side of the n-type silicon substrate 1 by a vapor deposition method using a metal mask, as shown in FIG. 1 (f). A field emission type electron source 10 having a structure is obtained. In this embodiment, the metal thin film 7 constitutes a conductive thin film. Further, in the present embodiment, gold is used as the material of the conductive thin film. However, the material is not limited to gold, and any metal or conductive material having a small work function may be used. , Tungsten, nickel, platinum, and alloys of these metals can be used. In the present embodiment, the thickness of the metal thin film 7 is set to 10 nm, but the thickness is not particularly limited.

The above-mentioned field emission type electron source 10 is introduced into a vacuum chamber (not shown), and a collector electrode (not shown) is arranged at a position facing the metal thin film 7. 5 × 10 ⁻⁵ Pa, a DC voltage of 20 V is applied between the two electrodes with the metal thin film 7 as the positive electrode, the ohmic electrode 2 as the negative electrode, the collector electrode as the positive electrode (anode), and the metal thin film 7 as the negative electrode (cathode). 100 between both poles
By applying a DC voltage of V, it can be observed that electrons are emitted from the surface of the metal thin film 7 to the collector electrode stably with time (without popping phenomenon).

In the method of manufacturing a field emission type electron source according to the present embodiment, anodization is performed by using the silicon oxide layer 4 as a mask material layer, which is patterned by photolithography and etching, as a mask. Since the porous polysilicon layer 5, which is a porous polycrystalline semiconductor layer, is formed, the pattern accuracy of the porous polysilicon layer 5 is improved, and the contact between the oxidized porous polysilicon layer 6 and the metal thin film 7 is improved. Since the area is determined by the pattern accuracy of the silicon oxide layer 4, the pattern accuracy of the electron emission area can be increased at low cost. The field emission type electron source of the present embodiment includes a thermally oxidized porous polysilicon layer 6 corresponding to the porous silicon layer of the conventional field emission type electron source, and has an n-type. Electrons injected from the silicon substrate 1 drift in the thermally oxidized porous polysilicon layer 6 and are emitted by tunneling through the metal thin film 7 to stably emit electrons without generating a popping phenomenon during electron emission. Can be.

In this embodiment, the n-type silicon substrate 1 ((100) substrate having a resistivity of 0.1 Ωcm) is used as the conductive substrate, but the conductive substrate is limited to the n-type silicon substrate 1. However, for example, a substrate in which a conductive thin film (for example, a chromium thin film or an ITO thin film) is formed on a metal substrate, a glass substrate, or the like may be used, or a semiconductor substrate such as the n-type silicon substrate 1 may be used. Larger area and lower cost can be achieved as compared with the case. Further, as the conductive substrate, a semiconductor substrate in which a diffusion layer is formed as a conductor layer on the main surface side (for example, a p-type silicon substrate having an n-type diffusion layer formed on the main surface side) may be used. . In this case, electrons are injected (supplied) from the diffusion layer to the porous polycrystalline semiconductor layer.

[0036] (Reference Example 1) will be described below with reference to FIG. 2 (a) ~ (e) a method for producing important reference electric field emission electron source of the embodiments described below.

First, a lower electrode 12 made of a stripe-shaped conductor layer is formed on a main surface of an insulating substrate 11 made of, for example, a glass substrate, whereby the structure shown in FIG. 2A is obtained. In this embodiment, the insulating substrate 11
And the lower electrode 12 constitute a conductive substrate. Here, the lower electrode 12 may be formed, for example, by forming a conductor layer on the entire surface of the main surface of the insulating substrate 11 and patterning the conductor layer. It is desirable to use a material that can achieve high precision.

Thereafter, a non-doped polysilicon layer 3 having a thickness of 1.0 μm is formed by LPCVD so as to cover the lower electrode 12 over the entire surface on the main surface side of the insulating substrate 11, thereby obtaining FIG. The structure shown in b) is obtained. Here, the film forming conditions of the LPCVD method are as follows.
The temperature was 10 ° C., the flow rate of the SiH ₄ gas was 600 sccm, and the degree of vacuum was 20 Pa. In this embodiment, the polysilicon layer 3 constitutes a polycrystalline semiconductor layer. Here, the method for forming the polysilicon layer 3 is not limited to the LPCVD method.
After forming the amorphous silicon layer by the VD method,
A method of forming a polysilicon layer by crystallizing the amorphous silicon layer by performing an annealing process may be used.

Next, a 55 wt% aqueous solution of hydrogen fluoride and ethanol were mixed at a ratio of 1: 1 and an electrolytic solution cooled to 0 ° C. was used. The platinum electrode was used as a negative electrode and the lower electrode 12 was used as a positive electrode. 2A, the porous polysilicon layer 5 is formed in a stripe shape corresponding to the lower electrode 12 by performing anodizing treatment at a constant current while irradiating the substrate.
The structure shown in FIG. In this reference example, as the conditions of the anodizing treatment, the current density was constant at 20 mA / cm ² , the anodizing time was 15 seconds, and 50
By irradiating light with a 0 W tungsten lamp, a porous polysilicon layer 5 having a thickness of 1 μm was formed.

Next, the porous polysilicon layer 6 is formed by oxidizing the porous polysilicon layer 5 by a rapid thermal oxidation (RTO) method, and the structure shown in FIG. 2D is obtained. Can be Conditions for the rapid thermal oxidation were an oxidation temperature of 900 ° C. and an oxidation time of 1 hour. This reference example
That, while oxidizing the porous polycrystalline silicon layer 5 may be nitride instead of oxide.

Thereafter, a gold thin film was formed on the main surface side of the insulating substrate 11 by a vapor deposition method using a metal mask, thereby being patterned into stripes corresponding to the thermally oxidized porous polysilicon layer 6. The metal thin film 7 made of a gold thin film is formed, and the field emission type electron source 10 having the structure shown in FIG. In this embodiment, the metal thin film 7 constitutes a conductive thin film. Further, in this reference example, gold was used as the material of the conductive thin film. However, the material is not limited to gold, and any metal or conductive material having a small work function may be used. Besides, aluminum, chromium, tungsten, nickel, platinum and the like, alloys of these metals and the like can be used. In the present embodiment, the thickness of the metal thin film 7 is set to 10 nm, but the thickness is not particularly limited.

The above-mentioned field emission type electron source 10 is introduced into a vacuum chamber (not shown), and a collector electrode (not shown) is arranged at a position facing the metal thin film 7. 5 × 10 ⁻⁵ Pa, a DC voltage of 20 V is applied between the two electrodes with the metal thin film 7 as the positive electrode, the ohmic electrode 2 as the negative electrode, the collector electrode as the positive electrode (anode), and the metal thin film 7 as the negative electrode (cathode). 100 between both poles
By applying a DC voltage of V, it can be observed that electrons are emitted from the surface of the metal thin film 7 toward the collector electrode stably with time (without popping phenomenon). .

In the method of manufacturing the field emission type electron source according to the present embodiment , the anodic oxidation treatment is performed using the lower electrode 12 when the polysilicon layer 3 as the polycrystalline semiconductor layer is made porous. Thus, the pattern of the porous polysilicon layer 5 as the porous polycrystalline semiconductor layer is formed in accordance with the pattern of the lower electrode 12. And the contact area between the oxidized porous polysilicon layer 6 and the metal thin film 7 is determined by the pattern accuracy of the porous polysilicon layer 5, so that the pattern accuracy of the electron emission area can be reduced at low cost. Can be enhanced.

(Embodiment 2 ) FIG. 3 shows a schematic configuration diagram of a planar light emitting device using the field emission electron source 10 of Embodiment 1. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

The flat light emitting device of this embodiment includes a field emission type electron source 10 and a transparent electrode 31 which is disposed opposite to the metal thin film 7 of the field emission type electron source 10. A phosphor 32 that emits visible light by an electron beam emitted from the emission type electron source 10 is applied. The transparent electrode 31 is made of a transparent conductive film, and is formed on a transparent plate 33 made of a glass substrate. Here, the transparent plate 33 on which the transparent electrode 31 and the phosphor 32 are formed is integrated with the field emission type electron source 10 through a spacer 34, and the transparent plate 33, the spacer 34, and the field emission type electron source 10
Is set to a predetermined degree of vacuum.

Therefore, by emitting electrons from the field emission electron source 10, the phosphor 32 can emit light, and the emission of the phosphor 32 can be displayed outside through the transparent electrode 31 and the transparent plate 33. . In addition,
The electrode is not limited to a transparent conductive film.

In the flat light emitting device of this embodiment, the transparent electrode 31 is used as a positive electrode with respect to the metal thin film 7, a DC voltage Vc of 1 kV is applied between the transparent electrode 31 and the metal thin film 7, and the field emission type electron source is used. By applying a DC voltage Vps of 20 V between the metal thin film 7 and the ohmic electrode 2 using the metal thin film 7 as a positive electrode, the shape of the metal thin film 7 on the thermally oxidized porous polysilicon layer 6 was adjusted. A light emission pattern is obtained. That is, in the present embodiment, since electrons are emitted almost uniformly in the plane of the metal thin film 7 in the substantially vertical direction, there is no need to provide a focusing electrode used in the conventional flat light emitting device, and the structure becomes simpler. Cost reduction becomes possible. Further, in the present embodiment, since the pattern accuracy of the electron emission area of the field emission electron source 10 is high, it is possible to realize a flat light emitting device with less uneven light emission.

In this embodiment, the plane light emitting device using the field emission type electron source 10 of the first embodiment (see FIG. 1F) has been described, but instead of the field emission type electron source 10 in FIG. Field emission type electron source 10 of Reference Example 1
(See FIG. 2E). In this case, the transparent electrode 31 is used as a positive electrode for the metal thin film 7 and the transparent electrode 31 is used as the positive electrode.
The DC voltage Vc may be applied between the metal thin film 7 and the lower electrode 12 while the DC voltage Vc is applied between the metal thin film 7 and the metal thin film 7.

(Embodiment 3 ) FIG. 4 shows a schematic configuration when the field emission electron source 10 of Embodiment 1 is applied to a display device. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

In this embodiment, as shown in FIG. 4, a thermally oxidized porous polysilicon layer 6 and a metal thin film 7 are formed in stripes. Further, the field emission type electron source 10 includes a transparent electrode 31 which is an electrode disposed to face the metal thin film 7, and the field emission type electron source 1
A phosphor 32 that emits visible light by an electron beam radiated from 0 is applied. The transparent electrode 31 is made of a transparent conductive film and is formed on a transparent plate 33 made of a glass substrate. Here, in the present embodiment, the transparent electrodes 31 are formed in stripes in the same plane.
The matrix is formed by arranging the transparent plate 33 so that the transparent film 33 and the metal thin film 7 are orthogonal to each other. That is,
The area where the transparent electrode 31 intersects with the metal thin film 7 corresponds to each pixel. Therefore, only a specific pixel can be illuminated by the combination of the metal electrode 7 for applying a voltage and the transparent electrode 31 for applying a voltage.
Note that the electrode is not limited to a transparent conductive film, but it is preferable to use a transparent conductive film.

Thus, in the display device of the present embodiment, the pattern accuracy of the electron emission area of the field emission electron source 10 is high, and a high-definition display device can be realized.

[0052] In the present embodiment, the field emission electron source 10 of Embodiment 1 has been described display device using a (FIG. 1 (f) refer), instead of the field emission electron source 10 in FIG. 4 Field emission type electron source 1 of Reference Example 1
0 (see FIG. 2E). In this case,
The transparent electrode 31 is used as a positive electrode for the metal thin film 7 as a positive electrode.
While applying a DC voltage between 1 and the metal thin film 7,
A DC voltage may be applied between the metal thin film 7 and the lower electrode 12 with the metal thin film 7 of the field emission electron source 10 as a positive electrode.

[0053] (Reference Example 2) will be described below with reference to FIG. 5 (a) ~ (e) a method for producing important reference electric field emission electron source of the embodiments described below.

First, the lower electrode 12 made of a stripe-shaped conductor layer is formed on the main surface of an insulating substrate 11 made of, for example, a glass substrate, whereby the structure shown in FIG. 5A is obtained. In this embodiment, the insulating substrate 11
And the lower electrode 12 constitute a conductive substrate. Here, the lower electrode 12 may be formed, for example, by forming a conductor layer on the entire surface of the main surface of the insulating substrate 11 and patterning the conductor layer. It is desirable to use a material that can achieve high precision.

Thereafter, a non-doped polysilicon layer 3 having a thickness of 1.0 μm is formed by LPCVD so as to cover the lower electrode 12 over the entire surface on the main surface side of the insulating substrate 11, whereby FIG. The structure shown in b) is obtained. Here, the film forming conditions of the LPCVD method are as follows.
The temperature was 10 ° C., the flow rate of the SiH ₄ gas was 600 sccm, and the degree of vacuum was 20 Pa. In this embodiment, the polysilicon layer 3 constitutes a polycrystalline semiconductor layer. Here, the method for forming the polysilicon layer 3 is not limited to the LPCVD method.
After forming the amorphous silicon layer by the VD method,
A method of forming a polysilicon layer by crystallizing the amorphous silicon layer by performing an annealing process may be used.

Next, a 55 wt% aqueous solution of hydrogen fluoride and ethanol were mixed at a ratio of 1: 1 and an electrolytic solution cooled to 0 ° C. was used. The platinum electrode was used as a negative electrode and the lower electrode 12 was used as a positive electrode. By performing anodic oxidation at a constant current while irradiating light, the porous polysilicon layer 5 is formed in a stripe shape corresponding to the lower electrode 12, and FIG.
The structure shown in (c) is obtained. In the present reference example, as the conditions of the anodizing treatment, the current density was constant at 20 mA / cm ² ,
The anodic oxidation time was set to 15 seconds, and light irradiation was performed with a 500 W tungsten lamp during the anodic oxidation treatment, whereby a 1 μm-thick porous polysilicon layer 5 was formed.

Next, the porous polysilicon layer 6 is formed by oxidizing the porous polysilicon layer 5 by rapid thermal oxidation (RTO), and the structure shown in FIG. 5D is obtained. Can be Conditions for the rapid thermal oxidation were an oxidation temperature of 900 ° C. and an oxidation time of 1 hour. This reference example
That, while oxidizing the porous polycrystalline silicon layer 5 may be nitride instead of oxide. Also, this reference
In the example, the thermally oxidized porous polysilicon layer 6 forms a strong electric field drift layer.

Thereafter, a gold thin film is formed on the main surface side of the insulating substrate 11 by a vapor deposition method using a metal mask, thereby forming a stripe shape orthogonal to (intersecting) the thermally oxidized porous polysilicon layer 6. The metal thin film 7 made of the patterned gold thin film is formed, and the field emission electron source 10 having the structure shown in FIG. In this embodiment , the metal thin film 7 constitutes a conductive thin film. Also book
In the reference example, gold was used as the material of the conductive thin film. However, the material is not limited to gold, but may be any metal or conductive material having a small work function, such as aluminum, chromium, and tungsten in addition to gold. , Nickel, platinum, and alloys of these metals can be used. In this reference example ,
Although the thickness of the metal thin film 7 is set to 10 nm, this thickness is not particularly limited.

The above-mentioned field emission type electron source 10 is introduced into a vacuum chamber (not shown), and a collector electrode (not shown) is arranged at a position facing the metal thin film 7. 5 × 10 ⁻⁵ Pa, a DC voltage of 20 V is applied between both electrodes with the metal thin film 7 as a positive electrode and the lower electrode 12 as a negative electrode, and a collector electrode as a positive electrode (anode).
By applying a DC voltage of 100 V between both electrodes using the metal thin film 7 as a negative electrode (cathode), electrons are stably emitted from the surface of the metal thin film 7 to the collector electrode over time (without popping phenomenon). Can be observed.

According to the method of manufacturing the field emission type electron source of the present embodiment, the anodic oxidation treatment is performed using the lower electrode 12 when the polysilicon layer 3 as the polycrystalline semiconductor layer is made porous. Thus, the pattern of the porous polysilicon layer 5 as the porous polycrystalline semiconductor layer is formed in accordance with the pattern of the lower electrode 12. And the contact area between the oxidized porous polysilicon layer 6 and the metal thin film 7 is determined by the pattern accuracy of the porous polysilicon layer 5, so that the pattern accuracy of the electron emission area can be reduced at low cost. Can be enhanced.

In the field emission type electron source 10 of the present embodiment, the lower electrode 12 serving as the conductive layer and the metal thin film 7 serving as the conductive thin film are selected and applied with a voltage. 7, electrons are emitted only from a region that intersects the lower electrode 12 to which the voltage is applied.
Electrons can be emitted from a desired region of the metal thin film 7. Therefore, it is possible to emit electrons only from a specific pixel.

(Embodiment 4 ) A method for manufacturing a field emission electron source according to this embodiment will be described with reference to FIGS.

First, a lower electrode 12 made of a stripe-shaped conductor layer is formed on the main surface of an insulating substrate 11 made of, for example, a glass substrate, whereby the structure shown in FIG. 6A is obtained. In this embodiment, the insulating substrate 1
1 and the lower electrode 12 constitute a conductive substrate. Here, the lower electrode 12 may be formed, for example, by forming a conductor layer on the entire surface of the main surface of the insulating substrate 11 and patterning the conductor layer. It is desirable to use a material that can achieve high precision.

Thereafter, a non-doped polysilicon layer 3 having a thickness of 1.0 μm is formed by LPCVD so as to cover the lower electrode 12 over the entire surface on the main surface side of the insulating substrate 11, whereby FIG. The structure shown in b) is obtained. Here, the film forming conditions of the LPCVD method are as follows.
At 10 ° C., the flow rate of SiH ₄ gas was 600 sccm, and the degree of vacuum was 20 Pa. In the present embodiment, the polysilicon layer 3 forms a polycrystalline semiconductor layer. put it here,
The method for forming the polysilicon layer 3 is not limited to the LPCVD method. For example, an amorphous silicon layer is formed by a sputtering method or a plasma CVD method, and then the amorphous silicon layer is annealed. May be used to form a polysilicon layer.

Next, plasma CV is applied on the polysilicon layer 3.
The silicon oxide layer 4 having a thickness of 1 μm is formed by the method D. The conditions for forming the silicon oxide layer 4 are as follows:
C., the flow rate of the SiH ₄ gas was 50 sccm, the flow rate of the N ₂ O gas was 875 sccm, the degree of vacuum was 133 Pa, and the discharge power was 150 W (the discharge power density was 0.05 W / cm ² ). After the above-described silicon oxide layer 4 is formed, the silicon oxide layer 4 is patterned into a stripe shape orthogonal to the lower electrode 12 by using a photolithography technique and an etching technique to obtain a structure shown in FIG. Can be In the present embodiment, the patterned silicon oxide layer 4 forms a mask material layer. Also,
As the mask material layer, a material that can easily achieve high precision of the pattern may be used. For example, any one of a silicon oxide layer, a silicon nitride layer, a photoresist layer, or a combination thereof may be used. Also,
The method for forming the silicon oxide layer 4 is not limited to the plasma CVD method, and a method such as a thermal oxidation method may be used.

Next, a 55 wt% aqueous hydrogen fluoride solution and ethanol were mixed at a ratio of 1: 1 and an electrolytic solution cooled to 0 ° C. was used. The platinum electrode (not shown) was used as a negative electrode, and the lower electrode 12 was used as a positive electrode. By performing anodic oxidation with a constant current while irradiating the exposed portion of the polysilicon layer 3 with light ,
Oxidation overlapping with lower electrode 12 of polysilicon layer 3
The porous polysilicon layer 5 is formed in a region not covered by the silicon layer 4 , and the structure shown in FIG. 7A is obtained. In this embodiment, as the conditions of the anodizing treatment, the current density is constant at 20 mA / cm ² , the anodizing time is set to 15 seconds, and the film thickness is increased by performing light irradiation with a 500 W tungsten lamp during the anodizing treatment. A 1 μm porous polysilicon layer 5 was formed. The silicon oxide layer 4 is also etched by the electrolytic solution during the anodic oxidation treatment. The thickness of the silicon oxide layer 4 is 1 μm, whereas the etching rate of the silicon oxide layer 4 by the electrolytic solution is 1 minute. Since the anodic oxidation time is about 15 seconds at about 0.14 μm, the silicon oxide layer 4 reliably functions as a mask.

Next, by rapid thermal oxidation (RTO),
By oxidizing the porous polysilicon layer 5, a thermally oxidized porous polysilicon layer 6 is formed, and the structure shown in FIG. 7B is obtained. The conditions for rapid thermal oxidation were an oxidation temperature of 900 ° C. and an oxidation time of 1 hour. In this embodiment, the porous polysilicon layer 5 is oxidized, but may be nitrided. In this embodiment, the thermally oxidized porous polysilicon layer 6 constitutes the strong electric field drift layer. However, a nitrided porous polysilicon layer may be employed as the strong electric field drift layer.

Thereafter, a gold thin film is formed on the main surface side of the insulating substrate 11 by a vapor deposition method using a metal mask, thereby forming a stripe shape orthogonal to (intersecting) the thermally oxidized porous polysilicon layer 6. The metal thin film 7 made of the patterned gold thin film is formed, and the field emission electron source 10 having the structure shown in FIG. 7C is obtained. In this embodiment, the metal thin film 7 constitutes a conductive thin film. Also,
In the present embodiment, gold is used as the material of the conductive thin film. However, the material is not limited to gold, but may be a metal or a conductive material having a small work function. , Nickel, platinum, and alloys of these metals can be used. In the present embodiment, the thickness of the metal thin film 7 is set to 10 nm, but the thickness is not particularly limited.

In the present embodiment, the porous polysilicon layer 5 is formed by performing anodic oxidation using the silicon oxide layer 4 patterned using photolithography and etching techniques as a mask. Since the pattern accuracy of the layer 5 is improved and the contact area between the oxidized porous polysilicon layer 6 and the metal thin film 7 is determined by the pattern accuracy of the silicon oxide layer 4, the pattern accuracy of the electron emission area can be reduced at low cost. Can be enhanced.

The field emission type electron source 10 of this embodiment
Then, by selecting the lower electrode 12 as the conductor layer and the metal thin film 7 as the conductive thin film, respectively, and applying a voltage, of the metal thin film 7 to which the voltage has been applied, the lower electrode 12 to which the voltage has been applied is selected. Since electrons are emitted only from the intersecting region, electrons can be emitted from a desired region of the metal thin film 7. Therefore, it is possible to emit electrons only from a specific pixel.

(Embodiment 5 ) A method of manufacturing a field emission electron source according to this embodiment is shown in FIG.
This will be described with reference to FIGS. The manufacturing method of this embodiment is almost the same as that of the fourth embodiment, and is characterized by the patterning shape of the silicon oxide layer 4.
The same points as 4 will be briefly described. Also, the embodiment
The same components as those in 4 are denoted by the same reference numerals.

First, a stripe-shaped lower electrode 12 is formed on the main surface of the insulating substrate 11, and the lower electrode 12 is formed on the main surface of the insulating substrate 11 so as to cover the entire lower electrode 12.
The structure shown in FIG. 8A is obtained by forming the non-doped polysilicon layer 3 having a thickness of 1.5 μm by the PCVD method.

Next, plasma CV is applied on the polysilicon layer 3.
After the silicon oxide layer 4 having a thickness of 1 μm is formed by the method D, the silicon oxide layer 4 is formed at predetermined intervals along the longitudinal direction of the lower electrode 12 above the lower electrode 12 using a photolithography technique and an etching technique. By patterning in a lattice shape with openings at the bottom, the structure shown in FIG. 8B is obtained.

Next, a 55 wt% aqueous hydrogen fluoride solution and ethanol were mixed at a ratio of 1: 1 and an electrolytic solution cooled to 0 ° C. was used. A platinum electrode (not shown) was used as a negative electrode, and a lower electrode 12 was used as a positive electrode. By performing anodic oxidation with a constant current while irradiating the exposed portion of the polysilicon layer 3 with light,
A porous polysilicon layer 5 is formed. Next, the porous polysilicon layer 6 is formed by oxidizing the porous polysilicon 5 to a predetermined depth by a rapid thermal oxidation (RTO) method, and the structure shown in FIG. 8C is obtained. . In this embodiment, the porous polysilicon layer is oxidized, but may be nitrided instead of oxidized.

Thereafter, a metal thin film 7 made of a gold thin film is formed on the main surface side of the insulating substrate 11 by forming a gold thin film by a vapor deposition method using a metal mask.
The field emission type electron source 10 having the structure shown in FIG.
In this embodiment, the metal thin film 7 constitutes a conductive thin film.

In the present embodiment, the porous polysilicon layer 5 is formed by performing anodic oxidation using the silicon oxide layer 4 that has been patterned with high precision using a photolithography technique and an etching technique as a mask. The pattern accuracy of the high-quality polysilicon layer 5 is improved,
Since the contact area between the thermally oxidized porous polysilicon layer 6 and the metal thin film 7 is determined by the pattern accuracy of the silicon oxide layer 4, the pattern accuracy of the electron emission area can be increased at low cost.

The field emission type electron source 10 of the present embodiment
In this case, it is possible to emit electrons only from specific pixels by selecting the lower electrode 12 and the metal thin film (upper electrode) 7 and applying a voltage.

(Embodiment 6 ) FIG. 9 shows a schematic configuration when the field emission electron source 10 of Embodiment 5 is applied to a display device. Note that the same components as those in the fifth embodiment are denoted by the same reference numerals, and description thereof is omitted.

In this embodiment, as shown in FIG. 9, the field emission type electron source 10 includes a transparent electrode 31 which is an electrode arranged to face the metal thin film 7. A phosphor 32 that emits visible light by the emitted electron beam is applied. The transparent electrode 31 is made of a transparent conductive film and is formed on a transparent plate 33 made of a glass substrate. Here, in the present embodiment, the phosphor 3
2 are formed in an array in the same plane, and each phosphor 32
Are formed in a matrix so as to oppose the portions of the metal thin film 7 formed on the thermally oxidized porous polysilicon layer 6. The transparent plate 33 on which the transparent electrode 31 and the phosphor 32 are formed is integrated with the field emission electron source 10 via a spacer (not shown). The enclosed inner space has a predetermined degree of vacuum. Therefore, the metal thin film 7 (hereinafter, referred to as the upper electrode 7) to which a voltage is applied and the lower electrode 12
With this combination, the electron beam can be emitted only from a specific pixel, and only the phosphor 32 disposed opposite to the pixel can be illuminated. The light emission of the phosphor 32 passes through the transparent electrode 31 and the transparent plate 33. Can be displayed externally.

In this embodiment, a 1 kV DC voltage is applied between the transparent electrode 31 and the upper electrode 7 while the transparent electrode 31 is used as a positive electrode with respect to the upper electrode 7, and the upper electrode 7 is used as a positive electrode with respect to the upper electrode 7. 20 between 7 and lower electrode 12
By applying a DC voltage of V, only the phosphor 32 corresponding to a specific electron source pixel can be made to emit light. Further, the electrode is not limited to the transparent conductive film.

In the present embodiment, since the pattern accuracy of the electron emission area of the field emission type electron source 10 is determined by the pattern accuracy of the silicon oxide layer 4, the pattern of the silicon oxide layer 4 is made more precise, so that the electron emission area is improved. The pattern accuracy is high, and a high-definition display device can be realized.

[0082] In the present embodiment, the field emission electron source 10 of Embodiment 5 has been described display device using a (FIG. 8 (d) refer), instead of the field emission electron source 10 in FIG. 9 Field emission type electron source 1 of Reference Example 2
0 (see FIG. 5E) or the field emission electron source 10 of the fourth embodiment (see FIG. 7C).

[0083]

According to the first aspect of the present invention, there is provided an electric field for emitting an electron beam from the surface of a conductive thin film by applying an electric field using the conductive thin film formed on the outermost surface on the main surface side of the conductive substrate as a positive electrode. A method for manufacturing an emission type electron source, comprising: forming a polycrystalline semiconductor layer on a conductive substrate, forming a mask material layer having a predetermined region opened on the polycrystalline semiconductor layer, and masking the mask material layer. and a, interest electrochemical reaction of the electrolytic solution
Anodic oxidation used during the anodizing process
The thickness of the mask material layer to be
The electrolytic solution was cooled so as to become smaller and porous portions of the performed positive pole oxidation polycrystalline semiconductor layer is oxidized or nitrided polycrystal semiconductor layer of the porous structure forming porous,
Since a conductive thin film patterned into a predetermined shape is formed on the oxidized or nitrided porous polycrystalline semiconductor layer , an electrochemical reaction in a cooled electrolytic solution is used, and
By polycrystalline semiconductor layer porous is formed by performing anodic oxidation processing mask material layer as a mask to increase the margin for the etching of the mask material layer
It improves pattern accuracy of the polycrystalline semiconductor layer of the multi-porous it is, also, since the contact area between the porous polycrystalline semiconductor layer and the conductive thin film is oxidized or nitrided is determined by the pattern accuracy of the mask material layer This has the effect that the pattern accuracy of the electron emission area can be increased at low cost.

[0084]

[0085]

According to a third aspect of the present invention, there is provided an electric field emission type in which an electron beam is emitted from the surface of the conductive thin film by applying an electric field using the conductive thin film formed on the outermost surface on the main surface side of the conductive substrate as a positive electrode. A method of manufacturing an electron source, wherein a substrate in which a lower electrode made of a conductor layer is formed in a stripe shape on a main surface side as a conductive substrate is used, and a polycrystalline semiconductor layer is formed on the conductive substrate so as to cover the lower electrode. Is formed, and a mask material layer patterned in a stripe shape crossing the lower electrode is formed on the polycrystalline semiconductor layer, and then anodizing treatment is performed using the mask material layer as a mask, thereby forming a part of the polycrystalline semiconductor layer. And oxidizing or nitriding the porous polycrystalline semiconductor layer, and forming a stripe-shaped conductive layer intersecting the lower electrode on the oxidized or nitrided porous polycrystalline semiconductor layer. Since a thin film is formed, the pattern of the porous polycrystalline semiconductor layer is formed according to the mask material layer pattern by performing anodic oxidation using the mask material layer as a mask, so that the pattern of the mask material layer can be highly accurate. By doing so, the pattern accuracy of the porous polycrystalline semiconductor layer is improved, and the contact area between the oxidized or nitrided porous polycrystalline semiconductor layer and the conductive thin film is determined by the pattern accuracy of the porous polycrystalline semiconductor layer. Therefore, there is an effect that the pattern accuracy of the electron emission area can be improved at low cost.

The invention according to claim 4 is the invention according to claim 1 or claim
According to the third aspect , since the mask material layer is made of any one of a silicon oxide layer, a silicon nitride layer, and a photoresist layer, or a combination thereof, the pattern of the mask material layer can be easily improved in accuracy. effective.

[0088]

The invention according to claim 6 is the one surface side of the conductive substrate.
A strong electric field drift layer is formed on and above the strong electric field drift layer
A field emission type electron source having a conductive thin film formed thereon, and an electrode disposed to face the conductive thin film, and a phosphor that emits visible light by an electron beam emitted from the surface of the conductive thin film is provided. in the production method of providing et a plane light emitting device to the electrodes
Forming a polycrystalline semiconductor layer on a conductive substrate;
A mask material layer having a predetermined area opened on the crystalline semiconductor layer
Formed, and using the mask material layer as a mask,
Anodization utilizing an electrochemical reaction.
The thickness of the mask material layer that is etched during processing
Cooling the electrolytic solution so as to be smaller than the thickness of the material layer.
And anodize it to make part of the polycrystalline semiconductor layer porous.
And oxidize the porous polycrystalline semiconductor layer.
Or nitrided, the oxidized or nitrided porous material
Conductivity patterned into predetermined shape on crystalline semiconductor layer
Electrochemistry in a cooled electrolyte solution as it forms a thin film
Anodizing using reaction and mask material layer as mask
Processing results in the formation of a porous polycrystalline semiconductor layer.
The etching of the mask material layer
It is possible to increase the margin and to make the porous polycrystalline half
The pattern accuracy of the conductor layer is improved, and
Interface between porous polycrystalline semiconductor layer and conductive thin film
Since the product is determined by the pattern accuracy of the mask material layer,
Field emission electron source with high pattern accuracy
Is, there is an effect that it is possible to realize a small plane light emitting device emitting light uneven.

The invention according to claim 8 is the one surface side of the conductive substrate.
Oxidized or nitrided porous polycrystalline semiconductor layer
It is formed in a lip shape and is oxidized or nitrided.
Conductive thin film on the porous polycrystalline semiconductor layer
Field-emission electron source formed in a shape, and the field-emission electron
A conductive thin film that is placed opposite to the source and orthogonal to the conductive thin film
Phosphor that emits light by electron beams emitted from
Of a display device comprising a striped electrode
A manufacturing method, comprising forming a polycrystalline semiconductor layer on a conductive substrate.
Having a predetermined region opened on the polycrystalline semiconductor layer.
A mask material layer, and using the mask material layer as a mask,
Anodization utilizing an electrochemical reaction in the solution,
The thickness of the mask material layer etched during the anodization process
Is smaller than the thickness of the mask material layer.
The solution is cooled and subjected to anodizing treatment to remove the polycrystalline semiconductor layer.
Part is made porous, and the porous polycrystalline semiconductor is made porous.
Oxidizing or nitriding the body layer,
Patterned into a predetermined shape on the porous polycrystalline semiconductor layer
In a cooled electrolyte solution
Utilizing the electrochemical reaction of the above and using the mask material layer as a mask
Porous polycrystalline semiconductor by anodizing
By forming a layer, the etching material of the mask material layer
Porosity as well as increased safety margin
Pattern accuracy of the polycrystalline semiconductor layer of
Or nitrided porous polycrystalline semiconductor layer and conductive thin film
The contact area with the mask is determined by the pattern accuracy of the mask material layer?
Field emission type electron with high pattern accuracy of electron emission area
This is advantageous in that a source can be obtained and a high- definition display device can be realized.

[0091]

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing main processes of a manufacturing method according to a first embodiment.

FIG. 2 is an explanatory view of main steps of a manufacturing method of Reference Example 1 .

FIG. 3 is a schematic configuration diagram showing a second embodiment.

FIG. 4 is a schematic configuration diagram showing a third embodiment.

FIG. 5 is an explanatory diagram of main steps of a manufacturing method of Reference Example 2 .

FIG. 6 is an explanatory diagram of main steps of a manufacturing method according to a fourth embodiment.

FIG. 7 is an explanatory view showing main steps of the manufacturing method.

FIG. 8 is an explanatory diagram of main steps of a manufacturing method according to a fifth embodiment.

FIG. 9 is a schematic configuration diagram showing a sixth embodiment.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 n-type silicon substrate 2 ohmic electrode 3 polysilicon layer 4 silicon oxide layer 5 porous polysilicon layer 6 thermally oxidized porous polysilicon layer 7 metal thin film 10 field emission electron source

Continuation of the front page (72) Inventor Yoshiaki Honda 1048 Oaza Kadoma, Kadoma, Osaka Pref. Matsushita Electric Works, Ltd. (56) References JP-A 9-259795 (JP, A) JP-A 8-274375 (JP) , A) JP-A-10-256225 (JP, A) JP-A-9-213209 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01J 9/02 H01J 1/312 H01J 29/04 H01J 31/12 H01L 21/306-21/308 H01L 33/00 JICST file (JOIS)

Claims (8)

(57) [Claims] 1. A method of manufacturing a field emission type electron source for emitting an electron beam from the surface of a conductive thin film by applying an electric field with the conductive thin film formed on the outermost surface on the main surface side of the conductive substrate as a positive electrode. Forming a polycrystalline semiconductor layer over a conductive substrate, forming a mask material layer having a predetermined region opened on the polycrystalline semiconductor layer, and using the mask material layer as a mask.
Anodic oxidation utilizing the electrochemical reaction in the electrolytic solution.
A mask material layer that is etched during the anodizing process
Before the thickness of the mask material layer becomes smaller than the thickness of the mask material layer.
Serial electrolytic solution was cooled to porous portions of the positive electrode oxidation processes performed polycrystalline semiconductor layer, a polycrystalline semiconductor layer of the porous structure forming porous oxide or nitrided, is oxide or nitride Forming a conductive thin film patterned into a predetermined shape on the porous polycrystalline semiconductor layer. 2. The method according to claim 1 , wherein the conductive substrate is a porous polycrystalline semiconductor.
Consisting of a substrate on which a conductor layer that supplies electrons to the layer is formed
2. The method for manufacturing a field emission electron source according to claim 1, wherein: Wherein the formation of the outermost surface of the main surface of the conductive base plate
By applying an electric field with the conductive thin film
Field emission type electron beam that emits electron beam from the surface of conductive thin film
A method of manufacturing a source, comprising: forming a conductive substrate on a main surface side;
The lower electrode made of a conductor layer was formed in a stripe shape
Using a substrate, tying to cover the lower electrode on a conductive substrate
A polycrystalline semiconductor layer is formed, and the lower electrode is interposed on the polycrystalline semiconductor layer.
Mask material layer patterned in a stripe pattern
Is formed, and then anodizing is performed using the mask material layer as a mask.
Making part of the polycrystalline semiconductor layer porous by performing processing
Then, the porous porous polycrystalline semiconductor layer is oxidized.
Or the oxidized or nitrided porous composite
Conduction in the form of stripes intersecting the lower electrode on the crystalline semiconductor layer
Method of manufacturing to that electric field emission electron source and forming a sex film. 4. The mask material layer includes a silicon oxide layer,
Either a silicon nitride layer or a photoresist layer or
Claim it characterized by consisting of a combination thereof 1
Or claim 3 method for producing the electric field emission electron source according. 5. The method according to claim 1, wherein said polycrystalline semiconductor layer is a polysilicon layer.
5. The method according to claim 1 , further comprising:
Method for producing the electric field emission electron source according to any misalignment. 6. A strong electric field drift on one surface side of a conductive substrate.
Layer is formed and a conductive thin film is formed on the strong electric field drift layer.
The field emission electron source thus formed and the conductive thin film are opposed to each other.
And an electrode to be radiated from the surface of the conductive thin film.
Phosphor that emits visible light by the electron beam
A method for manufacturing a provided planar light emitting device, comprising: forming a polycrystalline semiconductor layer on a conductive substrate;
The predetermined area to form a mask material layer which is open, as a mask the mask material layer, benefit the electrochemical reaction of the electrolytic solution
Anodic oxidation used during the anodizing process
The thickness of the mask material layer to be
The electrolytic solution was cooled so as to become smaller and porous portions of the performed positive pole oxidation polycrystalline semiconductor layer is oxidized or nitrided polycrystal semiconductor layer of the porous structure forming porous,
The oxide or nitride porous polycrystalline semiconductor layer
Manufacturing method of a flat light-emitting device you and forming a conductive thin film that is patterned in a predetermined shape. 7. The porous polycrystalline semiconductor layer comprises a porous substrate.
7. The method according to claim 6, comprising a silicon layer.
A method for manufacturing a flat light emitting device . 8. An oxidized or nitrided one surface side of a conductive substrate.
Porous polycrystalline semiconductor layer is formed in stripes.
And the oxidized or nitrided porous polycrystal
An electrode in which a conductive thin film on a semiconductor layer is formed in stripes
A field emission type electron source and a field emission type electron source
And electrons emitted from the conductive thin film perpendicular to the conductive thin film
Stripe-shaped electrodes with phosphors
And a method for manufacturing a display device comprising
Forming a polycrystalline semiconductor layer on a conductive substrate,
Forming a mask material layer with a predetermined area opened on the semiconductor layer
Then, using the mask material layer as a mask,
Anodizing utilizing chemical reaction, during anodizing
The thickness of the mask material layer to be etched into the mask material layer
Cooling the electrolytic solution so as to be smaller than the film thickness of
Anodize to make part of the polycrystalline semiconductor layer porous
Then, the porous porous polycrystalline semiconductor layer is oxidized.
Or the oxidized or nitrided porous composite
Conductive thin film patterned into a predetermined shape on a crystalline semiconductor layer
Method of manufacturing Disupu ray apparatus you and forming a film.