JP3068224B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP3068224B2
JP3068224B2 JP3050814A JP5081491A JP3068224B2 JP 3068224 B2 JP3068224 B2 JP 3068224B2 JP 3050814 A JP3050814 A JP 3050814A JP 5081491 A JP5081491 A JP 5081491A JP 3068224 B2 JP3068224 B2 JP 3068224B2
Authority
JP
Japan
Prior art keywords
shaft
substrate
head
brazing material
brazing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3050814A
Other languages
Japanese (ja)
Other versions
JPH04267544A (en
Inventor
健志 松浦
川上  崇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3050814A priority Critical patent/JP3068224B2/en
Publication of JPH04267544A publication Critical patent/JPH04267544A/en
Application granted granted Critical
Publication of JP3068224B2 publication Critical patent/JP3068224B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

[発明の目的] [Object of the invention]

【0001】[0001]

【産業上の利用分野】本発明は、例えばPGA(Pin Gr
id Array package)タイプなどの半導体装置に関する。
The present invention relates to, for example, PGA (Pin Gr)
id semiconductor package).

【0002】[0002]

【従来の技術】周知の通り、集積回路の高密度化、大規
模化等に伴い半導体装置には、その基板に熱伝導率や電
気特性などの優れたセラミック基板が用いられるように
なってきている。そしてセラミック基板の表面には、外
部回路に接続するための金属製のリードピンやリードワ
イヤあるいは冷却用のピンフィン等がろう接されて用い
られている。
2. Description of the Related Art As is well known, with the increase in density and scale of integrated circuits, ceramic substrates having excellent thermal conductivity and electrical characteristics have been used in semiconductor devices. I have. On the surface of the ceramic substrate, metal lead pins and lead wires for connection to an external circuit, pin fins for cooling, and the like are brazed and used.

【0003】このようなセラミック基板を用いた半導体
装置の1つとして、PGAタイプの半導体装置について
図面を参照して説明する。図6は断面図であり、図7は
要部断面図である。図において、1は内部配線が設けら
れた多層のセラミック基板で、これは、例えば窒化アル
ミニウム(AlN)によって形成されている。2は基板
1の下面側の凹部3に配着された半導体素子であり、半
導体素子2の電極部と基板1の内部配線の端子とは、ボ
ンディングワイヤ4によって接続されている。そして基
板1の下面には、半導体素子2を内包するようにして凹
部3を閉塞するキャップ5が、周囲にシールリング6を
設けて固着されている。
As one of the semiconductor devices using such a ceramic substrate, a PGA type semiconductor device will be described with reference to the drawings. FIG. 6 is a sectional view, and FIG. 7 is a sectional view of a main part. In the figure, reference numeral 1 denotes a multilayer ceramic substrate provided with internal wiring, which is formed of, for example, aluminum nitride (AlN). Reference numeral 2 denotes a semiconductor element provided in the concave portion 3 on the lower surface side of the substrate 1, and the electrode portion of the semiconductor element 2 is connected to a terminal of the internal wiring of the substrate 1 by a bonding wire 4. On the lower surface of the substrate 1, a cap 5 for closing the recess 3 so as to enclose the semiconductor element 2 is fixedly provided with a seal ring 6 provided therearound.

【0004】また、7は基板1の上面にスパッタリング
などによって形成された金属膜の接続部で、これは内部
配線のバイアホールに接続されている。そして接続部7
には、方端部の大径の頭部8をろう材9を用いてろう接
した軸体のリードピン10が植設されている。なお、リー
ドピン10は金属材料でなり、その表面にはろう材に対す
る濡れ性を増すために、ろう材との親和性に富む金属に
よるメッキが施されている。
Reference numeral 7 denotes a connecting portion of a metal film formed on the upper surface of the substrate 1 by sputtering or the like, which is connected to a via hole of an internal wiring. And connection part 7
A shaft lead pin 10 in which a large-diameter head 8 at the end is brazed using a brazing material 9 is implanted. The lead pin 10 is made of a metal material, and its surface is plated with a metal having a high affinity for the brazing material in order to increase the wettability to the brazing material.

【0005】しかしながら上記の従来技術においては、
基板1にリードピン10を植設するにあたり、頭部8を接
続部7にろう接するが、ろう接では溶融したろう材9が
リードピン10の表面状況等によって決まる状態にまで、
拘束を受けずに流動して固化する。この時、リードピン
10の表面にはメッキが施されており、これによってろう
材はろう接部分からより遠い位置にまで流動して固化
し、接続部7の面に対するろう材の濡れ角は大きなもの
となっている。
[0005] However, in the above prior art,
When the lead pins 10 are implanted on the substrate 1, the head 8 is soldered to the connection portion 7. In the soldering, the molten brazing material 9 reaches a state determined by the surface condition of the lead pins 10.
It flows and solidifies without restraint. At this time, the lead pin
The surface of 10 is plated so that the brazing material flows and solidifies farther from the brazing portion, and the wetting angle of the brazing material with respect to the surface of the connection portion 7 is large. .

【0006】また、リードピン10の基板1への植設は、
金属膜の接続部7を介しているものの、基板のセラミッ
クスと軸体の金属とは物理的特性等が異なっているた
め、容易なことではなかった。特にセラミックスと金属
とは熱膨張係数が大きく異なっており、ろう接を行うこ
とによる温度変化、すなわち室温から約 800℃の温度の
範囲で加熱、冷却されることにより、熱膨張係数の差に
依存した熱応力がろう接した部分の基板1に加わり、植
設したリードピン10が接続部7にろう接されたまま基板
1から脱落してしまったり、またろう接した部分の近傍
の基板1にクラックが発生したりした。さらに、基板1
にクラックが発生することによってリードピン10の基板
1への固着強度が低下し、経時的に電気的な接続不良あ
るいは不接触を生じ、半導体装置の信頼性を低下させる
虞があった。
[0006] The implantation of the lead pins 10 on the substrate 1 is as follows.
Despite the connection portion 7 of the metal film, it was not easy because the ceramics of the substrate and the metal of the shaft had different physical properties and the like. In particular, the coefficient of thermal expansion differs greatly between ceramics and metals, and the temperature changes due to brazing, that is, heating and cooling from room temperature to a temperature of about 800 ° C, depend on the difference in the coefficient of thermal expansion. The applied thermal stress is applied to the soldered portion of the substrate 1, and the implanted lead pins 10 fall off the substrate 1 while being soldered to the connection portion 7, or crack the substrate 1 near the soldered portion. Or has occurred. Further, the substrate 1
When the cracks occur, the fixing strength of the lead pins 10 to the substrate 1 is reduced, and an electrical connection failure or non-contact may occur over time, which may reduce the reliability of the semiconductor device.

【0007】[0007]

【発明が解決しようとする課題】上記のようなセラミッ
クスと金属とのろう接部分に、熱膨張係数の差による熱
応力に起因した問題が発生するという状況に鑑みて本発
明はなされたもので、その目的とするところは基板に加
わる熱応力を低減して基板上に固着した軸体の脱落や割
れ等の問題を解消し、信頼性を向上させた半導体装置を
提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-described situation where a problem caused by thermal stress due to a difference in thermal expansion coefficient occurs in a brazed portion between a ceramic and a metal as described above. It is an object of the present invention to provide a semiconductor device in which the thermal stress applied to a substrate is reduced to solve problems such as dropping and cracking of a shaft fixed on the substrate and reliability is improved.

【0008】[発明の構成][Structure of the Invention]

【0009】[0009]

【課題を解決するための手段】本発明の半導体装置は、
半導体素子を配着した基板と、この基板の面上に形成さ
れた金属膜の接続部と、この接続部の上面に端部をろう
接して固着した軸体とを有してなるものにおいて、前記
軸体は、軸部と、この軸部の接続側端部に設けられた該
軸部より大径の板状の頭部とを有すると共に、前記頭部
から前記軸部にかけての間の前記端部所定位置までメッ
キを施し、メッキ部分と不メッキ部分との間にろう材に
対する濡れ性に差をつけたことを特徴とするものであ
る。
According to the present invention, there is provided a semiconductor device comprising:
A substrate on which semiconductor elements are mounted and a substrate formed on the surface of the substrate;
It is a connecting portion of the metal film, the made and a shaft which is fixed the end in contact with the wax on the top surface of the connecting portion, wherein
Shaft includes a shaft portion, which has a large-diameter plate-shaped head from the shaft portion provided on the connecting end portion of the shaft portion, said head
From the end to a predetermined position of the end
To the brazing material between the plated and unplated parts.
It is characterized by a difference in wettability
You.

【0010】[0010]

【作用】上記のように構成された半導体装置は、基板の
上にろう接する軸体端部に、頭部から軸部にかけての間
の端部所定位置までろう材との親和性に富むメッキを施
すことによってメッキ部分と他の部分とのに対する濡れ
性に差をつけ、ろう接面に対するろう材の濡れ角が減少
するようにしている。そして、ろう材の濡れ角が減少す
ることによって、接合後の温度変化に伴ってろう接部分
に加わる残留熱応力も減少することから、軸体端部をろ
う接した部分の基板に加わる熱応力が低減でき、基板上
に固着した軸体の脱落、基板の割れ等が発生せず、信頼
性を向上させることができる。また、頭部から軸部にか
けての間の端部所定位置までの空間にろう材が充填され
るため、軸体の端部における曲げ剛性が高いものとな
る。
The semiconductor device constructed as described above has a
At the end of the shaft that is brazed upward, between the head and the shaft
By applying a plating having a high affinity to the brazing material to a predetermined position of the end portion , a difference is made in the wettability to the plating portion and other portions, so that the wetting angle of the brazing material to the brazing surface is reduced. I have. And, since the wetting angle of the brazing material is reduced, the residual thermal stress applied to the brazed portion with the temperature change after joining is also reduced. Can be reduced, the shaft fixed to the substrate does not fall off, and the substrate does not crack, and the reliability can be improved. Also, from the head to the shaft
Since the brazing material is filled in the space between the beam and the end portion up to a predetermined position, the bending rigidity at the end portion of the shaft body is high.

【0011】[0011]

【実施例】以下、本発明の実施例を図面を参照して説明
する。尚、本発明は、発明者等の実験によって得られた
知見に基いてなされており、この知見によれば、ろう接
によってセラミック基板上にピン等の軸体を、基板面に
形成された金属薄膜を介して固着した場合、セラミック
基板に加わる残留熱応力はセラミック基板面、すなわち
金属薄膜面に対するろう材の濡れ角によって変化し、ろ
う材の濡れ角を減少させることで、接合後の温度変化に
伴ってろう接部分のセラミック基板に加わる残留熱応力
は小さくなる。
Embodiments of the present invention will be described below with reference to the drawings. The present invention is based on the knowledge obtained by experiments of the inventors, and according to this knowledge, a shaft such as a pin is formed on a ceramic substrate by brazing, and a metal formed on a substrate surface is formed. When fixed through a thin film, the residual thermal stress applied to the ceramic substrate changes depending on the wetting angle of the brazing material with respect to the ceramic substrate surface, that is, the metal thin film surface. As a result, the residual thermal stress applied to the ceramic substrate at the brazing portion is reduced.

【0012】先ず、第1の実施例を図1により説明す
る。図1は要部断面図であり、図において、11は内部配
線が設けられた多層のセラミック基板で、これは前記し
た従来の技術における基板1に相当し、例えば窒化アル
ミニウム(AlN)によって形成され、その下面側に形
成された凹部にはボンディングワイヤ等によって所定の
配線を行った半導体素子が配着され、この凹部はキャッ
プにより閉塞されている。また12は基板11の上面に、ニ
ッケル(Ni)、チタン(Ti)、金(Au)の順にス
パッタリングによって薄膜を複層に形成し、さらにAu
メッキを行って形成された金属薄膜の接続部で、この接
続部12は内部配線のバイアホールに接続されている。
First, a first embodiment will be described with reference to FIG. FIG. 1 is a cross-sectional view of a main part. In the figure, reference numeral 11 denotes a multilayer ceramic substrate provided with internal wirings, which corresponds to the substrate 1 in the above-described conventional technique, and is formed of, for example, aluminum nitride (AlN). A semiconductor element on which predetermined wiring is performed by a bonding wire or the like is provided in a concave portion formed on the lower surface side, and the concave portion is closed by a cap. Reference numeral 12 denotes a thin film formed on the upper surface of the substrate 11 by sputtering in the order of nickel (Ni), titanium (Ti), and gold (Au).
A connection portion of a metal thin film formed by plating, and this connection portion 12 is connected to a via hole of an internal wiring.

【0013】13はニッケル(Ni)・鉄(Fe)合金に
よって形成された軸体のリードピンであり、このリード
ピン13は丸棒状の軸部14と、片方側の端部に頭部15とを
有し、その表面には、例えばAuメッキあるいはNiメ
ッキが施されている。また頭部15は接続部12よりも小さ
く、軸部14よりも大径であって、軸方向断面形状が略円
弧状の外周面を有していて、頭部15の軸方向の中間部に
は、断面形状が角形の周溝16が形成され、これによって
溝16の両周縁に鍔状部17a ,17b が形成されている。
Reference numeral 13 denotes a shaft lead pin formed of a nickel (Ni) -iron (Fe) alloy. The lead pin 13 has a round bar-shaped shaft portion 14 and a head portion 15 at one end. For example, the surface is plated with Au or Ni. Also, the head 15 is smaller than the connecting portion 12, has a larger diameter than the shaft portion 14, has a substantially arc-shaped outer peripheral surface in the axial cross section, and is provided at an intermediate portion of the head 15 in the axial direction. Is formed with a circumferential groove 16 having a rectangular cross-sectional shape, whereby flanges 17a and 17b are formed on both circumferential edges of the groove 16.

【0014】そして接続部12にはリードピン13が、接続
部12の上面にリードピン13の頭部15の端面を対向させる
ようにし、ろう材に銀ろう18を用いたろう接によって植
設されている。なお、接続部12の面と頭部15の端面との
間、及び接続部12の外周縁と頭部15の端面側の鍔状部17
a との間に形成される空間には、ろう接時に溶融した銀
ろう18が表面張力によって流動して充填される。19は、
この時の接続部12の面に対する銀ろう18の濡れ角であ
る。ろう接時の銀ろう18の量がさらに多い場合には、銀
ろう18は頭部15の溝16内を満たすように流動する。
A lead pin 13 is implanted in the connection portion 12 by brazing using a silver braze 18 as a brazing material, with the end face of the head 15 of the lead pin 13 facing the upper surface of the connection portion 12. In addition, between the surface of the connection portion 12 and the end surface of the head portion 15, and the outer peripheral edge of the connection portion 12 and the flange portion 17 on the end surface side of the head portion 15.
The space formed between a and silver is filled with the silver solder 18 melted at the time of soldering by flowing due to surface tension. 19 is
The wetting angle of the silver solder 18 with respect to the surface of the connection portion 12 at this time. If the amount of the silver solder 18 during brazing is further increased, the silver solder 18 flows so as to fill the groove 16 of the head 15.

【0015】このように構成した本実施例によれば、リ
ードピン13の端部に設けられた頭部15にろう材の濡れ角
の減少手段としての溝16が形成されており、この溝16に
よりろう接時の鍔状部17a 周囲の空間に充填される銀ろ
う18のリードピン13での位置は、鍔状部17a の周縁の位
置となる。また、接続部12の上面に対する濡れ角19が頭
部15の鍔状部17a の厚さによってほぼ決められることと
なり、銀ろう18が溝16を満たし終わるまでは一定のもの
となる。なおこの時の濡れ角19は、濡れ角の減少手段と
しての溝16を有しているため、前記の従来の技術に示さ
れたものよりも小さな値となる。
According to the present embodiment constructed as described above, the groove 16 is formed in the head 15 provided at the end of the lead pin 13 as means for reducing the wetting angle of the brazing material. The position of the silver solder 18 filled in the space around the flange 17a at the time of soldering at the lead pin 13 is the position of the periphery of the flange 17a. In addition, the wetting angle 19 with respect to the upper surface of the connection portion 12 is substantially determined by the thickness of the flange portion 17a of the head portion 15, and is constant until the silver braze 18 finishes filling the groove 16. Since the wetting angle 19 at this time has the groove 16 as a means for reducing the wetting angle, it has a smaller value than that shown in the above-mentioned prior art.

【0016】そして、ろう接部分での銀ろう18の濡れ角
19が小さな値に維持できるため、基板11に加わる熱応力
は小さく、接続部12近傍の基板11にはクラックが発生せ
ず、また接続部12にろう接されたリードピン13の脱落は
ない。またろう接の銀ろう18の量が、接続部12の面と頭
部15の端面との間、及び接続部12の外周縁と鍔状部17a
の周縁との間にそれぞれ形成される空間を満たしている
量から、溝16内を満たす量まで変動しても、濡れ角19は
ほぼ一定の小さな値を維持でき、この銀ろう18の量の変
化に対しても基板11の小さな熱応力は変化せず、接続部
12近傍の基板11にはクラックが発生せず、また接続部12
にろう接されたリードピン13の脱落はない。このように
本実施例は、銀ろう18の量の製造上のばらつきを溝16に
よって吸収することができる他に、銀ろう18を溝16内に
満たすことでリードピン13の曲げ剛性を高くすることが
できる。そして経時的に電気的な接続不良あるいは不接
触を発生させることもなく、半導体装置の高い信頼性を
維持することができる。
Then, the wetting angle of the silver solder 18 at the soldered portion
Since 19 can be maintained at a small value, the thermal stress applied to the substrate 11 is small, no crack is generated in the substrate 11 near the connection portion 12, and the lead pins 13 brazed to the connection portion 12 do not fall off. Further, the amount of the silver solder 18 to be brazed is between the surface of the connection portion 12 and the end surface of the head portion 15, and the outer peripheral edge of the connection portion 12 and the flange portion 17a.
The wetting angle 19 can be maintained at an almost constant small value even if the amount of space fills the groove 16 from the amount filling the space formed with the peripheral edge of the silver braze 18. The small thermal stress of the substrate 11 does not change with the change,
No cracks occur in the substrate 11 near the
There is no dropping of the lead pin 13 soldered to. As described above, in the present embodiment, in addition to the fact that the manufacturing variation in the amount of the silver solder 18 can be absorbed by the groove 16, the bending rigidity of the lead pin 13 can be increased by filling the silver solder 18 in the groove 16. Can be. Then, high reliability of the semiconductor device can be maintained without causing electrical connection failure or non-contact over time.

【0017】次に、第2の実施例を図2により説明す
る。図2は要部断面図であり、図において、21はNi・
Fe合金によって形成された軸体のリードピンであり、
このリードピン21には軸部22と、片方側の端部に接続部
12よりも小さく軸部22よりも大径の2つの鍔状部23a ,
23b を軸方向に離間して形成する頭部24とが設けられて
いる。なお2つの鍔状部23a ,23b は厚さが異なり、薄
い方の鍔状部23a を最外端側に位置させ、これで端面を
構成し、両鍔状部23a ,23b の間には、断面形状が円弧
状の周溝25が形成されている。そしてリードピン21は、
接続部12の上面に頭部24の端面を対向させるようにし
て、ろう材に銀ろう26を用いたろう接によって、前記第
1の実施例と同様に植設されている。なお、27は接続部
12の面に対する銀ろう26の濡れ角である。
Next, a second embodiment will be described with reference to FIG. FIG. 2 is a cross-sectional view of a main part. In FIG.
A shaft lead pin formed of an Fe alloy,
The lead pin 21 has a shaft portion 22 and a connection portion at one end.
Two flanges 23a smaller than 12 and larger in diameter than the shaft 22;
And a head portion 24 which is formed so as to be spaced apart from each other in the axial direction. The two flanges 23a and 23b have different thicknesses, and the thinner flange 23a is located on the outermost end side to form an end face. Between the flanges 23a and 23b, A circumferential groove 25 having an arc-shaped cross section is formed. And the lead pin 21
In the same manner as in the first embodiment, brazing is performed by using a brazing material such as silver brazing material so that the end surface of the head portion 24 faces the upper surface of the connecting portion 12. 27 is the connection part
This is the wetting angle of the silver solder 26 on the 12 faces.

【0018】そして、上記のように構成された本実施例
においても、頭部24にろう材の濡れ角の減少手段として
の鍔状部23a 及び溝25が形成されており、第1の実施例
と同様な作用、効果が得られる。なお、鍔状部23a の厚
さを薄くしているために銀ろう26の濡れ角27を小さくす
ることができ、基板11に加わる熱応力は小さくするうえ
で有効である。
Also in the present embodiment having the above-described structure, the flange 24a and the groove 25 are formed in the head 24 as means for reducing the wetting angle of the brazing material. The same operation and effect as described above can be obtained. Since the thickness of the flange portion 23a is reduced, the wetting angle 27 of the silver solder 26 can be reduced, which is effective in reducing the thermal stress applied to the substrate 11.

【0019】次に、第3の実施例を図3により説明す
る。図3は要部断面図であり、図において、28はNi・
Fe合金によって形成された軸体のリードピンであり、
このリードピン28は丸棒状の軸部29と、片方側の端部に
頭部30とを有している。また頭部30は接続部12よりも小
さく軸部29よりも大径であって、軸方向断面形状が円弧
状の外周面を有する厚肉の円板であり、厚さ方向の中間
部の所定位置から端面にかけて、Niメッキが施された
外面31を備えている。
Next, a third embodiment will be described with reference to FIG. FIG. 3 is a cross-sectional view of a main part.
A shaft lead pin formed of an Fe alloy,
The lead pin 28 has a round bar-shaped shaft 29 and a head 30 at one end. The head portion 30 is a thick disk having a smaller diameter than the connecting portion 12 and a larger diameter than the shaft portion 29 and having an arc-shaped outer peripheral surface in an axial cross-sectional shape. An outer surface 31 plated with Ni is provided from the position to the end surface.

【0020】そしてリードピン28は、接続部12の上面に
頭部30の端面を対向させるようにして、ろう材に銀ろう
32を用いたろう接によって植設されている。なお、接続
部12の面と頭部30の端面との間、及び接続部12の外周縁
と頭部30のメッキが施された外面31との間に形成される
空間には、ろう接時に溶融した銀ろう32が流れて充填さ
れる。33は接続部12の面に対する銀ろう32の濡れ角であ
る。
The lead pins 28 are provided on the brazing material such that the end surfaces of the heads 30 face the upper surfaces of the connecting portions 12.
It is planted by brazing using 32. The space formed between the surface of the connection portion 12 and the end surface of the head 30 and the space formed between the outer peripheral edge of the connection portion 12 and the plated outer surface 31 of the head 30 are filled with soldering. The molten silver solder 32 flows and is filled. 33 is a wetting angle of the silver solder 32 with respect to the surface of the connection portion 12.

【0021】上記の構成のものにおいては、端部に設け
られた頭部30に、所定の位置まで部分的にろう材との親
和性に富む、例えば銀ろう32に対してNiメッキを施し
た外面31が形成されており、ろう接にあたり、メッキを
施した外面31とその他のメッキを施さない面との銀ろう
32に対する濡れ性の差から、銀ろう32が流れる位置は外
面31の周縁までの範囲に、先ず定まる。そして、ろう接
後の銀ろう32は、接続部12の上面に対する濡れ角33が頭
部30のメッキ位置によって決められるようになってい
る。以上のように濡れ角33は、濡れ角の減少手段として
部分的にメッキを施した外面31を設けているため、前記
の従来の技術に示されたものよりも小さな値となってい
る。
In the above-mentioned structure, the head 30 provided at the end portion is Ni-plated on a silver braze 32, for example, which has a high affinity with the brazing material, for example, partially to a predetermined position. The outer surface 31 is formed, and when soldering, the silver brazing between the plated outer surface 31 and other unplated surfaces
From the difference in wettability with respect to 32, the position where the silver solder 32 flows is first determined in a range up to the periphery of the outer surface 31. Then, the solder angle 32 of the soldered silver 32 with respect to the upper surface of the connection portion 12 is determined by the plating position of the head 30. As described above, the wetting angle 33 is smaller than that shown in the above-described prior art because the partially plated outer surface 31 is provided as means for reducing the wetting angle.

【0022】このように本実施例おいても、ろう接部分
での銀ろう32の濡れ角33が小さな値に維持できるため、
基板11に加わる熱応力は小さく、接続部12近傍の基板11
にはクラックが発生せず、また接続部12にろう接された
リードピン28の脱落はない。そして経時的に電気的な接
続不良あるいは不接触を発生させることもなく、半導体
装置の高い信頼性を維持することができる。
As described above, also in this embodiment, since the wetting angle 33 of the silver solder 32 at the soldered portion can be maintained at a small value,
The thermal stress applied to the substrate 11 is small, and
No cracks occur, and the lead pins 28 brazed to the connection portion 12 do not fall off. Then, high reliability of the semiconductor device can be maintained without causing electrical connection failure or non-contact over time.

【0023】次に、第4の実施例を図4により説明す
る。図4は要部断面図であり、図において、34はNi・
Fe合金によって形成された軸体のリードピンであり、
このリードピン34は丸棒状の軸部35と、片方側の端部に
頭部36とを有している。また頭部36は接続部12よりも小
さく軸部35よりも大径の円錐台状を成すもので、円錐台
の大径面を最外端面としており、円錐面の中間部の所定
位置から端面にかけて、Niメッキが施された外面37を
備えている。
Next, a fourth embodiment will be described with reference to FIG. FIG. 4 is a cross-sectional view of a main part.
A shaft lead pin formed of an Fe alloy,
The lead pin 34 has a round bar-shaped shaft 35 and a head 36 at one end. The head 36 has a truncated cone shape smaller in diameter than the connection portion 12 and larger in diameter than the shaft portion 35, and has a large diameter surface of the truncated cone as the outermost end surface. And an outer surface 37 plated with Ni.

【0024】そしてリードピン34は、第3の実施例と同
様に、接続部12の上面に頭部36の端面を対向させるよう
にして、ろう材に銀ろう38を用いたろう接によって植設
されている。なお、接続部12の面と頭部36の端面との
間、及び接続部12の外周縁と頭部36のメッキが施された
外面37との間に形成される空間には、ろう接時に溶融し
た銀ろう38が流れて充填される。39は接続部12の面に対
する銀ろう38の濡れ角である。
In the same manner as in the third embodiment, the lead pin 34 is implanted by brazing using a silver braze 38 as a brazing material so that the end surface of the head 36 is opposed to the upper surface of the connection portion 12. I have. In addition, spaces formed between the surface of the connection portion 12 and the end surface of the head portion 36 and between the outer peripheral edge of the connection portion 12 and the plated outer surface 37 of the head portion 36 have a The molten silver solder 38 flows and is filled. 39 is a wetting angle of the silver solder 38 with respect to the surface of the connection portion 12.

【0025】上記のように構成された本実施例において
も、第3の実施例と同様な作用、効果が得られる。
In the present embodiment having the above-described structure, the same operation and effect as those of the third embodiment can be obtained.

【0026】さらに、第5の実施例を図5により説明す
る。図5は要部断面図であり、図において、40はNi・
Fe合金によって形成された軸体のリードピンであり、
このリードピン40は丸棒状の軸部41と、一方端に頭部42
とを有し、頭部42は接続部12よりも小さく軸部41よりも
大径の比較的薄い厚さの円板状に形成されている。そし
て頭部42から軸部41の所定位置にかけ、Niメッキが施
された外面43を備えてリードピン40の端部を形成してい
る。
Further, a fifth embodiment will be described with reference to FIG. FIG. 5 is a cross-sectional view of a main part. In FIG.
A shaft lead pin formed of an Fe alloy,
The lead pin 40 has a round bar-shaped shaft portion 41 and a head 42 at one end.
The head portion 42 is formed in a disk shape having a relatively small thickness and a diameter smaller than the connecting portion 12 and larger than the shaft portion 41. An end portion of the lead pin 40 is formed from the head portion 42 to a predetermined position of the shaft portion 41 and provided with a Ni-plated outer surface 43.

【0027】そしてリードピン40は、第3の実施例と同
様に、接続部12の上面に頭部42の端面を対向させるよう
にして、ろう材に銀ろう44を用いたろう接によって植設
されている。なお、接続部12の面と頭部42の端面との
間、及び接続部12の外周縁と頭部42の周縁の間、さらに
頭部42の周縁とメッキが施された軸部41の所定位置の間
に形成される空間には、ろう接時に溶融した銀ろう44が
流れて充填される。45は接続部12の面に対する銀ろう44
の濡れ角である。
As in the third embodiment, the lead pin 40 is implanted by brazing using a silver braze 44 as a brazing material with the end face of the head 42 facing the upper surface of the connection portion 12. I have. In addition, between the surface of the connection part 12 and the end face of the head part 42, between the outer peripheral edge of the connection part 12 and the peripheral edge of the head part 42, and further, the peripheral part of the head part 42 and the predetermined part of the plated shaft part 41 The space formed between the positions is filled with the silver solder 44 that has melted during the soldering. 45 is a silver solder 44 for the surface of the connection 12
Is the wetting angle.

【0028】上記のように構成された本実施例において
も、第3の実施例と同様な作用、効果が得られる。また
頭部42の周縁とメッキが施された軸部41の所定位置の間
に形成される空間に銀ろう44が充填されるため、リード
ピン40の端部における曲げ剛性を高くすることができ
る。
In this embodiment configured as described above, the same operations and effects as in the third embodiment can be obtained. Further, since the space formed between the periphery of the head 42 and the predetermined position of the plated shaft 41 is filled with the silver solder 44, the bending rigidity at the end of the lead pin 40 can be increased.

【0029】尚、本発明は上記の各実施例のみに限定さ
れるものではなく、軸体の材質や形状などや、端部の形
状及び溝の形状等、要旨を逸脱しない範囲内で適宜変更
して実施し得るものである。
The present invention is not limited to only the above embodiments, but may be changed as appropriate without departing from the scope of the invention, such as the material and shape of the shaft, the shape of the end and the shape of the groove. It can be implemented.

【0030】[0030]

【発明の効果】以上の説明から明らかなように、本発明
は、セラミック基板の上にろう接により固着する軸体の
端部に、ろう材の濡れ角の減少手段を備える構成とした
ことにより、基板に加わる熱応力が低減でき、基板上に
固着した軸体の脱落、基板の割れ等が発生せず、信頼性
を向上させることができる等の効果を奏する。
As is apparent from the above description, the present invention is characterized in that the end of the shaft fixed to the ceramic substrate by brazing is provided with means for reducing the wetting angle of the brazing material. Further, it is possible to reduce the thermal stress applied to the substrate, to prevent the shaft fixed to the substrate from falling off, to prevent the substrate from cracking, and to improve the reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例を示す要部断面図であ
る。
FIG. 1 is a sectional view of a main part showing a first embodiment of the present invention.

【図2】本発明の第2の実施例を示す要部断面図であ
る。
FIG. 2 is a sectional view of a main part showing a second embodiment of the present invention.

【図3】本発明の第3の実施例を示す要部断面図であ
る。
FIG. 3 is a sectional view showing a main part of a third embodiment of the present invention.

【図4】本発明の第4の実施例を示す要部断面図であ
る。
FIG. 4 is a sectional view showing a main part of a fourth embodiment of the present invention.

【図5】本発明の第5の実施例を示す要部断面図であ
る。
FIG. 5 is a sectional view showing a main part of a fifth embodiment of the present invention.

【図6】従来例を示す断面図である。FIG. 6 is a sectional view showing a conventional example.

【図7】図6における要部断面図である。FIG. 7 is a sectional view of a main part in FIG. 6;

【符号の説明】[Explanation of symbols]

11 セラミック基板 12 接続部 13 リードピン(軸体) 15 頭部(端部) 16 溝(濡れ角の減少手段) 18 銀ろう(ろう材) 19 濡れ角 11 Ceramic substrate 12 Connection part 13 Lead pin (shaft) 15 Head (end) 16 Groove (means for reducing wetting angle) 18 Silver solder (brazing material) 19 Wetting angle

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭61−96754(JP,A) 特開 昭63−116379(JP,A) 特開 昭63−91986(JP,A) 実開 昭50−43849(JP,U) (58)調査した分野(Int.Cl.7,DB名) H01L 23/12 H01L 23/50 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-96754 (JP, A) JP-A-63-116379 (JP, A) JP-A-63-91986 (JP, A) 43849 (JP, U) (58) Field surveyed (Int. Cl. 7 , DB name) H01L 23/12 H01L 23/50

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 半導体素子を配着した基板と、この基板
の面上に形成された金属膜の接続部と、この接続部の上
面に端部をろう接して固着した軸体とを有してなるもの
において、前記軸体は、軸部と、この軸部の接続側端部
に設けられた該軸部より大径の板状の頭部とを有すると
共に、前記頭部から前記軸部にかけての間の前記端部所
定位置までメッキを施し、メッキ部分と不メッキ部分と
の間にろう材に対する濡れ性に差をつけたことを特徴と
する半導体装置。
1. A substrate on which a semiconductor element is mounted, and the substrate
A connecting portion of a metal film formed on the surface of the connecting portion, and a shaft fixed to the upper surface of the connecting portion by brazing the end portion, wherein the shaft is a shaft, A plate-shaped head having a larger diameter than the shaft provided at the connection end of the portion, and the end portion between the head and the shaft.
Plating to the fixed position, plating part and non-plating part
It is characterized by the difference in wettability to brazing material between
Semiconductor device.
JP3050814A 1991-02-22 1991-02-22 Semiconductor device Expired - Fee Related JP3068224B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3050814A JP3068224B2 (en) 1991-02-22 1991-02-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3050814A JP3068224B2 (en) 1991-02-22 1991-02-22 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH04267544A JPH04267544A (en) 1992-09-24
JP3068224B2 true JP3068224B2 (en) 2000-07-24

Family

ID=12869236

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3050814A Expired - Fee Related JP3068224B2 (en) 1991-02-22 1991-02-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JP3068224B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6359332B2 (en) 2000-02-03 2002-03-19 Ngk Spark Plug Co., Ltd. Printed-wiring substrate having lead pins
KR101807236B1 (en) * 2016-12-07 2018-01-10 강동욱 Cart

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Publication number Priority date Publication date Assignee Title
JP3843514B2 (en) * 1995-12-15 2006-11-08 イビデン株式会社 Electronic component mounting substrate and method for manufacturing the same
JP2006066404A (en) * 1995-12-15 2006-03-09 Ibiden Co Ltd Board for mounting electronic component
JP4364991B2 (en) * 2000-02-03 2009-11-18 日本特殊陶業株式会社 Wiring board with lead pins
JP3550355B2 (en) 2000-04-13 2004-08-04 日本特殊陶業株式会社 Pin standing board
FR2832944B1 (en) * 2001-12-05 2004-01-16 Commissariat Energie Atomique PROCESS FOR ASSEMBLING TWO PARTS HAVING PRECISE DIMENSIONS AND APPLICATION TO BRAZING OF A LINAC RFQ ACCELERATOR
JP2004356583A (en) * 2003-05-30 2004-12-16 Ngk Spark Plug Co Ltd Wiring board made of resin with pin
JP2019060817A (en) * 2017-09-28 2019-04-18 日本特殊陶業株式会社 Wiring board for electronic component inspection device
JP7034121B2 (en) * 2019-06-04 2022-03-11 京セラ株式会社 Circuit boards and electronic devices

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5043849U (en) * 1973-08-21 1975-05-02
JPS6196754A (en) * 1984-10-17 1986-05-15 Nec Corp Substrate provided with pin
JPS6391986A (en) * 1986-10-06 1988-04-22 藤好 克聡 Manufacture of terminal and the terminal
JPH07118340B2 (en) * 1986-10-28 1995-12-18 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Connector assembly

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6359332B2 (en) 2000-02-03 2002-03-19 Ngk Spark Plug Co., Ltd. Printed-wiring substrate having lead pins
KR101807236B1 (en) * 2016-12-07 2018-01-10 강동욱 Cart

Also Published As

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