JP3067168B2 - Manufacturing method of printed wiring board - Google Patents

Manufacturing method of printed wiring board

Info

Publication number
JP3067168B2
JP3067168B2 JP2182049A JP18204990A JP3067168B2 JP 3067168 B2 JP3067168 B2 JP 3067168B2 JP 2182049 A JP2182049 A JP 2182049A JP 18204990 A JP18204990 A JP 18204990A JP 3067168 B2 JP3067168 B2 JP 3067168B2
Authority
JP
Japan
Prior art keywords
printing
wiring board
printed wiring
manufacturing
conductive pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2182049A
Other languages
Japanese (ja)
Other versions
JPH0468592A (en
Inventor
二三男 菊池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2182049A priority Critical patent/JP3067168B2/en
Publication of JPH0468592A publication Critical patent/JPH0468592A/en
Application granted granted Critical
Publication of JP3067168B2 publication Critical patent/JP3067168B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は印刷配線板の製造方法に係り、特に精度の高
いSR(ソルダーレジスト)印刷を要求される印刷配線板
の位置合わせ方法に関する。
Description: BACKGROUND OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for aligning a printed wiring board which requires highly accurate SR (solder resist) printing.

〔従来の技術〕[Conventional technology]

第4図に、従来の印刷配線板のSR印刷の概略を示す。
SR印刷合わせは製品の絵柄を目視で確認しながら行なう
が、表面実装用パッド2の非SR印刷部6,及びスルーホー
ルランド3の非SR印刷部7は、表面実装用パッド2及び
スルーホールランド3より大きく設定されている。従っ
て、SR印刷時にはこれら表面実装用パッド2及びスホー
ルランド3の正確な位置が確認できない為、SR印刷がず
れて、表面実装用パッド2及びスルーホールランド3に
SR5が掛かるいわゆるSRかぶりが発生する。
FIG. 4 shows an outline of SR printing of a conventional printed wiring board.
The SR printing alignment is performed while visually checking the pattern of the product. The non-SR printing portion 6 of the surface mounting pad 2 and the non-SR printing portion 7 of the through-hole land 3 include the surface mounting pad 2 and the through-hole land. It is set larger than 3. Therefore, during the SR printing, since the exact positions of the surface mounting pad 2 and the hole land 3 cannot be confirmed, the SR printing is shifted, and the surface mounting pad 2 and the through hole land 3
So-called SR fogging with SR5 occurs.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

前述した従来の印刷配線板のSR印刷は、製品の絵柄合
わせで行なう為、SR印刷ずれによるSRかぶりがしばしば
発生し、再印刷又は廃棄しなければならないという欠点
があった。
Since the above-described conventional SR printing of a printed wiring board is performed by matching the picture of a product, SR fogging due to SR printing misalignment often occurs, and there is a disadvantage that the printing must be reprinted or discarded.

本発明の目的は、このような欠点を解決し、SRかぶり
が発生しないようにした印刷配線板の製造方法を提供す
ることにある。
An object of the present invention is to provide a method for manufacturing a printed wiring board which solves such a drawback and prevents SR fog.

〔課題を解決するための手段〕[Means for solving the problem]

本発明の印刷配線板の製造方法の構成は、主面上に導
通パターン形成後ソルダーレジスト印刷を施す工程を備
えた印刷配線板の製造方法において、前記主表面上に同
一形状の位置合わせ用導通パターンを複数個形成する工
程と、前記位置合わせ用導通パターンにソルダーレジス
トが位置合わせ用導通パターン内の周辺領域に重なり、
かつ前記導通パターン内部に該導通パターンより小さい
相異なる大きさの非ソルダーレジスト印刷部を形成する
パターンを位置合わせする工程とを有することを特徴と
する。
The configuration of the method for manufacturing a printed wiring board according to the present invention is a method for manufacturing a printed wiring board including a step of performing a solder resist printing after forming a conductive pattern on the main surface, wherein the same shape alignment conductive pattern is formed on the main surface. A step of forming a plurality of patterns, the solder resist overlaps the peripheral region in the conductive pattern for alignment, the conductive pattern for alignment,
And a step of aligning a pattern forming a non-solder-resist print portion having a different size smaller than the conductive pattern inside the conductive pattern.

〔実施例〕〔Example〕

次に図面を参照しながら本発明を詳細に説明する。 Next, the present invention will be described in detail with reference to the drawings.

第1図は本発明の一実施例の位置合わせマークを示す
平面図、第2図(A),第2図(B)は第1図のマーク
を用いて製造する印刷配線板を示す平面図である。まず
第1図に於いて、本実施例では、4個の角型導通パター
ン1a乃至1dの非SR印刷部8a乃至8dの大きさは、これら角
型導通パターン1a乃至1dより小さく設定し、且つ非SR印
刷部8a乃至8dの大きさは、8a>8b>8c>8dのように設定
する。このように、非SR印刷部8a乃至8dが角型導通パタ
ーン1a乃至1dより小さい為、SRフィルム又はスクリーン
を合わせたとき、角型導通パターン1a乃至1dの外周部分
4a乃至4dを目視で確認できる。角型導通パターン1a乃至
1dが同一で、非SR印刷部8a乃至8dが8a>8b>8c>8dであ
るから、外周部分4a乃至4dの大きさは4a<4b<4c<4dと
なり、最初に角型導通パターン1a乃至1dに対しΔdが均
等になるように合わせ、同様に4c→4b→4aの順に合わせ
ることにより、正確な位置合わせを行なうことができ
る。このようなマークを利用して、第2図(A)に示す
ように、表面実装用パッド2,スルーホールランド3及び
導通パターン4と同時に角型導通パターン1a乃至1dもフ
ォト印刷法により形成する。
FIG. 1 is a plan view showing an alignment mark according to an embodiment of the present invention, and FIGS. 2 (A) and 2 (B) are plan views showing a printed wiring board manufactured using the mark of FIG. It is. First, in FIG. 1, in the present embodiment, the size of the non-SR printed portions 8a to 8d of the four square conductive patterns 1a to 1d is set smaller than these square conductive patterns 1a to 1d, and The sizes of the non-SR printing sections 8a to 8d are set as 8a>8b>8c> 8d. As described above, since the non-SR printed portions 8a to 8d are smaller than the square conductive patterns 1a to 1d, when the SR film or the screen is fitted, the outer peripheral portions of the square conductive patterns 1a to 1d
4a to 4d can be visually confirmed. Square conductive patterns 1a to
Since 1d is the same and the non-SR printing portions 8a to 8d are 8a>8b>8c> 8d, the sizes of the outer peripheral portions 4a to 4d are 4a <4b <4c <4d, and the square conductive patterns 1a to 1 Accurate positioning can be performed by adjusting Δd so as to be equal to 1d and similarly adjusting the order of 4c → 4b → 4a. Using such marks, as shown in FIG. 2 (A), the square-shaped conductive patterns 1a to 1d are formed simultaneously with the surface mounting pads 2, the through-hole lands 3, and the conductive patterns 4 by a photo printing method. .

次に、第2図(B)において、第2図(A)の導通パ
ターン形成後にSR印刷5を施した状態を示し、表面実装
用パッド2の非SR印刷部6,スルーホールランド3の非SR
印刷部7と同時に、角型導通パターン1a乃至1dの非SR印
刷部8a乃至8dを形成する。
Next, FIG. 2 (B) shows a state in which SR printing 5 is performed after the formation of the conduction pattern of FIG. 2 (A), and the non-SR printing portion 6 of the surface mounting pad 2 and the non-SR SR
Simultaneously with the printing section 7, the non-SR printing sections 8a to 8d of the square conductive patterns 1a to 1d are formed.

以上より、角型導通パターン1a乃至1dと、これら角型
導通パターン1a乃至1d上に設けた非SR印刷部8a乃至8dと
の組み合わせにより、より精度の高いSR印刷位置合わせ
を行なうことができる。
As described above, by combining the rectangular conductive patterns 1a to 1d and the non-SR printing portions 8a to 8d provided on the rectangular conductive patterns 1a to 1d, it is possible to perform more accurate SR printing alignment.

第3図(A),第3図(B)は本発明の他の実施例の
製造方法を説明する平面図である。
3 (A) and 3 (B) are plan views illustrating a manufacturing method according to another embodiment of the present invention.

本実施例では、まず第3図(A)に示すように、フォ
ト印刷法で4個からなる八角の角型導通パターン10a,乃
至10dを形成し、前述の角型導通パターン10a乃至10dの
上に、八角の角型導通パターン80a乃至80dをそれぞれ形
成してSR印刷合わせを行なうことにより、45゜方向の位
置合わせずれも迅速に処理できる。
In this embodiment, first, as shown in FIG. 3 (A), four octagonal square conductive patterns 10a to 10d are formed by photo printing, and are formed on the aforementioned square conductive patterns 10a to 10d. Further, by forming the octagonal square conductive patterns 80a to 80d respectively and performing SR printing alignment, misalignment in the 45 ° direction can be promptly processed.

ここで、角型導通パターン10a乃至10dの非SR印刷部80
a乃至80dの大きさは、これら角型導通パターン10a乃至1
0dより小さく設定し、且つ非SR印刷部80a乃至80dの大き
さは、80a>80b>80c>80dのように設定する。
Here, the non-SR printing portions 80 of the square conductive patterns 10a to 10d
The sizes of a to 80d are square conductive patterns 10a to 1d.
It is set smaller than 0d, and the sizes of the non-SR printing sections 80a to 80d are set as 80a>80b>80c> 80d.

第3図(B)では、第3図(A)の八角のSR位置合わ
せマークを付設した印刷配線板が示されている。本実施
例のSR合わせ方法等は、前述した実施例と同様である。
FIG. 3 (B) shows a printed wiring board provided with the octagonal SR alignment marks of FIG. 3 (A). The SR matching method and the like of this embodiment are the same as those of the above-described embodiment.

〔発明の効果〕〔The invention's effect〕

以上の説明から明らかなように、本発明によれば、印
刷配線板のSR印刷位置合わせがより精度が高く、容易
に、しかも迅速に処理することができるという効果があ
り、特に角型導通パターン4個を1ブロックとし、1ボ
ード当り複数ブロック配置することにより、極めて高精
度のSR印刷を要求される印刷配線板に対処できるという
効果がある。
As is clear from the above description, according to the present invention, there is an effect that the SR printing position of the printed wiring board can be processed with higher accuracy, easily and quickly, and in particular, the square conductive pattern By arranging four blocks as one block and arranging a plurality of blocks per board, there is an effect that it is possible to cope with a printed wiring board that requires extremely high precision SR printing.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の一実施例の印刷配線板の製造方法で使
用する位置合わせマークを示す平面図、第2図(A),
第2図(B)ないずれも第1図のマークを使用して製造
する印刷配線板の一例を示す平面図、第3図(A)は本
発明の他の実施例の位置合わせマークを示す平面図、第
3図(B)は第3図(A)のマークを使用した印刷配線
板の一例を示す平面図、第4図は従来の印刷配線板を示
す平面図である。 1a,1b,1c,1d,10a,10b,10c,10d……角型導通パターン、
2……表面実装パッド、3……スルーホールランド、4
……導通パターン、5……ソルダーレジスト、6……表
面実装用パッドの非SR印刷部、7……スルーホールラン
ドの非SR印刷部、8a,8b,8c,8d,80a,80b,80c,80d……角
型導通パターンの非SR印刷部。
FIG. 1 is a plan view showing an alignment mark used in a method of manufacturing a printed wiring board according to one embodiment of the present invention.
2 (B) is a plan view showing an example of a printed wiring board manufactured using the marks of FIG. 1, and FIG. 3 (A) shows an alignment mark of another embodiment of the present invention. FIG. 3 (B) is a plan view showing an example of a printed wiring board using the marks of FIG. 3 (A), and FIG. 4 is a plan view showing a conventional printed wiring board. 1a, 1b, 1c, 1d, 10a, 10b, 10c, 10d ... square conduction pattern,
2 ... Surface mount pad, 3 ... Through hole land, 4
... Conduction pattern, 5 ... Solder resist, 6 ... Non-SR printing part of surface mounting pad, 7 ... Non-SR printing part of through hole land, 8a, 8b, 8c, 8d, 80a, 80b, 80c, 80d: Non-SR printing part with square conduction pattern.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】主面上に導通パターン形成後ソルダーレジ
スト印刷を施す工程を備えた印刷配線板の製造方法にお
いて、前記主表面上に同一形状の位置合わせ用導通パタ
ーンを複数個形成する工程と、前記位置合わせ用導通パ
ターンにソルダーレジストが位置合わせ用導通パターン
内の周辺領域に重なり、かつ前記導通パターン内部に該
導通パターンより小さい相異なる大きさの非ソルダーレ
ジスト印刷部を形成するパターンを位置合わせする工程
とを有することを特徴とする印刷配線板の製造方法。
1. A method for manufacturing a printed wiring board comprising a step of performing solder resist printing after forming a conductive pattern on a main surface, a step of forming a plurality of alignment conductive patterns having the same shape on the main surface. The solder resist overlaps the peripheral region in the alignment conductive pattern on the alignment conductive pattern, and positions a pattern forming a non-solder resist printed portion of a different size smaller than the conductive pattern inside the conductive pattern. And a method of manufacturing a printed wiring board.
JP2182049A 1990-07-10 1990-07-10 Manufacturing method of printed wiring board Expired - Lifetime JP3067168B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2182049A JP3067168B2 (en) 1990-07-10 1990-07-10 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2182049A JP3067168B2 (en) 1990-07-10 1990-07-10 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPH0468592A JPH0468592A (en) 1992-03-04
JP3067168B2 true JP3067168B2 (en) 2000-07-17

Family

ID=16111445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2182049A Expired - Lifetime JP3067168B2 (en) 1990-07-10 1990-07-10 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP3067168B2 (en)

Also Published As

Publication number Publication date
JPH0468592A (en) 1992-03-04

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