JP2606661B2 - Manufacturing method of printed wiring board - Google Patents

Manufacturing method of printed wiring board

Info

Publication number
JP2606661B2
JP2606661B2 JP5320655A JP32065593A JP2606661B2 JP 2606661 B2 JP2606661 B2 JP 2606661B2 JP 5320655 A JP5320655 A JP 5320655A JP 32065593 A JP32065593 A JP 32065593A JP 2606661 B2 JP2606661 B2 JP 2606661B2
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
solder resist
inspection
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5320655A
Other languages
Japanese (ja)
Other versions
JPH07175227A (en
Inventor
仁則 石堂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5320655A priority Critical patent/JP2606661B2/en
Publication of JPH07175227A publication Critical patent/JPH07175227A/en
Application granted granted Critical
Publication of JP2606661B2 publication Critical patent/JP2606661B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明はプリント配線板の製造方
法に関し、特に高密度プリント配線板のソルダーレジス
トの形成方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for forming a solder resist for a high-density printed wiring board.

【0002】[0002]

【従来の技術】従来の高密度プリント配線板における写
真現像法によるソルダーレジストの形成方法では露光工
程でのマスクフィルムの合わせズレによるソルダーレジ
ストパターンの位置ズレを防止する為に、プリント配線
板の基準点(穴、パターン、特有の位置合わせマーク、
等)にマスクフィルムを合わせて位置合わせを行なう方
法の他、「特開平1−261645号公報」に記載の如
く、図3(a)のように部品実装用パッド2を形成した
絶縁基板1に感光性ソルダーレジスト4を全面塗布、指
触乾燥を行ない〔図3(b〕、次に部品実装用パッド2
をウィンドウ付きマスク10より透視して位置合わせを
行なった後〔図3(c)〕このウィンドウ付きマスク1
0の上に透過部を遮断する形状をしたブラインド用マス
ク11を重ね〔図3(d)〕露光、現像を行なうことで
先の部品実装用パッド2の間隙に位置ズレなくソルダー
レジストを形成する方法が有る〔図3(e)〕。
2. Description of the Related Art In a conventional method of forming a solder resist by a photo-developing method on a high-density printed wiring board, a standard of the printed wiring board is required to prevent a displacement of a solder resist pattern due to misalignment of a mask film in an exposure step. Points (holes, patterns, unique alignment marks,
In addition to the method of aligning the mask film with the mask substrate, the insulating substrate 1 on which the component mounting pads 2 are formed as shown in FIG. 3A as described in JP-A-1-261645. A photosensitive solder resist 4 is applied to the entire surface and touch drying is performed (FIG. 3B).
Is positioned through a mask 10 with a window (FIG. 3C).
A blind mask 11 having a shape for blocking a transmission part is superimposed on the mask 0 (FIG. 3D). Exposure and development are performed to form a solder resist in the gap between the component mounting pads 2 without displacement. There is a method (FIG. 3E).

【0003】[0003]

【発明が解決しようとする課題】従来の写真現像法によ
るソルダーレジストの形成における露光工程でのマスク
フィルムの位置合わせ方法では、プリント配線板の穴、
パターン、特有の位置合わせマークを基準としたり、前
述の如く、ウィンドウ付きマスクを介してマスクフィル
ムを視覚的に合わせるものであるが、露光工程において
はプリント配線板の全面には感光性ソルダーレジストが
塗布されており、更にこのマスクフィルムはポジタイプ
であるため黒い部分が感光性ソルダーレジストで覆われ
た位置合わせの基準点であるプリント配線板の穴、パタ
ーン、特有の位置合わせマーク或いは、ウィンドウ付き
マスクと重なり位置ズレの判別は極めて困難である。プ
リント配線板の部品実装用パッド間には、はんだ付け時
のはんだブリッヂを防止するためにソルダーレジストを
形成することが要求されるが、前述の位置ズレが生じた
場合、部品実装用パッドにソルダーレジストが付着し適
当なはんだ付けが行なえないという問題点があった。
In a conventional method of aligning a mask film in an exposure step in the formation of a solder resist by a photographic developing method, a hole in a printed wiring board,
As described above, the mask film is visually adjusted through a mask with a window, based on a pattern and a specific alignment mark. In the exposure process, a photosensitive solder resist is applied to the entire surface of the printed wiring board. Since this mask film is of a positive type, the black part is covered with a photosensitive solder resist. The holes and patterns on the printed wiring board are the reference points for alignment, a specific alignment mark, or a mask with a window. It is extremely difficult to determine the overlap position deviation. A solder resist is required to be formed between the component mounting pads on the printed wiring board to prevent solder bridges during soldering. However, if the aforementioned misalignment occurs, solder There is a problem that the resist adheres and proper soldering cannot be performed.

【0004】[0004]

【課題を解決するための手段】本発明の写真現像法を用
いてソルダーレジストを形成するプリント配線板の製造
方法は、指触乾燥後の感光性ソルダーレジストが全面塗
布されたプリント配線板に対しマスクフィルムを介して
露光を行なう際、プリント配線板の外形エリアに設けた
検査用スルーホールとこの検査用スルーホールに対応
し、且つソルダーレジストの位置ズレ公差をランド径に
加味した導通性の検査用スルーホールを有するマスクフ
ィルムとによって位置合わせ後に電気検査を行なう工程
とを含んで構成される。
SUMMARY OF THE INVENTION According to the present invention, there is provided a method of manufacturing a printed wiring board for forming a solder resist by using a photo-developing method, the method comprising the steps of: When conducting exposure through a mask film, inspection of the through-hole provided in the outer area of the printed wiring board and the conductivity corresponding to this inspection through-hole and taking into account the positional deviation of the solder resist to the land diameter Performing an electrical test after alignment with a mask film having through holes for use.

【0005】[0005]

【実施例】次に本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0006】図1は本発明の実施例のプリント配線板の
製造方法を示す縦断面図である。
FIG. 1 is a longitudinal sectional view showing a method for manufacturing a printed wiring board according to an embodiment of the present invention.

【0007】図1(a)のように絶縁基板1の所望の箇
所に部品実装用パッド2を、また外径エリア四隅の内3
箇所、或いは4箇所のそれぞれに穴径φ0.3mm,ラ
ンド径φ0.75mmの位置ズレ検査用スルーホール3
を形成する。次に感光性ソルダーレジスト4を絶縁基板
1の片面の全面に塗布し、指触乾燥を行なう〔図1
(b)〕。次に前記の位置ズレ検査用スルーホール3に
対応し、且つソルダーレジストの位置ズレ公差5,0.
1mmをランド径に加味した穴径φ0.95mm,ラン
ド径1.40mmの導通性スルーホール6を有するマス
クフィルム7を重ねて位置合わせを行なう。この時位置
ズレ検査用スルーホール3とそれに対応する導通性スル
ーホール6に接続した1.0mm×0.5mmの導通性
パッド8にプローブピン9を接触させ、電気検査による
導の有無を確認することでマスクフィルム7の合わせ位
置がソルダーレジストの位置ズレ公差5の範囲である否
かを判定する〔図1(c)〕。この電気検査は絶縁基板
の4箇所の位置ズレ検査用スルーホールとそれに対応す
る導通性スルーホールの各々について行なう方法の他、
絶縁基板の3箇所或いは4箇所の位置ズレ検査用スルー
ホールを内層接続し、同様に対応するマスクフィルムの
導通性スルーホールもパターンで接続して、1箇所の位
置ズレ検査用スルーホールとそれに対応する導通性スル
ーホールとによって電気検査を行なう方法がある。次に
露光・現像を行い所望のソルダーレジスタパターンを得
る。〔図2(d)〕。以下図1,図2の工程を絶縁基板
の反対面に対しても繰り返し行なうことで本発明の実施
例の製造方法によるプリント配線板を得る〔図2
(e)〕。
As shown in FIG. 1A, a component mounting pad 2 is provided at a desired position on an insulating substrate 1 and three of four corners of an outer diameter area.
Through hole 3 for positional deviation inspection with hole diameter φ0.3mm and land diameter φ0.75mm at each of four locations or four locations
To form Next, a photosensitive solder resist 4 is applied to the entire surface of one side of the insulating substrate 1, and touch drying is performed [FIG.
(B)]. Next, the positional deviation tolerance of the solder resist corresponds to the through-hole 3 for positional deviation inspection described above and is 5, 0.
A mask film 7 having a conductive through-hole 6 having a hole diameter of 0.95 mm and a land diameter of 1.40 mm in which 1 mm is added to the land diameter is overlapped and aligned. At this time, the probe pins 9 are brought into contact with the 1.0 mm × 0.5 mm conductive pads 8 connected to the positional deviation inspection through holes 3 and the corresponding conductive through holes 6, and the presence or absence of conduction is confirmed by electrical inspection. Thus, it is determined whether or not the alignment position of the mask film 7 is within the range of the positional deviation tolerance 5 of the solder resist [FIG. 1 (c)]. This electrical inspection is carried out for each of the four positional deviation inspection through holes and the corresponding conductive through holes on the insulating substrate.
Connect three or four through holes for displacement inspection on the insulating substrate to the inner layer, and also connect the corresponding conductive through holes of the mask film in a pattern, and connect one through hole for displacement inspection and the corresponding There is a method of performing an electrical test by using a conductive through hole. Next, exposure and development are performed to obtain a desired solder register pattern. [FIG. 2 (d)]. Hereinafter, the steps of FIGS. 1 and 2 are repeated on the opposite surface of the insulating substrate to obtain a printed wiring board according to the manufacturing method of the embodiment of the present invention [FIG.
(E)].

【0008】[0008]

【発明の効果】以上説明したように、本発明の写真現像
法を用いてソルダーレジストを形成する方法ではその露
光工程においてマスクフィルムの位置合わせを行なった
際、電気検査によってマスクフィルムの合わせズレを判
別するため部品実装用パッドへのソルダーレジストの付
着を防止することが出来る。
As described above, in the method of forming a solder resist by using the photographic developing method of the present invention, when the mask film is aligned in the exposure step, the misalignment of the mask film is determined by an electrical inspection. For discrimination, it is possible to prevent the solder resist from adhering to the component mounting pad.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例のプリント配線板の製造工程の
途中迄を示す縦断面図。
FIG. 1 is a longitudinal sectional view showing a part of a manufacturing process of a printed wiring board according to an embodiment of the present invention.

【図2】図1の続きの製造工程を示す縦断面図。FIG. 2 is a longitudinal sectional view showing a manufacturing step following FIG. 1;

【図3】従来のプリント配線板の製造工程を示す縦断面
図。
FIG. 3 is a longitudinal sectional view showing a manufacturing process of a conventional printed wiring board.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2 部品実装用パッド 3 位置ズレ検査用スルーホール 4 感光性スルーホール 7 マスクフィルム 8 導通性パッド 9 プローブピン 10 ウィンドウ付きマスク 11 ブラインド用マスク DESCRIPTION OF SYMBOLS 1 Insulating board 2 Component mounting pad 3 Through hole for positional displacement inspection 4 Photosensitive through hole 7 Mask film 8 Conductive pad 9 Probe pin 10 Window mask 11 Blind mask

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 写真現像法を用いてソルダーレジストを
形成するプリント配線板の製造方法において、指触乾燥
後の感光性ソルダーレジストが全面塗布されたプリント
配線板に対しマスクフィルムを介して露光を行なう際、
プリント配線板の外形エリアに設けた検査用スルーホー
ルとこの検査用スルーホールに対応し、且つソルダーレ
ジストの位置ズレ公差をランド径に加味した導通性の検
査用スルーホールを有するマスクフィルムとによって位
置合わせ後に電気検査を行なうことを特徴とするプリン
ト配線板の製造方法。
In a method for manufacturing a printed wiring board, wherein a solder resist is formed by using a photo-developing method, a printed wiring board coated with a photosensitive solder resist after touch drying is exposed through a mask film. When doing
Positioned by the inspection through-hole provided in the outer area of the printed wiring board and a mask film having a conductive inspection through-hole corresponding to the inspection through-hole and taking into account the positional deviation tolerance of the solder resist to the land diameter. A method for manufacturing a printed wiring board, comprising performing an electrical inspection after the alignment.
JP5320655A 1993-12-20 1993-12-20 Manufacturing method of printed wiring board Expired - Lifetime JP2606661B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5320655A JP2606661B2 (en) 1993-12-20 1993-12-20 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5320655A JP2606661B2 (en) 1993-12-20 1993-12-20 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPH07175227A JPH07175227A (en) 1995-07-14
JP2606661B2 true JP2606661B2 (en) 1997-05-07

Family

ID=18123842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5320655A Expired - Lifetime JP2606661B2 (en) 1993-12-20 1993-12-20 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP2606661B2 (en)

Also Published As

Publication number Publication date
JPH07175227A (en) 1995-07-14

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Legal Events

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A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19961224