JP3066392B2 - camera - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a camera having a function of recording photographing information on an external recording medium such as a film cartridge loaded in a camera body.

2. Description of the Related Art Conventionally, a recording medium such as a semiconductor memory is loaded into a camera body, photographic data is recorded on the recording medium, and the recorded data is read from the recording medium. It is known that it is used during development.

For example, JP-A-56-154720 discloses a film cartridge provided with a recording medium for recording photographing information such as the number of films. In this apparatus, since all information is updated and recorded for each photographing, all information is recorded regardless of the photographer's intention.
In addition, previously stored information is erased.

However, among the information, for example, information such as a comment to be arbitrarily added does not necessarily need to be recorded for all frames, and may be recorded only when the photographer desires. Further, in the above-described embodiment, since unnecessary information is also recorded, there is a limit to speeding up the photographing and recording process for each frame.

[Problems to be Solved by the Invention] The present invention has been made in view of the above-described problems, and is divided into information recorded each time shooting is completed and arbitrary information recorded only when the photographer desires. The latter can be recorded as necessary, thereby avoiding unnecessary information from being recorded, increasing the speed of the information recording process at the time of photographing, and recording the photographing information of all frames. The purpose is to provide a camera.

[Means for Solving the Problems] According to the invention of claim 1, in a camera using a recording medium capable of recording information on captured images, first information, which is information on each captured image, is added to all captured images. On the other hand, first recording means for recording on a recording medium, setting means for setting whether or not to record on the recording medium second information, which is information on each captured image and different from the first information, Second recording means for recording the second information on a recording medium when the setting for recording the information is made.

According to a second aspect of the present invention, in the camera according to the first aspect, the first recording unit records the first information every time the image capturing is completed, and the second recording unit arbitrarily stores the first information without relating to the image capturing operation. The second information is recorded at the timing described in FIG.

According to a third aspect of the present invention, in the camera according to the first aspect, the first information is camera information at the time of shooting, and the second information is information of contents set by an operator.

Then, as the predetermined information about the shooting that is recorded every time the shooting is completed, the shooting year, month, and date are set, and as the information that is arbitrarily selected and recorded, a comment, a film sensitivity, and the like are set. Good. Explaining specifically in correspondence with the embodiment, the first information is data indicating a shooting date, a trimming magnification, and a color temperature camera position (see FIG. 16). The second information is a comment, the setting means corresponds to the switch S5, and the second recording means corresponds to steps # 28 and # 29.
Corresponds to the processing of And the operation of shooting each image is
In step # 22, the process proceeds to step # 30 by turning on the switch S2 "ON" (pressing the release button) to capture an image and subsequently write the first information (# 32). When the release operation is not being performed (the switch S1 is OFF in # 14), the comment is written by turning ON the switch S5 (# 28, # 29).

[Operation] According to this configuration, normally, predetermined information about the photographing is automatically recorded every time the photographing is completed, and when the operation unit is operated by the photographer's will, in addition to the above information, arbitrary information Is recorded.

[Effects of the Invention] As described above, according to the present invention, predetermined information is recorded on an external recording medium loaded in the camera body every time shooting is completed. In addition, since any information can be recorded, it is possible to record information according to the photographer's intention, and to speed up the information recording process without recording all information unnecessarily. be able to. The above-mentioned predetermined information can be recorded for all frames.

Embodiment FIG. 1 shows a block configuration of an entire system including a camera body and a film unit according to an embodiment of the present invention.

A control microcomputer (hereinafter referred to as a CPU) 1 controls the entire camera. A colorimeter 2 that measures the light source color of the subject and a photometer 3 that measures the brightness of the subject output the measured and measured data to the CPU 1 as digital signals. The display unit 4 includes a liquid crystal display (LCD) or the like and displays various photographing information on a liquid crystal display panel on a camera body and in a finder. The lens unit 5 outputs lens information regarding shooting and autofocus to the CPU 1. The accessory 6 includes an electronic flash device, a data imprinting device, a comment input unit described later, and others. Distance measuring unit 7 is CC
The distance to the subject is measured using D or the like.

The driver unit 8 controls the aperture and shutter speed, controls the film winding and rewinding, controls the charging of each mechanism such as a shutter and a mirror, and controls the automatic operation of the lens based on the TV value and AV value calculated by the CPU 1. Perform focus control and the like. The power supply 9 is provided in the camera body and supplies power to the CPU 1 and other blocks. The film section 10 includes a film cartridge (hereinafter, referred to as a cartridge) and a film, the details of which will be described later.

 Next, switches will be described.

The switch S1 is for starting colorimetry, distance measurement and photometry, and the switch S2 is a release switch for starting exposure control. The switches S3 and S4 are used to set a trimming range described later. Each time the switch S3 is turned on, the trimming range is reduced by one stage (that is, the trimming magnification is increased), and the switch S4 is turned on. The trimming range can be increased (that is, the trimming magnification is reduced) by one step each time. The switch S5 is a switch for imprinting,
Turn ON when entering comments. The switch S6 is a mercury switch or the like, and detects the vertical, horizontal, up, and down postures of the camera, and information detected by the posture detection switch S6 is also written in an E ² PROM (described later) in the cartridge. Note that a specific example of the detection switch is described in, for example,
And JP-A-63-255611. The switch S _PAT is a detection switch that is turned on when a cartridge is loaded.

Resistor R1 and capacitor C1, and resistor R2 and capacitor C2
Are the reset terminals of CPU1 and film unit 10, respectively.
Connected to ▼ to perform power-on reset. The oscillating unit 11 outputs a system clock φ to the circuits in the cartridge of the CPU 1 and the film unit 10. In addition, the CPU 1 and each part 2,
3, 4, 5, 6, and 10 are connected by a serial data bus including a serial input line SIN, a serial output line SOUT, and a serial clock line SCK, and the CPU 1 performs serial communication of each unit.

FIG. 2 shows a block configuration of the accessory 6 of FIG.

Comment data input from the input unit 12 such as a switch matrix is temporarily stored in the resist 13. The recognizing unit 14 recognizes the input character based on the data of the dictionary unit 15. The storage unit 16 stores data relating to the character recognized by the recognition unit 14. The display control unit 17 displays the data (characters, etc.) from the register 13 on the LCD 18 while writing the comment, and also displays the character data stored in the storage unit 16. A font is set in the font section 19, and the output section 20 outputs the characters stored in the storage section 16 to the CPU 1 as comment data in the set font.
This output is output only when the imprinting switch S5 is turned on.

FIG. 3 is a schematic flowchart showing the operation of the CPU 1 in the camera body.

When power is supplied from the power supply 9, the operation of the CPU 1 starts and waits for a film cartridge to be loaded (#
1). Switch S _PAT with film cartridge loaded
Is turned on, a read signal is output to the film unit 10, and the ID (index) code ICP
Enter FILM (# 2). The entered ICP FILM is compared with the camera-side ID code (# 3). As a result, if the film cartridge is compatible (ICP FILM OK),
The camera-specific code ICP CAMERA is output to the film unit 10 (# 4). This code ICP CAMERA is collated on the cartridge side, and if it is determined that the camera is compatible with the cartridge (ICP CAMERA OK), FILM DATA such as film characteristic data or shooting information is output (details will be described later). ), CPU 1 inputs it (# 5).

Here, the # 2 ICP FILM and the # 4 ICP CAMERA will be described with reference to FIG. Each cartridge is
ICP FILM and unique ICP CA different from other cartridges
I have a MERA Ref code in memory. Now
Suppose that a cartridge is loaded and an ICP FILM code of "A" is sent to the camera body (the same applies to laboratory equipment). The camera body has all combinations of compatible ICP FILM and corresponding ICP CAMERA codes, and ICs corresponding to the "A" code from the cartridge
Send the P CAMERA code "a" to the cartridge. “A”
If the code is not on the camera body side, or if a film without a memory IC (that is, a normal film) is loaded, the camera issues a warning and allows only film loading to read and write information. Or prohibit shooting.

The cartridge is a code "a" from the camera body and the ICP CAME stored in the memory of the cartridge.
The data is compared with RA Ref (“a” in this case), and if they match, memory access is enabled and data communication (described later) is performed. If they do not match, communication of shooting information is performed in the same way as on the camera body. Ban.

Returning to the flowchart of FIG. 3, the description will be continued. # 6
Then, it is determined whether or not the input FILM DATA is OK (for example, whether or not the film is within the expiration date), and if OK, the flag ZOKF is set to 1 (# 10) and the process proceeds to # 11. On the other hand, if the cartridge loaded in # 3 does not fit (ICP FILM is OK
No), FILM DATA is not OK in # 6 (for example, out of film expiration date), or on the cartridge side,
If FILM DATA is not sent from the cartridge because it is determined that the camera is not suitable, the flag ZOKF is set to 0 (# 7), and a warning indicating that data communication is not possible is issued (# 8). Then, the film data is set to a constant value (for example, ISO 100) (# 9), and the process proceeds to # 11. Note that the photographing operation itself may be prohibited as described above.

In step # 6, the data of the number of shot frames (the contents of the film counter (see FIG. 16)) and the specified number of shot frames are input from the film cartridge. The photographer may be notified by a sound or sound display to prohibit subsequent photographing.

It is determined whether the switch S _PAT has changed from OFF to ON, that is, whether the cartridge has been newly loaded,
If the cartridge is newly loaded, an initial load is performed (# 12), and then a film counter is displayed (# 13). If the cartridge remains loaded in # 11, skip # 12 and proceed to # 13 to display the film counter.

Next, the flow shifts to # 14 in FIG. 4, and it is determined whether or not the switch S1 is ON. If switch S1 is ON, colorimeter 2
Colorimetry by sending a start signal to
Five). Next, trimming is set (# 16, the setting method will be described with reference to FIG. 6), a start signal is transmitted to the distance measuring unit 7 and the photometric unit 3, and distance measurement and photometry are performed (# 17, # 1).
8). Next, an exposure calculation is performed based on the information obtained (or set) in # 15 to # 18, and data necessary for exposure control such as a TV value and an AV value are calculated (# 19). It is displayed on the display unit 4 (# 20). Next, the vertical / horizontal information of the camera, information of accessories, and the like are set (# 21), and it is determined whether or not the release switch S2 is ON (# 22). If the switch S2 is not ON, it is determined whether or not the switch S1 is ON (# 23). If the switch S1 remains ON, the CPU 1
Release switch for a series of sequences from 15 to # 21
The process is repeatedly executed until S2 is turned on or switch S1 is turned off.

If switch S1 is OFF in # 14 or # 23, # 24
Move to Here, trimming is set, and then camera information is set as in # 21 (# 25). Next, it is determined whether or not ZOKF = 1 (# 26).
If it is 1, the process proceeds to # 14. If ZOKF = 1, it is checked whether a comment has been input as described in FIG. 2 (# 27),
If the imprint switch S5 is ON, a comment is written to the address of the previous frame in the memory in the cartridge (# 29). Thereafter, the process proceeds to # 14, and the above operation is repeated. Here, the reason why the comment is written at the address of the previous frame is that the comment is actually actually written after the end of shooting. Note that a comment may be input before shooting, or a comment may be input to an arbitrary frame.
In addition, when the comment is not input, or even when the comment is input, when the switch S5 is OFF,
Proceed directly to # 14.

On the other hand, if the switch S2 is ON in # 22, exposure control is performed based on the data obtained in # 19 (# 30). Next, it is determined whether or not ZOKF = 1 (# 31), and ZOKF = 1
In other words, if data communication is possible, each information is written into the memory in the cartridge (# 32), and the film is wound up by one frame (# 33). In # 31, if ZOKF ≠ 1,
Wind the film without writing information (# 3
3). In step # 32, data which adds one to the contents of the film counter (see FIG. 6) of the memory in the cartridge is also output. Details of how to write the information of # 32 will be described later. After the step # 33, the film counter is advanced by one frame and displayed (# 34, # 35), and the sequence proceeds to the step # 14 to repeat the above-described sequence.

Next, the trimming setting (# 16, # 24) will be described with reference to the flowchart of FIG.

First, it is determined whether or not ZOKF = 1 (# 40).
If 1, the trimming setting switch S3 or S4
It is determined whether or not it is ON (# 46). If ZOKF ≠ 1, information cannot be written, etc. If either switch S3 or S4 is ON, a warning is issued and the routine returns (# 47). If neither switch S3 or S4 is ON, a warning is issued. Does not return and returns. If ZOKF = 1 in # 40, it is determined from the FILM DADE inputted in # 5 whether trimming is prohibited or not based on the trimming information unique to the cartridge (# 4).
1). For example, if the film is a slide positive film, trimming is prohibited. If trimming is not prohibited, it is determined whether or not the trimming magnification has reached the limit value (# 42). If trimming is prohibited or the trimming magnification has reached the limit value, the process proceeds to step # 46, where the switch S3 or S4 is determined in the same manner as above, and if it is ON, a warning is issued and the process returns. The trimming prohibition and the limit value of the trimming magnification are input as FILM DATA when the film cartridge is loaded. The limitation of the limit of the trimming magnification occurs because, for example, when the ISO sensitivity of the film is higher, if the trimming magnification is increased to a predetermined value or more, the graininess of the film affects the finished photograph.

In general, a black-and-white film has better graininess than a color film, so that even if the black-and-white film has a larger trimming magnification than a color film, the image quality of a photograph does not deteriorate. Therefore, the limit value of the trimming magnification can be set to be larger in the black and white film than in the color film. Further, even for films of the same sensitivity and the same type, the graininess differs between manufacturers and the limit value of the trimming magnification also differs.

If the trimming magnification has not reached the limit value in # 42, it is determined whether or not the switch S3 or S4 is ON (# 43). If both the switches S3 and S4 are OFF, the process returns without determining that the trimming magnification has been changed or the trimming setting has been completed. If either of them is ON, change the contents of the trimming register by one step (# 4
Four). The trimming magnification is changed only when the switches S3 and S4 are changed from OFF to ON. Even if the switches S3 and S4 are kept ON by mistake, the contents of the trimming register are changed only by one step. Good. This trimming register is a register that stores the current trimming magnification. When the contents of the register are changed by one step, the print range is displayed in the viewfinder screen as shown in FIG. 7 (# 45), and the process returns to # 42.

In the above embodiment, when the trimming is prohibited or the limit is set and the switch S3 or S4 is pressed,
A warning is issued so that the trimming cannot be changed. However, if the photographer desires while performing the warning, the trimming setting may be further continued.
Thereby, the setting range of trimming can be expanded freely.

FIG. 7 shows a display mode in a finder visual field (in a screen) by a liquid crystal display device (LCD). Here, an example in which trimming can be set up to three steps is shown. The liquid crystal display has four types of frames F0, F1, F2, F according to the trimming range.
3 are provided, one of which is selectively displayed according to the contents of the trimming register. That is, in the normal shooting mode in which no trimming is performed within the viewfinder field, the frame F0 is displayed, and each time the switch S3 is turned on, each frame is displayed in the order of F0 → F1 → F2 → F3, and the switch S4 is turned on. Each time it is turned on, F3
Each frame is displayed in the order of → F2 → F1 → F0. With this display, the photographer can confirm the range to be printed.

Next, according to FIGS. 8 and 9, # 2 and # in FIG.
4 is a flowchart of the ICP FILM input and ICP CAMERA output.

First, in ICP FILM input, read mode designation data
It is set in the transmission register in the CPU 1 (# 60), and the number of received bytes, that is, the number of bytes of ICP FILM, is also set in the transmission register (# 61). Next, control of circuit operation in the cartridge and serial data input / output terminals (SIN, SOU
T) Circuit selection signal CS with control function is high
Level (# 62) to enable data input / output with the cartridge. Subsequently, the read mode designation data and the number of received bytes set in # 60 and # 61 are output to the cartridge according to the serial clock (# 63). When the output is completed, the address of the ICP FILM in the memory in the cartridge is set in the transmission register (# 64), and this is output (# 65). After processing for a predetermined time (# 66) for the cartridge side processing (described later), the ICP FILM is input according to the serial clock (# 67), and the data is transferred to the CP.
Store in the memory in U1 (# 68). Finally, the communication is terminated by setting the CS signal to the low level (# 69).

Next, in the ICP CAMERA output of FIG. 9, the write mode designation data is set in the transmission register (# 70), and the number of write bytes, that is, the number of ICP CAMERA bytes is set in the transmission register (# 71). Next, as in the case of the ICP FILM input, the CS signal is set to the high level to enable data input / output (# 72), and the write mode designation data and the number of write bytes are output to the cartridge side according to the serial clock (# 73). . When the output is completed, the address where the ICP CAMERA of the memory in the cartridge is written is set in the transmission register (# 74), and this is output (# 75). When the address output is completed, the read /
After waiting for a time for determining the write mode and determining whether the address is an ICP CAMERA address (# 751), the ICP CAMERA data is set in the transmission register (# 76), and the data is output according to the serial clock (# 75). 77). Next, after waiting a predetermined time for the cartridge to determine whether the camera is compatible with the cartridge (# 771), the CS signal is set to the low level (# 78), and the communication is terminated.

Next, referring to FIG. 10 and FIG. 11, the processing at the time of reading and writing data will be described.

First, when reading, that is, when inputting FILM DATA, the read mode designation data is set in the transmission register in the CPU 1 (# 80), and the total number of bytes of information to be read is also set in the transmission register (# 81). ). Next, the CS signal is set to the high level to enable data input / output (# 8).
2) In accordance with the serial clock, the data set in # 80 and # 81 is output to the cartridge side (# 83). When the output of the read mode designation data and the number of input bytes is completed, the head address where the data input to the memory in the cartridge is stored is set in the transmission register (# 8).
4) Output this (# 85). After waiting for the processing time in the cartridge (# 86), data corresponding to the output address is input according to the serial clock (# 87). The input data is stored in the corresponding address of the memory in the CPU 1 (# 88). Next, it is determined whether or not all data has been input (# 89). If all data has not been input yet, the process returns to # 86, and data input is performed until all data has been input. When all the data is input, the CS signal is set to the low level (# 90), and the communication is terminated.

Next, processing at the time of writing will be described. First, the write mode designation data and the total number of bytes of the write data are set in the transmission register (# 91, # 92). Next, the CS signal is set to the high level (# 93), and the data is output to the transmission register to the cartridge side in # 91 and # 92 (# 94). When the output is completed, the start address where the data in the memory in the cartridge is written is set in the transmission register (# 9).
5) Output this (# 96). When the address output is completed, after waiting for a time for determining the read / write mode on the cartridge side and whether or not the data is related to photographing (that is, other than ICP CAMERA) (# 96)
1) Set the write data in the transmission register (# 9
7) Output according to the serial clock (# 98). Next, it is determined whether or not output of all data has been completed (# 9).
9) If not finished, return to # 97 and output the next data. When the output of all data is completed, the CS signal is
Set to Low level (# 100) to end communication.

In FIG. 10 and FIG. 11, the data address is specified as the start address (sequential access).
However, before inputting / outputting data, an address from which the data is read / written may be designated at any time (random access).

The operation of the camera has been described above. Next, the configuration and operation of the first embodiment of the film cartridge will be described.

FIG. 12 shows a block configuration on the cartridge side. It has eight terminals for communication with the camera and power supply. V _DD and GND are power supply terminals. φ is a terminal for inputting a system clock φ for operating the circuit in the cartridge from the camera. ▲ ▼ indicates a microcomputer (hereinafter referred to as μCO) that controls each block in the cartridge.
This is a terminal to reset 50. When a cartridge is loaded in the camera and the camera is turned on,
The SET signal is input. CS is a terminal to which a CS signal for input / output control from the camera described above is input. SIN, SOUT, S
CK is a serial communication terminal to which signals of serial data input, serial data output, and serial clock are given, respectively, and data communication with the camera is performed by these three terminal lines.

The μCOM 50 internally has a RAM area 51 and a ROM area 52. When the CS signal from the camera becomes “H”, an interrupt (INT1) is applied, and the μCOM 50 starts data communication operation. An interface 53 controls the SIN, SOUT, and SCK signals, and controls data input / output by a signal from the μCOM 50.

Reference numeral 54 denotes a register for temporary storage. When writing data to the E ² PROM 55, the write data is temporarily stored and CS is set to “H”.
At the timing of inversion to the empty “L”, the stored data is written to the E ² PROM 55 by the signal from the μCOM 50. When data is read, the data to be read is once captured and output to the camera via the interface 53 in response to the SCK signal.

Further, the write / erase controller 56 controls writing and erasing of data in the E ² PROM 55, and the booster 57 generates a high voltage for the E ² PROM 55. The controller 56 and the booster 57
Operates according to the control signal from COM50. The μCOM 50, the interface 53, and the register 54 are connected by a data bus 58, and mutual data communication is performed through the data bus 58.

Next, the processing of μCOM50 will be described with reference to FIGS. 13, 14, and 15. When the film cartridge is loaded into the camera and the camera is turned on,
The processing of the RESET flowchart is performed. First, a normal microcomputer reset operation is performed (# 11).
0). Subsequently, the interruption of the interruption INT1 by the CS signal from the camera is enabled (# 111), and it waits until the CS signal becomes “High” (that is, the interruption INT1 is applied). When the CS signal becomes “H”, the processing shifts to the INT1 routine of FIG.

In the routine of INT1 shown in FIG. 14, the interrupt of INT1 is prohibited (# 120), and an operation code is input (# 121). Here, the operation code indicates the total number of bytes communicated with the data indicating the read mode or the write mode (see # 60, # 61, # 70, # 71, # 80, # 81, # 91, # 92). ).
Next, the head address of the data is input (# 122). Then, based on the operation code input in # 121, it is determined whether or not the data is read (# 123). If the data is read, the process proceeds to the READ routine. If the data is not read, that is, if the data is written, the process proceeds to the WRITE routine of FIG. .

In the READ routine, it is determined whether or not the input address is the address of the ICP FILM (# 124). If the input address is the address of the ICP FILM, the ICP FILM stored in the ROM 52 is output (# 125). = L (end of communication) (# 130)
The interrupt of INT1 is permitted (# 131), and the process waits for the interruption of INT1 again.

If the address is not the ICP FILM address in the above # 124, the data is related to imaging, so the data corresponding to the address is transferred from the E ² PROM 55 to the register 54 (# 126), and the data is output (# 127). Next, it is determined whether or not all data to be communicated (all requested data from the camera) has been output (# 128). If the output has not been completed, the E ² PROM 55
The address in # is incremented by one (# 129) and # 126
And the routine from # 126 to # 129 is repeated until all data has been output. When the output of all data is completed, the process proceeds to step # 130, and waits until the CS signal goes to “L”.
(# 131), and waits for the interruption INT1 again.

If it is determined in # 123 that the current mode is the write mode, the process proceeds to the WRITE routine in FIG. First, it is determined whether or not the address input in # 122 is an ICP CAMERA address (# 140). If it is the ICP CAMERA address, enter the ICP CAMERA from the camera (# 141),
Next, the unique ICP CAMERA of each film cartridge
Ref is compared with the input ICP CAMERA (# 142, #
143). As a result of comparison, if they do not match, the operation of μCOM50 is stopped. As a result, erroneous data reading,
Writing can be prohibited, and malfunctions and the like can be prevented. If they match, wait until the CS signal goes “L” (# 144),
The interrupt is permitted (# 145), and the process waits for the interrupt INT1 to be issued again.

On the other hand, the step # 140, if the address entered in # 122 is not the address of the ICP CAMERA, only the number of bytes input in # 121 from the address input in # 122 E ² P
The data in the ROM 55 is erased by the write / erase controller 56 (# 146). When the erasing is completed, the input data is temporarily stored in the register 54 (# 147), and the data is continuously stored in the register 54 until the input of all the data is completed (# 148). It is assumed that the register 54 has a capacity capable of storing all data relating to one-frame shooting. When the input of all data is completed, CS signal becomes "L" Waiting for (communication termination) of (# 149), writes the data stored in the register 54 in the E ² PROM 55 (# 0.99). Thereafter, the interrupt of INT1 is permitted (# 145), and the process waits again for the interrupt INT1.

FIG. 16 shows the relationship between the address of the E ² PROM 55 of the memory in the cartridge and the stored data.

The address indicated by the upper two bits is obtained by the lower two bits of the above-mentioned operation code. The lower addresses are represented in hexadecimal for simplification of the drawing. Each data is stored in an order in which a plurality of data are determined in correspondence with each frame from the first frame of the film, that is, in the order of photographing year, month, day, trimming magnification, and so on. The data stored after 80H is mainly data used in DP shops and laboratories, information on film characteristics, and the like. In this manner, all data is stored at a predetermined address.

Next, a second embodiment of the circuit in the film cartridge will be described with reference to FIG.

The cartridge has five terminals as connection terminals with the camera. The terminals V _DD , SCK, CS and GND are the same as in the first embodiment. The SIN / OUT terminal is one in which the serial input terminal SIN and the serial output terminal SOUT shown in FIG. 12 are integrated into one terminal, and the input and output are switched by analog switches 113 and 114.

Data input from the SIN / OUT terminal is stored, for example, one byte at a time in the shift register 100, and is latched in the operation code latch unit 103, the address latch unit 104, and the data register 105, respectively. Determined by Of the data latched by the operation code latch unit 103, read / write / erase mode designation data is input to the decoder 109, byte number data is input to the comparator 106, and address data is input to the counter 108. Then, the designated data from the decoder 109 is given to the E ² PROM 111, and the control signal
WRITE, ERASE, READ is, decoder 102 respectively, E ² PROM 11
The data is output to an erasing unit 110 for erasing the data in 1 and a read control unit 112 for reading the data.

The counter 107 counts clock pulses from the terminal AN4 of the decoder 102. Comparator 106 is counter 1
The counter value of 07 is compared with the total number of transmitted and received bytes of data, and if they match, a low-level signal COMP is output to the counter 101. Based on the address data from the counter 108, the write data from the data register 105, and the erasure data from the erasure unit 110, the erasing and writing of the data at the designated address of the E ² PROM 111 is performed.

Each part in the cartridge having the above-described configuration will be described in detail below.

FIG. 18 is a diagram showing a detailed configuration of the counter 101, the decoder 102, and the data register 105 of FIG.

In the figure, the CS signal from the camera is changed from low level to high level.
When the level changes to the igh level, the counter 115 and the counter 11
9 reset is released. Next, the serial clock SCK from the camera is input to the clock terminal CK of the counter 115, and the counter 115 counts the serial clock pulse. Binary output C1, C2, C3 from counter 115
Is input to the AND circuit 116, and the output C from the comparator 106 is
When OMP is at “High” level, a signal of High level is output from the AND circuit 116 for each byte (AN1). AND circuit 11
The output AN1 from 6 is input to the delay circuit 117,
The signal is input to one of the AND circuits 148 in the decoder 102. delay
The output delayed by a predetermined time by the circuit 117 is inverted and input to the one-shot circuit 118. The output of the one-shot circuit 118 is input to the clock terminal CK of the counter 119 and to one input of the AND circuits 120, 121, and 128 to 143.

The counter 119 counts the output from the one-shot circuit 118 and outputs a binary signal from the terminals C4, C5, C6, C7, C8 according to the count value. Outputs C4 to C8 are AND circuits 120 and 121
, And via the AND circuits 123 to 127
128-143, and further, an AND circuit 145, a NOR circuit 144
Is also entered. The other inputs of the AND circuits 123 to 127 are:
The WRITE signal from the decoder 109 is input. That is, only when writing data (WRITE = “H”), the AND circuits 123 to 1
27 is in the active state, and the outputs of the outputs C4 to C8 are input to the AND circuits 128 to 143.

Table 1 below shows the relationship between the AND circuits 120 and 121 and data writing.
It shows a relationship between outputs of AND circuits 128 to 143 and outputs C4 to C8. According to Table 1, when the outputs of the AND circuits 128 to 143 change from “L” to “H”, the data registers 10 corresponding to the respective
Data from the shift register 100 is input to the five registers AP.

The output of the NOR circuit 144 and the output of the AND circuit 145 are OR circuits.
The output of the OR circuit 146 is input to one of the OR circuits 147, and the WRITE signal is input to the other input. The output signal IN / OUT of the OR circuit 147 is
13,114 control signals. That is, when the signal IN / OUT is “H”, the analog switch 113 is turned on and the analog switch 114 is turned off, so that data from the camera is input to the shift register 100. And the signal I
When N / OUT is “L”, the analog switch 113 is turned off and the analog switch 114 is turned on, and data is output from the cartridge to the camera. And also circuit
The output AN3 of 121 is input to the set terminal of flip-flop 150.

The operation when data communication with the camera is performed in the above configuration will be described. At the beginning of data communication, the signal CS
Becomes “H”, and the counter 115 starts counting the serial clock CS. At this time, the output COMP of the comparator 106 is “H”. When the operation code from the camera is input to the shift register 100 according to the clock and the input of the operation code (1 byte) is completed, the output of the AND circuit 116 becomes “H”, and the one-shot circuit 118 outputs a pulse. Since the counter 119 has been reset until the signal CS becomes "H", the outputs C4 to C8 are all "L". Therefore, the operation code latch timing signal AN2 is output from the AND circuit 120. The data of the shift register 100 is input to the operation code latch unit 103 by the signal AN2. When the output of the one-shot circuit 118 becomes “L”, the output C4 of the counter 119 becomes “H”. Next, when the data (address data) of the second byte is input to the shift register 100, a pulse is output from the one-shot circuit 118 as in the first byte. At this time, the output of the counter 119 is C
Since only 4 is “H”, the AND circuit 121 outputs the address latch timing signal AN3. As a result, the address data of the shift register 100 is
Entered in 04.

When the operation code is latched, the decoder 109 in FIG.
Sets the output READ to “H” for reading, sets the output WRITE to “H” for writing, and sets the output ERASE to “H” for erasing. Therefore, only in the case of data writing, the data register 10
Input data is transferred to 5. When the signal CS becomes “L”, the content of the data register 105 is changed to E ² P in response to this.
The data is written to the determined address of the ROM 111.

 Reading and erasing will be described later in detail.

The signal IN / OUT always becomes "H" in the first two bytes by the NOR circuit 144, the AND circuit 145, and the OR circuits 146 and 147, and the write mode (input) is set. Then, if the WRITE signal is "H", the signal IN / OUT remains at "H", that is, remains in the write mode, and if the WRITE signal is "L", the signal I / OUT remains at "L".
N / OUT becomes “L” and the read mode (output) is set.

Next, the relationship between addressing and the number of bytes is shown in FIG.
This will be described with reference to FIG. Opcode latch timing signal
Communication byte number data of the operation code latched by AN2 is input to the comparator 106. On the other hand, the address data latched by the address latch timing signal AN3 and the address data in the previously latched operation code are input to the preset input terminal of the counter 108. At this time, since the signal AN3 is input to the set terminal of the flip-flop 150, the Q output of the flip-flop 150 is always "H" after the completion of the 2-byte communication, and the AND circuit 148 is activated. Each time one byte of communication is completed, the signal AN1 becomes “H” and the output AN4 of the AND circuit 148 becomes
Becomes “H”. The counters 107 and 108 are connected to the AND circuit 14
Count 8 outputs AN4.

On the other hand, the signal AN3 indicating that the communication of the first two bytes has been completed is also input to the delay circuit 151, and is input to the preset enable terminal PE of the counter 108 with a predetermined delay. As a result, the address latched earlier becomes E ²
Input to PROM 111. Thereafter, every time one byte of communication is completed, the counter 108 increments the address by one. During this time, the counter 107 outputs the number of transmitted / received bytes to the comparator 106, and when the first latched number of bytes (that is, the total number of transmitted / received bytes) matches the current number of bytes, sets the COMP signal to “L”. Since this signal is one input of the AND circuit 116 in FIG. 18, when communication of the required number of bytes is completed, the AND circuit 116 becomes non-conductive, and the counters 107 and 108 stop counting. The counters 107 and 108 are reset when the signal CS becomes “L”.

When data is already written in the memory area of the E ² PROM where data is to be written at the time of data writing (that is, when data is communicated), the data is written to the memory area immediately before writing the data. Erase the written data. This data erasing operation will be described below.

At the time of writing as described above, data is written by a specified number of bytes in order from a specified start address.

FIG. 19 shows a configuration of the read control unit 112 and the like, and the erasure and read control will be described below.

There are two types of erasing: erasing all stored data and erasing old data when writing new data. In the case of complete erasure, set the instruction data of all erasure in the operation code, and the ERA
The erasing unit 110 operates in response to the SE signal to erase all data in the E ² PROM 111. To erase data, change the signal CH from “H” to “L”.
Is performed at the timing of inversion. On the other hand, when writing new data, first, command data for partial erasure is set in an operation code, and the address to be written and the number of bytes of data to be written are specified. Then, when the signal CS becomes “L”, the data stored in the memory area of the specified number of bytes from the specified address is erased. Thereafter, data writing is performed as described above.

Next, read control will be described. When the address data and ICP FILM showing a read mode is entered, E ²
The ICP FILM stored in the PROM 111 is transferred to the ICP FILM read register 153. Trigger terminal PI of register 153
N is connected to AN via an AND circuit 149, a delay circuit 152, and an OR circuit.
It is connected to the output terminals of D circuits 121 and 148. The register 153 stores the transferred I / O signal a predetermined time after the output AN3 of the AND circuit 121 or the output AN4 of the AND circuit 148 becomes “H”.
Capture CP FILM one byte at a time. And register 1
When ICP FILM is input to 53, according to clock SCK, I
CP FILM is output from the SIN / OUT pin. At this time, FILM D
The output from the ATA read register 154 is always "L". The control signal IN / OUT of the analog switch 114 is
It is “L”, and the analog switch 114 is conducting.

When ICP CAMERA from the camera are written in the E ² PROM 111, the data of the ICP CAMERA Ref which is stored in advance E in ² PROM 111 and the written ICP CAMERA respective registers 15
5,156, and then the data is transferred to the comparator 157.
It is determined whether or not it matches the written ICP CAMERA. If they match, the signal ROK is set to "H" to enable data reading. This signal ROK is input to gate 158. If they do not match, the signal ROK is set to “L” to inhibit data reading. If the gate 158 is enabled, the first data is stored in the register 1 in response to the address latch timing signal AN3 as in the case of outputting the ICP FILM.
It is input to 54 and output according to clock SCK. The timing at which data is input to the register 154 by the delay circuit 152 is delayed by a predetermined time from the time when the signal AN3 becomes “H”. When the output of the first data is completed, the next data is input to the register 154 in response to the one-byte completion signal AN4. In this way, data is output until necessary data is completely output or until the signal CS becomes “L”.

The address specification at the time of reading is the same as at the time of writing. Also, at the time of writing, the counter 108
The data stored at the address specified by
3, and the output of the AND circuit 149 does not become "H" because the READ signal is "L".
Does not capture data.

20 and 21 show timing charts of the data communication described above.

FIG. 20 shows the timing at the time of normal data communication. When the signal CS becomes “H” (t0), data communication starts. Clock SCK is input, and SI / 0
An operation code (read / write and erase modes and the number of communication data bytes) is input from the terminal. As shown in the figure, the clock SCK is at the “L” level for a predetermined time after eight consecutive pulses. When the input of the operation code is completed (t1), the AN2 signal becomes “H”, whereby the operation code is latched. Next, the clock SCK
When the input is completed (t2), the AN3 signal becomes "H", whereby the address is latched by the address latch unit. When the input of the operation code and the address is completed, data communication is performed. When the operation code is latched, the mode is determined. In the read mode, data is output, and in the write mode, data is input. And in the erase mode, E ²
Data in all memory areas of the PROM or the specified memory area is erased. When the input / output of the data of one byte is completed, the counters 107 and 108 perform the above-described operation by the AN4 signal. The same applies when the data communication of the second byte is completed (t4).

As described above, data communication is performed, and when all necessary data have been exchanged, the COMP signal from the comparator 106 changes from “H” to “L”. As a result, the AN4 signal remains at the low level, and the counters 107 and 108 stop the counter operation. Then, when the signal CS becomes “L” (t6), the data communication ends. In the case of write mode, time
At t6, data is written from register 105 to E ² PROM 111.

FIG. 21 is a timing chart for communication between ICP FILM and ICP CAMERA, and the latch timing and the like are the same as in FIG. First, input the operation code. This is ICP FI
A read mode for the camera to read the LM, the number of bytes of the ICP FILM (one byte in FIG. 21, but may be a plurality of bytes) is set. After inputting the opcode, enter the ICP FILM address. When the address input is completed, the IN / OUT signal switches from Low to High, and ICP FILM is output from the cartridge to the camera according to the clock SCK. When the output of ICP FILM is completed,
The CS signal from the camera goes low and communication ends.

Next, the camera receives the ICP FILM and determines whether the cartridge is compatible. Then, if the cartridge is compatible, the camera outputs ICP CAMERA, but before that, first the oldest memory stored in the memory in the cartridge is output.
In order to erase ICP CAMERA, set the erasing mode in the operation code and output the ICP CAMERA address (1 byte in the figure). Then, when the camera finishes outputting the address of ICP CAMERA, it sets the signal CS to “L” (t7). When the signal CS goes to “L”, the I that has been stored by the
CP CAMERA is erased. When the erasure is completed, the camera outputs a new ICP CAMERA, that is, an ICP CAMERA corresponding to the ICP FILM input from the loaded cartridge.
That is, the write mode and the number of bytes of ICP CAMERA (1 byte in the figure) are set in the opcode and output, and then,
Output ICP CAMERA address. When the input of the operation code and the address is completed, the cartridge inputs the ICP CAMERA, and when the signal CS becomes “L” (t8), the IC is transferred to the E ² PROM 111.
Write P CAMERA. Cartridge is written ICP CAME
Comparing RA with ICP CAMERA Ref stored in advance
If the two match, the signal R from the comparator 157 is output to enable the reading of information (data).
OK is set to “H” (time t9). As a result, gate 158 conducts as described above, and data can be read. ICP
If CAMERA and ICP CAMERA Ref do not match, signal ROK
Remains "L", the gate 158 remains non-conductive, and data cannot be read.

As described above, the data communication between the camera and the film cartridge has been described. As shown in FIG. 16, data used in the DP store and the lab is also stored in the memory in the cartridge. Data communication is performed in the same manner as in the above embodiment.

[Brief description of the drawings]

FIG. 1 is a block diagram of an entire camera system according to an embodiment of the present invention, FIG. 2 is a block diagram of an accessory 6 in FIG. 1, and FIGS. 3 and 4 are operations of a CPU in a camera body. FIG. 5 is a view for explaining an ID code communicated between the camera side and the cartridge side, FIG. 6 is a flowchart of a trimming setting operation, and FIG. 7 is a view showing a display mode in a finder visual field. Figure 8 shows the code
FIG. 9 is a flowchart showing the operation of the ICP FILM input, FIG. 9 is a flowchart showing the operation of the code ICP CAMERA output, and FIG.
The figure is a flowchart showing the operation of the FILM DATA input.
FIG. 12 is a flowchart showing the data writing operation. FIG. 12 is a block diagram of the first embodiment on the cartridge side.
FIG. 14 is a flowchart showing the RESET operation, FIG. 14 is a flowchart showing the INT1 routine, FIG. 15 is a flowchart showing the WRITE routine, FIG. 16 is a diagram showing the relationship between addresses and data in the memory in the cartridge, and FIG. FIG. 18 is a detailed configuration diagram of the decoder 102 and the like in FIG. 17, FIG. 19 is a configuration diagram of the read control unit 112, FIG. 20 and FIG. It is a timing chart. 1 ... Control microcomputer (including recording means), 10 ... Film unit, 50 ... Microcomputer, 52 ... ROM, 55,11
1 ...... E ² PROM (storage medium), switching S5 ...... imprinted (operation means).

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Manabu Inoue 2-3-13 Azuchicho, Chuo-ku, Osaka-shi, Osaka Osaka International Building Minolta Camera Co., Ltd. (72) Inventor Reiji Seki Azuchi, Chuo-ku, Osaka-shi, Osaka Osaka International Building Minolta Camera Co., Ltd. (72) Inventor Katsuyuki Namba 2-3-3 Azuchicho, Chuo-ku, Osaka City, Osaka Prefecture JP-A-56-154720 (JP, A) JP-A-58-24136 (JP, A) JP-A-61-295776 (JP, A) JP-A-59-229542 (JP, A) JP-A-62-62342 ( JP, A) JP-A-59-162549 (JP, A) JP-A-53-8133 (JP, A) JP-A-59-228234 (JP, A) JP-A-62-209430 (JP, A) Sho 59-214023 (JP JP-A-62-198843 (JP, A) JP-A-1-510912 (JP, A) JP-A-56-167337 (JP, U) JP-A-62-164326 (JP, U) 58-40732 (JP, B2)

Claims (3)

(57) [Claims] 1. A camera using a recording medium capable of recording information relating to a photographed image (except for optically copying information into a photographed image frame), wherein first information which is information relating to each photographed image is stored. A first recording unit that records all photographed images on the recording medium, and a setting that sets whether or not second information that is different from the first information and that is related to each photographed image is recorded on the recording medium. Means for recording the second information on the recording medium when the setting of the second information is performed by the setting means.
A camera comprising: recording means. 2. The apparatus according to claim 1, wherein the first recording unit records the first information every time the image capturing is completed, and the second recording unit records the second information at an arbitrary timing without being associated with the image capturing operation. The camera according to claim 1, wherein: 3. The camera according to claim 1, wherein said first information is camera information at the time of photographing, and said second information is information of contents set by an operator.