JPH0339940A - Camera with recording and reading functions of photographing information - Google Patents

Abstract

PURPOSE:To read out and write photographing information only when a cartridge fits in a camera and to prevent malfunction and a drop in quantity by electrically carrying out signal communications between a camera main body and the film cartridge and discriminating whether the film cartridge fits in the camera or not. CONSTITUTION:The camera which exchanges data between the camera main body and the film cartridge 10 loaded to the main body and can record and read out the photographing information is provided with a recording means 1 recording the information on the film cartridge applicable the camera. Further, the camera is provided with a input means inputting the information A on the cartridge from the loaded film cartridge, and a judging means 1 which compares the input information A with stored information and judges whether the input information A is contained in the stored information or not. Thus, when the film is discriminated to be applicable, the photographing information can be read out and written, and malfunction and a drop in quantity caused by unfitness are prevented.

Description

[Detailed description of the invention] [Industrial use bone! l! F] The present invention relates to a camera having a function of recording and reading photographic information between a camera body and a loaded film cartridge.

[Prior Art] Conventionally, a recording medium such as a semiconductor memory is loaded into a camera body, and photographic data is recorded on this recording medium.
It is also known to read recorded data from a recording medium and use that data during development.

For example, if the data is trimming information, the data enables automatic printing with desired trimming.

By the way, in such a system, it is necessary to determine whether the camera body and the recording medium attached thereto are compatible, and various proposals have been made.

For example, in Japanese Patent Application Laid-Open No. 62-208029, when an IC card as a recording medium is loaded into the camera body,
There is a known device that outputs information such as the power supply voltage and frequency of the IC card to the camera body in order to determine whether the IC card is compatible with the system of the camera body. . However, the film cartridge does not also serve as a recording medium for photographic information or is not an integral part of the recording medium.

Furthermore, in Japanese Patent Application Laid-open No. 62-40440, information such as trimming is recorded on the film itself of a special cartridge, and the trimming operation is performed only when a predetermined special cartridge is loaded into the camera. It is known that the configurations of the cartridge and the cartridge loading chamber of the camera are designed to make this possible. However, the device shown in this publication only determines whether it is mechanically compatible.
It does not determine whether information can be exchanged electrically between the camera side and the cartridge side.

Furthermore, for example, JP-A-56-154720 discloses a film cartridge in which a recording medium for recording photographic information is provided; There is no disclosure of how to determine whether or not these are compatible.

[Problems to be Solved by the Invention] The present invention solves the problems that occur between the camera body and the film cartridge.
An object of the present invention is to provide a camera that accurately determines whether a film cartridge is compatible with the camera by electrically communicating signals. Furthermore, it is an object of the present invention to provide a camera that enables reading and writing of photographic information only when the camera is compatible, and prevents malfunctions and quality deterioration when the camera is not compatible.

[Means for Solving the Problems] The present invention relates to a camera that records and reads photographic information by exchanging data between a camera body and a film cartridge loaded in the body, and includes a camera that is compatible with the camera. A storage means that stores information about the film cartridge; an input means that inputs information about the cartridge from a loaded film cartridge; and the input information is compared with the stored information, and the input information is included in the stored information. and judgment means for judging whether or not.

In addition, the storage means may store information such as ID codes of all film cartridges compatible with the camera, and if the film cartridge installed in the camera body is not compatible with the camera, , data communication may be prohibited to prevent malfunctions.

[Operation] According to this configuration, the camera receives information such as an ID code unique to the film cartridge loaded into the camera body, and determines whether the information is included in the information stored in advance in the camera. is determined. Subsequent data communication becomes possible when the film cartridge is compatible with the camera.

[Effects of the Invention] As described above, according to the present invention, it is determined whether or not the film cartridge is compatible with the camera, and it is possible to read and write photographic information only after the film cartridge is determined to be compatible. It is possible to prevent malfunctions and quality deterioration that may occur due to recording and reading of information when the information is not compatible, and also to prevent photographs from being produced that are not intended by the photographer.

(Hereinafter, blank spaces) [Example] Fig. 1 shows the block configuration of the entire system consisting of a camera body and a film section according to an embodiment of the present invention.

A control microcomputer (hereinafter referred to as CPU) 1 controls the entire camera. A color embellishing section 2 that measures the light source color of the object and a photometry section 3 that measures the brightness of the object each output photometric and colorimetric data to the CPUI as digital signals. The display unit 4 includes a liquid crystal display (LCD) or the like and displays various photographic information on a liquid crystal display board on the camera body and in the viewfinder. The lens unit 5 outputs lens information regarding photography and autofocus to the CPUI. The accessories 6 include an electronic flash device, a data imprinting device, a comment input section to be described later, and others. The distance measuring section 7 measures the distance to the subject using COD or the like.

The driver unit 8 receives the TV value calculated on the CPUI,
Aperture and shutter speed control based on AV value,
A power supply 9 is provided inside the camera body, and controls the winding and rewinding of the film, the charging of various mechanisms such as shutter/window and mirror, and the autofocus control of the lens, and is connected to the CPU and other blocks. to supply power. The film section 10 is a film cartridge (hereinafter referred to as
It includes a cartridge ε) and a film, the details of which will be described later.

Next, the switches will be explained.

The switch S1 is for starting color embellishment, distance measurement, and photometry, and the switch S2 is a release switch for starting exposure control. Switch S3 and unit 4 are for setting the trimming range, which will be described later. Each time switch S3 is turned on, the trimming range is decreased by one step (that is, the trimming magnification is increased), and switch S4 is turned on. Increase the trimming range by one step each time it is turned on (in other words, reduce the trimming magnification)
I can go there. The switch S5 is a switch for imprinting, and is turned on when inputting a comment.

The switch S6 is a mercury switch or the like, and is used to adjust the camera vertically and
It detects horizontal, upward, and downward postures, and the detection information from this posture detection switch S6 is also transmitted to the E2PRO in the cartridge.
N (described later). Note that specific examples of the detection switch are described in, for example, Japanese Patent Laid-Open No. 59-17543 and Japanese Patent Laid-Open No. 63-255611. Switch 5FAT is a detection switch that is turned on when a cartridge is loaded.

The resistor R1 and capacitor C1, and the resistor R2 and capacitor C2 are connected to the CPUI and the reset terminal RES of the film section 10, respectively, and perform a power-on reset. The oscillator 11 outputs a system clock φ to the CPU 1 and the cartridge internal circuit of the film unit 10. In addition,
The above CPUUI and each part 2, 3.4.5.6.10 are serial input line SIN, serial output line 5OUT
, and a serial data bus consisting of a serial clock line SCK, and the CPU performs serial communication with each part.

FIG. 2 shows a block configuration of the accessory 6 shown in FIG. 1.

Comment data input from the input section 12 formed of a switch matrix or the like is temporarily stored in the register 13. The recognition unit 14 recognizes the input characters based on the data in the dictionary unit 15. The storage unit 16 stores data related to characters recognized by the recognition unit 14.The display control unit 17 displays data (characters, etc.) from the register 13 on the LCD 18 while writing comments, and also displays the data (characters etc.) stored in the storage unit 16. It also displays the character data. Further, a font is set in the font section 19, and the output section 2゜ is set in the storage section 1.
The characters stored in 6 are output to the CPUI as comment data in the set font. Note that this output is output only when the imprinting switch S5 is turned on.

FIG. 3 is a schematic flowchart showing the operation of the CPU within the camera body.

When power is supplied from the power supply 9, the CPU starts operating and waits for the film cartridge to be loaded (
Part 1), the film cartridge is loaded and switch S is pressed.
When 1^1 is turned ON, a read signal is output to the film unit 10, and the ID (index) code ICP FllH is input from the cartridge side (#2). If the film cartridge is compatible (ICP FILM OK), enter the camera-specific code ICP CAt4ER^ in the film section 10.
(#4). This code ICP CAMERA
is checked on the cartridge side, and if it is determined that the camera is compatible with the cartridge (ICP CAtER^
OK), film characteristic data or shooting information, etc.
Il, HDATA will be output (details will be explained later)
, cPUl does it manually (#5).

Here, #2 ICP FILM and #4 ICP CA
MERA will be explained using FIG. 5. Individual cartridges are different from other cars!・ICP F different from Ridge
It has in memory the codes Il, H and a unique ICP CAMERA Ref. Now, let's assume that Chikara-Torizuji is loaded and sends the ICP FXLH code "A" to Chikara-Merabody (the same applies to lab equipment). The camera body has all compatible ICP FILM and corresponding ICP GAMERA code combinations, including the ICP CAMERA code "a" that corresponds to the "A" code from the cartridge.
” to the cartridge. If the code “A” is not present on the camera body, or if film that does not have a memory IC (i.e. regular film) is loaded, the camera will issue a warning and stop the film loading process. Enable only information on the computer and prohibit reading and writing of information, or prohibit photography.

The cartridge has a code “a” from the camera body and an ICP stored in the memory on the cartridge side.
CAMERA Ref (a” in this case), and if they match, memory access is enabled and data communication (
If they do not match, communication of photographic information is prohibited as in the case of the camera body side described in J4.

Returning to the flowchart in FIG. 3, the explanation will be continued.

In #6, it is determined whether the input FILM DATA is OK (for example, whether the film is within the expiration date, etc.),
If OK, set F=1 to flag lO<#10)#1
Go to 1. On the other hand, if the loaded cartridge is not compatible in #3 (ICP FILM is not OK), FILM DATA is not OK in #6 (for example, the film expiration date has expired), or the cartridge is not compatible with the camera. If FIl and HDATA are not sent from the cartridge because it is determined that there is no
Set the flag 20KF=O (#7), issue a warning indicating that data communication is not possible (#8), and set the film data to a certain value (for example, 130100) (#9>, #
Move to il. Note that, as described above, the photographing operation itself may be prohibited.

In addition, in #6, input the m-shaded frame number data (contents of the film counter (see Figure 16)) and the specified shooting frame number data from the film cartridge, and if they match, this can be indicated in the picture. The photographer is notified by display and sound,
Further photography may be prohibited.

It is determined whether the switch S1^1 has changed from OFF to ON, that is, whether a new cartridge has been loaded, and if a new cartridge has been loaded, initial loading is performed (#i2> , and then displays the film counter (#13).

The cartridge was loaded at #11. #1 if up to t
Skip step 2 and proceed to #13 to display the film counter.

Next, the process moves to #14 in FIG. 4, and it is determined whether the switch S1 is ON. If switch S1 is ON,
Embellishing is performed by sending a start signal to embellishing section 2 ('#15), and then trimming is set #16
, the method of determining a will be explained in FIG. 6), distance measuring section 7
, sends a start signal to the photometer 3, performs distance measurement and photometry (#17° #18), then performs exposure calculation based on the information obtained (or set) in #15 to #18. , calculate data necessary for exposure control such as TV value, AV value, etc. #19), display the calculated values on the display unit 4 (#20>, then set camera vertical/horizontal information, accessory information, etc. #21), release switch S2 is O
Determine whether it is N or not (#22), the same switch S2 is ON
If not, please determine whether switch S1 is ON or not #2
3) If the switch S1 remains on, the CPU repeatedly executes the sequence from #15 to #21 until the release switch S2 is turned on or the switch S1 is turned off.

If the switch S1 is OFF in #14 or #23, the process moves to #24. Here, set the trimming, and then set the camera information as in #21 (
#25). Next, it is determined whether ZOKF=1 (#26), and if ZOKF≠1, the process moves to #14.

If 1OKF=1, check whether or not a comment has been input as explained in Figure 2 (#27), and press the imprint switch S.
If 5 is ON, write a comment to the address of the previous cut in the memory in the cartridge (#29>. Then, proceed to #14 and repeat the above operation. Here, write the comment to the address of the previous cut. The reason for this is that comments are generally written after the shooting has finished.You can also enter comments before shooting, or you can enter comments on any frame. Note that if no comment has been entered, or even if a comment has been entered but switch S5 is OFF, the #
Proceed to step 14.

On the other hand, if switch S2 is ON in #22, exposure control is performed based on the data obtained in #19 (#30)
, then determine whether ZOKF=1 or not #3
1) If 10KF = 1, that is, if data communication is possible, write each information to the memory in the cartridge (#32) and wind the film one frame (#33)
, #31, if 20KF≠1, the film is wound without writing information (#33). In addition, #3
In step 2, data that increments the contents of the film counter (see FIG. 6) in the cartridge internal memory by 1 is output. Details of how to write information in #32 will be described later. After #33, the film counter is advanced by one frame and displayed (#34, #35), and the process moves to #14, where the above-described sequence is repeated.

Next, the above trimming settings (#16 and #24) will be explained with reference to the flowchart of FIG.

First, it is necessary to determine whether or not F=1 in ZO (#40), 1
If 0KF≠1, it is determined whether the trimming setting switch S3 or S4 is ON (#46).

If F≠1 in zO, information cannot be written, so
Switch 33. If either S4 is ON, a warning is issued and the process returns #47>; if neither switch 33 or 34 is ON, a warning is not issued and the process returns.

#40'''c20KF=1, it is determined whether or not trimming is prohibited based on the cartridge-specific trimming information in the FILM DAT input in #5 above (#4
1) For example, if the film is a positive slide film, trimming is prohibited. If trimming is not prohibited, determine whether the trimming magnification has reached the limit value (#42>; if trimming is prohibited or the trimming magnification has reached the limit value, proceed to #46 and do the same as before. Switch S3 or S4 is determined and if it is ON, a warning is issued and the process returns.The above-mentioned trimming prohibition and trimming magnification limit values are input as FILM OAT^ when the film cartridge is loaded.Trimming magnification This restriction arises because, for example, the higher the ISO sensitivity of the film, the more the graininess of the film will affect the quality of the photograph if the cropping magnification is increased beyond a predetermined value.

Also, in general, black and white film has better graininess than color film, so even if black and white film has a higher cropping ratio than color film, the image quality of the photograph will not deteriorate. You can also set a large limit value for the trimming magnification.

Further, even if the film has the same sensitivity and type, the graininess differs between manufacturers, and the limit value of the trimming magnification also differs.

If the trimming magnification has not yet reached the limit value in #42, it is determined whether the switch S3 or S4 is ON (#43). If both the switch/edge S3 and S4 are OFF, the trimming magnification is not changed or the trimming setting is completed and the process returns. If either of them is ON, the contents of the trimming register are changed by one step (#44).In addition, the trimming magnification is changed only when switches S3 and S4 change from OFF to ON. ．． ONL S4
Even if the process continues, the contents of the trimming register may change by only one step. This trimming l/desta is a register that stores the current trimming magnification. When the contents of the register are changed by one level, the print range is displayed on the finder screen as shown in FIG. 7 (#45), and the process returns to #42.
Furthermore, if switch S3 or S4 is pressed,
Although a warning is given to prevent the photographer from changing the trimming settings, if the photographer so desires, the photographer may be able to continue making further trimming settings while giving the warning.

This allows you to freely expand the trimming setting range.

FIG. 7 shows a display mode within the field of view of the finder (inside the screen) by a liquid crystal display (LCD). Here, a device in which L-rimming can be set up to three steps is shown. The liquid crystal display device has four types of frames FO depending on the trimming range.
, F1. F2. F3 is provided, and one of them is selectively displayed depending on the contents of the trimming/register. That is, within the viewfinder field of view, in the normal shooting mode without trimming, frame FO is displayed, and each time switch S3 is turned on, each frame is displayed in the order of FO-Fi-Keto2→F3, and when switch S4 Every time is turned on, F3-→
Each frame is displayed in the order of F2→F1→FO. This display allows the photographer to confirm the area to be printed.

Next, according to FIGS. 8 and 9, #2 and #4 in FIG.
A flowchart of ICP FIl, H input and ICP CAHER^ output will be explained.

First, for the ICP FILM input, set the read mode designation data to the transmit register in the CPUI (#60)
, the number of received bytes, that is, the buy 1-defeat of ICP FILM, is also set in the transmission register (#61).

Next, the circuit selection signal C8, which has the function of controlling circuit operations within the cartridge and controlling the serial data input/output terminal (IN, 5O1JT), is set to high level (#62), and data input/output with the cartridge is performed. enable. Next, the read mode designation data and the number of received bytes set in steps #60 and #61 are output to the cartridge side in accordance with the serial clock (#63). When the output is completed, the ICP F of the memory in the cartridge is
Set the ILH address in the transmit register #64)
, output this (#65), and wait for a predetermined time for processing on the cartridge side (described later) (#66).
), input ICP FTLH according to the serial clock #67), store the data in the memory in the CPUI (#68), and finally, set the C8 signal to low.
By setting the level (#69), communication ends.

Next, in the ICP CAHEIIA output shown in Figure 9, write mode designation data should be set in the transmit register #70.
), also set the number of write bytes, that is, the number of bytes of ICP CAMERA, in the transmission register (#71),
Next, as with the ICP FIIM input, the C3 signal is set to High level to enable data input/output.
72), the write mode designation data and the number of write bytes are output to the cartridge music according to the serial clock (#73). When the output is completed, set the address where ICP CAMERA in the cartridge internal memory is written in the transmission register (#74), and output this (#75).
), when the address output is completed, the cartridge side waits for a time to determine the read/write mode and determine whether the address is for ICP CA14ER^ or not.
#751), set the data of ICP CAMERA in the transmission register #76), and output the data according to the serial clock (#77). Next, after waiting a predetermined time for the cartridge to determine whether or not the camera is compatible with the cartridge (#7711, the C8 signal is set to the LOW level (#78), and communication is terminated.

Next, processing at the time of reading and writing data will be explained with reference to FIGS. 10 and 11.

First, when reading, that is, when inputting FILM 1) ATA, set the read mode designation data to the transmission register in the CPUI (#80), and also set the total number of bytes of information you want to read to the transmission register (#80). 81
), then the CS signal is set to High level to enable data input/output #82), and according to the serial clock #80. The data set in #81 is output to the cartridge side (#83). When the output of the read mode designation data and the number of input bytes is completed, set the start address where the input data of the memory in the cartridge is stored in the transmission register (#84) = Output this (#85), Wait for processing time (#8
6), Input the data corresponding to the output address according to the serial clock (#87), The input data is stored in the corresponding address of the memory in the CPUI (#88) 6) Next, all data is input If all data has not been input yet, return to #86 and continue inputting data until all data has been input. When all data has been input, set the CS signal to Low.
level (#90) and end the communication.

Next, the processing at the time of writing will be explained. First, write mode specification data and the total number of bytes of write data are set in the transmission register (#91, #92).
Set the signal to High level (#93), #91. #9
In step 2, the data is output to the transmission register to the cartridge side (#94).

When the output is completed, set the start address where the data in the cartridge memory will be written to the transmission register #9
5), output this (#96).

When the address output is completed, data related to read/write mode determination and shooting on the cartridge side (i.e.
After waiting for a period of time to determine whether the data is in the ICP (other than CA14ERA) (#9611 write data is set in the transmission register (#97) and output according to the serial clock (#98).

Next, determine whether all data has been output.#
99), if it has not finished, return to #97 and output the next data. When all data has been output, C8
The signal is set to Low level (#100) and communication is terminated.

Note that in Figures 10 and 11, the data address is specified as the first address (sequential access).
However, before data is input/output, the address from which the data is read/written may be designated at any time (random access).

The operation of the camera song has been explained above, and now the structure and operation of the first embodiment of the film cartridge opening will be explained.

FIG. 12 shows the block configuration of the cartridge. It has eight terminals for communication with the camera and for power supply. Voo and GND are power supply terminals. φ is a terminal for inputting a system clock φ for operating the circuit inside the cartridge from the camera.

RESET is a terminal for resetting a microcomputer (hereinafter referred to as μCOM) 50 that controls each block in the cartridge, and a RESBT signal is input when the cartridge is loaded into the camera and the camera is powered on. For cs, the cs@ number for input/output control from the camera mentioned above is input 11JjJ6. SIN, 5OUT
, SCK are terminals for serial communication, and serial data input, serial data output, and serial clock signals are applied to them, respectively, and data communication with the camera is performed through lines of these three terminals.

μC0M50 has internal RAM area 51 and ROMa area 52.
The CS signal from the camera is
'', an interrupt (INTl) is generated and the μC0M50
starts data communication operation. 53 is SIN, 5OU
An interface that controls the T and SCK signals, μ
Data input/output is controlled by signals from C0M50.

54 is a register for temporary storage, and E2PROH55
When writing data to , the written data is memorized once,
At the timing when C8 flips to MHH empty “L”, μC
This stored data is transferred to E2 by the signal from 0M50.
Write to PROM55. Furthermore, when reading data, the data that is successively output is once captured and output to the camera via the interface 53 in response to the SCK signal.

Further, the write/erase control section 56 controls data writing and data erasing to the E2PROH55, and the boost section 57 controls the E2PROH55.
Generates high voltage for 2PROH55.

These control section 56 and boosting section 57 operate according to control signals from μC0M50. Further, the μC0M50, the interface 53, and the register 54 are connected by a data bus 58, and mutual data communication is performed via this data bus 5.
It is carried out through 8.

Next, the processing of μC0M50 will be explained using FIG. M13, FIG. 14, and FIG. 15. When a film cartridge is loaded into the camera and the camera is turned on, the 13th
The process of the RESET flowchart shown in the figure is performed. First, a normal microcomputer reset operation is performed (#110). Next, enable the interrupt INTff by the C8 signal from the camera #111)
, the cs flaw signal becomes “High” (that is, the interrupt lN
When the C8 signal becomes "H", the process shifts to the lNTl routine shown in FIG. 14.

In the lNTl routine shown in FIG. 14, interrupts of lNTl are disabled (#120), and an operation code is input (#121), where the opcode is communicated with data indicating continuous output mode or write mode. This shows the total number of bytes (#60#61.#70.#71.
#80. #81. (See #91, #92) Next, input the start address of the data (#122), and
The operation code input in #121 determines whether data is to be read or not (#123), and in the case of read, R, EAD
If the routine is not a read, that is, a data write, the routine moves to the WRITE routine shown in FIG.

In the READ routine, the input atl/s is
124), IC
P FJLH No. 7 If there is a trace, output the ICP FIL14 stored in the ROM52 #125)
, wait for C3=-L (end of communication) (#130),
Enable the INT1 interrupt (#131) and wait for the interrupt INT1 to occur again.

If it is not the address of ICP FILM in #124 above, the data is for photographing, so move the data corresponding to the address from the E" PROH 55 to the register 54 (#126) and output the data (#127 >
.

Next, it is determined whether all data to be communicated (all data requested from the camera) has been output (#128),
If the output is not completed, the address in the E2PROH55 is incremented by one (129).

Return to #12G and #126 until all data has been output
Repeat the routine from to #129. When the output of all data is completed, the process moves to #130, waits for the C3 signal to become L'', and enables the lNTl interrupt (#131
), waits for the interrupt lNTl to occur again.

If it is determined that the write mode is in step #123, the process moves to the WRITE routine shown in FIG. first,
The address entered in #122 above is ICP CAM
Determine whether it is an ERA address ($140), I
If it is a CP CAMERA address, enter the ICP CAMERA from camera 4 (#141), then the unique ICP CAMERA of each film cartridge.
Compare RA Ref and input ICP CAMERA (#142. #143>. As a result of the comparison, if they do not match, the operation of μC0M50 is stopped. This prevents erroneous data reading and writing. This can prevent malfunctions, etc. If they match, C
' S Wait for the @ number to become "1,"(#144)
, enable interrupts <#145), and then interrupt lNT again.
Wait for i to be called.

- On the other hand, in #140 above, if the address input in #122 is not the address of ICP CAMERA, write E2PROH55 data by the number of bytes input in #121 from the address input in #122.
The data is erased by the erasure control unit 56 (#146), and when the erasure is completed, the input data is temporarily stored in the register 54 (#147), and the data continues to be stored in the register 54 until the input of all data is completed. (#1
48) It is assumed that the register 54 has a capacity to store all data related to one-frame photography. When input of all data is completed, wait until the C8 signal becomes "L" (completion of communication) (#149), and write the data stored in the register 54 to the E2PROM 55 (#15).
0), then enable INT1 interrupts (#14
5) Wait for the interrupt lNTl to be applied again.

FIG. 16 shows the relationship between the address of the E2PROH 55 in the cartridge internal memory and the stored data.

The address indicated by the upper two bits is obtained from the lower two bits of the aforementioned operation code. Furthermore, the lower addresses are expressed in hexadecimal to simplify the diagram. Each piece of data is stored in the order in which a plurality of pieces of data are determined for each frame, starting from the first frame of the film, that is, in the order of shooting year, month, day, trimming magnification, and so on. Further, the data stored after 80H is mainly data used in the DP store and laboratory, information regarding film characteristics, etc. In this way, all data is stored at predetermined addresses.

Next, a second embodiment of the film cartridge internal circuit will be described with reference to FIG.

The cartridge has five terminals for connection with the camera. Terminal V. ,,SCK,O3゜GND is the first
This is the same as the embodiment. The 5IN10υ terminal is connected to the serial input terminal SIN and serial output terminal 5 shown in Figure 12.
Analog switch 1 with OUT as one terminal.
13 and 114 switch input and output.

The data input from the SIN10UT terminal is stored in the shift register 100, for example, one byte at a time, and is latched in the operation code latch section 103, address latch section 104, and data register 105, respectively, and the latching timing is determined by the counter 101 and the decoder 102. It can be decided. Of the data latched by the operation code latch unit 103, read/write/erase mode designation data is input to the decoder 109, byte number data to the comparator 106, and address data to the counter 108. Then, the designated data from the decoder 109 is E2
PROH111, and the control signal WRIT
E, ERASE, and READ are each decoder 102
, an erasing unit 110 for erasing data in the E2PROH 111, and a read control unit 1 for reading data.
12 is output.

Counter 107 counts clock pulses from terminal AN4 of decoder 102. The comparator 106 compares the counter value of the counter 107 with the total number of transmitted and received data bytes, and if they match, outputs a low level signal C00P to the counter 101. Based on the address data from the counter 108, the write data from the data register 105, and the erase data from the eraser 110, the E2P
Data at the designated address of the ROH 111 is erased and written.

A detailed explanation of each part within the cartridge having the above configuration will be given below.

Figure 18 shows the counter 101 and decoder 102 in Figure 17.
2 is a diagram showing a detailed configuration of a data register 105. FIG.

In the same figure, when the cs signal from the camera changes from the Low level to the H1gh level, the reset of the counter 115 and the counter 119 is canceled.
The counter 115 counts serial clock pulses. The binary outputs C1, C2, and C3 from the counter 115 are output from the AND circuit 116.
and when the output C0HP from the comparator 106 is at the "High" level, the AND circuit 116 outputs an H
A high level signal is output for each byte (ANI
). The output ANI from the AND circuit 116 is
A in the decoder 102 as well as being input to the circuit 117
It is input to one side of the ND circuit 148. delay circuit 1
The output delayed by a predetermined time by 17 is inverted and input to one-shot circuit 118 . The output of the one-shot circuit 118 is input to the clock terminal CK of the counter 119, and is also input to the AND circuits 120, 121, 128 to 143.
It is inputted by one person.

The counter 119 counts the output from the one-shot circuit 118, and depending on the count value, the output from the terminals C4, C5, C
A binary signal is output from 6, C7, and C8.

108 to output 04 is input to AND circuits 120 and 121, and A N via AND circuits 123 to 127.
The signal is input manually to D circuits 128 to 143, and is further input to an AND circuit 145 and a NOR circuit 144. The WRITE signal from the decoder 109 is input to the other inputs of the AND circuits 123 to 127. In other words, only when writing data (WRITE="H"), the AND circuit 12
3 to 127 become active, and AND circuits 128 to 14
3, the outputs of outputs C4 to C8 are input.

Clothes 1 to be described later are outputs of AND circuits 120 and 121 and AND circuits 128 to 143 during data writing, and output 04.
From Table 1, which shows the relationship between C8 and ε, the outputs of the AND circuits 128 to 143 change from "L" to "H", the register 10 of the data register 105 corresponding to each
0, data from register 100 is input to shift 1.

Further, the output of the NOR circuit 144 and the output of the AND circuit 145 are input to the OR circuit 14G, the output of the OR circuit 14G is input to one side of the OR circuit 147, and the WRITEfA signal is input to the other input. The output signal lN10ilT of the OR circuit 147 is output from the analog switch 113.1.
14 control signals. That is, the signal lN10UT
When is "H", the analog switch 11 is conductive and the analog switch 114 is non-conductive, and the data from the camera measurement is input to the shift register 100. When the signal lN10UT is "L", the analog switch 113 becomes non-conductive and the analog switch y+L1
4 becomes conductive, and data is output from the cartridge to the camera. Further, the output AN3 of the AND circuit 121 is input to the set terminal of the flip 1+7 flip 150.

In the above configuration, the operation when communicating data with the camera will be explained. Data exchange (at the beginning of A, signal C
8 becomes “H” and counter 119 serial clock C
Start counting 8. At this time, the output C0HP of the comparator 106 is "H". The operation code from the camera is input to the shift register 100 according to the clock, and when the input of the operation code (1 byte) is completed,
The output of the AND circuit 116 becomes H", and a pulse is output from the one-shot circuit 118. The counter 119
Since it was reset until the signal C8 became "H",
The outputs C4 to C8 are all "I-". Therefore, AND circuit 120 outputs opcode latch timing signal AN2. This signal AN2 causes the data in the shift register 100 to be input to the operation code latch section 103. One-shot circuit] When the output of -18 becomes L", the output C4 of counter 119 becomes H". Next 2
When byte l-th data (address data) is input to the shift register 100, a pulse is output from the one-shot circuit 118, similarly to the first byte. At this time, the output of the counter 119 is that only C4 is pato ('', so
The AND circuit IM 121 outputs an address latch timing signal AN3. This allows shift register 1
Address data of 00 is input to the AT1/slatch section 104.

When the opcode is latched, the decoder 10 of FIG.
9 sets the output READ to 'H' in the case of reading, sets the output WRITE to 'H' in the case of writing, and sets the outputs ER and ASE to 'H' in the case of erasing, therefore, in the case of data writing. Input data is transferred to the data register 105 according to the timing signals of the AND circuits 128 to 143. Then, when the signal C8 becomes 'L', the contents of the data register 105 are changed to E2PROH1.
It is written to 11 predetermined addresses.

The case of reading and erasing will be explained in detail later.

Also, the first two bytes are always the signal lN1 by the NOR circuit 144, AND circuit 145, and OR circuits 146 and 147.
0UT becomes “H” and enters write mode (input).
Then, if the WR and ITE signals are "T ("), No. 13 I N / 011 T remains "I", that is, the write mode remains, and the WRITE signal becomes "L".
”, the signal lN10UT becomes L′” and the read mode (output) is entered.

Next, the relationship between addressing and the number of bytes will be explained with reference to FIGS. 17 and 18. Among the operation codes latched by the operation code latch timing signal AN2, communication byte number data is input to the comparator 106. On the other hand, the address data latched by the address latch timing signal AN3 and the address data in the previously latched operation code are input to the preset input terminal of the counter 108. At this time, the signal AN3 is input to the set terminal of the flip-flop 150, so after the communication of 2 bytes is completed, the signal AN3 is always input to the set terminal of the flip-flop 150.
The Q output becomes "H", and the AND circuit 148 becomes active. Every time one byte of communication is completed, the signal ANI changes to N.
HH, and the output AN4 of the AND circuit 148 becomes H'', and the counters 107 and 108 count the output AN4 of the AND circuit 148.

On the other hand, the signal AN3 indicating that the communication of the first two bytes has been completed is also input to the day lay circuit 151, and is input to the preset enable terminal PF of the counter 108 after a predetermined time delay. As a result, the address latched earlier is input to the E2PROH 111. After this, each time one byte of communication is completed, the counter 108
increments the address by 1, during this time,
The counter 107 calculates the number of bytes sent and received by the comparator 106.
When the first number of bytes latched (that is, the total number of bytes transmitted and received) matches the current number of bytes, the COHPm signal is set to "L", and this signal is output to 1 of the AND circuit 116 in FIG. Since this is done manually, when the required number of bytes of communication is completed, the AND circuit 116 becomes non-conductive and the counters 107 and 108 stop counting.In addition, the signal C8 of the counters 107 and 108 becomes "L".
It will be reset when

Note that when writing data, if data has already been written in the memory area to which E2PRON data should be written (that is, when exchanging data), write to that memory area immediately before writing the data. Erase the stored data. This data erasing operation will be explained below.

When writing as described above, data is written by the specified number of bytes in order from the specified start address.

FIG. 19 shows the configuration of the readout control unit 112, etc., and below,
Erase and read control will be explained.

For erasing, there are cases where all stored data is erased,
There are two ways to erase old data when writing new data. When erasing all data, set command data for all erasing in the operation code, and the ER from decoder 109
The erasing unit 110 is activated by the ASE signal and E2PROH1
Delete all data in 11. To erase data, signal C
3 is inverted from "H" to "L". On the other hand, when writing new data, first set partial erasure command data in an operation code, and specify the address to write and the number of bytes of data to write. Then, when the signal C8 becomes "L", the data stored in the memory area of the designated number of bytes starting from the designated address is erased. Thereafter, data is written as described above.

Next, read control will be explained. When the data indicating the read mode and the ICP FILH address are input, the ICP FI stored in the E2PROH111
IH is transferred to ICP FILM read register 153.

The AND circuit 1 is connected to the trigger terminal PIN of the register 153.
49, a delay circuit 152, and an OR circuit to the output terminals of AND circuits 121 and 148. and,
The register 153 takes in the transferred ICP FILM one byte at a time after a predetermined period of time after the output AN3 of the AND circuit 121 or the output AN4 of the AND circuit 148 becomes H''.
When IIN is input, IC
P FILM is output from the 31)410υ1 terminal.

At this time, the output from the FTLHDATA read register 154 is always "L", and the control signal lN10IIT of the analog switch 114 is "L", so that the analog switch 114 is in a conductive state.

ICP CAMERA from camera is E2PROH11
When written to 1, the written ICP C:Al4ER
AεICP stored in the E2PROH111 in advance
CAMERA Ref data to each register 1
55 and 156, and the comparator 157 determines whether the data matches the written ICP CAMERA. If they match, the signal ROK is set to "■(" to enable data reading. This signal ROK is input to the gate 158. If they do not match, to prohibit data reading, Set the signal ROK to “L”
”

If gate 158 is enabled, ICP FILH
Similarly to when outputting , the first data is input to the register 154 in response to the address latch timing signal AN3, and is output in accordance with the clock SCK.

Note that the timing at which data is input to the register 154 by the delay circuit 152 is 1, and the signal AN3 is “H”.
” will be delayed by a predetermined period of time.

When the output of the first data is completed, the next data is input to the register 154 in response to the 1-byte completion signal AN4. In this way, data is outputted until the necessary data is outputted or until the signal C8 becomes "I,".

Note that the address specification during continuous output is the same as when writing. Also, even when writing, the counter 108
The data stored at the address specified by is in register 1.
53.154, but F (EAD signal is “L”)
Therefore, the output of the AND circuit 149 does not become "H" and the registers 153 and 154 do not take in data.

FIGS. 20 and 21 show timing charts of the data communication described above.

FIG. 20 shows the timing during normal data communication. When the signal C3 becomes "H" (tO), data communication starts. A clock SCK is input, and an operation code (read/write and erase mode and number of bytes of communication data) is input from the 8110@ child accordingly.

As shown in the figure, the clock SCK remains at the "I-" level for a predetermined period of time after eight consecutive Q pulses.

When the operation code input is completed (tl>, the AN2 signal becomes "11", and the operation code is latched. Next, the data address is input according to the clock SCK, and the input is completed (tl>). AN3 signal is 'H'
”, and this causes the address to be latched to the address latch. When the input of the opcode and address is completed, data communication is performed. When the opcode is latched, the mode is determined, and if it is the read mode In the write mode, data is output, and in the erase mode, data is erased from all memory areas or the specified memory area of the E2PRIM.One byte worth of data is erased. When data input/output is completed,
When the data communication of the second byte is completed (t4
) is also similar.

Data communication is performed as described above, and when all necessary data has been communicated, C00 from the comparator 106
The P signal changes from "H" to L. As a result, the AN4 signal remains at the Low level, and the counter 107.1
08 stops the counter operation. Then, the signal C8 is “
When it becomes low (t6), data communication ends.In addition, in the write mode, register 1 is set at time 70.
Data is written from 05 to E2PROH111.

Figure 21 shows ICP FILM and ICP CAMERA
This is a timing chart for communication, and the latch timing etc. are the same as in FIG. 20. First, enter the opcode. This is the read mode for the camera to read ICP FIl,H, and the number of bytes of ICP FTIH (second
In Figure 1, it is 1 byte, but it may be multiple bytes). When inputting the operation code is completed, input the address of the ICP FILM. When the address input is completed, the lN10UT signal switches from Low to High, and the ICP is activated according to the clock SCK.
FILH is output from the cartridge to the camera 1, I
CP FIL) When the output of 4 is completed, the camera or 9 C
8 signal goes low and communication ends.

Next, the camera picks up the JCP FILM and the cart.
Determine whether the ridges are compatible. And if the cartridge is compatible, the camera is ICP CA14El
'(A is output, but before that, in order to erase the old ICP CAl4ER^ stored in the memory in the cartridge, the operation code is set to erase mode, and the ICP
Outputs the address (1 byte in the figure) to C^HER.

Then, when the camera finishes outputting the address of ICP CAMERA, it sets the signal C8 to "L" (t7).

When the signal C3 becomes "L", the eraser 110 erases the previously stored ICP CAMERA. Once the erasure is complete, the camera will be transferred to the new ICP CAMERA
That is, the ICP input from the loaded cartridge
Outputs ICP CAHERA corresponding to FILM.

i.e. write mode and ICP CAHE in opcode
Set and output the number of bytes of RA (1 byte in the figure), and then output the address of 10PCAMERA. When the cartridge completes the input of the operation code and address, it inputs ICP CAHERA and the signal CS becomes “
i-"(t8>, ICP to E2PROH111
Write CAHERA. Cartridge is written with I
CP CAMERA and ICP CAM stored in advance
ERA Ref is compared with the comparator 157, and if they match, the signal ROK from the comparator 157 is set to "H" in order to enable reading of information (data) (time t9>, which causes the above-mentioned As shown above, the gate 158 becomes conductive and data can be read.
If CAHERA and ICP CAHERA Ref do not match, signal ROK remains L'' and gate 1
58 remains non-conductive, making data reading impossible.

The data exchange between the camera and the film cartridge has been explained above, but as shown in Figure 16, the memory inside the cartridge also stores data used at the DP store and the laboratory, and the data exchange with the equipment at the DP store and the laboratory is also stored. Data communication is also performed in the same manner as in the above embodiment.

(Hereafter, margin) Table 1

[Brief explanation of drawings]

FIG. 1 is a block diagram of the entire system of a camera according to an embodiment of the present invention, FIG. 2 is a block diagram of the accessory 6 shown in FIG. 1, and FIGS. 3 and 4 are CPUs in the camera body.
FIG. 5 is a flowchart showing the operation of FIG. 5 is a diagram explaining the ID code communicated between the camera side and the cartridge side. FIG. 6 is a flowchart of the trimming setting operation.
The figure shows the display mode in the viewfinder field of view, Figure 8 is a flowchart showing the operation of code ICP FILM input, Figure 9 is a flowchart showing the operation of code ICP CAHER^ output, and Figure 10 is the operation of FILM DATA input. 11 is a flowchart showing the data writing operation, FIG. 12 is a block diagram of the first embodiment of the cartridge song, and FIG. 13 is the RESE
FIG. 14 is a flowchart showing the NTl routine, FIG. 15 is a flowchart showing the WRITE routine, FIG. 16 is a diagram showing the relationship between addresses and data in the cartridge internal memory, and FIG. 17 is a flowchart showing the cartridge opening process. FIG. 18 is a detailed configuration diagram of the decoder 102 etc. in FIG. 17, FIG. 19 is a configuration diagram of the readout control unit 112, and FIGS. 20 and 21 are data communication timings. It is a chart. 1... Control microcomputer (including determination means and storage means) 1
0... Film section, 50... Microcomputer (μCOM), 52... ROM.

Claims (2)

[Claims] (1) In a camera that records and reads photographic information by exchanging data between the camera body and a film cartridge loaded in the camera body, a storage means that stores information about film cartridges that are compatible with the camera. an input means for inputting information about the cartridge from a loaded film cartridge; and a determination means for comparing the input information with the stored information and determining whether the input information is included in the stored information. A camera equipped with a function of recording and reading out photographing information. (2) The recording/recording of photographic information according to claim 1, further comprising means for prohibiting data communication with the film cartridge when said determining means determines that the input information is not included in the stored information. Camera with readout function.